1    /*
     2     * Copyright (c) 2015-2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32    /*
    33     *  ======== Core.xdc ========
    34     */
    35    
    36    /*!
    37     *  ======== Core ========
    38     *  "Global Proxy" for target specific Core implementations
    39     */
    40    module Core inherits ti.sysbios.interfaces.ICore
    41    {
    42        /*!
    43         *  ======== numCores ========
    44         *  @a(NOTE)
    45         *  This configuration parameter should be set in a family specific or
    46         *  delegate Core module. Setting "ti.sysbios.hal.Core" module's "numCores"
    47         *  field does not have the desired affect in SMP mode. This is because all
    48         *  SMP aware modules reference the family specific (or delegate) Core
    49         *  module's "numCores" field to determine the number of CPU cores.
    50         */
    51        override config UInt numCores;
    52    
    53        @Macro
    54        override UInt hwiDisable();
    55    
    56        @Macro
    57        override UInt hwiEnable();
    58    
    59        @Macro
    60        override Void hwiRestore(UInt key);
    61    
    62        /*!
    63         *  ======== getId ========
    64         *  return the current core id
    65         */
    66        @Macro
    67        override UInt getId();
    68    
    69        /*!
    70         *  @_nodoc
    71         *  ======== interruptCore ========
    72         *  Cause an interrupt on a particular core.
    73         */
    74        @Macro
    75        override Void interruptCore(UInt coreId);
    76    
    77        /*!
    78         *  ======== lock ========
    79         *  acquire Inter-core lock.
    80         */
    81        @Macro
    82        override IArg lock();
    83    
    84        /*!
    85         *  ======== unlock ========
    86         *  release Inter-core lock.
    87         */
    88        @Macro
    89        override Void unlock();
    90    
    91    internal:   /* not for client use */
    92    
    93        /*! target/device-specific ICore implementation. */
    94        proxy CoreProxy inherits ti.sysbios.interfaces.ICore;
    95    }