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37
38 package ti.sysbios.family.c66.vayu;
39
40 /*!
41 * ======== Power ========
42 * Power Module
43 *
44 * This module is used to reduce power consumption of the DSP subsystem.
45 *
46 * Suspend/Resume with Hibernation: The DSP subsystem context is saved to
47 * external RAM, and GEM is put into standby. Upon the standby transition,
48 * PRCM will transition the power domain to off. Upon release from reset, the
49 * CPU will start executing from reset; a reset hook function will hijack the
50 * boot process, restore CPU state, return back into the Power_suspend() API,
51 * which will restore the remaining DSP subsystem context, and then return
52 * to its caller, to resume the application.
53 *
54 * The application must explicitly call to Power_suspend() for Suspend/Resume
55 * functionality.
56 *
57 * Suspend/Resume can be invoked from Task, Swi, or Idle loop context.
58 * It cannot be invoked from Hwi context.
59 */
60 @DirectCall
61
62 module Power
63 {
64 /*! Suspend Level. */
65 enum Suspend {
66 Suspend_HIBERNATE /*! Suspend to HIBERNATE state */
67 };
68
69 /*! Base address of EDMA TPCC registers */
70 config Ptr tpccRegs = 0x03300000;
71
72 /*! Base address of SYSC registers */
73 config Ptr systemRegs = 0x01D00000;
74
75 /*! Name of segment to load Power's reset code and saved context */
76 metaonly config String loadSegment = "EXT_RAM";
77
78 /*!
79 * ======== suspend ========
80 * Function used for suspend/resume of the DSP subsystem.
81 *
82 * This function will save DSP subsystem context and then put GEM into
83 * standby, as the final steps for a transition to
84 * hibernate (also referred to as off-mode).
85 *
86 * Prior to invoking this function the application software must prepare
87 * for suspend, which includes: configuring PRCM for the appropriate
88 * transition once GEM goes to standby; disabling unintended wakeup
89 * interrupts, and configuring intended wakeups; taking care of any
90 * required notifications to software components; and 'quieting' of the
91 * DSP application (e.g., ensuring that all in-progress EDMA activity
92 * completes).
93 */
94 UInt suspend(Suspend level);
95
96 internal:
97
98 config Bool useStandbyTestFxn = false;
99
100 struct CpuSysRegs {
101 UInt32 AMR;
102 UInt32 CSR;
103 UInt32 IER;
104 UInt32 ISTP;
105 UInt32 IRP;
106 UInt32 ILC;
107 UInt32 RILC;
108 UInt32 REP;
109 UInt32 FADCR;
110 UInt32 FAUCR;
111 UInt32 FMCR;
112 UInt32 SSR;
113 UInt32 GPLYA;
114 UInt32 GPLYB;
115 UInt32 GFPGFR;
116 UInt32 TSR;
117 UInt32 ITSR;
118 UInt32 IERR;
119 }
120
121 struct IntcConfig {
122 UInt32 EVTMASK0;
123 UInt32 EVTMASK1;
124 UInt32 EVTMASK2;
125 UInt32 EVTMASK3;
126 UInt32 EXPMASK0;
127 UInt32 EXPMASK1;
128 UInt32 EXPMASK2;
129 UInt32 EXPMASK3;
130 UInt32 INTMUX1;
131 UInt32 INTMUX2;
132 UInt32 INTMUX3;
133 UInt32 AEGMUX0;
134 UInt32 AEGMUX1;
135 UInt32 INTDMASK;
136 UInt32 PDCCMD;
137 UInt32 PAMAP[16];
138 UInt32 L2CFG;
139 UInt32 L1PCFG;
140 UInt32 L1PCC;
141 UInt32 L1DCFG;
142 UInt32 L1DCC;
143 UInt32 MAR[244];
144 UInt32 L2MPPA[32];
145 UInt32 L1PMPPA[16];
146 UInt32 L1DMPPA[16];
147 };
148
149 struct SystemConfig {
150 UInt32 DSP_SYS_SYSCONFIG;
151 UInt32 BUSCONFIG;
152 UInt32 IRQWAKEEN0;
153 UInt32 IRQWAKEEN1;
154 UInt32 DMAWAKEEN0;
155 UInt32 DMAWAKEEN1;
156 UInt32 EVTOUTSET;
157 UInt32 ERRINTIRQENABLESET;
158 UInt32 EDMAWAKE0IRQENABLESET;
159 UInt32 EDMAWAKE1IRQENABLESET;
160 };
161
162 struct EdmaConfig {
163 UInt32 CLKGDIS;
164 UInt32 DCHMAP[64];
165 UInt32 QCHMAP[8];
166 UInt32 DMAQNUM[8];
167 UInt32 QDMAQNUM;
168 UInt32 QUETCMAP;
169 UInt32 QUEPRI;
170 UInt32 regionAccessBits[24];
171 UInt32 QWMTHRA;
172 UInt32 AETCTL;
173 UInt32 IER;
174 UInt32 IERH;
175 UInt32 QEER;
176 UInt32 PaRAMs[1024];
177 };
178
179 struct CpuRam {
180 UInt32 L1PSram[8192];
181 UInt32 L1DSram[8192];
182 UInt32 L2Sram[73728];
183 }
184
185 struct SubsystemContext {
186 CpuSysRegs cpuSysRegs;
187 IntcConfig configINTC;
188 SystemConfig configSystem;
189 EdmaConfig configEDMA;
190 CpuRam cpuRam;
191 UInt32 taskKey;
192 UInt32 swiKey;
193 UInt32 hwiKey;
194 UInt32 sizeOfL1PSram;
195 UInt32 sizeOfL1DSram;
196 UInt32 sizeOfL2Sram;
197 Bool tscRunning;
198 };
199
200 /*!
201 * ======== resetFxn ========
202 * Startup reset function that checks if coming out of a processor reset
203 * due to Power_suspend(). If no, it will simply return. If yes, it
204 * will restore CPU context, and return using a saved return pointer,
205 * warping back into the Power_suspend API.
206 */
207 Void resetFxn();
208
209 /*!
210 * ======== standby ========
211 * Function used for final CPU register save and transition to standby.
212 */
213 UInt standby(UInt32 *cpuRegs);
214
215 /*!
216 * ======== standbyTest ========
217 * Function only for testing save/restore
218 */
219 UInt standbyTest(UInt32 *cpuRegs);
220 }