1    /*
     2     *  ======== Platform.xdc ========
     3     */
     4    
     5    package ti.platforms.evmDM37XX;
     6    
     7    /*!
     8     *  ======== Platform ========
     9     *  Platform support for the evmDM37XX
    10     *
    11     *  This module implements xdc.platform.IPlatform and defines configuration
    12     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    13     *
    14     *  The configuration parameters are initialized in this package's
    15     *  configuration script (package.cfg) and "bound" to the TCOM object
    16     *  model.  Once they are part of the model, these parameters are
    17     *  queried by a program's configuration script.
    18     *
    19     *  This particular platform has multiple CPUs, and therefore, declares
    20     *  multiple CPU configuration objects.
    21     */
    22    metaonly module Platform inherits xdc.platform.IPlatform
    23    {
    24        readonly config xdc.platform.IPlatform.Board BOARD = {
    25            id:             "0",
    26            boardName:      "evmDM37XX",
    27            boardFamily:    "evmDM37XX",
    28            boardRevision:  null,
    29        };
    30    
    31        readonly config xdc.platform.IExeContext.Cpu DSP = {
    32            id:             "0",
    33            clockRate:      332.0,
    34            catalogName:    "ti.catalog.c6000",
    35            deviceName:     "DM37XX",
    36            revision:       "",
    37        };
    38    
    39        readonly config xdc.platform.IExeContext.Cpu GPP = {
    40            id:             "1",
    41            clockRate:      332.0,
    42            catalogName:    "ti.catalog.arm.cortexa8",
    43            deviceName:     "DM37XX",
    44            revision:       "1.0",
    45        };
    46    instance:
    47    
    48        override readonly config xdc.platform.IPlatform.Memory
    49            externalMemoryMap[string] = [
    50                [
    51                    "DDR",
    52                    {
    53                        name: "DDR",
    54                        base: 0x80000000,
    55                        len: 0x04000000
    56                    }
    57                ]
    58            ];
    59    
    60        /*
    61         *  ======== sectMap ========
    62         *  Define a placement of compiler generated output sections into
    63         *  memory regions defined in the memTab above.
    64         */
    65        override config string codeMemory = "DDR";
    66    
    67        override config string dataMemory = "DDR";
    68    
    69        override config string stackMemory = "DDR";
    70    
    71        /*
    72         *  ======== l1PMode ========
    73         *  Define the amount of L1P RAM used for L1 Program Cache.
    74         *
    75         *  Check the device documentation for valid values.
    76         */
    77        config String l1PMode = "32k";
    78    
    79        /*
    80         *  ======== l1DMode ========
    81         *  Define the amount of L1D RAM used for L1 Data Cache.
    82         *
    83         *  Check the device documentation for valid values.
    84         */
    85        config String l1DMode = "32k";
    86    
    87        /*
    88         *  ======== l2Mode ========
    89         *  Define the amount of L2 RAM used for L2 Cache.
    90         *
    91         *  Check the device documentation for valid values.
    92         */
    93        config String l2Mode = "0k";
    94    
    95    };