Target Platform: ti.platforms.tiva:TM4C123GH6PM:1
Tool Chain Version: 16.9.0
BIOS Version: bios_6_46_02_46_eng
XDCTools Version: xdctools_3_32_01_22
Benchmark | Cycles |
---|---|
Interrupt Latency | 135 |
Hwi_restore() | 6 |
Hwi_disable() | 8 |
Hwi dispatcher prolog | 114 |
Hwi dispatcher epilog | 208 |
Hwi dispatcher | 312 |
Hardware Interrupt to Blocked Task | 498 |
Hardware Interrupt to Software Interrupt | 325 |
Swi_enable() | 60 |
Swi_disable() | 8 |
Post Software Interrupt Again | 30 |
Post Software Interrupt without Context Switch | 84 |
Post Software Interrupt with Context Switch | 157 |
Create a New Task without Context Switch | 1603 |
Set a Task Priority without a Context Switch | 133 |
Task_yield() | 202 |
Post Semaphore No Waiting Task | 42 |
Post Semaphore No Task Switch | 156 |
Post Semaphore with Task Switch | 247 |
Pend on Semaphore No Context Switch | 62 |
Pend on Semaphore with Task Switch | 259 |
Clock_getTicks() | 7 |
POSIX Create a New Task without Context Switch | 3105 |
POSIX Set a Task Priority without a Context Switch | 180 |
POSIX Post Semaphore No Waiting Task | 51 |
POSIX Post Semaphore No Task Switch | 167 |
POSIX Post Semaphore with Task Switch | 257 |
POSIX Pend on Semaphore No Context Switch | 74 |
POSIX Pend on Semaphore with Task Switch | 272 |
The benchmark application was built using BIOS.LibType_Custom with the following BIOS.customCCOpts settings: “–endian=little -mv7M4 –abi=eabi –float_support=fpv4spd16 -ms –opt_for_speed=2 –program_level_compile -o3”.
The M4F target also supports zero latency interrupts. See ti.sysbios.family.arm.m3.Hwi cdocs for details.
See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.