Texas Instruments

Table of Contents

TI Cortex-M4 Timing Benchmarks

Target Platform: ti.platforms.simplelink:CC3200:1

Tool Chain Version: 15.12.2

BIOS Version: bios_6_46_00_22_eng

XDCTools Version: xdctools_3_32_01_11_eng

Benchmark Cycles
Interrupt Latency 127
Hwi_restore() 3
Hwi_disable() 4
Hwi dispatcher prolog 109
Hwi dispatcher epilog 238
Hwi dispatcher 341
Hardware Interrupt to Blocked Task 562
Hardware Interrupt to Software Interrupt 385
Swi_enable() 80
Swi_disable() 15
Post Software Interrupt Again 37
Post Software Interrupt without Context Switch 107
Post Software Interrupt with Context Switch 204
Create a New Task without Context Switch 2056
Set a Task Priority without a Context Switch 171
Task_yield() 217
Post Semaphore No Waiting Task 54
Post Semaphore No Task Switch 210
Post Semaphore with Task Switch 277
Pend on Semaphore No Context Switch 83
Pend on Semaphore with Task Switch 300
Clock_getTicks() 12
POSIX Create a New Task without Context Switch 4090
POSIX Set a Task Priority without a Context Switch 275
POSIX Post Semaphore No Waiting Task 68
POSIX Post Semaphore No Task Switch 223
POSIX Post Semaphore with Task Switch 289
POSIX Pend on Semaphore No Context Switch 100
POSIX Pend on Semaphore with Task Switch 310

The benchmark application was built using BIOS.LibType_Custom with the following BIOS.customCCOpts settings: “–endian=little -mv7M4 –float_support=vfplib –abi=eabi -q -ms –opt_for_speed=2 –program_level_compile -o3”.

See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.