Texas Instruments

Table of Contents

GCC Cortex-A9 with hard FP Timing Benchmarks

Target Platform: ti.platforms.sdp4430

Tool Chain Version: 4.9.3

BIOS Version: bios_6_46_00_22_eng

XDCTools Version: xdctools_3_32_01_11_eng

Benchmark Cycles
Interrupt Latency 270
Hwi_restore() 9
Hwi_disable() 5
Hwi dispatcher prolog 206
Hwi dispatcher epilog 163
Hwi dispatcher 369
Hardware Interrupt to Blocked Task 637
Hardware Interrupt to Software Interrupt 374
Swi_enable() 66
Swi_disable() 8
Post Software Interrupt Again 25
Post Software Interrupt without Context Switch 79
Post Software Interrupt with Context Switch 142
Create a New Task without Context Switch 1309
Set a Task Priority without a Context Switch 104
Task_yield() 275
Post Semaphore No Waiting Task 44
Post Semaphore No Task Switch 198
Post Semaphore with Task Switch 327
Pend on Semaphore No Context Switch 41
Pend on Semaphore with Task Switch 337
Clock_getTicks() 6
POSIX Create a New Task without Context Switch 2235
POSIX Set a Task Priority without a Context Switch 231
POSIX Post Semaphore No Waiting Task 45
POSIX Post Semaphore No Task Switch 204
POSIX Post Semaphore with Task Switch 358
POSIX Pend on Semaphore No Context Switch 45
POSIX Pend on Semaphore with Task Switch 343

As the timer used to run these benchmarks is run at 1/2 the CPU frequency, an deviation of +-2 cycles is to be expected.

See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.