| Benchmark | Cycles | (1) |
| Interrupt Latency | 82 | (2) |
| Hwi_restore() | 0 | |
| Hwi_disable() | 2 | |
| Hwi dispatcher prolog | 85 | |
| Hwi dispatcher epilog | 189 | |
| Hwi dispatcher | 266 | |
| Hardware Interrupt to Blocked Task | 426 | |
| Hardware Interrupt to Software Interrupt | 293 | |
| Swi_enable() | 60 | |
| Swi_disable() | 8 | |
| Post Software Interrupt Again | 27 | |
| Post Software Interrupt without Context Switch | 82 | |
| Post Software Interrupt with Context Switch | 155 | |
| Create a New Task without Context Switch | 1566 | |
| Set a Task Priority without a Context Switch | 133 | |
| Task_yield() | 159 | |
| Post Semaphore, No Waiting Task | 42 | |
| Post Semaphore No Task Switch | 151 | |
| Post Semaphore with Task Switch | 201 | |
| Pend on Semaphore, No Context Switch | 55 | |
| Pend on Semaphore with Task Switch | 211 | |
| Clock_getTicks() | 7 |
(1) The benchmark application was built using BIOS.LibType_Custom with the following BIOS.customCCOpts settings: "--endian=little -mv7M3 --abi=eabi -ms --opt_for_speed=2 --program_level_compile -o3".
Timings were obtained using the Tiva Launchpad TM4C123GH6PM board running at 40MHz.
(2) The M3 target also supports zero latency interrupts. See ti.sysbios.family.arm.m3.Hwi cdocs for details.