| Benchmark | Cycles | (1) |
| Interrupt latency | 1746 | |
| Hwi_enable | 15 | |
| Hwi_disable | 22 | |
| Hwi dispatcher prolog | 1812 | |
| Hwi dispatcher epilog | 758 | |
| Hwi dispatcher | 940 | |
| Hardware Interrupt to Blocked Task | 1655 | |
| Hardware Interrupt to Software Interrupt | 1910 | |
| Swi_enable | 497 | |
| Swi_disable | 307 | |
| Post Software Interrupt Again | 93 | |
| Post Software Interrupt without Context Switch | 309 | |
| Post Software Interrupt with Context Switch | 291 | |
| Create a New Task without Context Switch | 2179 | |
| Set a Task Priority without a Context Switch | 688 | |
| Task_yield | 860 | |
| Post Semaphore, No Waiting Task | 95 | |
| Post Semaphore No Task Switch | 348 | |
| Post Semaphore with Task Switch | 444 | |
| Pend on Semaphore, No Context Switchi | 218 | |
| Pend on Semaphore with Task Switch | 362 | |
| Clock_getTicks | 13 |
(1) The benchmark application was built using BIOS.LibType_Custom with the following compiler options: "--neon --endian=little -mv7A8 --abi=eabi -ms --embed_inline_assembly --opt_for_speed=2 --program_level_compile -o3 -g --optimize_with_debug".
Timings were obtained using the evmDM8168 development board.
The A8 core was running at 987MHz, with L1 & L2 caches enabled, and all code & data placed in OCMC0.
Unlike other target benchmarks that are collected using flat memory simulators or hardware with zero wait-state memory and no cache, these A8F numbers are collected on a real board with cache enabled and no-attempt to pre-fill the cache. These numbers are effected by varying amounts of cache filling depending on the dynamics of the cache and the previous function calls.