1 /*
2 * Copyright (c) 2011, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * */
32 /*
33 * ======== Hwi.xdc ========
34 *
35 */
36
37 package ti.sysbios.family.c28;
38
39 import xdc.rov.ViewInfo;
40
41 import xdc.runtime.Diags;
42 import xdc.runtime.Log;
43 import xdc.runtime.Assert;
44 import xdc.runtime.Error;
45
46 /*!
47 * ======== Hwi ========
48 * Hardware Interrupt Support Module.
49 *
50 * This Hwi module provides C28 family-specific implementations of the
51 * APIs defined in {@link ti.sysbios.interfaces.IHwi IHwi}.
52 *
53 * Additional C28 device-specific APIs are also provided.
54 *
55 * ISRs specified with Hwi_plug will not go through the dispatcher; the
56 * ISR function will be directly plugged into the vector table. Hwi_plug can
57 * be used for any ISR which does not call any SYS/BIOS APIs.
58 *
59 * ISRs can be plugged or created statically in the configuration script or
60 * dynamically at runtime.
61 *
62 * @p(html) 63 * <h3> PIE interrupts </h3>
64 * The peripheral interrupt expansion (PIE) block multiplexes 96 interrupts
65 * into 12 CPU interrupts. The PIE vector table includes entries for each of
66 * these 96 interrupts. The relationship between the numbers corresponding
67 * to PIE interrupts and their groups (CPU interrupt) is as follows:
68 * PIEGROUPNUM = [(PIENUM - 32) / 8] + 1
69 *
70 * PIE interrupts must clear the CPU acknowledge bit for their respective PIE
71 * block before further interrupts from that block can occur. The dispatcher
72 * (used by interrupts created using {@link #create}) takes care of this.
73 * PIE interrupts plugged with Hwi_plug (which do not use the dispatcher) must
74 * call {@link #ack} before returning.
75 *
76 * The Hwi module supports zero latency operation. CPU interrupts classified
77 * as zero latency are not disabled by the {@link #disable} call and are
78 * generally left enabled except when explicitly disabled using
79 * {@link #disableIER} or {@link #disablePIEIER}. Refer to
80 * {@link #zeroLatencyIERMask} for using information.
81 *
82 * @a(NOTE) 83 * In this Hwi module implementation, the instance config parameter value
84 * {@link #MaskingOption_LOWER} is equivalent to {@link #MaskingOption_SELF}.
85 * Statically configuring a Hwi object's {@link #Params.maskSetting} to
86 * {@link #MaskingOption_LOWER} will result in the generation of a benign
87 * build warning. Dynamic usages of {@link #MaskingOption_LOWER} will be
88 * silently converted to {@link #MaskingOption_SELF}.
89 *
90 * @p(html) 91 * <h3> Calling Context </h3>
92 * <table border="1" cellpadding="3">
93 * <colgroup span="1"></colgroup> <colgroup span="5" align="center"></colgroup>
94 *
95 * <tr><th> Function </th><th> Hwi </th><th> Swi </th><th> Task </th><th> Main </th><th> Startup </th></tr>
96 * <!-- -->
97 * <tr><td> {@link #clearInterrupt} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> N </td></tr>
98 * <tr><td> {@link #disable} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td></tr>
99 * <tr><td> {@link #disableIER} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td></tr>
100 * <tr><td> {@link #disableInterrupt} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> N </td></tr>
101 * <tr><td> {@link #disablePIEIER} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> N </td></tr>
102 * <tr><td> {@link #enable} </td><td> Y </td><td> Y </td><td> Y </td><td> N </td><td> N </td></tr>
103 * <tr><td> {@link #enableIER} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td></tr>
104 * <tr><td> {@link #enableInterrupt} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> N </td></tr>
105 * <tr><td> {@link #enablePIEIER} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> N </td></tr>
106 * <tr><td> {@link #getHandle} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> N </td></tr>
107 * <tr><td> {@link #getIFR} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td></tr>
108 * <tr><td> {@link #getIntrReturnAddr} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td></tr>
109 * <tr><td> {@link #Params_init} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> N </td></tr>
110 * <tr><td> {@link #pieEnabled} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td></tr>
111 * <tr><td> {@link #plug} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td></tr>
112 * <tr><td> {@link #restore} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td></tr>
113 * <tr><td> {@link #restoreIER} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td></tr>
114 * <tr><td> {@link #restoreInterrupt} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td></tr>
115 * <tr><td> {@link #ack} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td></tr>
116 * <tr><td> {@link #create} </td><td> N </td><td> N </td><td> Y </td><td> Y </td><td> N </td></tr>
117 * <tr><td> {@link #construct} </td><td> N </td><td> N </td><td> Y </td><td> Y </td><td> N </td></tr>
118 * <tr><td> {@link #delete} </td><td> N </td><td> N </td><td> Y </td><td> Y </td><td> N </td></tr>
119 * <tr><td> {@link #destruct} </td><td> N </td><td> N </td><td> Y </td><td> Y </td><td> N </td></tr>
120 * <tr><td> {@link #getHookContext} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> N </td></tr>
121 * <tr><td> {@link #reconfig} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> N </td></tr>
122 * <tr><td> {@link #setFunc} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> N </td></tr>
123 * <tr><td> {@link #setHookContext} </td><td> Y </td><td> Y </td><td> Y </td><td> Y </td><td> N </td></tr>
124 * <tr><td colspan="6"> Definitions: <br />
125 * <ul>
126 * <li> <b>Hwi</b>: API is callable from a Hwi thread. </li>
127 * <li> <b>Swi</b>: API is callable from a Swi thread. </li>
128 * <li> <b>Task</b>: API is callable from a Task thread. </li>
129 * <li> <b>Main</b>: API is callable during any of these phases: </li>
130 * <ul>
131 * <li> In your module startup after this module is started (e.g.
132 Hwi_Module_startupDone() returns TRUE). </li>
133 * <li> During xdc.runtime.Startup.lastFxns. </li>
134 * <li> During main().</li>
135 * <li> During BIOS.startupFxns.</li>
136 * </ul>
137 * <li> <b>Startup</b>: API is callable during any of these phases:</li>
138 * <ul>
139 * <li> During xdc.runtime.Startup.firstFxns.</li>
140 * <li> In your module startup before this module is started
141 (e.g. Hwi_Module_startupDone() returns FALSE).</li>
142 * </ul>
143 * </ul>
144 * </td></tr>
145 *
146 *
147 * </table>
148 * @p 149 *
150 */
151
152 @Template("./Hwi.xdt") /* generates the vector table and the dispatcher */
153 @ModuleStartup /* generate a call to Hwi_init at startup */
154
155 module Hwi inherits ti.sysbios.interfaces.IHwi
156 {
157
158 // -------- Module Constants --------
159
160 /*! C28 supports 32 interrupts. */
161 const Int NUM_INTERRUPTS = 32;
162 /*! C28 supports 96 PIE interrupts */
163 const Int NUM_INTERRUPTS_PIE = 96;
164 const Int NUM_INTERRUPTS_ALL = NUM_INTERRUPTS + NUM_INTERRUPTS_PIE;
165
166 // -------- Module Types --------
167
168 /*! Hwi plug function type definition, which doesn't take an arg. */
169 typedef Void (*PlugFuncPtr)(void);
170
171 /*! @_nodoc */
172 metaonlystruct BasicView {
173 Ptr halHwiHandle;
174 String label;
175 Int intNum;
176 String fxn;
177 UArg arg;
178 Ptr irp;
179 String disableMask; /* Interrupts to mask during ISR. */
180 String restoreMask; /* Interrupts to restore after ISR. */
181 };
182
183 /*! @_nodoc */
184 metaonlystruct ModuleView {
185 String options[4];
186 SizeT hwiStackPeak;
187 SizeT hwiStackSize;
188 Ptr hwiStackBase;
189 String globalEnable;
190 String shadowIER;
191 };
192
193 @Facet
194 metaonlyconfig ViewInfo.Instance rovViewInfo =
195 ViewInfo.create({
196 viewMap: [
197 ['Basic', {type: ViewInfo.INSTANCE, viewInitFxn: 'viewInitBasic', structName: 'BasicView'}],
198 ['Module', {type: ViewInfo.MODULE, viewInitFxn: 'viewInitModule', structName: 'ModuleView'}]
199 ]
200 });
201
202 /*!
203 * Assert raised when an invalid interrupt number is passed to a Hwi call
204 */
205 config Assert.Id A_badIntNum = {
206 msg: "A_badIntNum: Invalid interrupt number"
207 };
208
209 /*!
210 * Assert raised when an invalid argument has been passed to a function
211 */
212 config Assert.Id A_invalidArg = {
213 msg: "A_invalidArg: Invalid argument"
214 };
215
216 /*!
217 * Assert raised when there is a conflict with the zero latency IER mask
218 *
219 * This assert is raised when trying to create a Hwi with an intNum that
220 * conflicts with the supplied zero latency IER mask.
221 */
222 config Assert.Id A_zeroLatencyConflict = {
223 msg: "A_zeroLatencyConflict: Conflict with zero latency IER mask"
224 };
225
226 /*!
227 * Error raised when an unplugged interrupt is flagged
228 */
229 config Error.Id E_unpluggedInterrupt = {
230 msg: "E_unpluggedInterrupt: Unplugged interrupt flagged: intr# %d"
231 };
232
233 /*!
234 * Error raised when Hwi is already defined
235 */
236 config Error.Id E_alreadyDefined = {
237 msg: "E_alreadyDefined: Hwi already defined: intr# %d"
238 };
239
240
241 // -------- Module Configuration --------
242
243 /*!
244 * ======== NonDispatchedInterrupt ========
245 * Non-dispatched interrupt object
246 *
247 * Provided so that XGCONF users can easily plug non-dispatched interrupts
248 *
249 * @field(intNum) Interrupt number
250 * @field(fxn) Non-dispatched interrupt service routine (ISR)
251 * @field(enableInt) Enable the interrupt after plugging the vector
252 */
253 metaonlystruct NonDispatchedInterrupt {
254 Int intNum;
255 PlugFuncPtr fxn;
256 Bool enableInt;
257 };
258
259 /*!
260 * ======== nonDispatchedInterrupts ========
261 * Non-dispatched interrupt array.
262 *
263 * Provided so that XGCONF users can easily plug non-dispatched interrupts
264 */
265 metaonlyconfig NonDispatchedInterrupt nonDispatchedInterrupts[string];
266
267 /*!
268 * ======== zeroLatencyIERMask ========
269 * Zero Latency IER Mask
270 *
271 * CPU interrupts specified in this mask (which corresponds to the 16-bit
272 * IER register) will never be disabled. This means that the
273 * {@link #disable}, {@link #enable}, and {@link #restore} calls leave the
274 * zero latency CPU interrupts enabled after being called. Zero latency
275 * operation may be used to ensure minimal interrupt-to-ISR time for
276 * non-BIOS interrupt handlers in applications that demand low latency.
277 *
278 * It is important to note that zero latency and non-zero latency PIE
279 * interrupts may not share a common PIE group. The entire PIE group whose
280 * bit is set in the zeroLatencyIERMask will be treated as zero latency.
281 *
282 * Enabling zero latency mode (specifying a non-zero zeroLatencyIERMask)
283 * generates alternate (and slower) code used to disable, enable and
284 * restore interrupts. This alternate code will maintain a shadow copy
285 * of interrupt state (IER register and global interrupt state). {@link 286 * #disableIER}, {@link #enableIER} and {@link #restoreIER} will update
287 * both the IER register and its shadow. The {@link #disable} call
288 * will copy the zero latency IER mask (supplied here) into the IER
289 * register. The {@link #enable} call will copy the contents of the
290 * shadow IER register into the actual register. The {@link #restore}
291 * call may either disable or enable the non-zero-latency interrupts.
292 *
293 * It is important to be aware of the performance penalty associated with
294 * using zero latency interrupts before using this feature.
295 *
296 * Example:
297 *
298 * @p(code) 299 * var Hwi = xdc.useModule('ti.sysbios.family.c28.Hwi');
300 * Hwi.zeroLatencyIERMask = 0x0010;
301 *
302 * // PIE group 5 classified as zero latency
303 * @p 304 *
305 */
306 config Bits16 zeroLatencyIERMask = 0x0;
307
308 /*!
309 * Issued just prior to Hwi function invocation (with interrupts disabled)
310 */
311 config Log.Event LM_begin = {
312 mask: Diags.USER1 | Diags.USER2,
313 msg: "LM_begin: hwi: 0x%x, func: 0x%x, preThread: %d, intNum: %d, irp: 0x%x"
314 };
315
316 /*!
317 * Issued just after return from Hwi function (with interrupts disabled)
318 */
319 config Log.Event LD_end = {
320 mask: Diags.USER2,
321 msg: "LD_end: hwi: 0x%x"
322 };
323
324 // -------- Module Functions --------
325
326 /*!
327 * ======== disable ========
328 */
329 @DirectCall
330 override UInt disable();
331
332 /*!
333 * ======== enable ========
334 */
335 @DirectCall
336 override UInt enable();
337
338 /*!
339 * ======== restore ========
340 */
341 @DirectCall
342 override Void restore(UInt key);
343
344 /*!
345 * ======== inUseMeta ========
346 * @_nodoc 347 * Check for Hwi already in use.
348 * For internal SYS/BIOS use only.
349 * Should be called prior to any internal Hwi.create().
350 *
351 * @param(intNum) interrupt number
352 */
353 metaonly Bool inUseMeta(UInt intNum);
354
355 /*!
356 * ======== plug ========
357 * Plug an interrupt vector with an ISR address.
358 *
359 * plug hooks up the specified function as the branch target for a
360 * hardware interrupt (fielded by the CPU) at the vector address
361 * corresponding to intNum. plug does not enable the interrupt. Use
362 * Hwi_enableIER to enable specific interrupts.
363 *
364 * This API can plug the full set of vectors supported by the PIE (0-127).
365 *
366 * @param(intNum) interrupt number
367 * @param(fxn) pointer to ISR function
368 */
369 Void plug(UInt intNum, PlugFuncPtr fxn);
370
371 /*!
372 * ======== plugMeta ========
373 * Statically plug an interrupt vector with an ISR address.
374 *
375 * @param(intNum) Interrupt number
376 * @param(fxn) Pointer to ISR function
377 */
378 metaonly Void plugMeta(UInt intNum, PlugFuncPtr fxn);
379
380 /*!
381 * ======== getHandle ========
382 * Returns Hwi handle associated with intNum
383 *
384 * @param(intNum) Interrupt number
385 *
386 * @b(returns) Hwi handle associated with intNum
387 */
388 Handle getHandle(UInt intNum);
389
390 /*!
391 * ======== disableInterrupt ========
392 * @Hwi The behavior of Hwi_disableInterrupt depends on whether the intNum
393 * is a PIE interrupt number. If so, the appropriate bit in its group's
394 * PIEIER register is cleared. Note that, unlike
395 * {@link #enableInterrupt}, disableInterrupt does not touch IER bits
396 * when operating upon a PIE interrupt number. If intNum is a non-PIE
397 * interrupt (1 <= intNum <= 14), then the corresponding bit in the IER
398 * register is cleared.
399 *
400 * @Hwi The return value is a key whose value reflects the previous state of
401 * the PIEIER bit.
402 */
403 override UInt disableInterrupt(UInt intNum);
404
405 /*!
406 * ======== enableInterrupt ========
407 * @Hwi The behavior of enableInterrupt depends on whether the intNum
408 * is a PIE interrupt number. If so, two operations are
409 * performed. The IER bit for intNum's PIE group is set and the
410 * appropriate bit in its group's PIEIER register is also set. However,
411 * if intNum is a non-PIE interrupt (1 <= intNum <= 14), then the
412 * corresponding bit in the IER register is set.
413 *
414 * @Hwi The return value is a key whose value reflects the previous state of
415 * the PIEIER bit. Note that the key does not reflect
416 * the IER register's previous state even if its state is modified by this
417 * call.
418 */
419 override UInt enableInterrupt(UInt intNum);
420
421 /*!
422 * ======== restoreInterrupt ========
423 * @Hwi The behavior of restoreInterrupt depends on whether the intNum
424 * is a PIE interrupt number. If so, the supplied key returned by an
425 * earlier call to {@link #disableInterrupt} and {@link #enableInterrupt}
426 * is used to restore the corresponding PIEIER bit to its state before
427 * the earlier call.
428 * However, if intNum is a non-PIE interrupt (1 <= intNum <= 14), then the
429 * corresponding bit in the IER register is restored using the key.
430 */
431 override Void restoreInterrupt(UInt intNum, UInt key);
432
433 /*!
434 * ======== clearInterrupt ========
435 * @Hwi The behavior of clearInterrupt depends on whether the intNum
436 * is a PIE interrupt number. If so, the corresponding PIEIFR bit is
437 * cleared. If not (1 <= intNum <= 14), the corresponding IFR bit is
438 * cleared.
439 */
440 override Void clearInterrupt(UInt intNum);
441
442 /*!
443 * ======== disableIER ========
444 * Disable certain maskable interrupts.
445 *
446 * Atomically disables specific interrupts by clearing the bits
447 * specified by mask in the Interrupt Enable Register (IER).
448 *
449 * The IER bits to be cleared should be set to 1 in the mask.
450 *
451 * @param(mask) bitmask of interrupts to disable
452 *
453 * @b(returns) previous IER settings bitmask
454 */
455 Bits16 disableIER(Bits16 mask);
456
457 /*!
458 * ======== enableIER ========
459 * Enable certain maskable interrupts.
460 *
461 * Atomically enables specific interrupts by setting the bits
462 * specified by mask in the Interrupt Enable Register (IER).
463 *
464 * The IER bits to be set should be set to 1 in the mask.
465 *
466 * @param(mask) Bitmask of interrupts to enable
467 *
468 * @b(returns) Previous IER settings bitmask
469 */
470 Bits16 enableIER(Bits16 mask);
471
472 /*!
473 * ======== restoreIER ========
474 * Restore maskable interrupts
475 *
476 * Restores maskable interrupts to the state they were in
477 * when either disableIER() or enableIER() was called.
478 *
479 * Atomically writes the given mask to the IER register. Typically used
480 * to restore the IER register to the state returned from a call to
481 * either {@link #disableIER()} or {@link #enableIER()}.
482 *
483 * @param(mask) Bitmask of interrupts to restore
484 *
485 * @b(returns) Previous IER settings bitmask
486 */
487 Bits16 restoreIER(Bits16 mask);
488
489 /*!
490 * ======== enablePIEIER ========
491 * Enable interrupts in a PIE group
492 *
493 * Atomically enable PIE interrupts in a single PIE group
494 * according to supplied PIEIER bitmask
495 *
496 * @param(groupNum) PIE group number
497 * @param(pieMask) PIEIER enable mask for group
498 *
499 * @b(returns) Previous PIEIER settings bitmask
500 */
501 Bits16 enablePIEIER(UInt groupNum, Bits16 pieMask);
502
503 /*!
504 * ======== disablePIEIER ========
505 * Disable interrupts in a PIE group
506 *
507 * Atomically disable PIE interrupts in a single PIE group
508 * according to supplied PIEIER bitmask
509 *
510 * @param(groupNum) PIE group number
511 * @param(pieMask) PIEIER disable mask for group
512 *
513 * @b(returns) Previous PIEIER settings bitmask
514 */
515 Bits16 disablePIEIER(UInt groupNum, Bits16 pieMask);
516
517 /*!
518 * ======== restorePIEIER ========
519 * Restores interrupts in a PIE group
520 *
521 * Atomically restore PIE interrupts in a single PIE group
522 * according to supplied PIEIER bitmask
523 *
524 * @param(groupNum) PIE group number
525 * @param(pieMask) PIEIER restore mask for group
526 *
527 * @b(returns) Previous PIEIER settings bitmask
528 */
529 Bits16 restorePIEIER(UInt groupNum, Bits16 pieMask);
530
531 /*!
532 * ======== getInterruptFlag ========
533 * @_nodoc 534 * Returns IFR/PIEIFR flag corresponding to a single interrupt number
535 *
536 * If intNum >= 32, the PIEIFR bit corresponding to intNum is returned.
537 * If 1 <= intNum <= 14, the IFR bit corresponding to intNum is returned.
538 *
539 * @param(intNum) Interrupt number
540 *
541 * @b(returns) Nonzero if interrupt is flagged, zero otherwise
542 */
543 @DirectCall
544 Bits16 getInterruptFlag(UInt intNum);
545
546 /*!
547 * ======== getIERMask ========
548 * @_nodoc 549 * Calculates IER mask based on an array of C28x interrupt vector IDs
550 *
551 * For each vector id the supplied array, a bit in the generated IER mask
552 * is set. If 1 <= intNum <= 14, the corresponding IER bit is set. If
553 * intNum >= 32, the IER mask bit corresponding to the PIE interrupt's
554 * group is set.
555 *
556 * getIERMask may be used to generate a zero latency IER mask given
557 * an array of vector IDs.
558 *
559 * @param(vecIds) Array of vector IDs
560 *
561 * @b(returns) Calculated IER Mask
562 */
563 metaonly UInt getIERMask(UInt vecIds[]);
564
565 instance:
566
567 /*!
568 * Dispatcher auto-nesting interrupt disable mask.
569 *
570 * When the dispatcher's auto interrupt nesting support feature
571 * is enabled (see {@link #dispatcherAutoNestingSupport}),
572 * this mask defines which IER bits are disabled prior to invoking
573 * the user's ISR function with GIE = 1.
574 *
575 * disableMask bits set to 1 correspond to IER bits that will be cleared
576 * prior to invoking the ISR.
577 *
578 * The value of this mask is normally auto-calculated based on the
579 * value of the maskSetting. However, manual setting of this
580 * mask is enabled by setting the maskSetting to
581 * {@link #MaskingOption MaskingOption_BITMASK}.
582 *
583 * The default value is derived from the
584 * {@link #MaskingOption MaskingOption_SELF}
585 * maskSetting.
586 */
587 config Bits16 disableMask = 0;
588
589 /*!
590 * Dispatcher auto-nesting interrupt restore mask.
591 *
592 * When the dispatcher's auto interrupt nesting support feature
593 * is enabled (see {@link #dispatcherAutoNestingSupport}),
594 * this mask defines which IER bits are restored to their previous
595 * setting upon return from the user's ISR function.
596 *
597 * restoreMask bits set to 1 correspond to IER bits that will be restored.
598 *
599 * The value of this mask is normally auto-calculated based on the
600 * value of the maskSetting. However, manual setting of this
601 * mask is enabled by setting the maskSetting to
602 * {@link #MaskingOption MaskingOption_BITMASK}.
603 *
604 * The default value is derived from the
605 * {@link #MaskingOption MaskingOption_SELF}
606 * maskSetting.
607 */
608 config Bits16 restoreMask = 0;
609
610 /*!
611 * Interrupt priority. Not supported on this target.
612 */
613 overrideconfig Int priority = 0;
614
615 /*!
616 * ======== reconfig ========
617 * Reconfigure a dispatched interrupt.
618 */
619 Void reconfig(FuncPtr fxn, const Params *params);
620
621 /*!
622 * Enable automatic acknowledgement of PIE interrupts by the Hwi interrupt
623 * dispatcher.
624 */
625 config Bool enableAck = true;
626
627 internal: /* not for client use */
628 /*
629 * Swi and Task module function pointers.
630 * Used to decouple Hwi from Swi and Task when
631 * dispatcherSwiSupport or
632 * dispatcherTaskSupport is false.
633 */
634 config UInt (*swiDisable)();
635 config Void (*swiRestoreHwi)(UInt);
636 config UInt (*taskDisable)();
637 config Void (*taskRestoreHwi)(UInt);
638
639 /*
640 * The IFR cregister is write-only, so a special assembly function is
641 * needed to read the value of the IFR on the 28x.
642 */
643 Bits16 getIFR();
644
645 /* 'ack' interrupt in case of PIE */
646 Void ack(Handle hwi);
647
648 /* Used to temporarily plug PIE vector table when clearing PIEIFR */
649 Void interruptReturn();
650
651 /* Used in assert that no conflict exists between zero/non-zero latency */
652 Bits16 getIERBit(UInt intNum);
653
654 /* Interrupt Dispatcher */
655 Void dispatchC(Int intNum);
656
657 /* unplugged interrupt handler */
658 Void unPluggedInterrupt();
659
660 /* const array to hold all HookSet objects. */
661 config HookSet hooks[length] = [];
662
663 /* Meta World Only Hwi Configuration Object. */
664 metaonlystruct InterruptObj {
665 String name; /* symbol used for vector table entry */
666 Bool used; /* Interrupt already defined? */
667 Bool useDispatcher; /* Should dispatcher handle this Int? */
668 FuncPtr fxn; /* Dispatched ISR function */
669 PlugFuncPtr pfxn; /* "Hwi_plug'd" ISR function. */
670 };
671
672 /* Used for statically fixing certain PIEIER addresses */
673 const Ptr PIEIER1_ADDR = 0x000CE2;
674
675 /* Example string: '0x02a0' */
676 metaonlyconfig String zeroLatencyIERMaskStr;
677 metaonlyconfig String nonZeroLatencyIERMaskStr;
678
679 /*
680 * Meta-only array of interrupt objects.
681 * This meta-only array of Hwi config objects is initialized
682 * in Hwi.xs:module$meta$init().
683 */
684 metaonlyconfig InterruptObj interrupt[NUM_INTERRUPTS_ALL];
685
686 struct Instance_State {
687 UInt intNum; /* interrupt number */
688 Bool enableInt; /* enable interrupt during startup? */
689 Bool enableAck; /* should dispatcher ack the int? */
690 Bits16 disableMask; /* Interrupts to mask during ISR. */
691 Bits16 restoreMask; /* Interrupts to restore after ISR. */
692 Bits16 ierBitMask; /* bit number in IER for the instance */
693 UArg arg; /* Argument to Hwi function. */
694 FuncPtr fxn; /* Hwi function. */
695 Irp irp; /* for IRP tracking */
696 Ptr hookEnv[];
697 };
698
699 struct Module_State {
700 Bits16 ierMask; /* Initial IER mask */
701 Char *isrStack; /* Points to isrStack address */
702 Char *taskSP; /* temporary storage of Task's SP */
703 Handle dispatchTable[];/* dispatch table */
704 Irp irp; /* current IRP */
705 Bool globalEnable; /* for zero latency only */
706 Bits16 shadowIER; /* for zero latency only */
707 };
708 }
709 /*
710 * @(#) ti.sysbios.family.c28; 2, 0, 0, 0,418; 2-2-2011 15:06:11; /db/vtree/library/trees/avala/avala-o27x/src/ xlibrary
711 712 */
713