1    /* 
     2     * Copyright (c) 2011, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     * */
    32    /*
    33     *  ======== Hwi.xdc ========
    34     *
    35     */
    36    package ti.sysbios.family.arm.dm6446;
    37    
    38    import xdc.rov.ViewInfo;
    39    
    40    import xdc.runtime.Diags;
    41    import xdc.runtime.Error;
    42    import xdc.runtime.Log;
    43    
    44    /*!
    45     *  ======== Hwi ========
    46     *  Hardware Interrupt Support Module.
    47     *  
    48     *  This Hwi module provides ARM family-specific implementations of the
    49     *  APIs defined in {@link ti.sysbios.interfaces.IHwi IHwi}.
    50     *
    51     *  Additional ARM device-specific APIs are also provided.
    52     *
    53     *  @a(NOTE)
    54     *  In this Hwi module implementation, the instance config parameter value
    55     *  {@link #MaskingOption_LOWER} is equivalent to {@link #MaskingOption_SELF}.
    56     *  Statically configuring a Hwi object's {@link #Params.maskSetting} to 
    57     *  {@link #MaskingOption_LOWER} will result in the generation of a benign
    58     *  build warning. Dynamic usages of {@link #MaskingOption_LOWER} will be
    59     *  silently converted to {@link #MaskingOption_SELF}.
    60     *
    61     *  @p(html)
    62     *  <h3> Calling Context </h3>
    63     *  <table border="1" cellpadding="3">
    64     *    <colgroup span="1"></colgroup> <colgroup span="5" align="center"></colgroup>
    65     *
    66     *    <tr><th> Function                 </th><th>  Hwi   </th><th>  Swi   </th><th>  Task  </th><th>  Main  </th><th>  Startup  </th></tr>
    67     *    <!--                                                                                                                 -->
    68     *    <tr><td> {@link #clearInterrupt}   </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td></tr>
    69     *    <tr><td> {@link #create}           </td><td>   N    </td><td>   N    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    70     *    <tr><td> {@link #disable}          </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td></tr>
    71     *    <tr><td> {@link #disableEINT0}     </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    72     *    <tr><td> {@link #disableEINT1}     </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    73     *    <tr><td> {@link #disableFIQ}       </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td></tr>
    74     *    <tr><td> {@link #disableInterrupt} </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    75     *    <tr><td> {@link #disableIRQ}       </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td></tr>
    76     *    <tr><td> {@link #enable}           </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td><td>   N    </td></tr>
    77     *    <tr><td> {@link #enableEINT0}      </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    78     *    <tr><td> {@link #enableEINT1}      </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    79     *    <tr><td> {@link #enableFIQ}        </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td><td>   N    </td></tr>
    80     *    <tr><td> {@link #enableInterrupt}  </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    81     *    <tr><td> {@link #enableIRQ}        </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td><td>   N    </td></tr>
    82     *    <tr><td> {@link #getHandle}        </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    83     *    <tr><td> {@link #Params_init}      </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td></tr>
    84     *    <tr><td> {@link #restore}          </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td></tr>
    85     *    <tr><td> {@link #restoreEINT0}     </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    86     *    <tr><td> {@link #restoreEINT1}     </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    87     *    <tr><td> {@link #restoreFIQ}       </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td></tr>
    88     *    <tr><td> {@link #restoreInterrupt} </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td></tr>
    89     *    <tr><td> {@link #restoreIRQ}       </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td></tr>
    90     *    <tr><td> {@link #setPriority}      </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    91     *    <tr><td> {@link #construct}        </td><td>   N    </td><td>   N    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    92     *    <tr><td> {@link #delete}           </td><td>   N    </td><td>   N    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    93     *    <tr><td> {@link #destruct}         </td><td>   N    </td><td>   N    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    94     *    <tr><td> {@link #getHookContext}   </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    95     *    <tr><td> {@link #reconfig}         </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    96     *    <tr><td> {@link #setFunc}          </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    97     *    <tr><td> {@link #setHookContext}   </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   Y    </td><td>   N    </td></tr>
    98     *    <tr><td colspan="6"> Definitions: <br />
    99     *       <ul>
   100     *         <li> <b>Hwi</b>: API is callable from a Hwi thread. </li>
   101     *         <li> <b>Swi</b>: API is callable from a Swi thread. </li>
   102     *         <li> <b>Task</b>: API is callable from a Task thread. </li>
   103     *         <li> <b>Main</b>: API is callable during any of these phases: </li>
   104     *           <ul>
   105     *             <li> In your module startup after this module is started (e.g. Hwi_Module_startupDone() returns TRUE). </li>
   106     *             <li> During xdc.runtime.Startup.lastFxns. </li>
   107     *             <li> During main().</li>
   108     *             <li> During BIOS.startupFxns.</li>
   109     *           </ul>
   110     *         <li> <b>Startup</b>: API is callable during any of these phases:</li>
   111     *           <ul>
   112     *             <li> During xdc.runtime.Startup.firstFxns.</li>
   113     *             <li> In your module startup before this module is started (e.g. Hwi_Module_startupDone() returns FALSE).</li>
   114     *           </ul>
   115     *       </ul>
   116     *    </td></tr>
   117     *
   118     *
   119     *  </table>
   120     *  @p
   121     */
   122    
   123    @Template("./Hwi.xdt")  /* generates the vector table and the dispatcher */
   124    @ModuleStartup          /* generates call to Hwi_Module_startup at startup */
   125    
   126    module Hwi inherits ti.sysbios.interfaces.IHwi
   127    {
   128    
   129        // -------- Module Constants --------
   130    
   131        /*! The DM6446 ARM Interrupt Controller supports 64 interrupts. */
   132        const Int NUM_INTERRUPTS = 64;
   133    
   134        // -------- Module Types --------
   135    
   136        /*! Hwi vector function type definition. */
   137        typedef Void (*VectorFuncPtr)(void);
   138    
   139        /*!
   140         * ARM Interrupt Controller. 
   141         */
   142        struct AINTC {
   143            UInt32 FIQ0;    /*! 0x00 Interrupt Status of INT [31:0] if mapped to FIQ */
   144            UInt32 FIQ1;    /*! 0x04 Interrupt Status of INT [63:32] if mapped to FIQ */
   145            UInt32 IRQ0;    /*! 0x08 Interrupt Status of INT [31:0] if mapped to IRQ */
   146            UInt32 IRQ1;    /*! 0x0C Interrupt Status of INT [63:32] if mapped to IRQ */
   147            UInt32 FIQENTRY;/*! 0x10 Entry Address [28:0] for valid FIQ interrupt */
   148            UInt32 IRQENTRY;/*! 0x14 Entry Address [28:0] for valid IRQ interrupt */
   149            UInt32 EINT0;   /*! 0x18 Interrupt Enable Register 0 */
   150            UInt32 EINT1;   /*! 0x1C Interrupt Enable Register 1 */
   151            UInt32 INTCTL;  /*! 0x20 Interrupt Operation Control Register */
   152            UInt32 EABASE;  /*! 0x24 Interrupt Entry Base Address */
   153            UInt32 RES[2];  /*! 0x28 reserved */
   154            UInt32 INTPR[8];/*! 0x30 Interrupt 0-7 Priority select */
   155    //      UInt32 INTPR1;  /*! 0x34 Interrupt 8-15 Priority select */
   156    //      UInt32 INTPR2;  /*! 0x38 Interrupt 16-23 Priority select */
   157    //      UInt32 INTPR3;  /*! 0x3C Interrupt 24-31 Priority select */
   158    //      UInt32 INTPR4;  /*! 0x40 Interrupt 32-39 Priority select */
   159    //      UInt32 INTPR5;  /*! 0x44 Interrupt 40-47 Priority select */
   160    //      UInt32 INTPR6;  /*! 0x48 Interrupt 48-55 Priority select */
   161    //      UInt32 INTPR7;  /*! 0x4C Interrupt 56-63 Priority select */
   162        };
   163    
   164        /*!
   165         * Physical ARM Interrupt Controller Device. 
   166         * Short name is "Hwi_aIntc" 
   167         * Long name is "ti_sysbios_family_arm_dm6446_Hwi_aIntc" 
   168         */
   169        extern volatile AINTC aIntc;
   170      
   171        metaonly struct BasicView {
   172            Ptr         halHwiHandle;
   173            String      label;
   174            Int         intNum;
   175            Int         priority;
   176            String      fxn; 
   177            UArg        arg; 
   178            Ptr         irp; 
   179            String      status;
   180        };
   181        
   182        metaonly struct ModuleView {
   183            String      options[4];
   184            SizeT       hwiStackPeak;
   185            SizeT       hwiStackSize;
   186            Ptr         hwiStackBase;
   187        };
   188    
   189        @Facet
   190        metaonly config ViewInfo.Instance rovViewInfo = 
   191            ViewInfo.create({
   192                viewMap: [
   193                    ['Basic', {type: ViewInfo.INSTANCE, viewInitFxn: 'viewInitBasic', structName: 'BasicView'}],
   194                    ['Module', {type: ViewInfo.MODULE, viewInitFxn: 'viewInitModule', structName: 'ModuleView'}]
   195                ]
   196            });
   197    
   198        // -------- Module Parameters --------
   199    
   200        /*! Reset Handler. Default is c_int00 */
   201        metaonly config VectorFuncPtr resetFunc;
   202    
   203        /*! Undefined instruction exception handler. Default is self loop */
   204        metaonly config VectorFuncPtr undefinedInstFunc;
   205    
   206        /*! SWI Handler. Default is internal SWI handler */
   207        metaonly config VectorFuncPtr swiFunc;
   208    
   209        /*! Prefetch abort exception handler. Default is self loop */
   210        metaonly config VectorFuncPtr prefetchAbortFunc;
   211    
   212        /*! Data abort exception handler. Default is self loop */
   213        metaonly config VectorFuncPtr dataAbortFunc;
   214    
   215        /*! Reserved exception handler. Default is self loop */
   216        metaonly config VectorFuncPtr reservedFunc;
   217    
   218        /*! IRQ interrupt handler. Default is internal IRQ dispatcher */
   219        metaonly config VectorFuncPtr irqFunc;
   220    
   221        /*! FIQ interrupt handler. Default is internal FIQ dispatcher */
   222        metaonly config VectorFuncPtr fiqFunc;
   223    
   224        /*! 
   225         *  FIQ stack pointer. Default = null.
   226         *  (Indicates that stack is to be created using
   227         *  staticPlace()
   228         */
   229        config Ptr fiqStack = null;
   230    
   231        /*! 
   232         *  FIQ stack size in MAUs.
   233         *  Default is 1024 bytes.
   234         */
   235        metaonly config SizeT fiqStackSize = 1024;
   236    
   237        /*! 
   238         *  Memory section used for FIQ stack
   239         *  Default is null.
   240         */
   241        metaonly config String fiqStackSection = null;
   242    
   243        /*!
   244         *  EABASE Size Setting. Default is 4 bytes per entry.
   245         *  Options are 4, 8, 16, 32 bytes per entry.
   246         */
   247        config Bits32 eabaseSize = 4;
   248    
   249        /*!
   250         *  Error raised when Hwi is already defined
   251         */
   252        config Error.Id E_alreadyDefined = {
   253            msg: "E_alreadyDefined: Hwi already defined: intr# %d"
   254        };
   255    
   256        /*!
   257         *  Issued just prior to Hwi function invocation (with interrupts disabled)
   258         */
   259        config Log.Event LM_begin = {
   260            mask: Diags.USER1 | Diags.USER2,
   261            msg: "LM_begin: hwi: 0x%x, func: 0x%x, preThread: %d, intNum: %d, irp: 0x%x"
   262        };
   263    
   264        /*!
   265         *  Issued just after return from Hwi function (with interrupts disabled)
   266         */
   267        config Log.Event LD_end = {
   268            mask: Diags.USER2,
   269            msg: "LD_end: hwi: 0x%x"
   270        };
   271    
   272    
   273        // -------- Module Functions --------
   274    
   275        /*!
   276         *  ======== disable ========
   277         */
   278        @DirectCall
   279        override UInt disable();
   280    
   281        /*!
   282         *  ======== enable ========
   283         */
   284        @DirectCall
   285        override UInt enable();
   286    
   287        /*!
   288         *  ======== restore ========
   289         */
   290        @DirectCall
   291        override Void restore(UInt key);
   292    
   293        /*!
   294         *  @_nodoc
   295         *  ======== inUseMeta ========
   296         *  Check for Hwi already in use.
   297         *  For internal SYS/BIOS use only. 
   298         *  Should be called prior to any internal Hwi.create().
   299         *
   300         *  @param(intNum)  interrupt number
   301         */
   302        metaonly Bool inUseMeta(UInt intNum);
   303    
   304        /*!
   305         *  ======== getHandle ========
   306         *  Returns pointer to Hwi instance object.
   307         *
   308         *  @param(intNum)  interrupt number
   309         */
   310        @DirectCall
   311        Object *getHandle(UInt intNum);
   312    
   313        /*!
   314         *  @_nodoc
   315         *  ======== getInstance ========
   316         *  Returns pointer to Hwi instance object.
   317         *
   318         *  @param(intNum)  interrupt number
   319         */
   320        @DirectCall
   321        Object *getInstance(UInt intNum);
   322    
   323        /*!
   324         *  ======== enableFIQ ========
   325         *  Enable FIQ interrupts.
   326         *
   327         *  @b(returns)     previous FIQ interrupt enable/disable state
   328         */
   329        @DirectCall
   330        UInt enableFIQ();
   331    
   332        /*!
   333         *  ======== disableFIQ ========
   334         *  Disable FIQ interrupts.
   335         *
   336         *  @b(returns)     previous FIQ interrupt enable/disable state
   337         */
   338        @DirectCall
   339        UInt disableFIQ();
   340    
   341        /*!
   342         *  ======== restoreFIQ ========
   343         *  Restore FIQ interrupts.
   344         *
   345         *  @param(key)     enable/disable state to restore
   346         */
   347        @DirectCall
   348        Void restoreFIQ(UInt key);
   349    
   350        /*!
   351         *  ======== enableIRQ ========
   352         *  Enable IRQ interrupts.
   353         *
   354         *  @param(key)     enable/disable state to restore
   355         */
   356        @DirectCall
   357        UInt enableIRQ();
   358    
   359        /*!
   360         *  ======== disableIRQ ========
   361         *  Disable IRQ interrupts.
   362         *
   363         *  @b(returns)     previous IRQ interrupt enable/disable state
   364         */
   365        @DirectCall
   366        UInt disableIRQ();
   367    
   368        /*!
   369         *  ======== restoreIRQ ========
   370         *  Restore IRQ interrupts.
   371         *
   372         *  @param(key)     enable/disable state to restore
   373         */
   374        @DirectCall
   375        Void restoreIRQ(UInt key);
   376    
   377        /*!
   378         *  ======== disableEINT0 ========
   379         *  Disable specific interrupts (0-31).
   380         *
   381         *  Disables specific interrupts by clearing the bits specified by
   382         *  'mask' in the EINT0.
   383         *
   384         *  @param(mask)    bitmask of interrupts to disable
   385         *  @b(returns)     previous EINT0 settings bitmask
   386         */
   387        @DirectCall
   388        Bits32 disableEINT0(Bits32 mask);
   389    
   390        /*!
   391         *  ======== disableEINT1 ========
   392         *  Disable specific interrupts (32-63).
   393         *
   394         *  Disables specific interrupts by clearing the bits specified by
   395         *  'mask' in the EINT1.
   396         *
   397         *  @param(mask)    bitmask of interrupts to disable
   398         *  @b(returns)     previous EINT1 settings bitmask
   399         */
   400        @DirectCall
   401        Bits32 disableEINT1(Bits32 mask);
   402    
   403        /*!
   404         *  ======== enableEINT0 ========
   405         *  Enable specific interrupts (0-31).
   406         *
   407         *  Enables specific interrupts by clearing the bits specified by
   408         *  'mask' in the EINT0.
   409         *
   410         *  @param(mask)    bitmask of interrupts to disable
   411         *  @b(returns)     previous EINT0 settings bitmask
   412         */
   413        @DirectCall
   414        Bits32 enableEINT0(Bits32 mask);
   415    
   416        /*!
   417         *  ======== enableEINT1 ========
   418         *  Enable specific interrupts (32-63).
   419         *
   420         *  Enables specific interrupts by clearing the bits specified by
   421         *  'mask' in the EINT0.
   422         *
   423         *  @param(mask)    bitmask of interrupts to disable
   424         *  @b(returns)     previous EINT0 settings bitmask
   425         */
   426        @DirectCall
   427        Bits32 enableEINT1(Bits32 mask);
   428    
   429        /*!
   430         *  ======== restoreEINT0 ========
   431         *  Restore maskable interrupts to the state they were in 
   432         *  when either disableEINT0() or enableEINT0() was called.
   433         *
   434         *  Simply writes mask to the EINT0 register.
   435         *
   436         *  @param(mask)    bitmask of interrupts to restore
   437         *  @b(returns)     previous EINT0 settings bitmask
   438         */
   439        @DirectCall
   440        Bits32 restoreEINT0(Bits32 mask);
   441    
   442        /*!
   443         *  ======== restoreEINT1 ========
   444         *  Restore maskable interrupts to the state they were in 
   445         *  when either disableEINT1() or enableEINT1() was called.
   446         *
   447         *  Simply writes mask to the EINT1 register.
   448         *
   449         *  @param(mask)    bitmask of interrupts to restore
   450         *  @b(returns)     previous EINT1 settings bitmask
   451         */
   452        @DirectCall
   453        Bits32 restoreEINT1(Bits32 mask);
   454    
   455        /*!
   456         *  ======== setPriority ========
   457         *  Set an interrupt's relative priority.
   458         *
   459         *  Priority 0-1 define the interrupt as an FIQ interrupt
   460         *  Priority 2-7 define the interrupt as an IRQ interrupt
   461         *
   462         *  @param(intNum)      ID of interrupt
   463         *  @param(priority)    priority
   464         */
   465        @DirectCall
   466        Void setPriority(UInt intNum, UInt priority);
   467    
   468    instance:
   469    
   470        /*! disableMask0. default is derived from MaskingOption_SELF maskSetting. */
   471        config Bits32 disableMask0 = 0;
   472    
   473        /*! disableMask1. default is derived from MaskingOption_SELF maskSetting. */
   474        config Bits32 disableMask1 = 0;
   475    
   476        /*! restoreMask0. default is derived from MaskingOption_SELF maskSetting. */
   477        config Bits32 restoreMask0 = 0;
   478    
   479        /*! restoreMask1. default is derived from MaskingOption_SELF maskSetting. */
   480        config Bits32 restoreMask1 = 0;
   481    
   482        /*!
   483         *  Interrupt priority (0-7). Default is 7 which is the
   484         *  lowest priority IRQ interrupt. 
   485         */
   486        override config Int priority = 7;
   487    
   488        /*!
   489         *  ======== reconfig ========
   490         *  Reconfigure a dispatched interrupt.
   491         */
   492        @DirectCall
   493        Void reconfig(FuncPtr fxn, const Params *params);
   494    
   495    internal:   /* not for client use */
   496    
   497        /* 
   498         * Swi and Task module function pointers. 
   499         * Used to decouple Hwi from Swi and Task when 
   500         * dispatcherSwiSupport or
   501         * dispatcherTaskSupport is false.
   502         */
   503        config UInt (*swiDisable)();
   504        config Void (*swiRestoreHwi)(UInt);
   505        config UInt (*taskDisable)();
   506        config Void (*taskRestoreHwi)(UInt);
   507    
   508        /* assembly code mode registers setup */
   509        Void init();
   510    
   511        /* Interrupt Dispatcher assembly code wrapper */
   512        Void dispatchIRQ();
   513    
   514        /* IRQ Interrupt Dispatcher */
   515        Void dispatchIRQC(Irp irp);
   516    
   517        /* default FIQ Interrupt Dispatcher */
   518        Void dispatchFIQC();
   519    
   520        /*!
   521         *  const array to hold all HookSet objects.
   522         */
   523        config HookSet hooks[length] = [];
   524    
   525        /*! Meta World Only Hwi Configuration Object. */
   526        metaonly struct InterruptObj {
   527            Bool used;              /* Interrupt already defined? */
   528            Bool useDispatcher;     /* Should dispatcher handle this Int? */
   529            FuncPtr fxn;            /* Dispatched ISR function */
   530        };
   531    
   532        /*!
   533         * Meta-only array of interrupt objects.
   534         * This meta-only array of Hwi config objects is initialized
   535         * in Hwi.xs:module$meta$init().
   536         */
   537        metaonly config InterruptObj interrupt[NUM_INTERRUPTS];
   538    
   539        metaonly config Bool assignResetVector = true;
   540    
   541        struct Instance_State {
   542            UInt        priority;       // Interrupt Priority
   543            Bits32      disableMask0;   // EINT0 disable mask
   544            Bits32      disableMask1;   // EINT1 disable mask
   545            Bits32      restoreMask0;   // EINT0 restore mask
   546            Bits32      restoreMask1;   // EINT1 restore mask
   547            UArg        arg;            // Argument to Hwi function.
   548            FuncPtr     fxn;            // Hwi function.
   549            Int         intNum;         // Interrupt number
   550            Irp         irp;            // current IRP
   551            Ptr         hookEnv[];
   552        };
   553     
   554        struct Module_State {
   555            Bits32      eint0Mask;      // Initial EINT0 mask
   556            Bits32      eint1Mask;      // Initial EINT1 mask
   557            UInt        irp;            // temporary irp storage for IRQ handler
   558            Char        *taskSP;        // temporary storage of interrupted
   559                                        // Task's SP during ISR execution
   560    
   561            /* ROM */
   562            Char        *isrStack;      // Points to isrStack address
   563            Ptr         isrStackBase;   // _stack
   564            Ptr         isrStackSize;   // _STACK_SIZE
   565            Char        fiqStack[];     // buffer used for FIQ stack
   566            SizeT       fiqStackSize;
   567    
   568            Handle      dispatchTable[NUM_INTERRUPTS]; 
   569                                        // dispatch table
   570        };
   571    }
   572    
   573    /*
   574     *  @(#) ti.sysbios.family.arm.dm6446; 2, 0, 0, 0,193; 1-20-2011 12:27:24; /db/vtree/library/trees/avala/avala-o26x/src/ xlibrary
   575    
   576     */
   577