DLPC3430/5 Firmware v7.4.3 Release Notes
March 14, 2022
Table of Contents
Overview
These are the release notes for the following firmware image file:
- Firmware Version: 7.4.3
- Embedded Software Version: 8.0.1
- Generated from DLP Composer Version: 13.13
- DMD: DLP2010
- Controller: DLPC3430/5
- PMIC: DLPA2005
Configuration Settings
- I2C Address: 0x36
- DMD Pin Mapping: 1
- Rlim value: 39mΩ
- Optimized Frame Rates: 60Hz, 120Hz, and 240Hz
- Four 2D looks (cool, medium, warm, and other) and one 3D look (look 0 through 4 respectively)
- Degamma curve using power law 2.2
- Default CCA (color coordinate adjustment) of an identity matrix
New Features and Changes
- Implemented Single Buffer Mode for external video input and test patterns.
- The normal DLPC34xx software utilizes a double buffered architecture (the data sent to the DMD is one frame delayed from the input). The Single Buffer Mode can be used to reduce latency. Note there is a possibility of video artifacts being introduced in Single Buffer Mode that would not exist in regular mode. Care should be taken to ensure no unacceptable artifacts occur in the end-product. See Single Buffer Mode Documentation for more information.
- Released Manual Idle Mode
- Manual Idle Mode is a power savings feature for use when the input image isn't changing. See Idle Mode Documentation for more information.
- Changed the autoinit batch file PMIC register write order for projects using the DLPA300x to ensure more robust PMIC startup.
- Run the no-LED test every time LEDs are enabled by the user for systems utilizing the DLPA300x.
Known Issues
- If using a DLPA300x PMIC, the no-LED test sets the PMIC IDAC value to 65% of its maximum current range, even if it's larger than the maximum set LED value. Care should be taken to size Rlim appropriately to handle this case.
- Single Buffer Mode has various limitations. See Single Buffer Mode Documentation for more information.
- Manual Idle mode may be unsuitable for some situations as it takes time to enter and exit the mode. There are additional limitations of sending commands when in idle mode. See Idle Mode Documentation for more information.
- Previous issues (issues existing in previous releases that remain)
- For the DLPC3433: 1280x720 video input at 120 Hz using DSI is not currently supported. It is suggested to use 60 Hz if using DSI at 1280x720 input resolution or to use qHD (960x540) input resolution. WVGA input resolution (854x480) is not supported with DSI.
- For the DLPC3432: DSI video input must be at native 960x540 (qHD) resolution.
- For the DLPC3430: It is suggested to use the native 854x480 input resolution. Lower resolotions may also work. 1280x720 at 120 Hz does not work. Other input resolutions above WVGA may not work.
- When operating with low IDAC values (i.e. low LED currents), non-linearities may occur with the LED currents. This could be optimized with a system level design (i.e. optimizing passives) or by avoiding operation in this region
- The DMD may not be properly parked if the controller is interrupted during its startup routine.
Technical Support and Product Updates
Single Buffer Mode Documentation
- Using Single Buffer Mode via I2C commands:
- General
- Only supported when operating with external video input or test patterns. If a splash screen is loaded while Single Buffer Mode is enabled, the controller will enter regular buffer mode. When the input source returns to a test pattern or external video the controller will return to Single Buffer Mode (assuming the user didn't disable it).
- Image freeze is not supported when Single Buffer Mode is enabled.
- Single Buffer Mode is not supported with 3D video and therefore must be manually disabled.
Idle Mode Documentation
- Manual Idle Mode is intended to provide power saving functionality by putting the controller into a low-power mode while the input image isn't changing. Therefore, when Manual Idle Mode is enabled, the output image is frozen and new input images are ignored. To resume normal operation the user must send the command to disable Manual Idle Mode.
- Use of Idle Mode
- Write Idle Mode Select (0x03)
- Input: 1 Byte
- b<7:2>: Reserved
- b<1:0>: Idle mode select
- 00: Idle Mode Disabled
- 01: Reserved
- 10: Manual Idle Mode Enabled
- 11: Reserved
- Read Idle Mode Select (0x04)
- Output: 2 Bytes
- Byte 1 - b<7:2>: Reserved
- Byte 1 - b<1:0>: Idle mode select
- 00: Idle Mode Disabled
- 01: Reserved
- 10: Manual Idle Mode Enabled
- 11: Reserved
- Byte 2 - b<7:0>: Reserved
- Limitations and Requirements
- When Manual Idle Mode is enabled, I2C commands sent to the controller may not work as the controller is in a low power state. To enable full I2C command functionality Manual Idle Mode must be disabled
- Note: Six complete input frames are required to fully converge the CAIC algorithm. If fewer than six images are sent, the last image received will be displayed even if the CAIC algorithm is not fully converged
- Manual Idle Mode enable command should be sent in the Vertical Back Porch at least 7ms before the last VSYNC. The command will then take effect at the next VSYNC
- The Manual Idle Mode disable command should be sent at least 7ms before the first VSYNC.
- Manual Idle Mode is not supported when in curtain mode
- Manual Idle Mode is not supported with Single Buffer Mode
Thermistor Processing Documentation
- Using System Temperature via I2C commands:
- Read System Temperature (0xd6)
- Note: The temperature of the thermistor is read in degrees Celsius in a magnitude of 10 times the reading of thermistor. Bit 11 (the most significant bit) denotes the sign temperature. A '0' means a positive temperature, while '1' denotes a negative temperature.
- Example #1: b(11:0) = 000110101010; 426d / 10d = 42.6degC
- Example #2: b(11:0) = 100110101010; 426d / 10d = -42.6degC
- Note: This temperature reading will need to be calibrated per the design and specific thermsitor chosen of custom boards. Offset to determine the true temperature of the thermistor reading. Texas Instruments DLP hardware uses Murata's NCP15WF104F03RC.
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