Closed Defects in Release

ID Summary State Reported In Release Target Release Workaround Release Notes
CODEGEN-3801 Linker crashes with INTERNAL ERROR (unhandled exception) Fixed ARM_16.9.4.LTS ARM_16.9.6.LTS The linker experiences a segmentation fault when there is a reference from a debug section to a symbol without a section (for example, an absolute symbol).
CODEGEN-3711 Uses of __strex intrinsics are deleted Fixed ARM_16.9.0.LTS ARM_16.9.6.LTS The compiler supports synchronization primitive intrinsics, but always deletes calls to __strex, __strexb, __strexh, and __strexd.
CODEGEN-3650 Linker crashes when printing module list to map file Fixed ARM_16.9.0.LTS ARM_16.9.6.LTS Add linker option --mapfile_contents=all,nomodules When creating a linker map file, and a summary of modules is written to the linker map file, and the entry point is undefined, the linker may crash.
CODEGEN-3617 gmtime incorrect when invoked in timezones east of GMT Fixed ARM_16.9.0.LTS ARM_16.9.6.LTS Set the timezone to 0 (UTC) until the fix is in place
CODEGEN-3597 ELF header field e_phoff should be 0 when no program header is present Fixed ARM_16.9.0.LTS ARM_16.9.6.LTS ELF header field e_phoff should be 0 when no program header is present, and ELF header field e_shoff should be 0 when no section headers are present.
CODEGEN-3591 When using fill value, linker may crash or hang Fixed ARM_16.9.0.LTS ARM_16.9.6.LTS Upgrade to 17.6.0.STS or higher When using a fill value on a memory range, the linker may get into a corrupted state and either crash or enter an infinite loop.
CODEGEN-2373 Internal linker error triggered by function alias Fixed ARM_16.9.0.LTS ARM_16.9.6.LTS Linker sometimes generates "Assertion failed" message and aborts.
CODEGEN-2320 ARM compiler fails to truncate scaled offset to byte Fixed ARM_16.9.0.LTS ARM_16.9.6.LTS Compile with --opt_level=off. This is not an optimization bug; however, the bug does not manifest at --opt_level=off. The compiler matches X[(unsigned char)(Y >> 16)] with an indexed addressing mode, but it can't because that doesn't truncate the array index to 8 bits.
CODEGEN-2286 palign(8) of .init_array messes up __TI_INITARRAY_Limit address Fixed ARM_16.9.0.LTS ARM_16.9.4.LTS In the linker command file, replace .init_array > FLASH, palign(8), fill = 0xffffffff with the following GROUP statement: GROUP { .init_array } > FLASH, palign(8) The palign(8) on GROUP will ensure that any required padding is added after .init_array. However, both the size of .init_array and the value of __TI_INITARRAY_Limit remain unchanged. Applying palign(8) to .init_array caused __TI_INIT_ARRAY_Limit to be set to the end of .init_array including the padding. This broke RTS startup code responsible for calling constructors because the table of constructors now includes invalid data. This bug has been fixed and __TI_INIT_ARRAY_Limit is no longer affected by padding.
CODEGEN-2257 Using --no_stm may discard regsave debugging information Fixed ARM_16.9.6.LTS Don't use --no_stm unless you are sure it is necessary When using the --no_stm silicon workaround option for Cortex-R4, some debugging information may be lost, leading to the debugger having trouble unwinding functions, and thus being unable to show the call stack.
CODEGEN-2238 Compiler incorrectly emits MISRA 10.1 for function argument Fixed ARM_16.9.0.LTS ARM_16.9.6.LTS
CODEGEN-2214 Compiler optimizes away function which calls assert Fixed ARM_16.9.0.LTS ARM_16.9.4.LTS Make sure there is some other visible effect in the function -- a call, a use of a volatile variable, something like that. A function whose only visible effect is to call assert() may be optimised away at --opt_level=0 or higher.
CODEGEN-2209 Link error with gcc debug information Fixed ARM_16.9.0.LTS ARM_16.9.4.LTS None When linking against GCC code, a project failed to build due to a relocation error, generating the message "fatal error #10232". Specifically, the problem was caused by debug information left in the GCC object file for eliminated comdat sections. GCC puts debug information into a common section called .debug_info. Once the comdat section was eliminated, the debug symbol pointed to a deleted section, causing an error in the TI linker.
CODEGEN-2143 Anonymous struct in union causes type merging failure at -O4 Fixed ARM_16.9.0.LTS ARM_16.9.4.LTS Do not use anonymous structs or unions; give all struct members a name, even if it is never used. Anonymous structs and unions are a GCC extension. They are members of a parent structure and have no names. You access the elements inside them as if they were direct members of the parent class. If you have an anonymous struct or union inside a union and you use -O4 optimization, you may get the mistaken error "symbol so-and-so redeclared with incompatible type" at link time.
CODEGEN-2119 Stack usage assistant call graph misses callee relationship for some direct calls Fixed ARM_16.9.0.LTS ARM_16.9.3.LTS The Object File Display utility failed to detect function callees when generating call graph information for functions that contain nested blocks.
CODEGEN-2113 Hex utility mishandles space in directory name of output file Fixed ARM_16.9.0.LTS ARM_16.9.4.LTS Use directory names without spaces for output files. The hex utility did not correctly handle spaces in output directory and file names.
CODEGEN-2098 Temp filename collisions on Windows with many parallel invocations Fixed ARM_16.9.0.LTS ARM_16.9.3.LTS In some cases with a large number of compilations in parallel on Windows, the compiler could create temporary files with colliding names, resulting in strange compilation failures.
CODEGEN-2060 Even though option --buffer_diagnostics is not used, compiler issues diagnostic that says it is deprecated Fixed ARM_16.9.0.LTS ARM_16.9.3.LTS None The --buffer_diagnostics compiler option was deprecated as of MCU compilers v16.6.0.STS because this setting became the default behavior for the compiler. However, the option was passed to the linker and the linker issued a remark stating the option was deprecated.
CODEGEN-2053 Compiler incorrectly reorders struct assign for small, volatile structs with bit-fields Fixed ARM_16.9.0.LTS ARM_16.9.2.LTS Use optimization level 0 or off (option --opt_level) For a very specific optimization, the optimizer may drop a volatile qualifier from a struct assignment. In some cases, the compiler may later perform an incorrect optimization, most commonly incorrectly reordering volatile assignments. This bug can only happen in a function compiled with optimization level 1 or higher which contains both of the following: 1) A struct assign where the destination is volatile, and the source is a known constant, and the struct contains a bit-field, and the struct is of size "int" or smaller. 2) Any bit-field access (read or write) other than as part of a struct assign or initialization expression. That is, the name of the bit-field is present in the access expression. Note that the optimizer can create this situation by inlining functions, so 1 and 2 might be in different functions in the source code. Consider a tree x = y where x and y are of type struct S. If the value of y is known at compile time (e.g. a const value), the optimizer will try to turn the struct constant into an integer constant (possibly combining bit-fields) and rewrite the tree to look like this: "(unsigned *)x = 32;" However, if y is volatile, that should be "*(volatile unsigned *)x = 32;" Because the access is not volatile, instruction scheduling could cause this instruction to drift past nearby volatile accesses.
CODEGEN-2050 Use of -o4 causes linker XML map file to have missing input_file entries Fixed ARM_16.9.0.LTS ARM_16.9.2.LTS
CODEGEN-2047 CMSIS Core v5 is not compliant with TI ARM Compiler Fixed ARM_16.9.0.LTS ARM_16.9.2.LTS The __INLINE macro in the TI compiler RTS linkage.h is no longer used and can be removed. CMSIS v5 defines the macro __INLINE, which interferes with the TI compiler RTS definition of the same macro in linkage.h.
CODEGEN-2025 Linker crash message incorrectly suggests submitting a preprocessed file Fixed ARM_16.9.0.LTS ARM_16.9.3.LTS
CODEGEN-2010 Decomp error involving packed class Fixed ARM_16.9.0.LTS ARM_16.9.2.LTS Fixed an issue that could result in a "Decomposition error" abort of the compiler.
CODEGEN-1979 Statements before declarations with no white space (aggravated by macros) may cause incorrect parser error Fixed ARM_16.9.0.LTS ARM_16.9.6.LTS Do not start any statement in the left-most column Rearrange your code so that there are no statements before declarations. C99 and C++ allow statements before declarations in functions. This is not allowed by the C89 language, but as an extension, the TI compiler allows such statements in relaxed mode. However, in certain circumstances, the compiler may emit the 'error: expected "}"' for otherwise legal code which has statements before declarations. This problem can only occur in relaxed C89 mode (which is the default mode), and 1) you have a function with statements that start in the left-most column, or 2) you use macros where the macro body contains C code with statements before declarations.
CODEGEN-1976 Value of __cplusplus is wrong Fixed ARM_16.9.0.LTS ARM_16.9.2.LTS If possible, use the -ps or --strict_ansi options. This mode will use the strict definition of __cplusplus, which is 199711L. Our parser mimicked G++ behavior for the value of this macro in relaxed ANSI mode. This reproduced a bug in G++ versions v.4.7 and v.4.3 that has since been fixed.
CODEGEN-1703 Designated initializer plus struct hack hangs compiler Fixed ARM_16.9.0.LTS ARM_16.9.1.LTS Avoiding using string constants to initialize objects with flexible array members. Instead, use a brace-initialized array. For example: struct { int a; char b[]; } mystruct = {0, {'h', 'e', 'l', 'l', 'o'} }; Fixed a compiler hang caused by initializing flexible array members with string constants. struct {int a; char b[]; } mystruct = {0, "hello"} /* Would cause the compiler to hang and/or crash */
CODEGEN-1656 Using --gen_profile_info does not work with -o4 Fixed ARM_16.9.0.LTS ARM_16.9.4.LTS Lower the optimization level to -o3. Previously, link time optimization failed when profiling options --gen_profile_info and use_profile_info were specified in combination with the --opt_level=4 option. The errors were because profiling options were not supported when used in combination with --opt_level=4. Application profiling during whole program optimization is now supported. Profiling options --gen_profile_info and --use_profile_info may now be combined with --opt_level=4.
CODEGEN-1640 MISRA 19.1 misreported: #include statements should only be preceded by other preprocessor directives Fixed ARM_16.9.0.LTS ARM_16.9.1.LTS No practical workaround
CODEGEN-1639 MISRA-C:2004 17.6/R false positive when assigning local struct member to static struct member Fixed ARM_16.9.0.LTS ARM_16.9.4.LTS
CODEGEN-1634 MISRA 7.1 misreported: octal tokens in token paste Fixed ARM_16.9.0.LTS ARM_16.9.1.LTS No practical workaround
CODEGEN-1632 MISRA 15.2 misreported: switch clause unconditional break Fixed ARM_16.9.0.LTS ARM_16.9.1.LTS Put an explicit break at the end of the compound statement
CODEGEN-1555 Incorrect result for ullong expression passed to abs Fixed ARM_16.9.0.LTS ARM_16.9.1.LTS Use llabs instead of abs abs(x-y) may compute an incorrect result when x and y are unsigned long long variables.
CODEGEN-1517 #pragma FUNCTION_OPTIONS meaningless unless at least -o0 is used Fixed ARM_16.9.0.LTS
CODEGEN-1429 Software pipelined loop generates different results than loop not pipelined Fixed ARM_16.9.0.LTS ARM_16.9.0.LTS Avoid unsigned expressions in subscripts or in computing subscripts, or compile with -o1 or -o0.
SDSCM00052814 TMS570LC4357 ECC algorithm not supported Fixed ARM_16.9.0.LTS ARM_16.9.1.LTS There is a backdoor in the implementation that you can use to realize this new algorithm. Use this algorithm specification: ECC { algo_name : address_mask = 0xffffffff hamming_mask = /* address */ 0x53aaa750, 0xeb45d688, 0xa6d54da8, 0x9e353c68, 0x7e0cfc18, 0xfe03fc00, 0x01fffc00, 0xfe0003f8, /* upper */ 0x2E4B2E4B, 0x57155715, 0x99A699A6, 0xE338E338, 0xFCC0FCC0, 0x00FF00FF, 0xFF0000FF, 0xFF0000FF, /* lower */ 0xD1B4D1B4, 0x57155715, 0x99A699A6, 0xE338E338, 0xFCC0FCC0, 0x00FF00FF, 0xFF0000FF, 0x00FFFF00, parity_mask = 0x0c mirroring = F021 } If you value your sanity, do not ask where the constants come from. Some devices, such as TMS570LC4357 Hercules, have a FLASH bank in high memory, and ECC uses the high bits of the address in the ECC calculation. Therefore, we need to extend the participating address bits mask in the linker-generated ECC handling.
CODEGEN-1333 Structure assignment causes compiler to fail with INTERNAL ERROR: Decomposition error Fixed ARM_16.9.0.LTS Replace struct assignments involving packed structures with a memcpy() call to copy the contents of the RHS of the struct assign to the LHS.
CODEGEN-1312 RTS header errno.h no longer defines POSIX macros like EFAULT Fixed ARM_16.9.1.LTS
CODEGEN-1287 Compiler and documentation disagree on default for --enum_type Fixed ARM_16.9.0.LTS
SDSCM00040386 Remove -olength option from hex utility's help summary and Users Guides Fixed ARM_16.9.0.LTS ARM_16.9.0.LTS
SDSCM00052902 Assembler incorrectly issues error message: Address must be of a non-global defined in the current section Fixed ARM_16.9.0.LTS The suggested workaround is to go back to 15.12.3.LTS until the next ARM compiler release is available. Alternately, alter the code such that the target label is a non-global symbol defined in the same section as the branch. If the symbol must be global, add a second non-global label such as fake_label and change the branch to "B fake_label".
SDSCM00052734 Internal error in trampoline generation when user defines data symbol named "signal" Fixed ARM_16.9.0.LTS It is a user error to have two different objects in the system with the same name. Rename one of the objects.
SDSCM00051485 Incorrect reordering of nested op= with ++ Fixed ARM_16.9.0.LTS ARM_16.9.0.LTS Don't embed "X op= Y++" under another assignment operator. An expression like "a += b += c++" will produce the wrong answer. The problem is specific to sub-expressions of the form "X op= Y++" that occur under another assignment operator.
SDSCM00051067 Width-modified LDR/STREX instructions should be rejected on V6 Fixed ARM_16.9.0.LTS ARM_16.9.6.LTS While LDREX and STREX are available on v6, all of the other EX instructions aren't available until v6k, which we do not support. For TI hardware, we begin to support these instructions in v7. The assembler should reject the instructions LDREXH, LDREXB, LDREXD, STREXH, STREXB, and STREXD for v6, including v6M0. We already treat CLREX correct and reject it for v6.
SDSCM00051066 Should reject MLS on pre-Thumb-2 devices Fixed ARM_16.9.0.LTS ARM_16.9.6.LTS MLS is a Thumb2 instruction; it should be rejected on earlier architectures, including Cortex-M0
SDSCM00046352 Disassembler fails to emit certain instructions in UAL form Fixed ARM_16.9.0.LTS ARM_16.9.6.LTS For certain instructions combining the S flag and a condition code, UAL requires the S to appear before the condition code, but the disassembler puts it afterward, in the pre-UAL style.
SDSCM00043334 Should reject illegal MOVS instruction which cannot set status Fixed ARM_16.9.0.LTS ARM_16.9.6.LTS The assembler accepts instructions like "MOVS R0, R10" in thumb mode, but should not. There is no instruction which can perform this move while setting the status bits.
SDSCM00037227 Bad disassembly for VMRS APSR_nzcv, FPSCR Fixed ARM_16.9.0.LTS ARM_16.9.6.LTS The ARM disassembler mistakenly disassembles "VMRS APSR_nzcv, FPSCR" as "VMRS PC, FPSCR"
SDSCM00037086 ARM assembler allows incorrect VFP registers for some instructions on D16 VFP architectures Fixed ARM_16.9.0.LTS ARM_16.9.6.LTS For devices with VFP D16, the assembler should not allow instructions using registers D16-D31, but it does.

Generated on Mon Oct 23 17:13:43 2017