| ID |
Summary |
State |
Reported In Release |
Target Release |
Workaround |
Release Notes |
| CODEGEN-2171 |
C2000 compiler disables if conversion on mac |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.5.LTS |
|
|
| CODEGEN-2098 |
Temp filename collisions on Windows with many parallel invocations |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.5.LTS |
|
In some cases with a large number of compilations in parallel on Windows, the compiler could create temporary files with colliding names, resulting in strange compilation failures. |
| CODEGEN-2053 |
Compiler incorrectly reorders struct assign for small, volatile structs with bit-fields |
Fixed |
C2000_15.12.3.LTS |
C2000_15.12.5.LTS |
Use optimization level 0 or off (option --opt_level) |
For a very specific optimization, the optimizer may drop a volatile qualifier from a struct assignment. In some cases, the compiler may later perform an incorrect optimization, most commonly incorrectly reordering volatile assignments.
This bug can only happen in a function compiled with optimization level 1 or higher which contains both of the following: 1) A struct assign where the destination is volatile, and the source is a known constant, and the struct contains a bit-field, and the struct is of size "int" or smaller. 2) Any bit-field access (read or write) other than as part of a struct assign or initialization expression. That is, the name of the bit-field is present in the access expression. Note that the optimizer can create this situation by inlining functions, so 1 and 2 might be in different functions in the source code.
Consider a tree x = y where x and y are of type struct S. If the value of y is known at compile time (e.g. a const value), the optimizer will try to turn the struct constant into an integer constant (possibly combining bit-fields) and rewrite the tree to look like this: "(unsigned *)x = 32;" However, if y is volatile, that should be "*(volatile unsigned *)x = 32;" Because the access is not volatile, instruction scheduling could cause this instruction to drift past nearby volatile accesses. |
| CODEGEN-2050 |
Use of -o4 causes linker XML map file to have missing input_file entries |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.5.LTS |
|
|
| CODEGEN-1976 |
Value of __cplusplus is wrong |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.5.LTS |
If possible, use the -ps or --strict_ansi options. This mode will use the strict definition of __cplusplus, which is 199711L. |
Our parser mimicked G++ behavior for the value of this macro in relaxed ANSI mode. This reproduced a bug in G++ versions v.4.7 and v.4.3 that has since been fixed. |
| CODEGEN-1927 |
Float variables allocated to FPU register such as R4H are displayed as "unknown register R4HL" in Variables view |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.5.LTS |
Lowering the level of optimization in the project such that the variable is not allocated to a register will allow its value to be displayed correctly in the Variables view. |
Fixed an issue where FPU32 registers were sometimes incorrectly named and not available during debug. |
| CODEGEN-1710 |
Illegal instruction selection for __byte_peripheral_32 on FPU32 |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.5.LTS |
Try a lower level of optimization. For our test case, optimization levels lower than 3 did not expose the bug. However, this workaround may not help for all test cases. |
Although byte peripheral types are integral, when FPU32 device support is enabled, the compiler might store 32-bit integral values in floating point registers when CPU registers are unavailable. The compiler erroneously generates a MOVL instruction instead of a MOV32 instruction for moving 32-bit byte peripheral data between floating point registers and byte peripheral memory, if this data gets assigned to a floating point register. |
| CODEGEN-1709 |
Using #pragma INTERRUPT(HPI) crashes the compiler |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.5.LTS |
Besides not using #pragma INTERRUPT(HPI), there is no workaround. The compiler requires an update. |
Fixed a crash that occurs when using #pragma INTERRUPT(HPI) |
| CODEGEN-1703 |
Designated initializer plus struct hack hangs compiler |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.4.LTS |
Avoiding using string constants to initialize objects with flexible array members. Instead, use a brace-initialized array. For example:
struct { int a; char b[]; } mystruct = {0, {'h', 'e', 'l', 'l', 'o'} }; |
Fixed a compiler hang caused by initializing flexible array members with string constants.
struct {int a; char b[]; } mystruct = {0, "hello"} /* Would cause the compiler to hang and/or crash */ |
| CODEGEN-1671 |
Arrays of Byte Peripherals or types aligned larger than their size should generate error |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.4.LTS |
Do not attempt to create an array of byte peripheral objects. |
The C language guarantees that the size of an array is equal to the size of each element times the number of elements. Because we double the alignment of byte peripheral data types but do not change the size, this does not hold true. There would be padding in the array, which is not allowed by the standard.
Underneath the hood, we use the aligned GCC attribute to change the alignment for byte peripherals. On GCC, if you try to make an array of elements whose alignment is larger than its size (see example code below), you get the following error:
"9:1: error: alignment of array elements is greater than element size"
However, our parser doesn’t generate an error. Instead, it just reduces the alignment of the element size silently and makes an array.
We need to generate an error and document that this is not allowed, both for byte peripherals and the aligned GCC attribute. |
| CODEGEN-1667 |
Assignment to 32-bit byte peripheral from 64-bit cast to 32-bit value causes internal error |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.4.LTS |
Saving the cast value to a 32-bit temp and then assigning to the 32-bit byte peripheral will work at optimization settings of 0 and off. |
If a 64-bit value is cast to a 32-bit value and then assigned to a 32-bit byte peripheral type, an internal error occurs. |
| CODEGEN-1662 |
Optimizer incorrectly detects __fmin and __fmax idioms |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.4.LTS |
If you want floating-point absolute value, use fabs. However, there are other ways this bug could be triggered that have no practical workaround other than to use -Ooff |
|
| CODEGEN-1640 |
MISRA 19.1 misreported: #include statements should only be preceded by other preprocessor directives |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.4.LTS |
No practical workaround |
|
| CODEGEN-1634 |
MISRA 7.1 misreported: octal tokens in token paste |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.4.LTS |
No practical workaround |
|
| CODEGEN-1632 |
MISRA 15.2 misreported: switch clause unconditional break |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.4.LTS |
Put an explicit break at the end of the compound statement |
|
| CODEGEN-1534 |
Assembler mishandles SUBF32||MOV32 UNCF |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.4.LTS |
As a workaround, take off the UNCF operand and the assembler handles the instruction correctly. |
|
| CODEGEN-1510 |
Assembler incorrectly issues warning on large constant used with MOVI32 instruction |
Fixed |
C2000_15.12.1.LTS |
C2000_15.12.4.LTS |
|
|
| SDSCM00052895 |
C28x --disable_dp_load_opt does not disable blocking for .ebss |
Fixed |
C2000_15.12.2.LTS |
C2000_15.12.4.LTS |
Put data in user-defined section and use --disable_dp_load_opt to prevent blocking. |
The C28x compiler blocks .ebss by default. --disable_dp_load_opt disables
blocking for user-defined sections. However, for .ebss the flag only disables
DP-load optimization but did not disable blocking. |
| CODEGEN-1420 |
Compiler mistakenly overwrites upper 32-bits to 0 by using MOVZ instruction to compute var32 |= 0x20 |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.4.LTS |
|
Fixed an issue where the compiler would issue a MOVZ instruction that zeroes the upper bits of an XAR register when those upper bits are needed for a future instruction. |
| CODEGEN-1418 |
64-bit bitwise op on enum gives INTERNAL ERROR: no match for ASG |
Fixed |
C2000_15.12.2.LTS, C2000_15.12.3.LTS, C2000_15.12.0.LTS, C2000_15.12.1.LTS |
C2000_15.12.4.LTS |
Add compiler option -mf3 or higher (--opt_for_speed=3) |
|
| CODEGEN-1333 |
Structure assignment causes compiler to fail with INTERNAL ERROR: Decomposition error |
Fixed |
C2000_15.12.3.LTS |
C2000_15.12.4.LTS |
Replace struct assignments involving packed structures with a memcpy() call to copy the contents of the RHS of the struct assign to the LHS. |
|
| CODEGEN-1329 |
Lower diagnostic about redefined opcode to a warning, when a compiler intrinsic is redefined |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.5.LTS |
Remove the #define or do not include the header file in assembly files. |
When a header file attempting to redefine an opcode name is included in assembly files, the assembler issues an error because it is not legal to redefine an opcode name. While this behavior is correct, it causes programs to fail to compile when some C2000 header files are included in assembly files due to the "#define eallow ..." in the header files. |
| SDSCM00052894 |
CLA does not correctly handle certain pragmas like UNROLL which take an integer argument |
Fixed |
C2000_15.12.1.LTS |
C2000_15.12.3.LTS |
None |
|
| SDSCM00052881 |
unsigned array index not trucated as it should be |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.3.LTS |
Disable the optimizer with -Ooff |
|
| SDSCM00052873 |
Mishandled condition codes set by CLA intrinsics __mmaxf32 and __mminf32 |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.3.LTS |
|
|
| SDSCM00052833 |
Linker INTERNAL ERROR with object files with DWARF information compiled by IAR compiler |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.3.LTS |
Add option --compress_dwarf=off |
|
| SDSCM00052805 |
Decomposition error on while(*ptr++) where ptr points to volatile |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.2.LTS |
No workaround. |
|
| SDSCM00052774 |
Using __IQsat with destination same as one input leads to bad code |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.2.LTS |
No practical workaround |
|
| SDSCM00052737 |
Compiler reorders MOVDL or MOVD32 instruction with an instruction which reads the delayed memory |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.2.LTS |
None. |
|
| SDSCM00052723 |
Compiler seg faults with use of --opt_level=4 |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.1.LTS |
Use optimization level 3 or below. |
|
| SDSCM00052699 |
Compiler discards write to a volatile local struct member |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.2.LTS |
No workaround. |
|
| SDSCM00050005 |
Compiler mistakenly issues MISRA diagnostic 12.9 for a float point type |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.3.LTS |
|
|
| SDSCM00039432 |
Must interrupt-protect RB restore in low-prority interrupt handler |
Fixed |
C2000_15.12.0.LTS |
C2000_15.12.2.LTS |
At the end of every low-priority interrupt handler function which may have enabled interrupts (possibly during a callee), add the intrinsic __disable_interrupts. |
|
| SDSCM00038327 |
ARM RTS libraries expose enumerations across ABI boundaries, but are marked as having no visible enumerations |
Fixed |
|
C2000_15.12.0.LTS |
When using C++ RTS functions, use --enum_type=packed, or rebuild the RTS
library with the --enum_type=int option. |
|
