FRAM device usage: clearing PM5CTL0.LOCKLPM5 bit at start-up

Typical message

"For FRAM devices, at start up, the GPIO power-on default high-impedance mode needs to be disabled to activate previously configured port settings. This can be done by clearing the LOCKLPM5 bit in PM5CTL0 register."

What it means

Upon exit from LPMx.5, all peripheral registers are set to their default conditions but the I/O pins remain locked while LOCKLPM5 remains set. Keeping the I/O pins locked ensures that all pin conditions remain stable when entering the active mode, regardless of the default I/O register settings.

Risks, Severity

If the LOCKLPM5 bit is not cleared, all GPIO pins remain in default high-impedance mode and cannot be reverted back to previously configured settings.

Why it is happening

The PM5CTL0.LOCKPM5 bit clearing code instruction cannot be detected in the project.

Remedy

Insert the following line of code at the beginning of the project:

 // Disable the GPIO power-on default high-impedance mode to activate
 // previously configured port settings
 PM5CTL0 &= ~LOCKLPM5;

Code Example

Refer to FRAM device code examples from CCS - TI Resource Explorer or as downloadable packages at https://www.ti.com/lsds/ti/microcontroller/16-bit_msp430/tools_software.page#code

More Resources

Refer to the MSP430 Family User's Guides for FRAM devices for more details.

• www.ti.com/lit/pdf/slau367 MSP430FR58xx/MSP430FR59xx Family User’s Guide
• www.ti.com/lit/pdf/slau272 MSP430FR57xx Family User’s Guide
  

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