")
print(" Example: python fix_port_pin_id.py .")
print(" Example: python fix_port_pin_id.py examples/Port")
sys.exit(1)
search_path = sys.argv[1]
if not os.path.isdir(search_path):
print(f"Error: '{search_path}' is not a valid directory.")
sys.exit(1)
# Pattern 1: PortPhysicalPinId - prefix with PORT_PIN_
pattern_physical_pin = re.compile(
r'(name="PortPhysicalPinId"\s+type="ENUMERATION"\s+value=")'
r'((?!PORT_PIN_)([^"]+))'
r'(")'
)
replacement_physical_pin = r'\1PORT_PIN_\3\4'
def replace_slash_comma(match):
"""Replace '/' and ',' with '_' in the matched value."""
prefix = match.group(1)
value = match.group(2)
suffix = match.group(3)
new_value = value.replace("/", "_").replace(",", "_")
return prefix + new_value + suffix
# Pattern 2: PortPinPeripheralSignal - replace / and , with _
pattern_peripheral_signal = re.compile(
r'(name="PortPinPeripheralSignal"\s+type="ENUMERATION"\s+value=")'
r'([^"]*[/,][^"]*)'
r'(")'
)
# Pattern 3: PortPinName - replace / and , with _
pattern_pin_name = re.compile(
r'(name="PortPinName"\s+type="ENUMERATION"\s+value=")'
r'([^"]*[/,][^"]*)'
r'(")'
)
files_updated = 0
files_skipped = 0
for dirpath, dirnames, filenames in os.walk(search_path):
for filename in filenames:
if filename == "Port.xdm":
filepath = os.path.join(dirpath, filename)
with open(filepath, "r", encoding="utf-8") as f:
content = f.read()
new_content = content
# Apply Pattern 1: PortPhysicalPinId
new_content = pattern_physical_pin.sub(
replacement_physical_pin, new_content
)
# Apply Pattern 2: PortPinPeripheralSignal
new_content = pattern_peripheral_signal.sub(
replace_slash_comma, new_content
)
# Apply Pattern 3: PortPinName
new_content = pattern_pin_name.sub(replace_slash_comma, new_content)
if new_content != content:
with open(filepath, "w", encoding="utf-8") as f:
f.write(new_content)
print(f"Updated: {filepath}")
files_updated += 1
else:
print(f"No changes: {filepath}")
files_skipped += 1
print(f"\nDone. Updated: {files_updated}, No changes: {files_skipped}")
```
---
## v03.00.00 (i.e release v01.04.00) from v02.00.00 (i.e release v01.03.00) Migration
### Summary
Version v03.00.00 introduces **Resource Allocator as a mandatory architectural foundation**. This represents a fundamental shift from direct parameter configuration to centralized resource management with device-specific pin configurations:
1. **Resource Allocator Introduction and Device Variant Centralization**: Resource Allocator becomes mandatory with device variant selection moved from Port module to centralized Resource Allocator
**PREREQUISITE:** Complete [Resource Allocator Setup](Migration_Guide_ResourceAllocator.md#module-setup-and-configuration) before proceeding.
### Change 1: Resource Allocator Introduction and Device Variant Centralization
#### Description
Resource Allocator becomes a mandatory architectural foundation for the Port module, with device variant selection moved to centralized resource management. Resource Allocator determines available pins and mux options, while device-specific pin configurations, mux modes, and package information are now derived from Resource Allocator settings.
#### Old vs New Configuration
**Old (v02.00.00):**
Direct device variant selection was used within Port module configuration.
```{figure} Assets/images/migration/port_module/01_01_port_module_old_config.png
:alt: Old Port Config
:align: center
:width: 80%
v02.00.00: PortDeviceVariant configured within Port module
```
**New (v03.00.00):**
Port module automatically reads device variant information from Resource Allocator to determine available pins and mux options.
```{figure} Assets/images/migration/port_module/01_02_port_module_new_config.png
:alt: New Port Config
:align: center
:width: 80%
v03.00.00: Port module configuration without PortDeviceVariant - device settings now derived from Resource Allocator
```
**Parameter Source Changes:**
| Parameter | v02.00.00 | v03.00.00 |
|-----------|-----------|-----------|
| **Device Variant** | Configured in Port module | Derived from Resource Allocator |
| **Pin Availability** | Based on Port module device settings | Automatically filtered by Resource Allocator |
| **Mux Modes** | Configured in Port module | Centralized in Resource Allocator |
| **Package Information** | Direct configuration in Port | Derived from Resource Allocator |
#### Migration Actions
1. **Setup Resource Allocator:** Follow [Resource Allocator Setup](Migration_Guide_ResourceAllocator.md) with Device, Variant, and Package parameters
2. **Navigate to Port Configuration:** Navigate to **Port → PortContainer → PortPin**
3. **Verify Pin Configurations:** Ensure all pin-related parameters reference the correct Resource Allocator data and available pin options are automatically filtered based on Resource Allocator device settings
```{NOTE}
The Resource Allocator module must be configured before the Port module to ensure correct pin availability filtering. Device-specific pin configurations, mux modes, and package information are now derived from the Resource Allocator settings.
```
## v02.00.00 (i.e release v01.03.00) from v01.01.00 (i.e release v01.02.00) Migration
### Summary
Version v02.00.00 introduces major changes that require attention when migrating from v01.01.00 or any older versions:
1. **Port Pin Name Changes**: PortPinName and PortPinPeripheralSignal naming conventions updated, affecting configuration compatibility
2. **Configuration Structure Name Change**: Port configuration structure name updated for AUTOSAR TPS_ECUC_08011 compliance
### Change 1: Port Pin Name Changes
#### Description
Version v02.00.00 updates `PortPinName` and `PortPinPeripheralSignal` naming conventions, impacting configuration parameters. Port configurations from v01.01.00 or older versions are not directly compatible with v02.00.00 due to these naming changes.
#### Old vs New Pin Naming
**Pin Naming Convention Changes:**
| Aspect | v01.01.00 and older | v02.00.00 |
|--------|---------------------|-----------|
| **PortPinName and PortPinPeripheralSignal** | Old naming convention | Updated naming convention |
| **Configuration Compatibility** | Direct compatibility | **Not compatible** - requires reconfiguration |
| **Plugin Handling** | N/A | Automatically flags incompatible configurations |
#### Migration Actions
1. **Open Configuration:** Open your existing configuration in the latest plugin version
2. **Identify Incompatible Configurations:** The plugin will automatically flag incompatible pin configurations
3. **Reconfigure Pins:** Configure pins using the new naming convention by choosing values from the plugin
4. **Verify All Configurations:** Verify and update all affected pin configurations
### Change 2: Configuration Structure Name Change
#### Description
Version v02.00.00 changes the configuration structure name for AUTOSAR TPS_ECUC_08011 compliance, requiring updates to application code that references the Port configuration structure.
#### Old vs New Configuration Structure
**Configuration Structure Name Mapping:**
| v01.01.00 and older | v02.00.00 |
|---------------------|-----------|
| `Port_PortConfigSet` | `Port_Config` |
**Code Examples:**
```c
// v01.01.00 and older
Port_Init(&Port_PortConfigSet);
// v02.00.00
Port_Init(&Port_Config);
```
#### Migration Actions
1. **Search Application Code:** Find all references to `Port_PortConfigSet` in your application code
2. **Replace Structure Name:** Update all references from `Port_PortConfigSet` to `Port_Config`
3. **Update Function Calls:** Ensure all Port initialization calls use the new structure name
4. **Update Upper Modules:** Update any upper modules that reference the configuration structures to use the new structure name
5. **Verify Compilation:** Clean build and verify no compilation errors related to Port configuration structure
# Resource Allocator Module
**Release Version:** 01.04.00
**Module Version:** 1.00.00
The Resource Allocator module is introduced in MCAL release 01.04.00 as a mandatory foundational configuration module. It centralizes hardware resource management and provides device-specific configuration to all MCAL modules. Resource Allocator is not available in earlier versions.
The Resource Allocator is a **configuration-only module** introduced in MCAL release 01.04.00 as the mandatory foundation for hardware resource management.
---
## Module Setup and Configuration
### Step 1: Add ResourceAllocator Module to Project
1. Open EB Tresos Studio with your project
2. Right-click on the project in Project Explorer
3. Select **"Add/Remove Software Modules"**
4. In the Available Modules list, locate **"ResourceAllocator"**
5. Select ResourceAllocator and click **"Add"**
6. Click **"Finish"** to add the module to your project
```{NOTE}
User shall load the ResourceAllocator module with [recommended configuration for your device variant](https://software-dl.ti.com/C2000/docs/mcal/F29H85x/latest/src/Module_User_Guide_ResourceAllocator.html#selecting-a-recommended-configuration).
```
```{figure} Assets/images/migration/resource_allocator/01_01_resource_allocator_add_module.png
:alt: Add ResourceAllocator module
:align: center
:width: 80%
Add ResourceAllocator module to project
```
### Step 2: Configure ResourceAllocator General Settings
**Navigation Path:** ResourceAllocator → ResourceAllocatorGeneral
**Device Configuration Parameters:**
- **Device**: Select your F29H85x device (e.g., F29H859DU_Q1)
- **Variant**: Select device variant (e.g., F29H859DU6_Q)
- **Package**: Select appropriate package (e.g., F29H859DU6_Q_144RFS)
```{figure} Assets/images/migration/resource_allocator/01_02_resource_allocator_general_config.png
:alt: ResourceAllocator General Settings
:align: center
:width: 80%
Configure ResourceAllocator device, package, and context settings
```
### Context Selection
Execution context defines which CPU core handles MCAL module operations. Context_0 is a user-defined name that can be customized.
As AUTOSAR is expected to run on CPU1, only CPU1 can be selected here. In future support will be added to define non-AUTOSAR context.
**Configuration:**
Navigate to **ResourceAllocatorGeneral → Context** and configure **Context_0**.
```{figure} Assets/images/migration/resource_allocator/01_03_resource_allocator_context.png
:alt: Context Configuration
:align: center
:width: 80%
Configure CurrentContext - Context_0 is a user-defined name
```
All MCAL modules will operate on the configured context.
# SPI Module Migration
**Migration Approach:** Follow sequential migration for clear understanding of changes at each version. Each migration is organized by individual changes with description, old vs new comparison, and migration actions.
## v03.00.00 (i.e release v01.04.00) from v02.00.00 (i.e release v01.03.00) Migration
### Summary
Version v03.00.00 introduces **Resource Allocator as a mandatory architectural foundation**. This represents a fundamental shift from direct parameter configuration to centralized resource management:
1. **Resource Allocator Introduction**: Resource Allocator becomes mandatory for all SPI module configuration
2. **Instance Name Updates**: SPI instance naming convention changes from descriptive names to simplified identifiers
3. **Hardware Unit Configuration Updates**: SpiHwUnit references updated to use Resource Allocator instances
4. **External Device Configuration Updates**: SpiExternalDevice configurations updated to reference allocated instances
**PREREQUISITE:** Complete [Resource Allocator Setup](Migration_Guide_ResourceAllocator.md#module-setup-and-configuration) before proceeding.
### Change 1: Resource Allocator Introduction
#### Description
Resource Allocator becomes a mandatory architectural foundation, replacing direct parameter configuration with centralized resource management. This represents a fundamental shift in how SPI controllers are configured and referenced, with available SPI instances now determined by Resource Allocator configuration.
#### Old vs New Configuration
**Old (v02.00.00):**
Direct parameter selection was used without Resource Allocator dependency.
```{figure} Assets/images/migration/spi_module/02_01_spi_module_old_hwunit_config.png
:alt: Old SPI Config
:align: center
:width: 80%
v02.00.00: Direct SPI unit parameter selection with SPI_UNIT_SPIA format
```
**New (v03.00.00):**
SPI hardware unit configurations now reference the SPI instances allocated through Resource Allocator.
```{figure} Assets/images/migration/spi_module/02_04_spi_module_select_instance.png
:alt: Select SPI Instance
:align: center
:width: 80%
v03.00.00: Select SPI instance from ResourceAllocator reference
```
#### Migration Actions
1. **Setup Resource Allocator:** Follow [Resource Allocator Setup](Migration_Guide_ResourceAllocator.md)
2. **Navigate to Context:** Navigate to **ResourceAllocatorGeneral → Context → Spi** and add SPI allocator:
```{figure} Assets/images/migration/spi_module/01_01_spi_module_add_allocator.png
:alt: Add SPI Allocator
:align: center
:width: 80%
Navigate to Context and add SPI allocator
```
3. **Add SPI Instance:** Add SpiAllocatedInstance with new naming convention:
```{figure} Assets/images/migration/spi_module/01_02_spi_module_add_instance.png
:alt: Add SPI Instance
:align: center
:width: 80%
Add SpiAllocatedInstance with new naming (SPIA, SPIB, etc.)
```
4. **Configure SPI Instance:** Configure SPI instances with new controller names:
```{figure} Assets/images/migration/spi_module/01_03_spi_module_select_instance.png
:alt: Configure SPI Instance
:align: center
:width: 80%
Configure SPI instances with new controller names
```
5. **Complete Configuration:** Finalize SPI instance allocation:
```{figure} Assets/images/migration/spi_module/01_04_spi_module_final_config.png
:alt: Final SPI Configuration
:align: center
:width: 80%
Complete SPI instance allocation (SPIA, SPIB, SPIC, SPID)
```
6. **Navigate to SpiHwUnit:** Navigate to **Spi → SpiHwUnit** and update configurations to reference the SPI instances allocated in Resource Allocator
7. **Open Hardware Unit Configuration:** Access the SpiHwUnit configuration that needs to be updated
8. **Set Instance Reference:** Set SpiHwUnitType to point to the corresponding SpiAllocatedInstance in Resource Allocator (SPIA, SPIB, SPIC, SPID)
9. **Verify Automatic Derivation:** Confirm that the SPI hardware unit parameters are now automatically derived from the Resource Allocator reference
### Change 2: Instance Name Updates
#### Description
SPI instance naming convention changes from descriptive names to simplified identifiers. The new naming pattern removes the "SPI_UNIT_" prefix for consistency across modules and improved Resource Allocator integration.
#### Old vs New Instance Names
**Instance Name Mapping:**
| v02.00.00 | v03.00.00 | Hardware |
|-----------|-----------|----------|
| SPI_UNIT_SPIA | SPIA | SPI_A |
| SPI_UNIT_SPIB | SPIB | SPI_B |
| SPI_UNIT_SPIC | SPIC | SPI_C |
| SPI_UNIT_SPID | SPID | SPI_D |
**Naming Pattern:** `SPI_UNIT_{NAME}` → `{NAME}`
```{NOTE}
ISR names are unaffected by this change.
```
#### Migration Actions
**No additional action required.** Controller name updates are automatically handled when following the Resource Allocator setup steps in Change 1. The controller naming convention changes from old identifiers (MCASPI_UNIT_SPIAN1, SPI_UNIT_SPIB) to updated identifiers (SPIA, SPIB) are applied automatically through the Resource Allocator configuration.
If you have used the old controller names in the application code, please change them to match the new naming convention.
### Change 3: Hardware Unit Configuration Updates
#### Description
SpiHwUnit configurations are updated to reference SPI instances allocated through Resource Allocator instead of using direct instance names. The SpiHwUnitType parameter now references the Resource Allocator's SpiAllocatedInstance.
#### Old vs New Hardware Unit Configuration
**Old (v02.00.00):**
Direct SPI unit parameter selection with SPI_UNIT_SPIA format.
```{figure} Assets/images/migration/spi_module/02_01_spi_module_old_hwunit_config.png
:alt: Old SPI Config
:align: center
:width: 80%
v02.00.00: Direct SPI unit parameter selection with SPI_UNIT_SPIA format
```
**New (v03.00.00):**
SpiHwUnitType parameter now references Resource Allocator's SpiAllocatedInstance.
```{figure} Assets/images/migration/spi_module/02_04_spi_module_select_instance.png
:alt: Select SPI Instance
:align: center
:width: 80%
v03.00.00: Select SPI instance from ResourceAllocator reference
```
#### Migration Actions
1. **Navigate to SpiHwUnit:** Navigate to **Spi → SpiHwUnit** and update configurations to use the SPI instances allocated in Resource Allocator
2. **Open Hardware Unit Configuration:** Access the SpiHwUnit configuration that needs to be updated
3. **Set Instance Reference:** Set SpiHwUnitType parameter to reference the Resource Allocator's SpiAllocatedInstance instead of using direct instance names
4. **Verify Automatic Derivation:** Ensure all hardware unit configurations properly reference the allocated SPI instances and parameters are automatically derived from the Resource Allocator reference
### Change 4: External Device Configuration Updates
#### Description
SpiExternalDevice configurations are updated to reference SPI instances allocated through Resource Allocator and ensure compatibility with the new instance allocation system. External devices must now reference valid allocated instances from Resource Allocator.
#### Old vs New External Device Configuration
**Old (v02.00.00):**
SpiExternalDevice used direct SPI unit parameter selection.
```{figure} Assets/images/migration/spi_module/02_02_spi_module_old_extdevice_config.png
:alt: Old SPI Config
:align: center
:width: 80%
v02.00.00: SpiExternalDevice with direct SPI unit parameter selection with SPI_UNIT_SPIA format
```
**New (v03.00.00):**
SpiExternalDevice configurations reference allocated instances from Resource Allocator.
```{figure} Assets/images/migration/spi_module/03_02_spi_module_configure_external_device.png
:alt: Configure External Device
:align: center
:width: 80%
Configure external device with the SPI instance configured in Resource Allocator
```
#### Migration Actions
1. **Navigate to SpiExternalDevice:** Navigate to **Spi → SpiExternalDevice** and verify configurations reference valid allocated instances
2. **Add External Device:** Add SpiExternalDevice configuration as needed for your application
3. **Configure Device Instance:** Configure external device with the SPI instance configured in Resource Allocator
4. **Verify Compatibility:** Ensure all external device configurations properly reference allocated SPI instances from Resource Allocator
```{NOTE}
The Resource Allocator module must be configured before the SPI module to ensure correct instance availability. Available SPI instances are determined by the Resource Allocator's SpiAllocatedInstance configuration for the current context.
```
## v02.00.00 (i.e release v01.03.00) from v01.01.00 (i.e release v01.02.00) Migration
### Summary
Version v02.00.00 introduces configuration structure name changes to comply with AUTOSAR requirement TPS_ECUC_08011:
1. **Configuration Structure Name Change**: SPI configuration structure name updated for AUTOSAR TPS_ECUC_08011 compliance
### Change 1: Configuration Structure Name Change
#### Description
Version v02.00.00 changes the configuration structure name for AUTOSAR TPS_ECUC_08011 compliance. This change ensures compliance with AUTOSAR naming conventions and requires updates to application code that references the SPI configuration structure.
#### Old vs New Configuration Structure
**Configuration Structure Name Mapping:**
| v01.01.00 and older | v02.00.00 |
|---------------------|-----------|
| `Spi_ConfigObj` | `Spi_Config` |
**Code Examples:**
```c
// v01.01.00 and older
Spi_Init(&Spi_ConfigObj);
// v02.00.00
Spi_Init(&Spi_Config);
```
#### Migration Actions
1. **Search Application Code:** Find all references to `Spi_ConfigObj` in your application code
2. **Replace Structure Name:** Update all references from `Spi_ConfigObj` to `Spi_Config`
3. **Update Function Calls:** Ensure all SPI initialization calls use the new structure name
4. **Update Upper Modules:** Update any upper modules that reference the configuration structures to use the new structure name
5. **Verify Compilation:** Clean build and verify no compilation errors related to SPI configuration structure
# WDG Module Migration
**Migration Approach:** Follow sequential migration for clear understanding of changes at each version. Each migration is organized by individual changes with description, old vs new comparison, and migration actions.
## v02.00.00 (i.e release v01.03.00) from v01.00.01 (i.e release v01.02.00) Migration
### Summary
Version v02.00.00 introduces configuration structure name changes to comply with AUTOSAR requirement TPS_ECUC_08011:
1. **Configuration Structure Name Change**: WDG configuration structure name updated for AUTOSAR TPS_ECUC_08011 compliance
### Change 1: Configuration Structure Name Change
#### Description
Version v02.00.00 changes the configuration structure name for AUTOSAR TPS_ECUC_08011 compliance. This change ensures compliance with AUTOSAR naming conventions and requires updates to application code that references the WDG configuration structure.
#### Old vs New Configuration Structure
**Configuration Structure Name Mapping:**
| v01.00.01 and older | v02.00.00 |
|----------------------|-----------|
| `Wdg_ConfigSetptr` | `Wdg_Config` |
**Code Examples:**
```c
// v01.00.01 and older
Wdg_Init(&Wdg_ConfigSetptr);
// v02.00.00
Wdg_Init(&Wdg_Config);
```
#### Migration Actions
1. **Search Application Code:** Find all references to `Wdg_ConfigSetptr` in your application code
2. **Replace Structure Name:** Update all references from `Wdg_ConfigSetptr` to `Wdg_Config`
3. **Update Function Calls:** Ensure all WDG initialization calls use the new structure name
4. **Update Upper Modules:** Update any upper modules that reference the configuration structures to use the new structure name
5. **Verify Compilation:** Clean build and verify no compilation errors related to WDG configuration structure
# Module User Guide
```{toctree}
:maxdepth: 1
:caption: Table of Contents
Module_User_Guide_ResourceAllocator
Module_User_Guide_Can
Module_User_Guide_Dio
Module_User_Guide_Fls
Module_User_Guide_Gpt
Module_User_Guide_Lin
Module_User_Guide_Mcu
Module_User_Guide_Port
Module_User_Guide_Spi
Module_User_Guide_Wdg
Module_User_Guide_Cdd_Adc
Module_User_Guide_Cdd_Dma
Module_User_Guide_Cdd_Ecap
Module_User_Guide_Cdd_I2c
Module_User_Guide_Cdd_Ipc
Module_User_Guide_Cdd_Pwm
Module_User_Guide_Cdd_Sent
Module_User_Guide_Cdd_Xbar
Module_User_Guide_Cdd_Uart
Module_User_Guide_Rtdma
```
## Resource Allocator Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|API|Application Programming Interface|
|BSW|Basic Software|
|MCAL|Micro Controller Abstraction Layer|
|MCU|Micro Controller Unit|
|SoC|System on Chip|
|RA|Resource Allocator|
|EB Tresos|Elektrobit Tresos Studio - AUTOSAR Configuration Tool|
### Introduction
The Resource Allocator is a system-level configuration module that provides centralized management of device, package, and variant selection for F29x devices. It is a **configuration-only module** that:
- Defines the target device family (F29H85x, F29P32x, F29P58x)
- Specifies the device variant within the selected family
- Configures the package type for the selected variant
- Provides device-specific configuration to other MCAL modules
### Functional Overview
The Resource Allocator provides a centralized location for device configuration that is shared across all MCAL modules. This ensures consistency in device-specific settings throughout the MCAL configuration.
#### Purpose
The Resource Allocator serves as the single source of truth for:
- Device family selection
- Device variant identification
- Package type configuration
This centralized approach ensures that all MCAL modules reference the same device configuration, preventing inconsistencies that could arise from configuring device parameters in multiple locations.
#### Integration with MCAL Modules
Other MCAL modules reference the Resource Allocator configuration to:
- Determine available peripheral instances for the selected device
- Apply device-specific constraints and validation rules
- Generate appropriate configuration for the target hardware
- Configure CPU selection (CPUSEL) for peripheral clock gating
- Configure frame selection (FRAMESEL) for peripheral memory access
```{Note}
The available variants and packages may be updated as new devices are released. Refer to the device-specific datasheet for the most current information.
```
### Hardware Features
The Resource Allocator configures several critical hardware features that affect system operation and peripheral access on F29x devices.
#### CPU1 Lockstep Mode
CPU1 Lockstep Mode is a functional safety feature where CPU1 and CPU2 operate in redundant comparison mode. In this mode:
- CPU1 and CPU2 execute the same instructions simultaneously
- Hardware compares the outputs of both CPUs cycle-by-cycle
- Any mismatch triggers a safety error response
- Provides fault detection for transient and permanent CPU errors
**Configuration:**
- Enabled via the `CPU1_Lockstep` parameter
- Requires CPU2 availability for the selected device
- Implemented by the [`Mcu_Init()`](Module_User_Guide_Mcu.md) function in the Mcu module
**Use Cases:**
- Automotive safety-critical applications (ASIL-B, ASIL-D)
- Industrial functional safety systems (SIL-2, SIL-3)
- Applications requiring IEC 61508 or ISO 26262 compliance
```{Note}
When lockstep mode is enabled, CPU2 cannot be used independently. Both cores operate as a single logical processing unit.
```
#### CPU Selection (CPUSEL)
CPU Selection determines which CPU core owns and controls a peripheral instance. This configuration:
- Is automatically assigned based on the Context configuration
- Peripherals inherit CPU selection from their parent Context's `Core` parameter
- Controls peripheral clock gating - only the owning CPU can enable/disable the peripheral clock
**Behavior:**
- The owning CPU has exclusive control over the peripheral's clock enable
- Other CPUs can access the peripheral's registers (if frame access is configured) but cannot control its clock
- Ensures deterministic peripheral initialization and power management
```{Note}
CPUSEL is automatically configured by the Resource Allocator based on the Context assignment. Users do not directly configure CPUSEL values.
```
#### Frame Selection (FRAMESEL)
Frame Selection enables optimized multi-core peripheral access by providing multiple memory-mapped address spaces for each peripheral. This feature:
- Provides four independent frames (FRAME0, FRAME1, FRAME2, FRAME3) per peripheral
- Each frame has its own base address for memory-mapped access
- Enables simultaneous access from different CPU cores without arbitration stalls
- Reduces bus contention in multi-core applications
**Configuration:**
- User-configurable via the `Frame` parameter for each peripheral instance
- Available for all peripheral types (CAN, SPI, LIN, UART, etc.)
**Use Cases:**
- Multi-core applications where different CPUs need concurrent peripheral access
- Reducing bus arbitration delays in time-critical applications
- Optimizing peripheral bandwidth utilization across multiple initiators
```{Note}
All frames access the same physical peripheral hardware. Frame selection only affects the memory-mapped address used for register access, not the peripheral functionality.
```
### Source Files
The Resource Allocator is implemented as an EB Tresos plugin:
📦**plugins**\
┗ 📂**ResourceAllocator_TI_F29H85x**\
┃ ┣ 📂**config**\
┃ ┃ ┣ 📜**ResourceAllocator.arxml** : *ECU Configuration and Parameter definitions*\
┃ ┃ ┗ 📜**ResourceAllocator.xdm** : *ECU Parameter definition for EB Tresos*\
┃ ┣ 📂**config_ext**\
┃ ┃ ┣ 📜**ResourceAllocator_F29H859DU6_Q_256ZEX_Rec.xdm** : *Recommended configuration for F29H859DU6_Q_256ZEX*\
┃ ┃ ┣ 📜**ResourceAllocator_F29H859TM8_Q_144RFS_Rec.xdm** : *Recommended configuration for F29H859TM8_Q_144RFS*\
┃ ┃ ┣ 📜**ResourceAllocator_F29H859TU8_Q_256ZEX_Rec.xdm** : *Recommended configuration for F29H859TU8_Q_256ZEX*\
┃ ┃ ┣ 📜**ResourceAllocator_F29P329SJ1_Q_144RFS_Rec.xdm** : *Recommended configuration for F29P329SJ1_Q_144RFS*\
┃ ┃ ┣ 📜**ResourceAllocator_F29P329SM1_Q_144RFS_Rec.xdm** : *Recommended configuration for F29P329SM1_Q_144RFS*\
┃ ┃ ┣ 📜**ResourceAllocator_F29P329SM2_Q_144RFS_Rec.xdm** : *Recommended configuration for F29P329SM2_Q_144RFS*\
┃ ┃ ┣ 📜**ResourceAllocator_F29P589DM5_Q_256ZEX_Rec.xdm** : *Recommended configuration for F29P589DM5_Q_256ZEX*\
┃ ┃ ┗ 📜**ResourceAllocator_F29P589DU5_Q_256ZEX_Rec.xdm** : *Recommended configuration for F29P589DU5_Q_256ZEX*\
┃ ┣ 📂**META-INF**\
┃ ┃ ┗ 📜**MANIFEST.MF** : *Plugin manifest and licensing information*\
┃ ┣ 📂**resources** : *Properties for all devices, variants, packages etc.*\
┃ ┗ 📜**plugin.xml** : *XML file to register plugin with EB Tresos Studio*
### Recommended Configuration
When adding the Resource Allocator plugin to an EB Tresos project, users can select a **Recommended Configuration** as a starting point. This feature provides pre-configured settings for various F29x device variants, simplifying the initial setup process.
#### Selecting a Recommended Configuration
1. In EB Tresos, navigate to **Module Configurations**
2. Add the **ResourceAllocator** module to your project
3. In the **Details of "ResourceAllocator"** panel, locate the **Recommended Configuration** dropdown
4. Select the appropriate configuration for your target device
```{figure} Assets/images/RA_RecommendedConfig.png
:alt: Resource Allocator Recommended Configuration
:align: center
Selecting Recommended Configuration in EB Tresos
```
### Integration Description
#### Dependent Modules
The Resource Allocator is a **foundational module** with no dependencies on other MCAL modules. It should be configured before other peripheral modules to ensure device-specific settings are available.
#### Modules that Reference Resource Allocator
The following MCAL modules reference the Resource Allocator for device configuration:
| Module | Purpose |
|--------|---------|
| CAN | Device-specific CAN instance availability |
| SPI | Device-specific SPI instance availability |
| LIN | Device-specific LIN instance availability |
| Cdd_Uart | Device-specific UART instance availability |
| Cdd_I2c | Device-specific I2C instance availability |
| Cdd_Sent | Device-specific SENT instance availability |
| Cdd_Adc | Device-specific ADC instance availability |
| Cdd_Pwm | Device-specific PWM instance availability |
| Cdd_Ecap | Device-specific ECAP instance availability |
| Cdd_Xbar | Device-specific XBAR configuration |
| Mcu | Device-specific clock and system configuration, CPU ownership and frame assignment for all allocated peripherals (including SDK-managed peripherals) |
| Port | Device-specific pin availability |
### Non-MCAL Peripheral Allocation
The Resource Allocator defines allocation containers for several peripherals that are **not supported by TI MCAL or CDD drivers**. These peripherals are listed in the table below.
The Resource Allocator entries for these peripherals serve a single purpose: they allow [`Mcu_Init()`](Module_User_Guide_Mcu.md) to configure the hardware-level CPU ownership (CPUSEL) and peripheral frame assignment (FRAMESEL) registers during system initialization. This ensures that the correct CPU core is granted ownership of each peripheral before any application code runs.
```{Note}
These peripherals are not driven by MCAL APIs. Customers who need to use these peripherals should use the TI F29H85x SDK drivers on the appropriate CPU core. Only CPU1 can write the CPUSEL registers; therefore the Resource Allocator SETUP mode configuration must be performed on CPU1.
```
| Peripheral Container | Allocated Instance Container | Description |
|----------------------|------------------------------|-------------|
| Cdd_Cmpss | Cdd_CmpssAllocatedInstance | Comparator Subsystem (CMPSS) instances — CPU ownership and frame assignment configured by Mcu |
| Eqep | EqepAllocatedInstance | Enhanced Quadrature Encoder Pulse (EQEP) instances — CPU ownership and frame assignment configured by Mcu |
| Sdfm | SdfmAllocatedInstance | Sigma-Delta Filter Module (SDFM) instances — CPU ownership and frame assignment configured by Mcu |
| Pmbus | PmbusAllocatedInstance | Power Management Bus (PMBus) instances — CPU ownership and frame assignment configured by Mcu |
| Dac | DacAllocatedInstance | Digital-to-Analog Converter (DAC) instances — CPU ownership and frame assignment configured by Mcu |
| Clb | ClbAllocatedInstance | Configurable Logic Block (CLB) instances — CPU ownership and frame assignment configured by Mcu |
| FsiTx | FsiTxAllocatedInstance | Fast Serial Interface Transmit (FSI-TX) instances — CPU ownership and frame assignment configured by Mcu |
| FsiRx | FsiRxAllocatedInstance | Fast Serial Interface Receive (FSI-RX) instances — CPU ownership and frame assignment configured by Mcu |
| Dcc | DccAllocatedInstance | Dual Clock Comparator (DCC) instances — CPU ownership and frame assignment configured by Mcu |
| Epg | EpgAllocatedInstance | Embedded Pattern Generator (EPG) instances — CPU ownership and frame assignment configured by Mcu |
| Wadi | WadiAllocatedInstance | Windowed Analog-to-Digital Input (WADI) instances — CPU ownership and frame assignment configured by Mcu |
| DLTFifoRegs | DLTFifoRegsAllocatedInstance | Data Logger Tool FIFO registers — frame assignment configured by Mcu |
| Error_Aggregator | Error_AggregatorAllocatedInstance | Error Aggregator — frame assignment configured by Mcu |
| ESM | ESMAllocatedInstance | Error Signaling Module (ESM) — frame assignment configured by Mcu |
Each of these containers follows the same parameter pattern as MCAL-supported peripherals:
| Parameter | Description |
|-----------|-------------|
| InstanceName | Identifies the specific hardware instance to be owned by the configured CPU context |
| Frame | Selects the peripheral frame (FRAME0–FRAME3) for memory-mapped register access |
| BaseAddr | Auto-calculated base address macro from `hw_memmap.h` (read-only; set by Auto-Calc) |
| DebugHaltEnabled | (where present) Controls DBGHALT signal activation when CPU enters HALT mode |
| StandbyModeEnabled | (where present) Controls peripheral clock gating when CPU enters STANDBY mode |
### Configuration
The Resource Allocator configuration defines the target device for the MCAL configuration.
#### Configuration Parameters
##### ResourceAllocatorGeneral
| Item ||
|--------|---------------|
| **Name** | ResourceAllocatorGeneral |
| **Description** | General configuration (parameters) of the Resource Allocator module. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
| **Range** | F29H859DU6_Q_100PZS
F29H859DU6_Q_144RFS
F29H859DU6_Q_176PTS
F29H859DU6_Q_256ZEX
F29H859TM8_Q_100PZS
F29H859TM8_Q_144RFS
F29H859TU8_Q_100PZS
F29H859TU8_Q_144RFS
F29H859TU8_Q_176PTS
F29H859TU8_Q_256ZEX
F29P329SJ1_Q_100PZS
F29P329SJ1_Q_144RFS
F29P329SM1_Q_100PZS
F29P329SM1_Q_144RFS
F29P329SM2_Q_100PZS
F29P329SM2_Q_144RFS
F29P589DM5_Q_100PZS
F29P589DM5_Q_144RFS
F29P589DM5_Q_176PTS
F29P589DM5_Q_256ZEX
F29P589DU5_Q_100PZS
F29P589DU5_Q_144RFS
F29P589DU5_Q_176PTS
F29P589DU5_Q_256ZEX |
###### Context
| Item ||
|--------|---------------|
| **Name** | Context |
| **Description** | This container contains the driver configuration (parameters) for the Context |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CPU1 |
| **Range** | CPU1 |
###### Can
Configuration container for Context specific settings for the Can module.
###### CanAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | CanAllocatedInstance |
| **Description** | Configuration of a Can instance allocated to this context. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MCANA_DRIVER_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Spi
Configuration container for Context specific settings for the Spi module.
###### SpiAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | SpiAllocatedInstance |
| **Description** | Configuration for Spi Instance. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | SPIA_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Lin
Configuration container for Context specific settings for the Lin module.
###### LinAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | LinAllocatedInstance |
| **Description** | Configuration for Lin Instance. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | LINA_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Cdd_Adc
Configuration container for Context specific settings for the Cdd_Adc module.
###### Cdd_AdcAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | Cdd_AdcAllocatedInstance |
| **Description** | Configuration for Cdd_Adc Instance. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ADCA_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### CddAdcSafetyCheckerInstance
| Item ||
|--------|---------------|
| **Name** | CddAdcSafetyCheckerInstance |
| **Description** | Configuration of ADC safety checker instances. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ADCSAFETYCHECK1_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### CddAdcCheckerInterruptEvtInstance
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerInterruptEvtInstance |
| **Description** | Configuration of ADC safety checker interrupt event instances. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ADCSAFETYCHECKINTEVT1_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### CddAdcGlobalSoftwareForce
| Item ||
|--------|---------------|
| **Name** | CddAdcGlobalSoftwareForce |
| **Description** | Configuration of global software force. This is linked to global software trigger feature in ADC. This should be added only once. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ADCGLOBAL_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Cdd_Ecap
Configuration container for Context specific settings for the Cdd_Ecap module.
###### Cdd_EcapAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | Cdd_EcapAllocatedInstance |
| **Description** | Configuration for Cdd_Ecap Instance. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ECAP1_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Cdd_Dma
Configuration container for Context specific settings for the Cdd_Dma module. This container defines which DMA channels are assigned to this specific CPU context.
###### CddDmaAllocatedChannel
| Item ||
|--------|---------------|
| **Name** | CddDmaAllocatedChannel |
| **Description** | Configuration of a DMA channel allocated to this CPU context. Each allocated channel can only be used by this context.. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### Cdd_I2c
Configuration container for Context specific settings for the Cdd_I2c module.
###### Cdd_I2cAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | Cdd_I2cAllocatedInstance |
| **Description** | Configuration for Cdd_I2c Instance. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | I2CA_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Cdd_Pwm
Configuration container for Context specific settings for the Cdd_Pwm module.
###### Cdd_PwmAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | Cdd_PwmAllocatedInstance |
| **Description** | Configuration for Cdd_Pwm Instance. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | EPWM1XLINK_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### CddPwmHrpwmCalInstance
| Item ||
|--------|---------------|
| **Name** | CddPwmHrpwmCalInstance |
| **Description** | Configuration of Hrpwm calibration instances. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | HRPWMCAL1_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Cdd_Sent
Configuration container for Context specific settings for the Cdd_Sent module.
###### Cdd_SentAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | Cdd_SentAllocatedInstance |
| **Description** | Configuration of a Cdd_Sent instance allocated to this context. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | SENT1_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Cdd_Uart
Configuration container for Context specific settings for the Cdd_Uart module.
###### Cdd_UartAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | Cdd_UartAllocatedInstance |
| **Description** | Configuration of a Cdd_Uart instance allocated to this context. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | UARTA_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Cdd_Cmpss
Configuration container for Context specific settings for the Cdd_Cmpss module.
###### Cdd_CmpssAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | Cdd_CmpssAllocatedInstance |
| **Description** | Configuration of a Cdd_Cmpss instance allocated to this context. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CMPSS1_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Eqep
Configuration container for Context specific settings for the Eqep module.
###### EqepAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | EqepAllocatedInstance |
| **Description** | Configuration of a Eqep instance allocated to this context. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | EQEP1_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Sdfm
Configuration container for Context specific settings for the Sdfm module.
###### SdfmAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | SdfmAllocatedInstance |
| **Description** | Configuration of a Sdfm instance allocated to this context. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | SDFM1_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Pmbus
Configuration container for Context specific settings for the Pmbus module.
###### PmbusAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | PmbusAllocatedInstance |
| **Description** | Configuration of a Pmbus instance allocated to this context. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | PMBUSA_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Dac
Configuration container for Context specific settings for the Dac module.
###### DacAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | DacAllocatedInstance |
| **Description** | Configuration of a Dac instance allocated to this context. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | DACA_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Clb
Configuration container for Context specific settings for the Clb module.
###### ClbAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | ClbAllocatedInstance |
| **Description** | Configuration of a Clb instance allocated to this context. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CLB1_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### FsiTx
Configuration container for Context specific settings for the FsiTx module.
###### FsiTxAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | FsiTxAllocatedInstance |
| **Description** | Configuration of a FsiTx instance allocated to this context. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | FSITXA_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### FsiRx
Configuration container for Context specific settings for the FsiRx module.
###### FsiRxAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | FsiRxAllocatedInstance |
| **Description** | Configuration of a FsiRx instance allocated to this context. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | FSIRXA_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Dcc
Configuration container for Context specific settings for the Dcc module.
###### DccAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | DccAllocatedInstance |
| **Description** | Configuration of a Dcc instance allocated to this context. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | DCC1_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Epg
Configuration container for Context specific settings for the Epg module.
###### EpgAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | EpgAllocatedInstance |
| **Description** | Configuration of a Epg instance allocated to this context. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | EPG1_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Wadi
Configuration container for Context specific settings for the Wadi module.
###### WadiAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | WadiAllocatedInstance |
| **Description** | Configuration of a Wadi instance allocated to this context. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | WADI1_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Cdd_Xbar
Configuration container for Cdd_Xbar module.
###### CddXbarOutputXbarFlag
| Item ||
|--------|---------------|
| **Name** | CddXbarOutputXbarFlag |
| **Description** | Configuration of a Cdd Xbar Output Xbar flag. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | OUTPUTXBAR1_FLAGS_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### CddXbarInputFlag
| Item ||
|--------|---------------|
| **Name** | CddXbarInputFlag |
| **Description** | Configuration of a Cdd_Xbar Input flags. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | XBAR_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Cdd_Dma
Configuration container for the Cdd_Dma module hardware resources. This defines the available RTDMA hardware instances and their channels that can be allocated to different CPU contexts in the system.
###### CddDmaHwInstance
| Item ||
|--------|---------------|
| **Name** | CddDmaHwInstance |
| **Description** | Configuration of a RTDMA hardware instance. Each instance represents a physical RTDMA peripheral with its own set of channels. Multiple instances can be configured if the device supports multiple RTDMA peripherals. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
| **Range** | CDD_DMA_EMULATION_STOP
CDD_DMA_EMULATION_FREE_RUN |
###### CddDmaMpuRegion
| Item ||
|--------|---------------|
| **Name** | CddDmaMpuRegion |
| **Description** | Configuration container for a DMA Memory Protection Unit (MPU) region. Each MPU region defines a protected memory address range with specific access permissions (read/write/no access) for selected DMA channels. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_DMA_NO_ACCESS |
| **Range** | CDD_DMA_NO_ACCESS
CDD_DMA_READ_ACCESS
CDD_DMA_READ_WRITE_ACCESS |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### CddDmaChannel
| Item ||
|--------|---------------|
| **Name** | CddDmaChannel |
| **Description** | Configuration of a DMA channel within this RTDMA hardware instance. Each channel represents an independent DMA transfer engine that can move data between memory and peripherals. This container defines all available channels (e.g., CH1, CH2, ..., CH10) for the instance, which can then be allocated to specific CPU contexts. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Range** | CH1
CH2
CH3
CH4
CH5
CH6
CH7
CH8
CH9
CH10 |
| **Max-value** | 3 |
| **Min-value** | 0 |
###### DLTFifoRegs
Configuration container for DLTFifoRegs module.
###### DLTFifoRegsAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | DLTFifoRegsAllocatedInstance |
| **Description** | Configuration of a DLTFifoRegs instance. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | DLTFIFOREGS_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### Error_Aggregator
Configuration container for Error_Aggregator module.
###### Error_AggregatorAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | Error_AggregatorAllocatedInstance |
| **Description** | Configuration of a Error_Aggregator instance. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ERROR_AGGREGATOR_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
###### ESM
Configuration container for ESM module.
###### ESMAllocatedInstance
| Item ||
|--------|---------------|
| **Name** | ESMAllocatedInstance |
| **Description** | Configuration of a ESM instance. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ESM |
| **Range** | ESM |
###### ESM
| Item ||
|--------|---------------|
| **Name** | ESM |
| **Origin** | Texas Instruments |
| **Description** | Selects the peripheral frame. Frames enable simultaneous access from different initiators to peripherals without arbitration stalls, each with its own base address. |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ESM_BASE_FRAME(0U) |
| **Range** | FRAME0
FRAME1
FRAME2
FRAME3 |
### Usage Procedures
#### Configuration Workflow
##### Step 1: Create EB Tresos Project
1. Launch EB Tresos Studio
2. Create a new configuration project
3. Select the target device C2000/F29H85x
4. Load the ResourceAllocator plugin
##### Step 2: Configure Device Settings
1. Open the ResourceAllocator module configuration
2. Navigate to the `ResourceAllocatorGeneral` container
3. Select the appropriate:
- `ResourceAllocatorDevice` (e.g., F29H85x)
- `ResourceAllocatorVariant` (e.g., F29H859TU_Q1)
- `ResourceAllocatorPackage` (e.g., F29H859TU8_Q_256ZEX)
4. Run **Auto-Calc** wizard in EB Tresos to calculated required values.
##### Step 3: Configure Other MCAL Modules
1. Add required MCAL modules (CAN, SPI, ADC, etc.)
2. The modules will reference the device configuration from Resource Allocator
3. Configure each module according to application requirements
4. Run **Auto-Calc** wizard in EB Tresos to calculated required values.
##### Step 4: Generate Configuration
1. Validate all module configurations
2. Generate the configuration files
3. The generated code will include device-specific settings
### Examples
#### Example: Configuring for F29H85x Device
This example demonstrates configuring the Resource Allocator for an F29H85x device:
**Configuration:**
```text
ResourceAllocatorGeneral
├── Device: F29H85x
├── Variant: F29H859TU_Q1
└── Package: F29H859TU8_Q_256ZEX
```
**Result:**
- All MCAL modules will be configured for F29H85x device family
- Device-specific peripheral instances will be available
- Appropriate constraints will be applied based on the selected variant
#### Example: Configuring for F29P58x Device
This example demonstrates configuring the Resource Allocator for an F29P58x device:
**Configuration:**
```text
ResourceAllocatorGeneral
├── Device: F29P58x
├── Variant: F29P589DU_Q1
└── Package: F29P589DU5_Q_256ZEX
```
**Result:**
- All MCAL modules will be configured for F29P58x device family
- Device-specific peripheral instances will be available
- Appropriate constraints will be applied based on the selected variant
```{Note}
The Resource Allocator should be configured before other MCAL modules to ensure device-specific settings are available for all module configurations.
## CAN Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|RTE|Runtime Environment|
|BSW|Basic Software|
|GPIO|General Purpose Input Output|
|MCAL|Micro Controller Abstraction Layer|
|API|Application Programming Interface|
|DET|Default Error Tracer|
|HW |Hardware|
|SW |Software|
|I/O|Input/Output|
|CAN|Controller Area Network|
|CanIf|Can Interface|
|L-PDU|Data Link Layer Protocol Data Unit. Consists of Identifier, Data Length and Data (SDU).|
|DLC|Data Length Code|
### Introduction
This document details AUTOSAR BSW CAN module implementation
|Supported AUTOSAR Release|**4.3.1**|
|------|-------------|
|**Supported Configuration Variants** | **Post-build, Pre-Compile**|
|**Vendor ID** | **CAN_VENDOR_ID (44)**|
|**Module ID** | **CAN_MODULE_ID (80)**|
The CAN driver provides services for basic transmission and reception of CAN frames in both interrupt and polling mode.
These components can be used by an application.
```{figure} Assets/images/Can_Autosar_MCAL.png
:alt: CAN MCAL AUTOSAR
:align: center
Can MCAL AUTOSAR
```
### Functional Overview
The CAN module initializes and controls the internal CAN Controllers of the microcontroller.
It provides services to write, read, and configure mailboxes of the Can controllers
Programming of clock source for the can, is beyond the scope of this document.
The driver expects user of this module has programmed required clock source.
Can module offers following services.
* On L-PDU transmission, the Can module writes the L-PDU in an appropriate buffer inside the CAN controller hardware.
* On L-PDU reception, the Can module calls the RX indication callback function with ID, DLC and pointer to L-SDU as parameter.
* The Can module provides an interface that serves as periodical processing function, and which must be called by the Basic Software Scheduler module periodically.
* The Can module provides services to control the state of the CAN controllers. Bus-off and Wake-up events are notified by means of callback functions.
### Hardware Features
#### Hardware Features supported
* Conforms with CAN Protocol 2.0 A, B and ISO 11898-1:2015
* Full CAN FD support (up to 64 data bytes)
* 1-Mbps nominal bit rate, 5-Mbps data bit rate
* Loop-back mode for self-test
* AUTOSAR and SAE J1939 support
* Maskable interrupt (two configurable interrupt lines and clock stop or wakeup)
* Two clock domains (CAN clock and host clock)
* Clock stop and wakeup support
* Up to 32 dedicated transmit buffers
* Configurable transmit FIFO, up to 32 elements
* Configurable transmit queue, up to 32 elements
* Configurable transmit Event FIFO, up to 32 elements
* Up to 64 dedicated receive buffers
* Two configurable receive FIFOs, up to 64 elements each
* Up to 128 filter elements
#### Not supported Features
None
#### Non compliance
Below AUTOSAR requirement are not supported for Can Driver :
[**SWS_Can_00447** ,**SWS_Can_00446**, **SWS_Can_00445**, **SWS_Can_00391**, **SWS_Can_00244**, **SWS_Can_00242**]
>>Rejection Reason : Currently Can driver using internal Can controller, so implementation of wakeup events through external hardware Can controller not required.
[**SWS_Can_00405** ,**SWS_Can_00290**, **SWS_Can_00267**, **SWS_Can_00404**, **SWS_Can_00258**]
>>Rejection Reason : Can driver supports SLEEP and WAKEUP functionality, implementation of logical SLEEP state not required.
For more details, Refer [AUTOSAR_SWS_CanDriver : Section: 5.1.2 : Header File Structure](https://www.autosar.org/fileadmin/standards/R4.3.1/CP/AUTOSAR_SWS_CanDriver.pdf)
### Source files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂**Can**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Can.h** : *Contains the API’s of the Can driver to be used by upper layers.*\
┃ ┃ ┃ ┣ 📜**Can_Priv.h** : *Contains data structures and Internal function declarations.*\
┃ ┃ ┃ ┗ 📜**Can_Reg_Access.h** : *Contains the MACROs for CAN register access.*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Can.c** : *Contains the implementation of the API's for Can driver.*\
┃ ┃ ┃ ┣ 📜**Can_Irq.c** : *contains the implementation for Can interrupts handlers.*\
┃ ┃ ┃ ┗ 📜**Can_Priv.c** : *Contains Functions that support the API's for Can driver*\
┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂hw_include\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Mcu\
┃ ┗ 📂Port\
┣ 📂examples\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{figure} Assets/images/Can_Header_File_Structure.png
:alt: CAN Header File Structure
:align: center
Can Header File Structure
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Scheduling
|Schedule Function API|Description|
|------------|---------------|
|Can_MainFunction_Write|This function performs the polling of TX confirmation when CAN_TX_PROCESSING is set to POLLING|
|Can_MainFunction_Read|This function performs the polling of RX indications when CAN_RX_PROCESSING is set to POLLING.|
|Can_MainFunction_BusOff|This function performs the polling of bus-off events that are configured statically as 'to be polled'.|
|Can_MainFunction_Wakeup|This function performs the polling of wake-up events that are configured statically as 'to be polled'.|
|Can_MainFunction_Mode|This function performs the polling of CAN controller mode transitions.|
#### Error handling
##### Development Error Reporting
Development errors are reported to the DET using the service Det_ReportError(),when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
#### Error codes
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|API service called with wrong parameter pointer|CAN_E_PARAM_POINTER|0x01|
|API service called with wrong hardware handle|CAN_E_PARAM_HANDLE|0x02|
|API service called with wrong data length|CAN_E_PARAM_DATA_LENGTH|0x03|
|API service called with wrong parameter Controller|CAN_E_PARAM_CONTROLLER|0x04|
|API service used without initialization|CAN_E_UNINIT|0x05|
|Invalid transition for the current mode.|CAN_E_TRANSITION|0x06|
|Parameter baud rate has an invalid value.|CAN_E_PARAM_BAUDRATE|0x07|
|invalid ICOM configuration Id|CAN_E_ICOM_CONFIG_INVALID|0x08|
|Invalid Configuration set selection.|CAN_E_INIT_FAILED|0x09|
### Safety Mechanism
|TI Diagnostic Unique Identifier| Summary | Description |
|------------|-----------------|----------------|
|MCAN3|Periodic Software Read Back of Static Configuration Registers| API is provided for the reading the static configuration registers |
|MCAN8|SRAM ECC | Provided the enable/disable the ECC mechanism through configuration |
|MCAN10|MCAN Stuff Error Detection| Errors will be reported to DEM module |
|MCAN11|MCAN Form Error Detection| Errors will be reported to DEM module |
|MCAN12|MCAN Acknowledge Error Detection| Errors will be reported to DEM module |
|MCAN13|Bit Error Detection| Errors will be reported to DEM module |
|MCAN14|CRC in Message| Errors will be reported to DEM module |
|MCAN16|Timeout on FIFO activity| Errors will be reported to DEM module |
|MCAN19|Interrupt on Message RAM Access Failure| Errors will be reported to DEM module |
|MCAN21|Test of FEVT using ESM| Provided selection of filter event pin via configuration |
```{NOTE}
More details of Safety Mechanisms can be found in Safety Manual.
```
### Silicon errata workarounds and recommendation
For detailed silicon errata, refer to the [F29H85x, F29P58x, and F29P32x Real-Time MCUs Silicon Errata](https://www.ti.com/lit/er/sprz569c/sprz569c.pdf).
| Advisory | Workaround in MCAL driver | Recommended actions for user |
|----------|--------------------------|-------------------------------|
| Message Order Inversion When Transmitting From Dedicated Tx Buffers Configured With Same Message ID | No workaround is implemented in the CAN driver. The message ID configuration and transmission request scheduling are runtime-dynamic and cannot be controlled at the driver level to enforce ordering. | Use Tx FIFO mode instead of dedicated Tx Buffers when transmitting multiple messages with the same Message ID. The Tx FIFO ensures messages are transmitted in the order they are requested, preventing message order inversion. To configure Tx FIFO, set the `CanHandleType` parameter to `BASIC` for the hardware transmit object and specify the desired FIFO depth via the `CanHwObjectCount` parameter in EB Tresos configuration. |
### Used resources
#### Interrupt Handling
[AUTOSAR_SWS_CANDriver section: 10 Configuration specification](https://www.autosar.org/fileadmin/standards/R4.3.1/CP/AUTOSAR_SWS_CANDriver.pdf), details the expected behavior and control flow for ISR implementation, please refer the same.
The Driver doesn’t register any interrupts handler (ISR), it’s expected that consumer of this driver registers the required interrupt handler.
For every CAN Instance, an ISR requires to be registered. The Interrupt number associated with instance of the CAN is detailed in TRM (also, please refer the Example application).
Interrupt type should be selected in CAN plugin.
|Can Instance| Interrupt Name | Interrupt handler|
|------------|----------------|-----------------|
|MCANA| MCANA_INT0 | Can_A_Int0ISR|
|MCANA| MCANA_INT1 | Can_A_Int1ISR|
|MCANA| MCANA_WAKE_AND_TS_PLS_INT | Can_A_WakeUpISR|
|MCANB| MCANB_INT0 | Can_B_Int0ISR|
|MCANB| MCANB_INT1 | Can_B_Int1ISR|
|MCANB| MCANB_WAKE_AND_TS_PLS_INT | Can_B_WakeUpISR|
|MCANC| MCANC_INT0 | Can_C_Int0ISR|
|MCANC| MCANC_INT1 | Can_C_Int1ISR|
|MCANC| MCANC_WAKE_AND_TS_PLS_INT | Can_C_WakeUpISR|
|MCAND| MCAND_INT0 | Can_D_Int0ISR|
|MCAND| MCAND_INT1 | Can_D_Int1ISR|
|MCAND| MCAND_WAKE_AND_TS_PLS_INT | Can_D_WakeUpISR|
|MCANE| MCANE_INT0 | Can_E_Int0ISR|
|MCANE| MCANE_INT1 | Can_E_Int1ISR|
|MCANE| MCANE_WAKE_AND_TS_PLS_INT | Can_E_WakeUpISR|
|MCANF| MCANF_INT0 | Can_F_Int0ISR|
|MCANF| MCANF_INT1 | Can_F_Int1ISR|
|MCANF| MCANF_WAKE_AND_TS_PLS_INT | Can_F_WakeUpISR|
```{NOTE}
Same interrupt category should be configured in Os module. Nesting of CAN interrupts is not allowed. In case nesting of CAN interrupt is enabled, data integrity cannot be ensured.
```
#### Instance support
|CPU instances|supported|
|-------|-------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
#### Hardware-Software Mapping
Below image shows CAN driver Hardware-Software mapping. For more information related to HW/SW mapping, refer the F29x Reference Manual.
```{figure} Assets/images/Can_Hw_Sw_Mapping.png
:alt: CAN HW/SW Mapping
:align: center
Can HW/SW Mapping
```
### Integration description
#### Dependent modules
##### DET
This implementation depends on the DET in order to report development errors
The detection of development errors is configurable (ON / OFF), The switch CAN_CFG_DEV_ERROR_DETECT will activate or deactivate the detection of all development errors..
##### SchM
If multiple AUTOSAR runnables have access to the same Data Store Memory block, the exported AUTOSAR specification enforces data consistency by using an AUTOSAR exclusive area. With this specification, the runnables have mutually exclusive access to the per-instance memory global data, which prevents data corruption. Beside the OS, the BSW Scheduler provides functions that CAN module calls at begin and end of critical sections. This implementation requires 1 level of exclusive access to guard critical sections.
The data consistency mechanism that has to be applied to an ExclusiveArea might be domain, ECU or even project specific. The decision which mechanism has to be applied by RTE / Basic Software Scheduler is taken during ECU integration by setting the Exclusive Area configuration parameter RteExclusiveAreaImplMechanism. This parameter is an input for RTE generator.
For CAN Module, data consistency and exclusive access to critical sections are required for the following sections as shown in the table below:
| Exclusive Area Functions used | CAN Function calling Exclusive Area | Need for Exclusive Area | Recommended Exclusive Area Mapping |
|-------|-------|-------|-------|
|CAN_EXCLUSIVE_AREA_0 | Can_DisableControllerInterrupts
Can_EnableControllerInterrupts | To protect against multiple access for shared resources, *i.e. Can interrupt Registers*, which can lead to race condition |**ALL_INTERRUPT_BLOCKING** : All interrupts should be blocked as this API's can be called in the interrupts |
|CAN_EXCLUSIVE_AREA_1 |Can_Write | To protect again multiple access to the same hth handle in the Can_write API|**OS_RESOURCE** : If the Can_Write API is only called from pre-emptible task context, its recommended to use this mechanism as it takes care of resource access protection and task priority management.
**None**: If Can_Write API is only called from non pre-emptible task context, its recommended to use this mechanism as multiple access protection to shared resource is not needed. |
##### MCU
MCU Module is required to initialize all the clock to be used by different peripherals
##### PORT
PORT Module is required to initialize Pin configurations and MUX mode for CAN Instances
#### Resource Allocator
The CAN module uses the Resource Allocator to allocate CAN peripheral instances to CPU cores and configure their memory-mapped base addresses. Each allocation is placed inside a **Context** that maps to a CPU core (e.g. `CPU1`). The **CurrentContext** parameter in the Resource Allocator selects which Context is active for MCAL execution. See the [Resource Allocator Module User Guide](Module_User_Guide_ResourceAllocator.md) for details on configuring device-specific settings.
The **Frame** parameter (`FRAME0`–`FRAME3`) selects the memory-mapped frame for the instance, enabling simultaneous access from different initiators without arbitration stalls. The **BaseAddr** is auto-calculated based on the selected instance and frame. The **DebugHaltEnabled** and **StandbyModeEnabled** parameters control peripheral behaviour during CPU debug halt and standby low-power modes respectively.
##### Resource Allocator Usage Example
To allocate MCANA to CPU1 using FRAME0:
1. In the Resource Allocator configuration, create a new Can instance allocation under the CPU1 Context
2. Set **InstanceName** to `MCANA`
3. Set **Frame** to `FRAME0`
4. The **BaseAddr** will be automatically calculated as `MCANA_DRIVER_BASE_FRAME(0U)`
5. Optionally configure **DebugHaltEnabled** and **StandbyModeEnabled**
```text
Resource Allocator Configuration:
├── Context (Core: CPU1)
│ └── CanInstanceAllocation
│ ├── InstanceName: MCANA
│ ├── Frame: FRAME0
│ ├── BaseAddr: MCANA_DRIVER_BASE_FRAME(0U) [auto-calculated]
│ ├── DebugHaltEnabled: true
│ └── StandbyModeEnabled: true
```
#### General Guidelines
##### Imported Types: Can_HwHandleType
Can_HwHandleType represents the hardware object handles of a CAN hardware unit. MCAN supports configuration of more than 256 hardware object handles. Hence extended range (i.e. uint16 type) must be used. For details of Can_HwHandleType refer AUTOSAR requirement SWS_Can_00429.
### Configuration
The Can Driver implementation supports multiple configuration variants
The driver expects generated **Can_Cfg.h** to be present as input file.
The associated Can driver configuration generated source files are **Can_Cfg.c** and **Can_PBcfg.c** if Post-Build config variant is selected, only **Can_Cfg.c** if Pre-Compile variant is selected
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files.
#### Configuration Parameters
##### CanConfigSet
This container contains the configuration parameters and sub containers of the AUTOSAR Can module.
###### CanController
This container contains the configuration parameters of the CAN controller(s).
###### CanBusoffProcessing
| Item ||
|--------|---------------|
| **Name** | CanBusoffProcessing |
| **Description** | Enables / disables API Can_MainFunction_BusOff() for handling busoff events in polling mode. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | POLLING |
| **Range** | INTERRUPT
POLLING |
###### CanControllerActivation
| Item ||
|--------|---------------|
| **Name** | CanControllerActivation |
| **Description** | Defines if a CAN controller is used in the configuration. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CanControllerBaseAddress
| Item ||
|--------|---------------|
| **Name** | CanControllerBaseAddress |
| **Description** | Specifies the CAN controller base address. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MCANA_DRIVER_BASE_FRAME(0) |
###### CanControllerId
| Item ||
|--------|---------------|
| **Name** | CanControllerId |
| **Description** | This parameter provides the controller ID which is unique in a given CAN Driver. The value for this parameter starts with 0 and continue without any gaps. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### CanRxProcessing
| Item ||
|--------|---------------|
| **Name** | CanRxProcessing |
| **Description** | Enables / disables API Can_MainFunction_Read() for handling PDU reception events in polling mode. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | POLLING |
| **Range** | INTERRUPT
MIXED
POLLING |
###### CanTxProcessing
| Item ||
|--------|---------------|
| **Name** | CanTxProcessing |
| **Description** | Enables / disables API Can_MainFunction_Write() for handling PDU transmission events in polling mode. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | POLLING |
| **Range** | INTERRUPT
MIXED
POLLING |
###### CanWakeupFunctionalityAPI
| Item ||
|--------|---------------|
| **Name** | CanWakeupFunctionalityAPI |
| **Description** | Adds / removes the service Can_CheckWakeup() from the code. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanWakeupProcessing
| Item ||
|--------|---------------|
| **Name** | CanWakeupProcessing |
| **Description** | Enables / disables API Can_MainFunction_Wakeup() for handling wakeup events in polling mode. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | POLLING |
| **Range** | INTERRUPT
POLLING |
###### CanWakeupSupport
| Item ||
|--------|---------------|
| **Name** | CanWakeupSupport |
| **Description** | CAN driver support for wakeup over CAN Bus. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanInteruptType
| Item ||
|--------|---------------|
| **Name** | CanInteruptType |
| **Description** | Defines the interrupt type. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CAN_ISR_CAT1_RTINT |
| **Range** | CAN_ISR_CAT1_RTINT
CAN_ISR_CAT1_INT
CAN_ISR_CAT2 |
###### CanControllerInstance
| Item ||
|--------|---------------|
| **Name** | CanControllerInstance |
| **Description** | Reference to the CAN Controller Instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CanControllerDefaultBaudrate
| Item ||
|--------|---------------|
| **Name** | CanControllerDefaultBaudrate |
| **Description** | Reference to baudrate configuration container configured for the Can Controller. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CanCpuClockRef
| Item ||
|--------|---------------|
| **Name** | CanCpuClockRef |
| **Description** | Reference to the CPU clock configuration, which is set in the MCU driver configuration. This parameter refers to MCAN Bit Clock.[MCAN_FCLK] |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CanWakeupSourceRef
| Item ||
|--------|---------------|
| **Name** | CanWakeupSourceRef |
| **Description** | This parameter contains a reference to the Wakeup Source for this controller as defined in the ECU State Manager. |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CanControllerConfig
This container contains CAN Controller specific configuration parameters.
###### CanFDMode
| Item ||
|--------|---------------|
| **Name** | CanFDMode |
| **Description** | Enable Flexible Datarate Operation. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanLoopbackMode
| Item ||
|--------|---------------|
| **Name** | CanLoopbackMode |
| **Description** | Enable internal loopback mode. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanTransmitPause
| Item ||
|--------|---------------|
| **Name** | CanTransmitPause |
| **Description** | Enable Transmit Pause. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanDisableAutomaticRetransmission
| Item ||
|--------|---------------|
| **Name** | CanDisableAutomaticRetransmission |
| **Description** | Disable automatic retranmission on transmit errors. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanExtendedIDMask
| Item ||
|--------|---------------|
| **Name** | CanExtendedIDMask |
| **Description** | Defines the value of Extended ID and Mask. Applied globally to all extended ID range filters (EFT=00) on this controller |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 536870911 |
| **Max-value** | 536870911 |
| **Min-value** | 0 |
###### CanControllerBaudrateConfig
This container contains bit timing related configuration parameters of the CAN controller(s).
###### CanControllerBaudRate
| Item ||
|--------|---------------|
| **Name** | CanControllerBaudRate |
| **Description** | Specifies the baudrate of the controller in kbps. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1000 |
| **Max-value** | 1000 |
| **Min-value** | 0 |
###### CanControllerBaudRateConfigID
| Item ||
|--------|---------------|
| **Name** | CanControllerBaudRateConfigID |
| **Description** | Uniquely identifies a specific baud rate configuration. This ID is used by SetBaudrate API. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CanControllerPropSeg
| Item ||
|--------|---------------|
| **Name** | CanControllerPropSeg |
| **Description** | Specifies propagation delay in time quantas. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 2 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### CanControllerSeg1
| Item ||
|--------|---------------|
| **Name** | CanControllerSeg1 |
| **Description** | Specifies phase segment 1 in time quantas. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 3 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### CanControllerSeg2
| Item ||
|--------|---------------|
| **Name** | CanControllerSeg2 |
| **Description** | Specifies phase segment 2 in time quantas. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 4 |
| **Max-value** | 128 |
| **Min-value** | 2 |
###### CanControllerSyncJumpWidth
| Item ||
|--------|---------------|
| **Name** | CanControllerSyncJumpWidth |
| **Description** | Specifies the synchronization jump width for the controller in time quantas. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 4 |
| **Max-value** | 128 |
| **Min-value** | 1 |
###### CanControllerFdBaudrateConfig
This optional container contains bit timing related configuration parameters of the CAN controller(s) for payload and CRC of a CAN FD frame. If this container exists the controller supports CAN FD frames.
###### CanControllerFdBaudRate
| Item ||
|--------|---------------|
| **Name** | CanControllerFdBaudRate |
| **Description** | Specifies the data segment baud rate of the controller in kbps. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1000 |
| **Max-value** | 5000 |
| **Min-value** | 0 |
###### CanControllerPropSeg
| Item ||
|--------|---------------|
| **Name** | CanControllerPropSeg |
| **Description** | Specifies propagation delay in time quantas. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 2 |
| **Max-value** | 32 |
| **Min-value** | 0 |
###### CanControllerSeg1
| Item ||
|--------|---------------|
| **Name** | CanControllerSeg1 |
| **Description** | Specifies phase segment 1 in time quantas. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 3 |
| **Max-value** | 32 |
| **Min-value** | 0 |
###### CanControllerSeg2
| Item ||
|--------|---------------|
| **Name** | CanControllerSeg2 |
| **Description** | Specifies phase segment 2 in time quantas. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 4 |
| **Max-value** | 16 |
| **Min-value** | 1 |
###### CanControllerSyncJumpWidth
| Item ||
|--------|---------------|
| **Name** | CanControllerSyncJumpWidth |
| **Description** | Specifies the synchronization jump width for the controller in time quantas. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 4 |
| **Max-value** | 16 |
| **Min-value** | 1 |
###### CanControllerTrcvDelayCompensationOffset
| Item ||
|--------|---------------|
| **Name** | CanControllerTrcvDelayCompensationOffset |
| **Description** | Specifies the Transceiver Delay Compensation Offset in ns. If not specified Transceiver Delay Compensation is disabled. |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | true |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 400 |
| **Min-value** | 0 |
###### CanControllerTrcvDelayCompensationFilter
| Item ||
|--------|---------------|
| **Name** | CanControllerTrcvDelayCompensationFilter |
| **Description** | Specifies the Transceiver Delay Compensation Filter in ns. If not specified Transceiver Delay Compensation is disabled. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 400 |
| **Min-value** | 0 |
###### CanControllerTxBitRateSwitch
| Item ||
|--------|---------------|
| **Name** | CanControllerTxBitRateSwitch |
| **Description** | Specifies if the bit rate switching shall be used for transmissions. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CanTTController
CanTTController is specified in the SWS TTCAN and contains the configuration parameters of the TTCAN controller(s) (which are needed in addition to the configuration parameters of the CAN controller(s)).
###### CanTTControllerApplWatchdogLimit
| Item ||
|--------|---------------|
| **Name** | CanTTControllerApplWatchdogLimit |
| **Description** | Defines the maximum time period (unit is 256 times NTU) after which the application has to serve the watchdog. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### CanTTControllerCycleCountMax
| Item ||
|--------|---------------|
| **Name** | CanTTControllerCycleCountMax |
| **Description** | Defines the value for cycle_count_max. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 63 |
| **Min-value** | 0 |
###### CanTTControllerExpectedTxTrigger
| Item ||
|--------|---------------|
| **Name** | CanTTControllerExpectedTxTrigger |
| **Description** | Number of expected_tx_trigger. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### CanTTControllerExternalClockSynchronisation
| Item ||
|--------|---------------|
| **Name** | CanTTControllerExternalClockSynchronisation |
| **Description** | Enables/disables the external clock synchronization. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanTTControllerGlobalTimeFiltering
| Item ||
|--------|---------------|
| **Name** | CanTTControllerGlobalTimeFiltering |
| **Description** | Enables/disables the global time filtering. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanTTControllerInitialRefOffset
| Item ||
|--------|---------------|
| **Name** | CanTTControllerInitialRefOffset |
| **Description** | Defines the initial value for ref trigger offset. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 127 |
| **Min-value** | 0 |
###### CanTTControllerInterruptEnable
| Item ||
|--------|---------------|
| **Name** | CanTTControllerInterruptEnable |
| **Description** | Enables/disables the respective interrupts. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1023 |
| **Min-value** | 0 |
###### CanTTControllerLevel2
| Item ||
|--------|---------------|
| **Name** | CanTTControllerLevel2 |
| **Description** | Defines whether Level 2 or Level 1 is used. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanTTControllerNTUConfig
| Item ||
|--------|---------------|
| **Name** | CanTTControllerNTUConfig |
| **Description** | Defines the config value for NTU (network time unit). |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.0 |
| **Max-value** | 100.0 |
| **Min-value** | 0.0 |
###### CanTTControllerOperationMode
| Item ||
|--------|---------------|
| **Name** | CanTTControllerOperationMode |
| **Description** | Defines the operation mode. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CAN_TT_EVENT_SYNC_TIME_TRIGGERED |
| **Range** | CAN_TT_EVENT_SYNC_TIME_TRIGGERED
CAN_TT_EVENT_TRIGGERED
CAN_TT_TIME_TRIGGERED |
###### CanTTControllerSyncDeviation
| Item ||
|--------|---------------|
| **Name** | CanTTControllerSyncDeviation |
| **Description** | Defines the maximum synchronization deviation: |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.0 |
| **Max-value** | 100.0 |
| **Min-value** | 0.0 |
###### CanTTControllerTimeMaster
| Item ||
|--------|---------------|
| **Name** | CanTTControllerTimeMaster |
| **Description** | Defines whether the controller acts as a potential time master. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanTTControllerTimeMasterPriority
| Item ||
|--------|---------------|
| **Name** | CanTTControllerTimeMasterPriority |
| **Description** | Defines the time master priority. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 7 |
| **Min-value** | 0 |
###### CanTTControllerTURRestore
| Item ||
|--------|---------------|
| **Name** | CanTTControllerTURRestore |
| **Description** | Enables/disables the TUR restore. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanTTControllerTxEnableWindowLength
| Item ||
|--------|---------------|
| **Name** | CanTTControllerTxEnableWindowLength |
| **Description** | Length of the tx enable window given in CAN bit times. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 16 |
| **Min-value** | 1 |
###### CanTTControllerWatchTriggerGapTimeMark
| Item ||
|--------|---------------|
| **Name** | CanTTControllerWatchTriggerGapTimeMark |
| **Description** | watch trigger time mark after a gap |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CanTTControllerWatchTriggerTimeMark
| Item ||
|--------|---------------|
| **Name** | CanTTControllerWatchTriggerTimeMark |
| **Description** | watch trigger time mark |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CanTTIRQProcessing
| Item ||
|--------|---------------|
| **Name** | CanTTIRQProcessing |
| **Description** | Enables / disables API Can_MainFunction_BusOff() for handling busoff events in polling mode. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | POLLING |
| **Range** | INTERRUPT
POLLING |
###### CanHardwareObject
This container contains the configuration (parameters) of CAN Hardware Objects.
###### CanFdPaddingValue
| Item ||
|--------|---------------|
| **Name** | CanFdPaddingValue |
| **Description** | Specifies the value which is used to pad unspecified data in CAN FD frames > 8 bytes for transmission. This is necessary due to the discrete possible values of the DLC if > 8 bytes. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### CanHandleType
| Item ||
|--------|---------------|
| **Name** | CanHandleType |
| **Description** | Specifies the type (Full-CAN or Basic-CAN) of a hardware object. Basic object uses FIFO in hardware and Full object uses dedicated buffer in hardware. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | BASIC |
| **Range** | BASIC
FULL |
###### CanHardwareObjectUsesPolling
| Item ||
|--------|---------------|
| **Name** | CanHardwareObjectUsesPolling |
| **Description** | Enables polling of this hardware object. |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanHwObjectCount
| Item ||
|--------|---------------|
| **Name** | CanHwObjectCount |
| **Description** | Number of hardware objects used to implement one HOH. In case of Basic object, this parameter defines the depth of FIFO. In case of Full object it must be one. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 65535 |
| **Min-value** | 1 |
###### CanIdType
| Item ||
|--------|---------------|
| **Name** | CanIdType |
| **Description** | Specifies whether the IdValue is of type |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MIXED |
| **Range** | EXTENDED
MIXED
STANDARD |
###### CanObjectId
| Item ||
|--------|---------------|
| **Name** | CanObjectId |
| **Description** | Holds the handle ID of HRH or HTH. The value of this parameter is unique in a given CAN Driver, and it should start with 0 and continue without any gaps. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CanObjectType
| Item ||
|--------|---------------|
| **Name** | CanObjectType |
| **Description** | Specifies if the HardwareObject is used as Transmit or as Receive object |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | TRANSMIT |
| **Range** | RECEIVE
TRANSMIT |
###### CanTriggerTransmitEnable
| Item ||
|--------|---------------|
| **Name** | CanTriggerTransmitEnable |
| **Description** | This parameter defines if or if not Can supports the trigger-transmit API for this handle. |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanControllerRef
| Item ||
|--------|---------------|
| **Name** | CanControllerRef |
| **Description** | Reference to CAN Controller to which the HOH is associated to. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CanMainFunctionRWPeriodRef
| Item ||
|--------|---------------|
| **Name** | CanMainFunctionRWPeriodRef |
| **Description** | Reference to CanMainFunctionPeriod. This reference is required when the associated CanController uses POLLING or MIXED mode for CanRxProcessing (for RECEIVE objects) or CanTxProcessing (for TRANSMIT objects). |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | true |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CanHwFilter
This container is only valid for HRHs and contains the configuration (parameters) of one hardware filter.
###### CanHwFilterCode
| Item ||
|--------|---------------|
| **Name** | CanHwFilterCode |
| **Description** | Specifies (together with the filter mask) the identifiers range that passes the hardware filter. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### CanHwFilterMask
| Item ||
|--------|---------------|
| **Name** | CanHwFilterMask |
| **Description** | Describes a mask for hardware-based filtering of CAN identifiers. The CAN identifiers of incoming messages are masked with the appropriate CanFilterMaskValue. Bits holding a 0 mean don't care, i.e. do not compare the message's identifier in the respective bit position. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### CanStandardFilterType
| Item ||
|--------|---------------|
| **Name** | CanStandardFilterType |
| **Description** |
Defines the type of the Hardware Filter. This parameter applies to both Standard Filter Type (SFT) and Extended Filter Type (EFT). Refer TRM section 'Standard Message ID Filter Element' and 'Extended Message ID Filter Element' for more details.
For Standard filter:
- CAN_RANGE_FILTER: Range filter from SFID1 to SFID2 (SFID2 ? SFID1)
- CAN_DUAL_ID_FILTER: Dual ID filter for SFID1 or SFID2
- CAN_CLASSIC_FILTER: Classic filter: SFID1 = filter, SFID2 = mask
- CAN_SFT_FILTER_DISABLED_EFT_RANGE_NO_XIDAM: Filter element disabled
For Extended filter:
- CAN_RANGE_FILTER: Range filter from EFID1 to EFID2 (EFID2 ? EFID1)
- CAN_DUAL_ID_FILTER: Dual ID filter for EFID1 or EFID2
- CAN_CLASSIC_FILTER: Classic filter: EFID1 = filter, EFID2 = mask
- CAN_SFT_FILTER_DISABLED_EFT_RANGE_NO_XIDAM: Range filter from EFID1 to EFID2 (EFID2 ? EFID1), XIDAM mask not applied
|
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CAN_CLASSIC_FILTER |
| **Range** | CAN_RANGE_FILTER
CAN_DUAL_ID_FILTER
CAN_CLASSIC_FILTER
CAN_SFT_FILTER_DISABLED_EFT_RANGE_NO_XIDAM |
###### CanEventPin
| Item ||
|--------|---------------|
| **Name** | CanEventPin |
| **Description** | Defines the type of the Event pin |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CAN_EVENT_PIN_NONE |
| **Range** | CAN_EVENT_PIN_0
CAN_EVENT_PIN_1
CAN_EVENT_PIN_NONE |
###### CanTTHardwareObjectTrigger
CanTTHardwareObjectTrigger is specified in the SWS TTCAN and contains the configuration (parameters) of TTCAN triggers for Hardware Objects, which are additional to the configuration (parameters) of CAN Hardware Objects.
###### CanTTHardwareObjectBaseCycle
| Item ||
|--------|---------------|
| **Name** | CanTTHardwareObjectBaseCycle |
| **Description** | Defines the cycle_offset. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 63 |
| **Min-value** | 0 |
###### CanTTHardwareObjectCycleRepetition
| Item ||
|--------|---------------|
| **Name** | CanTTHardwareObjectCycleRepetition |
| **Description** | Defines the repeat_factor. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 64 |
| **Min-value** | 1 |
###### CanTTHardwareObjectTimeMark
| Item ||
|--------|---------------|
| **Name** | CanTTHardwareObjectTimeMark |
| **Description** | Defines the point in time, when the trigger will be activated. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CanTTHardwareObjectTriggerId
| Item ||
|--------|---------------|
| **Name** | CanTTHardwareObjectTriggerId |
| **Description** | Sequential number which allows separation of different TTCAN triggers configured for one and the same hardware object. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 63 |
| **Min-value** | 0 |
###### CanTTHardwareObjectTriggerType
| Item ||
|--------|---------------|
| **Name** | CanTTHardwareObjectTriggerType |
| **Description** | Defines the type of the trigger associated with the hardware object. This parameter depends on plain CAN parameter CAN_OBJECT_TYPE. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CAN_TT_RX_TRIGGER |
| **Range** | CAN_TT_RX_TRIGGER
CAN_TT_TX_REF_TRIGGER
CAN_TT_TX_REF_TRIGGER_GAP
CAN_TT_TX_TRIGGER_EXCLUSIVE
CAN_TT_TX_TRIGGER_MERGED
CAN_TT_TX_TRIGGER_SINGLE |
###### CanIcom
This container contains the parameters for configuring pretended networking
###### CanIcomConfig
This container contains the configuration parameters of the ICOM Configuration.
###### CanIcomConfigId
| Item ||
|--------|---------------|
| **Name** | CanIcomConfigId |
| **Description** | This parameter identifies the ID of the ICOM configuration. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 255 |
| **Min-value** | 1 |
###### CanIcomWakeOnBusOff
| Item ||
|--------|---------------|
| **Name** | CanIcomWakeOnBusOff |
| **Description** | This parameter defines that the MCU shall wake if the bus off is detected or not. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CanIcomWakeupCauses
This container contains the configuration parameters of the wakeup causes to leave the power saving mode.
###### CanIcomRxMessage
This container contains the configuration parameters for the wakeup causes for matching received messages. It has to be configured as often as received messages are defined as wakeup cause.
###### CanIcomCounterValue
| Item ||
|--------|---------------|
| **Name** | CanIcomCounterValue |
| **Description** | This parameter defines that the MCU shall wake if the message with the ID is received n times on the communication channel. |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 65536 |
| **Min-value** | 1 |
###### CanIcomMessageId
| Item ||
|--------|---------------|
| **Name** | CanIcomMessageId |
| **Description** | This parameter defines the message ID the wakeup causes of this CanIcomRxMessage are configured for. In addition a mask (CanIcomMessageIdMask) can be defined, in that case it is possible to define a range of rx messages, which can create a wakeup condition. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 536870912 |
| **Min-value** | 0 |
###### CanIcomMessageIdMask
| Item ||
|--------|---------------|
| **Name** | CanIcomMessageIdMask |
| **Description** | Describes a mask for filtering of CAN identifiers. The CAN identifiers of incoming messages are masked with this CanIcomMessageIdMask. If the masked identifier matches the masked value of CanIcomMessageId, it can create a wakeup condition for this CanIcomRxMessage. Bits holding a 0 mean don't care, i.e. do not compare the message's identifier in the respective bit position. The mask shall be build by filling with leading 0. |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 536870912 |
| **Min-value** | 0 |
###### CanIcomMissingMessageTimerValue
| Item ||
|--------|---------------|
| **Name** | CanIcomMissingMessageTimerValue |
| **Description** | This parameter defines that the MCU shall wake if the message with the ID is not received for a specific time in s on the |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.0 |
| **Max-value** | 5.36870912E8 |
| **Min-value** | 0.0 |
###### CanIcomPayloadLengthError
| Item ||
|--------|---------------|
| **Name** | CanIcomPayloadLengthError |
| **Description** | This parameter defines that the MCU shall wake if a payload error occurs |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanIcomRxMessageSignalConfig
This container contains the configuration parameters for the wakeup causes for matching signals.
###### CanIcomSignalMask
| Item ||
|--------|---------------|
| **Name** | CanIcomSignalMask |
| **Description** | This parameter shall be used to mask a signal in the payload of a CAN message. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 18446744073709551615 |
| **Min-value** | 0 |
###### CanIcomSignalOperation
| Item ||
|--------|---------------|
| **Name** | CanIcomSignalOperation |
| **Description** | This parameter defines the operation, which shall be used to verify the signal value creates a wakeup condition. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | EQUAL |
| **Range** | AND
EQUAL
GREATER
SMALLER
XOR |
###### CanIcomSignalValue
| Item ||
|--------|---------------|
| **Name** | CanIcomSignalValue |
| **Description** | This parameter shall be used to define a signal value which shall be compared (CanIcomSignalOperation) with the masked CanIcomSignalMask value of the received signal (CanIcomSignalRef). |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 18446744073709551615 |
| **Min-value** | 0 |
###### CanIcomSignalRef
| Item ||
|--------|---------------|
| **Name** | CanIcomSignalRef |
| **Description** | This parameter defines a reference to the signal which shall be checked additional to the message id (CanIcomMessageId). |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
##### CanGeneral
This container contains the parameters related each CAN Driver Unit.
###### CanDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | CanDevErrorDetect |
| **Description** | Switches the development error detection and notification on or off. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanIndex
| Item ||
|--------|---------------|
| **Name** | CanIndex |
| **Description** | Specifies the InstanceId of this module instance. If only one instance is present it shall have the Id 0. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### CanLPduReceiveCalloutFunction
| Item ||
|--------|---------------|
| **Name** | CanLPduReceiveCalloutFunction |
| **Description** | This parameter defines the existence and the name of a callout function that is called after a successful |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CanMainFunctionBusoffPeriod
| Item ||
|--------|---------------|
| **Name** | CanMainFunctionBusoffPeriod |
| **Description** | This parameter describes the period for cyclic call to Can_MainFunction_Busoff. Unit is seconds. |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.01 |
| **Max-value** | INF |
| **Min-value** | 0.0 |
###### CanMainFunctionModePeriod
| Item ||
|--------|---------------|
| **Name** | CanMainFunctionModePeriod |
| **Description** | This parameter describes the period for cyclic call to Can_MainFunction_Mode. Unit is seconds. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.01 |
| **Max-value** | INF |
| **Min-value** | 0.0 |
###### CanMainFunctionWakeupPeriod
| Item ||
|--------|---------------|
| **Name** | CanMainFunctionWakeupPeriod |
| **Description** | This parameter describes the period for cyclic call to Can_MainFunction_Wakeup. Unit is seconds. |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.01 |
| **Max-value** | INF |
| **Min-value** | 0.0 |
###### CanMultiplexedTransmission
| Item ||
|--------|---------------|
| **Name** | CanMultiplexedTransmission |
| **Description** | Specifies if multiplexed transmission shall be supported.ON or OFF. This parameter is not used. Use of Transmit FIFO is equivalent to multiplexed transmission. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanPublicIcomSupport
| Item ||
|--------|---------------|
| **Name** | CanPublicIcomSupport |
| **Description** | Selects support of Pretended Network features in Can driver. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanECCSupport
| Item ||
|--------|---------------|
| **Name** | CanECCSupport |
| **Description** | Enable SRAM ECC configuration. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanSetBaudrateApi
| Item ||
|--------|---------------|
| **Name** | CanSetBaudrateApi |
| **Description** | The support of the Can_SetBaudrate API is optional. |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanTimeoutDuration
| Item ||
|--------|---------------|
| **Name** | CanTimeoutDuration |
| **Description** | Specifies the maximum time for blocking function until a timeout is detected. Unit is seconds. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.1 |
| **Max-value** | 65.535 |
| **Min-value** | 1.0E-6 |
###### CanVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | CanVersionInfoApi |
| **Description** | Switches the Can_GetVersionInfo() API ON or OFF. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CanOsCounterRef
| Item ||
|--------|---------------|
| **Name** | CanOsCounterRef |
| **Description** | This parameter contains a reference to the OsCounter, which is used by the CAN driver. Note: The CAN driver does not currently utilize this parameter |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CanSysClockRef
| Item ||
|--------|---------------|
| **Name** | CanSysClockRef |
| **Description** | This parameter references the SYSCLK to convert timeout values from milliseconds to clock ticks. Users should ensure the correct clock reference point is selected to achieve accurate timeout calculations. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| Post-Build-Time | VARIANT-POST-BUILD |
###### CanSupportTTCANRef
| Item ||
|--------|---------------|
| **Name** | CanSupportTTCANRef |
| **Description** | The parameter refers to CanIfSupportTTCAN parameter in the CAN Interface Module configuration. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CanIcomGeneral
This container contains the general configuration parameters of the ICOM Configuration.
###### CanIcomLevel
| Item ||
|--------|---------------|
| **Name** | CanIcomLevel |
| **Description** | Defines the level of Pretended Networking. |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CAN_ICOM_LEVEL_ONE |
| **Range** | CAN_ICOM_LEVEL_ONE
CAN_ICOM_LEVEL_TWO |
###### CanIcomVariant
| Item ||
|--------|---------------|
| **Name** | CanIcomVariant |
| **Description** | Defines the variant, which is supported by this CanController |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CAN_ICOM_VARIANT_SW |
| **Range** | CAN_ICOM_VARIANT_HW
CAN_ICOM_VARIANT_NONE
CAN_ICOM_VARIANT_SW |
###### CanMainFunctionRWPeriods
This container contains the parameter for configuring the period for cyclic call to Can_MainFunction_Read or Can_MainFunction_Write depending on the referring item.
###### CanMainFunctionPeriod
| Item ||
|--------|---------------|
| **Name** | CanMainFunctionPeriod |
| **Description** | This parameter describes the period for cyclic call to Can_MainFunction_Read or Can_MainFunction_Write depending on the referring item. Unit is seconds. Different poll-cycles will be configurable if more than one CanMainFunctionPeriod is configured. In this case multiple Can_MainFunction_Read() or Can_MainFunction_Write() will be provided by the CAN Driver module. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.01 |
| **Max-value** | INF |
| **Min-value** | 0.0 |
###### CanDemEventParameterRefs
| Item ||
|--------|---------------|
| **Name** | CanDemEventParameterRefs |
| **Description** | Container for the references to DemEventParameter elements which shall be invoked using the API Dem_SetEventStatus in case the corresponding error occurs. The EventId is taken from the referenced DemEventParameter's DemEventId symbolic value. The standardized errors are provided in this container and can be extended by vendor-specific error references. |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
Refer [AUTOSAR_SWS_CANDriver section: 10 Configuration specification](https://www.autosar.org/fileadmin/standards/R4.3.1/CP/AUTOSAR_SWS_CANDriver.pdf) for configuration parameters details
#### Bit Timing and Sampling Point Calculation
Selecting the correct CAN bit timing parameters (prescaler, TSEG1, TSEG2, SJW) for a given clock frequency, target bit rate, and desired sampling point can be complex. A Microsoft Excel–based bit timing calculator is provided to assist with this.
```{note}
Download the calculator: [MCAN_BitTimingCalculator.xls](Assets/tables/MCAN_BitTimingCalculator.xls)
Open the sheet, enter your CAN clock frequency and target bit rate, and the calculator will derive valid prescaler, TSEG1, TSEG2, and SJW values along with the resulting sampling point percentage for both the **nominal** (arbitration) phase and the **data** phase (CAN FD).
```
#### Steps To Configure Can Module
1. Open EB Tresos configurator tool and load Port, Mcu and Can modules
2. Open PORT module plugin and configure required pins as CAN-TX, CAN-RX
3. Open CAN module plugin, Select the Config Variant (Pre-compile/Link-Time)
4. In CAN module plugin configure required parameters.
5. Save the configuration and generate the configuration.
### Examples
The example application demonstrates use of Can module, the list below identifies key steps performed the example.
#### Can_Example_loopback
##### Overview of Can_Example_loopback
* Can_Example_loopback
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as CAN-Tx and CAN-Rx using Port_Init()
* Initializes Can instances in loopback mode.
* Set controller state to STARTED.
* Send the data using can_write() with pre-defined data.
* Read Tx confirmation and rx indication.
* Validate the received data with pre-defined transmit data.
##### Setup required to run Can_Example_loopback
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
##### How to run Can_Example_loopback
* Open CCS and Import Can_Example_loopback example
* Build project and start debug project
##### Sample Log of Can_Example_loopback
```{literalinclude} Assets/text/Can/F29H85x/Can_Example_Loopback_Example_Log.txt
```
#### Can_Example_Classic_FD
##### Overview of Can_Example_Classic_FD
* Can_Example_Classic_FD
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as CAN-Tx and CAN-Rx using Port_Init()
* Initializes Can instances
* Set controller state to STARTED.
* Set PCAN with the same setting.
* Start sending predefined data from PCAN
* Send the data using can_write() with pre-defined data.
* Read Tx confirmation and rx indication.
* Validate the received data with pre-defined transmit data.
##### Setup required to run Can_Example_Classic_FD
* Connect the hardware and power up
* Connect CANA Tx and Rx pins to CAN transceiver
* Connect PCAN CANH, CANL to CAN transceiver
* Connect the uart set up to check the log on serial console
##### How to run Can_Example_Classic_FD
* Open CCS and Import Can_Example_Classic_FD example
* Build project and start debug project
##### Sample Log of Can_Example_Classic_FD
```{literalinclude} Assets/text/Can/F29H85x/Can_Example_Classic_FD_Example_Log.txt
```
#### Can_Example_Icom
##### Overview of Can_Example_Icom
* Can_Example_Icom
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as CAN-Tx and CAN-Rx using Port_Init()
* Initializes Can instances
* Set PCAN with the same setting.
* Start sending predefined data from PCAN
* Send the data using can_write() with pre-defined data.
* Read Tx confirmation and rx indication.
* Validate the received data with pre-defined Transmit data.
* Set Icom configuration by calling Can_SetIcomConfiguration.
* Send pre-defined data from the PCAN same as Icom signal configuration.
* Read Rx indication.
##### Setup required to run Can_Example_Icom
* Connect the hardware and power up
* Connect CANA Tx and Rx pins to CAN transceiver
* Connect PCAN CANH, CANL to CAN transceiver
* Connect the uart set up to check the log on serial console
##### How to run Can_Example_Icom
* Open CCS and Import Can_Example_Icom example
* Build project and start debug project
##### Sample Log of Can_Example_Icom
```{literalinclude} Assets/text/Can/F29H85x/Can_Example_Icom_Example_Log.txt
```
#### Can_Example_Wakeup
##### Overview of Can_Example_Wakeup
* Can_Example_Wakeup
* This example demonstrates CAN wakeup functionality with CAN Classic and FD modes
* Enables one controller with 2 hardware objects for Tx and 2 hardware objects for Rx
* Validates received data against transmitted data
* DeviceSupport_Init()
* EcuM_Init()
* Initialize clock using Mcu_Init()
* Initialize pins with Port_Init()
* Initialize CAN driver using Can_Init()
* Set controller state to STARTED
* Configure PCAN with matching settings:
* Mode: CAN, Clock Freq: 80 MHz
* BitRate: 1000 kbit/s, Sample Point: 60%
* Pre-scaler: 8, TSEG1: 5, TSEG2: 4
* Send predefined data from PCAN (CAN-ID: 101h, Length: 8)
* Send data using Can_Write() with predefined data
* Read Tx confirmation and Rx indication
* Validate received data with predefined receive data
* Set controller state to SLEEP
* Send predefined data from PCAN to trigger wakeup
* Check for wakeup event detection
* If wakeup event is detected, verify Rx indication is zero (message not received in sleep mode)
##### Setup required to run Can_Example_Wakeup
* Connect the hardware and power up
* Connect PCAN tool to the CAN bus
* Connect the UART setup to check the log on serial console
##### How to run Can_Example_Wakeup
* Open CCS and import Can_Example_Wakeup
* Build project and start debug project
* Follow the prompts to send data from PCAN when requested
##### Sample Log of Can_Example_Wakeup
```{literalinclude} Assets/text/Can/F29H85x/Can_Example_Wakeup_Log.txt
```
#### File Structure
📦f29H85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂**Can**\
┃ ┃ ┣ 📂 **Can_Example_Classic_FD**\
┃ ┃ ┣ 📂 **Can_Example_Icom**\
┃ ┃ ┗ 📂 **Can_Example_loopback**\
┃ ┃ ┃ ┣ 📂ccs\
┃ ┃ ┃ ┃ ┗ 📜**Can_Example_loopback.projectspec**\
┃ ┃ ┃ ┣ 📂f29h85x_config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Can.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port.xdm\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Can_Cfg.h** : *Contains the generated pre-compiler configuration header.**\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Can_Cfg.c** : *Contains the pre-compile configuration parameters.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBcfg.c\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜**Can_Example_loopback.c** : *Example application for CAN*\
┃ ┃ ┗ ┗ 📜**Can_Example_loopback.h** : *Contains data structures and Internal function declarations.*\
┃ ┣ 📂DeviceSupport\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┗ 📜CMakeLists.txt\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{Note}
Can_PBcfg.c and Can_Cfg.c will be present if Post-Build config variant is selected, only Can_Cfg.c will be present if Pre-Compile variant is selected
```
## DIO Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|RTE|Runtime Environment|
|BSW|Basic Software|
|GPIO|General Purpose Input Output|
|MCAL|Micro controller Abstraction Layer|
|API|Application Programming Interface|
|DET|Default Error Tracer|
|HW |Hardware|
|SW |Software|
|DIO |Digital Input Output|
|I/O|Input/Output|
|ID |Identifier|
### Introduction
The DIO module provides interfaces to external peripherals by abstracting the
input and output pins on the micro controller device, Following sections highlight key aspects of this implementation which would be
of interest to an integrator.
```{figure} Assets/images/Dio_Autosar_MCAL.png
:alt: DIO MCAL AUTOSAR
:align: center
DIO MCAL AUTOSAR
```
This document details AUTOSAR BSW DIO module implementation
|Supported AUTOSAR Release|**4.3.1**|
|---------------|---------------|
| **Supported Configuration Variants** | **Pre-Compile & Link Time** |
| **Vendor ID** | **DIO_VENDOR_ID (44)** |
| **Module ID** | **DIO_MODULE_ID (120)** |
### Functional Overview
The DIO Driver abstracts the access to the micro controller's hardware pins. Furthermore, it allows the grouping of those pins. This module works on pins and ports which are configured by the PORT driver for this purpose. For this reason, there is no configuration and initialization of this port structure in the DIO Driver.
The DIO Modules expects that pin mux is set correctly to configure the GPIO pins for GPIO mode. This is done by the PORT driver. The pin direction shall also be set by the PORT driver.
The DIO Driver provides services for reading and writing to/from
* DIO Channels - Represents a single general-purpose digital input/output pin.
* DIO Ports - Represents several DIO channels that are grouped by hardware (typically controlled by one hardware register).
* DIO Channel Groups - A channel group is a formal logical combination of several adjoining DIO channels within a DIO port. A DIO channel group shall belong to one DIO port. Below picture describes this.
The basic behavior of this driver is synchronous.
```{figure} Assets/images/Dio_driver_channel_group_info.png
:alt: Schematic description of a ChannelGroup
:align: center
Schematic description of a ChannelGroup
```
### Hardware Features
#### Hardware Features supported
Features Supported at a high level are:
* Un-Buffered Read & Write of GPIO Pin Levels
* Un-Buffered Read & Write of internal general purpose I/O ports
* Un-Buffered Read & Write of subset of internal general purpose I/O ports
* Flipping GPIO Pin Levels
For the device there are up to 8 Possible I/O Ports.
|Port | ChannelId | Port ID |
|------|-----------|---------|
|Port A| 0 - 31 | 0 |
|Port B| 32 - 63 | 1 |
|Port C| 64 - 95 | 2 |
|Port D| 96 - 127 | 3 |
|Port E| 128 - 159 | 4 |
|Port F| 160 - 191 | 5 |
|Port G| 192 - 223 | 6 |
|Port H| 224 - 255 | 7 |
```{NOTE}
The number of pins shown above may vary depending on the specific device being used. For accurate and up-to-date information, please consult the device's datasheet.
```
#### Not supported Features
None
#### Non compliance
DIO Channel validity will be checked against maximum allowed DIO channels which is 256
Below AUTOSAR design requirement is not supported for Dio Driver :\
**SWS_Dio_00084** : *If the micro-controller does not support the direct read-back of a pin value, the Dio module's read functions shall provide the value of the output register, when they are used on a channel which is configured as an output channel*
>Rejection Reason : Direct read back of a pin value is achieved using GPyDAT register, Hence this requirement is rejected.
### Source files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂Can\
┃ ┣ 📂**Dio**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Dio.h** : *Contains the API declarations of the DIO driver to be used by upper layers.*\
┃ ┃ ┃ ┗ 📜**Dio_Priv.h** : *contains the private functions declarations*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Dio.c** : *contains the implementation of the API’s for DIO driver.*\
┃ ┃ ┃ ┗ 📜**Dio_Priv.c** : *contains the implementation for DIO private functions which will directly interact with hardware registers.*\
┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Gpt\
┃ ┣ 📂hw_include\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Mcu\
┃ ┗ 📂Port\
┣ 📂examples\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{figure} Assets/images/Dio_Header_File_Structure.png
:alt: Dio Header File Structure
:align: center
Dio Header File Structure
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Scheduling
There is no scheduling functions in Dio
#### Error handling
##### Development Error Reporting
Development errors are reported to the DET using the service Det_ReportError(), when enabled.
The driver interface contains the MACRO declaration of the error codes to be returned.
#### Error codes
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|API parameter checking: Invalid channel requested|DIO_E_PARAM_INVALID_CHANNEL_ID|0x0A|
|API parameter checking: Invalid port requested|DIO_E_PARAM_INVALID_PORT_ID|0x14|
|API parameter checking: Invalid channel group requested|DIO_E_PARAM_INVALID_GROUP|0x1F|
|API service called with a NULL pointer|DIO_E_PARAM_POINTER|0x20|
### Used resources
#### Interrupt Handling
There are no Interrupts in Dio
#### Instance support
|CPU instances|supported|
|-------|-------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
#### Hardware-Software Mapping
Below image shows Dio driver Hardware-Software mapping. For more information related to HW/SW mapping, refer the F29x Reference Manual.
```{figure} Assets/images/Dio_Hw_Sw_Mapping.png
:alt: Dio HW/SW Mapping
:align: center
Dio HW/SW Mapping
```
### Integration description
#### Dependent modules
##### DET
This implementation depends on the DET in order to report development errors
The detection of development errors is configurable (ON / OFF), The switch DIO_DEV_ERROR_DETECT will activate or deactivate the detection of all development errors.
##### PORT
PORT Module is required to initialize Pin configurations like MUX mode, Pin direction and more
##### MCU
MCU Module is required to initialize all the clock to be used by different peripherals
#### Multi-core and Resource allocator
The DIO module is not managed by the Resource Allocator. GPIO pin core allocation on F29H85x is controlled through the Port module's **PortPinCoreSelect** parameter. The DIO module only operates on GPIO pins that are allocated to CPU1 (the MCAL/AUTOSAR core). No Resource Allocator instance allocation is needed for the DIO module.
### Configuration
The Dio Driver implementation supports multiple configuration variants, namely Dio Pre-Compile config and Link-Time config. the driver expects generated **Dio_Cfg.h**
to be present as input file. The associated dio driver configuration generated files are **Dio_Cfg.c** or **Dio_Lcfg.c**
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files.
#### Configuration Parameters
##### DioConfig
This container contains the configuration parameters and sub containers of the AUTOSAR DIO module.
###### DioPort
Configuration of individual DIO ports, consisting of channels and possible channel groups.
###### DioPortId
| Item ||
|--------|---------------|
| **Name** | DioPortId |
| **Description** | Numeric identifier of the DIO port. Not all MCU ports may be used for DIO, thus there may be "gaps" in the list of all IDs. This value will be |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 7 |
| **Min-value** | 0 |
###### DioChannel
Configuration of an individual DIO channel.
###### DioChannelId
| Item ||
|--------|---------------|
| **Name** | DioChannelId |
| **Description** | Channel Id of the DIO channel. This value will be assigned to the symbolic names. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### DioPinNumRef
| Item ||
|--------|---------------|
| **Name** | DioPinNumRef |
| **Description** | Reference to the Port Pin configuration, which is set in the PORT driver configuration |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### DioChannelGroup
Definition and configuration of DIO channel groups. A channel group represents several adjoining DIO channels represented by a logical group.
###### DioChannelGroupIdentification
| Item ||
|--------|---------------|
| **Name** | DioChannelGroupIdentification |
| **Description** | The DIO channel group is identified in DIO API by a pointer to a data structure (of type Dio_ChannelGroupType). That data structure contains the channel group information. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | Dio_ChannelGroup |
###### DioPortMask
| Item ||
|--------|---------------|
| **Name** | DioPortMask |
| **Description** | This shall be the mask which defines the positions of the channel |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 4294967295 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### DioPortOffset
| Item ||
|--------|---------------|
| **Name** | DioPortOffset |
| **Description** | The position of the Channel Group on the port, counted |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 31 |
| **Min-value** | 0 |
##### DioGeneral
General DIO module configuration parameters.
###### DioDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | DioDevErrorDetect |
| **Description** | Switches the development error detection and notification on or off. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### DioFlipChannelApi
| Item ||
|--------|---------------|
| **Name** | DioFlipChannelApi |
| **Description** | Adds / removes the service Dio_FlipChannel() from the code. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### DioVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | DioVersionInfoApi |
| **Description** | Adds / removes the service Dio_ GetVersionInfo() from the code. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
#### Steps To Configure Dio Module
1. Open EB Tresos configurator tool and load Port and Dio modules
2. Open PORT module plugin and configure required pins as GPIO's
3. Open DIO module plugin, Select the Config Variant (Pre-compile/Link-Time)
4. In DIO module plugin, Create port container, add Channels by referring port pins configured in port plugin
5. Add channel groups
6. Save the configuration and generate the configuration.
### Examples
The example application demonstrates use of Dio module, the list below identifies key steps performed the example.
#### Overview
* Dio_Example_Read_Write_All
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
* Perform channel read/write on initialized channels
* Perform channel group read/write on initialized channel group
* Perform port read/write on initialized ports
* Perform flip channel on initialized channel
#### Setup required to run example
#### How to run examples
* Open CCS and Import Dio example
* Connect the hardware and power up
* Build project then debug project
* Connect the UART set up to check the log on serial console
##### Sample Log of Dio_Example_Read_Write_All
```{literalinclude} Assets/text/Dio/Dio_Example_Read_Write_All_Example_Log.txt
```
#### File Structure
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂Can\
┃ ┣ 📂DeviceSupport\
┃ ┣ 📂Dio\
┃ ┃ ┗ 📂**Dio_Example_Read_Write_All**\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜**Dio_Example_Read_Write_All.projectspec**\
┃ ┃ ┃ ┣ 📂Dio_Example_Read_Write_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Dio.xdm**: *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port.xdm\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Dio_Cfg.h** : *Contains the generated pre-compiler configuration.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Dio_Lcfg.c** : *Contains the pre-build configuration parameters.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBcfg.c\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┃ ┗ 📜**Dio_Example_Read_Write_All.c**\
┃ ┣ 📂Gpt\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{Note}
Either Dio_Lcfg.c OR Dio_Cfg.c will be present based on selected config variant by user
```
## FLS Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|RTE|Runtime Environment|
|BSW|Basic Software|
|MCAL|Micro Controller Abstraction Layer|
|MCU|Micro Controller Unit|
|API|Application Programming Interface|
|DET|Default Error Tracer|
|HW |Hardware|
|SW |Software|
|FLS|Flash Driver|
|MCU|Micro Controller Unit|
|OS|Operating System|
### Introduction
This document describes MCAL **FLS Driver** functionality and configuration details as per AUTOSAR version **4.3.1** .
|Supported AUTOSAR Release|**4.3.1**|
|------|-------------|
|**Supported Configuration Variants** | **Pre-Compile, Post-build**|
|**Vendor ID** | **FLS_VENDOR_ID (44)**|
|**Module ID** | **FLS_MODULE_ID (92)**|
The Flash Driver provides services for reading, writing, erasing memory and and a configuration interface for setting / resetting the write / erase protection of internal data flash.
* Perform storage mode applications:
* Read from flash.
* Write to flash.
* Erase flash.
* Compare and Blank Check flash memory location.
```{figure} Assets/images/Fls_Autosar_MCAL.png
:alt: FLS in AUTOSAR architecture
:align: center
FLS in AUTOSAR architecture
```
### Functional Overview
The Flash Driver provides services for reading, writing, erasing the internal data flash memory on F29x device.
The Flash driver updates the wait states based on the MCU system cycle, and enable the sector protection. Before each flash write and erase, the driver grabs the flash semaphore, and release it after the job is done or failed.
The Fls_Erase, FLs_Write, Fls_Read, FLs_Compare, and Fls_BlankCheck are performed asynchronously within the FLS module’s main function. All others (Fls_Cancel, Fls_GetStatus, Fls_GetJobResult) are the synchronous functions of this module.
### Hardware Features
#### Hardware Features Supported
The features of data flash include:
1. **One dedicated data Flash bank housed in Flash Controller 1 (FLC1), optimized for data bus read accesses**
2. **The Flash Controller can program or erase a Data Flash bank while simultaneously reading from the other Program Flash banks**
3. **Tight integration with the Safety and Security Unit (SSU) for security management and access control for Flash program, erase and read operations**
4. **128-bit-wide Flash programming, with configurable programming options**
5. **Multiple sectors, with the ability to erase individual/specific sectors while leaving others programmed**
6. **Code prefetch, block cache and data cache mechanisms for enhanced read performance for program code and data**
7. **Configurable wait states to achieve the best performance at a given clock frequency**
8. **Safety Features**
* ECC error detection in address bits, with reporting to the Error Signaling Module (ESM)
* Supports ECC bits for single error correction and double error detection (SECDED)
9. **Integrated Flash program and erase state machines in the Flash Controller modules:**
* Simple Flash API algorithms
* Fast erase and program times (refer to the device data manual for details)
10. **Automatic arbitration of data accesses between multiple initiators (CPUs, HSM, RTDMA and debugger accesses)**
##### Hardware Features Not Supported
None
#### Non compliance
Below AUTOSAR requirements are not supported for Mcu Driver :\
**SWS_Fls_00155** : *The function Fls_SetMode shall set the FLS module’s operation mode to the given “Mode” parameter.*
>Rejection Reason : No SPI interface/ No external flash
**SWS_Fls_00156** : *If development error detection for the module Fls is enabled: the function Fls_SetMode shall check that the FLS module is currently not busy. If this check fails, the function Fls_SetMode shall reject the set mode request and raise the development error code FLS_E_BUSY.*
>Rejection Reason : No SPI interface/ No external flash
**SWS_Fls_00187** : *The function Fls_SetMode shall be pre-compile time configurable On/Off by the configuration parameter FlsSetModeApi.*
>Rejection Reason : No SPI interface/ No external flash
### Source files
Static source C Files are defined below
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂Can\
┃ ┣ 📂Cdd_Adc\
┃ ┣ 📂Cdd_Sent\
┃ ┣ 📂Cdd_Xbar\
┃ ┣ 📂Dio\
┃ ┣ 📂**Fls**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Fls.h** : *Contains the APIs of the FLS driver to be used by upper layers.*\
┃ ┃ ┃ ┣ 📜**Fls_Ctrl.h** : *Contains internal function declarations.*\
┃ ┃ ┃ ┗ 📜**Fls_Priv.h** : *Contains the private function declarations.*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Fls.c** : *Contains the implementation of the API’s for Fls driver.*\
┃ ┃ ┃ ┣ 📜**Fls_Priv.c** : *Contains private function definitions which will interact with Flash APIs.*\
┃ ┃ ┃ ┗ 📜**Fls_Ac.c** : *Contains internal functions definitions which will directly interact with hardware registers.*\
┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Gpt\
┃ ┣ 📂hw_include\
┃ ┣ 📂Lin\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┣ 📂Spi\
┃ ┣ 📂Wdg\
┣ 📂examples\
┣ 📂plugins\
┣ 📂CMakeLists.txt\
┗ 📜CMakePresets.json
Plugin files are defined below in the table.
|Plugin Files|Description|
|------|------|
|Fls_Cfg.h|Contains the Precompile switches|
|Fls_PBcfg.c|Contains all Post-Build Configured parameters |
|Fls_Cfg.c|Contains all Pre-Compile Configured parameters|
```{figure} Assets/images/Fls_Header_File_Structure.png
:alt: FLS header file include structure
:align: center
FLS header file include structure
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Scheduling
|Schedule Function API|Description|
|------------|---------------|
|Fls_MainFunction|This function shall perform the processing of the flash read, write, erase, blank check and compare jobs.|
#### Error handling
##### Development Error Reporting
The Fls Driver will report development errors on enabling FLS_DEV_ERROR_DETECT == STD_ON in Fls_Cfg.h.
The errors reported to DET module are described in the following table:
|Type of Error|Related Error code|Value (Hex)|
|----|-------|-----|
|API service called with wrong parameter|FLS_E_PARAM_CONFIG|0x01|
|API service called with wrong parameter|FLS_E_PARAM_ADDRESS|0x02|
|API service called with wrong parameter|FLS_E_PARAM_LENGTH|0x03|
|API service called with wrong parameter|FLS_E_PARAM_DATA|0x04|
|API service used without module initialization|FLS_E_UNINIT|0x05|
|API called when module is busy|FLS_E_BUSY|0x06|
|API called with a Null Pointer|FLS_E_PARAM_POINTER|0x0A|
|API called with a mismatch in erase type and length provided|FLS_E_PARAM_ALIGNMENT|0x0C|
The run time errors reported to DET module are described in the following table:
|Type of Error|Related Error code|Value (Hex)|
|----|-------|-----|
|Erase verification (blank check) failed|FLS_E_VERIFY_ERASE_FAILED|0x07|
|Write verification (compare) failed|FLS_E_VERIFY_WRITE_FAILED|0x08|
|Timeout supervision (flash erase/write timeout check with published max times)|FLS_E_TIMEOUT|0x09|
AUTOSAR requires that API functions check the validity of their
parameters. The check in the below table shows the various Development
Error Reporting: Assignment of checks to services are internal
parameter checks of the API functions. These checks are for
development error reporting and can be enabled or disabled. The
following table shows which parameter checks are performed on which
services:
#### Error Code
| Check Services | FLS_E_PARAM_CONFIG | FLS_E_PARAM_ADDRESS | FLS_E_PARAM_LENGTH | FLS_E_PARAM_DATA | FLS_E_UNINIT | FLS_E_BUSY | FLS_E_PARAM_POINTER |
|--------------------|--------------------|---------------------|--------------------|------------------|--------------|------------|----------------------|
| Fls_Init | x | | | | | x | |
| Fls_Erase | | x | x | | x | x | |
| Fls_Read | | x | x | x | x | x | |
| Fls_Write | | x | x | x | x | x | |
| Fls_Compare | | x | x | x | x | x | |
| Fls_BlankCheck | | x | x | | x | x | |
| Fls_GetJobResult | | | | | x | | |
| Fls_GetVersionInfo | | | | | | | x |
| Fls_MainFunction | | | | | x | | |
| Fls_Cancel | | | | | x | | |
### Used resources
#### Interrupt Handling
There is no hardware interrupt in Fls.
#### Instance support
|CPU instances|supported|
|-------|-------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
#### Hardware-Software Mapping
Below image shows Fls driver Hardware-Software mapping. For more information related to HW/SW mapping, refer the F29 Reference Manual.
```{figure} Assets/images/Fls_Hw_Sw_Mapping.png
:alt: Fls HW/SW Mapping
:align: center
Fls HW/SW Mapping
```
### Integration description
#### Dependent modules
##### DEM
FLS Production errors are reported to DEM ( Diagnostic Event Manager ) Module.
The Fls module reports production errors to the Diagnostic Event Manager.
##### MCU
The hardware of the internal Fls hardware unit depends on the system clock, pre-scaler(s) and PLL. The FLS driver module
will not take care of setting the registers that configure the clock, pre-scaler(s) and PLL (e.g. switching on/off
the PLL) in its init functions. The MCU module must do this.
##### OS
The FLS driver uses timer and therefore there is a dependency on the OS, which configures the timer.
##### SchM
If multiple AUTOSAR runnables have access to the same Data Store Memory block, the exported AUTOSAR specification enforces data consistency by using an AUTOSAR exclusive area. With this specification, the runnables have mutually exclusive access to the per-instance memory global data, which prevents data corruption. Beside the OS, the BSW Scheduler provides functions that FLS module calls at begin and end of critical sections. This implementation requires 1 level of exclusive access to guard critical sections.
The data consistency mechanism that has to be applied to an ExclusiveArea might be domain, ECU or even project specific. The decision which mechanism has to be applied by RTE / Basic Software Scheduler is taken during ECU integration by setting the Exclusive Area configuration parameter **RteExclusiveAreaImplMechanism**. This parameter is an input for RTE generator.
For FLS Module, data consistency and exclusive access to critical sections are required for the following sections as shown in the table below:
| Exclusive Area Functions used | FLS Function calling Exclusive Area | Need for Exclusive Area | Recommended Exclusive Area Mapping |
|-------|-------|-------|-------|
|FLS_EXCLUSIVE_AREA_0| Fls_Erase
Fls_Write| To protect against multiple access for shared resources | **OS_RESOURCE** : If the FLS APIs are only called from pre-emptible task context, its recommended to use this mechanism as it takes care of resource access protection and task priority management.
**None**: If FLS APIs are only called from non pre-emptible task context or during init, its recommended to use this mechanism as multiple access protection to shared resource is not needed. |
##### MemIf
This implementation depends on MemIf module and uses its imported
types such as MemIf_JobResultType, MemIf_ModeType and
MemIf_StatusType.
##### Fee
This implementation depends on Fee module for callback notification
to notify the module environment about job end and job error.
##### DET
The module FLS depends on the DET (by default) in order to report development errors. Detection
and reporting of development errors can be enabled or disabled by the switch
FLS_DEV_ERROR_DETECT = STD_ON in the Fls_Cfg.h
In development mode, the Fls module reports development error through the Det_ReportError function of
module DET.
The following table represents the service IDs:
| Service ID | Code | Service |
|-------------------------------------------|------|------------------------|
| FLS_SID_INIT | 0x00 | Fls_Init |
| FLS_SID_ERASE | 0x01 | Fls_Erase |
| FLS_SID_WRITE | 0x02 | FLS_Write() |
| FLS_SID_CANCEL | 0x03 | FLS_Cancel() |
| FLS_SID_GET_STATUS | 0x04 | FLS_GetStatus() |
| FLS_SID_GET_JOB_RESULT | 0x05 | Fls_GetJobResult() |
| FLS_SID_READ | 0x07 | FLS_Read() |
| FLS_SID_COMPARE | 0x08 | FLS_Compare() |
| FLS_SID_GET_VERSION_INFO | 0x10 | Fls_GetVersionInfo() |
| FLS_SID_BLANK_CHECK | 0x0A | FLS_BlankCheck() |
| FLS_SID_MAIN_FUNCTION | 0x06 | FLS_MainFunction() |
#### Multi-core and Resource allocator
The FLS module is not managed by the Resource Allocator. The Flash controller on F29H85x is a system-level peripheral that is not represented in the Resource Allocator configuration. The FLS MCAL driver can access Data Flash only from CPU1. No Resource Allocator instance allocation is needed for the FLS module.
### Configuration
The Fls can be configured as **Post-Build** or **Pre-Compile** variant, using EB tresos tool.
|Variants|Configured Files|
|-------|-------|
|PostBuild | Fls_PBcfg.c , Fls_Cfg.h |
|Pre-Compile | Fls_Cfg.c , Fls_Cfg.h |
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files.
#### Configuration Parameters
##### FlsConfigSet
Container for runtime configuration parameters of the flash driver.
###### FlsAcErase
| Item ||
|--------|---------------|
| **Name** | FlsAcErase |
| **Description** | Address offset in RAM to which the erase flash access code shall be loaded. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 100 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### FlsAcWrite
| Item ||
|--------|---------------|
| **Name** | FlsAcWrite |
| **Description** | Address offset in RAM to which the write flash access code shall be loaded. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 16 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### FlsCallCycle
| Item ||
|--------|---------------|
| **Name** | FlsCallCycle |
| **Description** | Cycle time of calls of the flash driver's main function (in seconds). |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.01 |
| **Max-value** | 100.0 |
| **Min-value** | 0.0 |
###### FlsDefaultMode
| Item ||
|--------|---------------|
| **Name** | FlsDefaultMode |
| **Description** | This parameter is the default FLS device mode after initialization. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MEMIF_MODE_SLOW |
| **Range** | MEMIF_MODE_FAST
MEMIF_MODE_SLOW |
###### FlsJobEndNotification
| Item ||
|--------|---------------|
| **Name** | FlsJobEndNotification |
| **Description** | Mapped to the job end notification routine provided by some upper layer module, typically the Fee module. |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | true |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### FlsJobErrorNotification
| Item ||
|--------|---------------|
| **Name** | FlsJobErrorNotification |
| **Description** | Mapped to the job error notification routine provided by some upper layer module, typically the Fee module. |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | true |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### FlsMaxReadFastMode
| Item ||
|--------|---------------|
| **Name** | FlsMaxReadFastMode |
| **Description** | The maximum number of bytes to read or compare in one cycle of the flash driver's job processing function in fast mode. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 16 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### FlsMaxWriteFastMode
| Item ||
|--------|---------------|
| **Name** | FlsMaxWriteFastMode |
| **Description** | The maximum number of bytes to read or compare in one cycle of the flash driver's job processing function in fast mode. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 16 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### FlsMaxReadNormalMode
| Item ||
|--------|---------------|
| **Name** | FlsMaxReadNormalMode |
| **Description** | The maximum number of bytes to read or compare in one cycle of the flash driver's job processing function in normal mode. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 16 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### FlsMaxWriteNormalMode
| Item ||
|--------|---------------|
| **Name** | FlsMaxWriteNormalMode |
| **Description** | The maximum number of bytes to write in one cycle of the flash driver's job processing function in normal mode. It must be 8 bytes or 16 bytes |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 16 |
| **Max-value** | 16 |
| **Min-value** | 8 |
###### FlsProtection
| Item ||
|--------|---------------|
| **Name** | FlsProtection |
| **Description** | Erase/write protection settings. Only relevant if supported by hardware. Currently, not supported by Hardware. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### Fls_CMDWEPROTA
| Item ||
|--------|---------------|
| **Name** | Fls_CMDWEPROTA |
| **Description** | Erase/write protection settings. CMDWEPROTA controls program/erase protection for first 32 sectors. Each bit allows users to enable/disable protection for each sector. Eg: Bit 0 allows protection configuration for Sectors 0. A value of 0 disables protection and a value of 1 enables protection from program/erase |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### Fls_CMDWEPROTB
| Item ||
|--------|---------------|
| **Name** | Fls_CMDWEPROTB |
| **Description** | Erase/write protection settings. CMDWEPROTB controls program/erase protection for sectors 32 to 255. Each bit allows users to enable/disable protection for a group of eight sectors. Note - The first 4 bit fields are reserved (bits 0-3) and protection of bit 4 and above would begin at sector 32. Eg: Bit 4 allows protection configuration for Sectors 32-39. A value of 0 disables protection and a value of 1 enables protection from program/erase |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### FlsExternalDriver
This container is present for external Flash drivers only. Internal Flash drivers do not use the parameter listed in this container, hence its multiplicity is 0 for internal drivers. Currently, not supported as only internal flash is present.
###### FlsSpiReference
| Item ||
|--------|---------------|
| **Name** | FlsSpiReference |
| **Description** | Reference to SPI sequence (required for external Flash drivers). |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### FlsSectorList
List of flashable sectors and pages.
###### FlsSector
Configuration description of a flashable sector
###### FlsNumberOfSectors
| Item ||
|--------|---------------|
| **Name** | FlsNumberOfSectors |
| **Description** | Number of continuous sectors with identical values for FlsSectorSize and |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### FlsPageSize
| Item ||
|--------|---------------|
| **Name** | FlsPageSize |
| **Description** | Size of one page of this sector. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 256 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### FlsSectorSize
| Item ||
|--------|---------------|
| **Name** | FlsSectorSize |
| **Description** | Size of this sector. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 2048 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### FlsSectorStartaddress
| Item ||
|--------|---------------|
| **Name** | FlsSectorStartaddress |
| **Description** | Start address of this sector. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
##### FlsGeneral
Container for general parameters of the flash driver. These parameters are always pre-compile.
###### FlsAcLoadOnJobStart
| Item ||
|--------|---------------|
| **Name** | FlsAcLoadOnJobStart |
| **Description** | The flash driver shall load the flash access code to RAM whenever an erase or write job is started and unload (overwrite) it after that job has been finished or canceled. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### FlsBaseAddress
| Item ||
|--------|---------------|
| **Name** | FlsBaseAddress |
| **Description** | The flash memory start address (see also SWS_Fls_00208 and SWS_Fls_00209). |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 281018368 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### FlsTotalSize
| Item ||
|--------|---------------|
| **Name** | FlsTotalSize |
| **Description** | The total amount of flash memory in bytes (see also SWS_Fls_00208 and SWS_Fls_00209). |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 262144 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### FlsNumBanks
| Item ||
|--------|---------------|
| **Name** | FlsNumBanks |
| **Description** | The number of banks present in the current device. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### FlsSectorSizeInBytes
| Item ||
|--------|---------------|
| **Name** | FlsSectorSizeInBytes |
| **Description** | The flash memory's sector size in bytes. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 2048 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### FlsBlankCheckApi
| Item ||
|--------|---------------|
| **Name** | FlsBlankCheckApi |
| **Description** | Compile switch to enable/disable the Fls_BlankCheck function. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### FlsCancelApi
| Item ||
|--------|---------------|
| **Name** | FlsCancelApi |
| **Description** | Compile switch to enable and disable the Fls_Cancel function. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### FlsCompareApi
| Item ||
|--------|---------------|
| **Name** | FlsCompareApi |
| **Description** | Compile switch to enable and disable the Fls_Compare function. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### FlsDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | FlsDevErrorDetect |
| **Description** | Switches the development error detection and notification on or off. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### FlsDriverIndex
| Item ||
|--------|---------------|
| **Name** | FlsDriverIndex |
| **Description** | Index of the driver, used by FEE. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 254 |
| **Min-value** | 0 |
###### FlsEraseVerificationEnabled
| Item ||
|--------|---------------|
| **Name** | FlsEraseVerificationEnabled |
| **Description** | Compile switch to enable erase verification. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### FlsGetJobResultApi
| Item ||
|--------|---------------|
| **Name** | FlsGetJobResultApi |
| **Description** | Compile switch to enable and disable the Fls_GetJobResult function. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### FlsGetStatusApi
| Item ||
|--------|---------------|
| **Name** | FlsGetStatusApi |
| **Description** | Compile switch to enable and disable the Fls_GetStatus function. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### FlsSetModeApi
| Item ||
|--------|---------------|
| **Name** | FlsSetModeApi |
| **Description** | Compile switch to enable and disable the Fls_SetMode function. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### FlsTimeoutSupervisionEnabled
| Item ||
|--------|---------------|
| **Name** | FlsTimeoutSupervisionEnabled |
| **Description** | Compile switch to enable timeout supervision. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### FlsVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | FlsVersionInfoApi |
| **Description** | Pre-processor switch to enable / disable the API to read out the modules version information. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### FlsWriteVerificationEnabled
| Item ||
|--------|---------------|
| **Name** | FlsWriteVerificationEnabled |
| **Description** | Compile switch to enable write verification. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### FlsWaitStates
| Item ||
|--------|---------------|
| **Name** | FlsWaitStates |
| **Description** | defines the number of random access wait states. When CPU performs a read access to Flash, data is returned after (RWAIT + 1) SYSCLK cycles. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 3 |
| **Max-value** | 3 |
| **Min-value** | 1 |
###### FlsCpuClockRef
| Item ||
|--------|---------------|
| **Name** | FlsCpuClockRef |
| **Description** | Reference to the CPU clock configuration, which is set in the MCU driver configuration |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
Refer [AUTOSAR_SWS_FlashDriver section: 10 Configuration specification](https://www.autosar.org/fileadmin/standards/R4.3.1/CP/AUTOSAR_SWS_FlashDriver.pdf) for configuration parameters details
#### Steps To Configure Fls Module
1. Open EB Tresos configurator tool and load Mcu, Os, Dem and Fls modules.
2. Open Mcu and Dem Module to Configure Clock and Dem Error for Mcu and Fls.
3. Open FLS module plugin, Select the Config Variant (Pre-compile/Post-Build).
4. In FLS module plugin configure required parameters.
5. Save the configuration and generate the configuration.
##### Standard Configuration
```{csv-table}
:header-rows: 1
:file: Assets/tables/Fls_Std_cfg_f29h85x.csv
```
##### IP Specific Configuration
```{csv-table}
:header-rows: 1
:file: Assets/tables/Fls_ip_cfg_f29h85x.csv
```
### Examples
#### Overview of Fls_App_Example
* Purpose
* Comprehensive flash memory driver test application that validates all FLS (Flash Driver) operations through automated testing
* Loop Iterations
* Executes 500 test iterations (loopCount 0-499)
* Each iteration advances the test address by 4096 bytes, wrapping around when reaching device memory limits
* Address wrap around occurs at 0x1FFFF (128KB Data Flash) for F29P32x devices, 0x3FFFF (256KB Data Flash) for F29H85x devices, Resets to address 0x0 after exceeding the limit
* Tests Per Iteration: 66 total tests
* 26 fixed tests on the test address
* 1 Sector Erase
* 1 Blank Check
* 6 Incremental Writes (8, 8, 16, 16, 32, 32 bytes at varying offsets)
* 6 Compare operations (after each incremental write)
* 3 Bulk operations (Erase, Write 4096 bytes, Read 4096 bytes)
* 2 Compare operations (write/read verification)
* 1 Bank Erase
* 1 Blank Check (after bank erase)
* 1 Write (after bank erase)
* 1 Read (after bank erase)
* 2 Compare operations (after bank erase)
* 1 Cancel test (intentional failure)
* 40 configuration tests (8 tests × 5 sector configurations from FLS_NUMBER_OF_SECTOR_CFG)
* Per sector: Read, Sector Erase, BlankCheck, Write, Bank Erase, Write, Read, Compare
* Total test executions
* 66 tests × 500 iterations
* Flash Operations (per iteration)
* Sector Erase - Fls_SetEraseType(FLS_SECTOR_ERASE) + Fls_Erase() to erase 4096-byte test sector
* Blank Check - Fls_BlankCheck() to verify sector is properly erased
* Incremental Writes - Multiple Fls_Write() calls with varying sizes (8, 16, 32 bytes) at different offsets, each followed by Fls_Compare() for verification
* Bulk Operations - Full sector Fls_Erase(), Fls_Write() (4096 bytes), and Fls_Read() with Fls_Compare() verification
* Bank Erase - Fls_SetEraseType(FLS_BANK_ERASE) + Fls_Erase() to test bank-level erase, followed by Fls_BlankCheck(), Fls_Write(), Fls_Read(), and Fls_Compare()
* Cancel Test - Fls_Erase() immediately followed by Fls_Cancel() to verify job cancellation mechanism (expects one intentional error per iteration)
* Configuration Loop - Iterates through all configured flash sectors performing complete sequences: Fls_Read(), Fls_Erase(), Fls_BlankCheck(), Fls_Write(), and Fls_Compare() with both sector and bank erase modes
* Additional APIs Used
* Fls_GetJobResult() - Queries job completion status after operations
* Fls_GetStatus() - Checks driver idle state before starting tests
* Test Counters
* Fls_passCnt - Increments on each successful job completion via callback; rolls over at 1000
* Fls_errCnt - Increments on each job failure via callback; rolls over at 1000
* Expected behavior: One error per iteration due to intentional Fls_Cancel() test
* Overall Pass Criteria: Fls_errCnt == 500 (one error per iteration for 500 iterations)
* Callback Functionality
* Fee_JobEndNotification() - Invoked on successful job completion; sets Fls_JobDoneSuccess flag and increments Fls_passCnt
* Fee_JobErrorNotification() - Invoked on job failure; sets Fls_JobDoneError flag and increments Fls_errCnt
* FlsApp_main_handling() - Polls Fls_MainFunction() cyclically until callbacks signal completion via flags
* Test Data
* Uses alternating 0xAA/0xBB pattern in 4096-byte transmit buffer for write verification
#### Overview of Fls_Fapi_App_Example
* Purpose
* Illustrate integration of the standalone Flash API library (for Code or Data Flash programming) with the FLS driver
* Flash API library operations are performed, then Fls_App operations (identical to above), and once again Flash API library operations
#### Setup required
* Connect the hardware and power up
* Launch a Serial terminal (at 115200 baud) with the COM port that is connected to the MCU
#### How to run
* Open CCS and Import Fls_App_Example
* Build project then debug project
##### Sample Log of Fls_App_Example
```{literalinclude} Assets/text/Fls/F29H85x/Fls_Example_log_Flash_build.txt
```
##### Sample Log of Fls_Api_App_Example
```{literalinclude} Assets/text/Fls_Fapi/F29H85x/Fls_Fapi_Example_log_Flash_build.txt
```
#### File Structure
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂Can\
┃ ┣ 📂Cdd_Adc\
┃ ┣ 📂Cdd_Sent\
┃ ┣ 📂Cdd_Xbar\
┃ ┣ 📂DeviceSupport\
┃ ┣ 📂Dio\
┃ ┣ 📂Fls\
┃ ┃ ┗ 📂**Fls_App_Example**\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜**Fls_App_Example.projectspec**\
┃ ┃ ┃ ┣ 📂Fls_Example_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜**fls.xdm**: *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Fls_Cbk.h** : *defines callback notification functions.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Fls_Cfg.h** : *Contains the generated pre-compiler configuration header.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Fls_Cfg.c** : *Contains the pre-build configuration parameters.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┃ ┗ 📜**Fls_App_Example.c**\
┃ ┣ 📂Gpt\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┣ 📂plugins\
┣ 📂tests\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
### References
[AUTOSAR_SWS_FlashDriver](https://www.autosar.org/fileadmin/standards/R4.3.1/CP/AUTOSAR_SWS_FlashDriver.pdf)\
[Technical Reference Manual](https://www.ti.com/product/F29H850TU)
## GPT Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|RTE|Runtime Environment|
|GPT|General Purpose Timer|
|BSW|Basic Software|
|GPIO|General Purpose Input Output|
|MCAL|Micro Controller Abstraction Layer|
|API|Application Programming Interface|
|DET|Default Error Tracer|
|HW |Hardware|
|SW |Software|
|I/O|Input/Output|
### Introduction
GPT driver is part of the Micro controller Drivers which is again part of the Basic Software. It initializes and controls the internal General Purpose Timer(s) (GPT) of the micro controller.Following sections highlight key aspects of this implementation which would be of interest to an integrator.
```{figure} Assets/images/Gpt_Autosar_MCAL.png
:alt: GPT MCAL AUTOSAR
:align: center
GPT MCAL AUTOSAR.
```
This document details AUTOSAR BSW Gpt module implementation
|Supported AUTOSAR Release|**4.3.1**|
|------|-------------|
| **Supported Configuration Variants** | **Pre-Compile & Post Build**|
| **Vendor ID** | **GPT_VENDOR_ID (44)**|
| **Module ID** | **GPT_MODULE_ID (100)**|
### Functional Overview
The GPT driver is part of the Micro controller abstraction layer (MCAL). It initializes and controls the internal General Purpose Timer(s) (GPT) of the micro controller.
The GPT driver provides services and configuration parameters for
* Starting and stopping hardware timers
* Getting timer values
* Controlling time triggered interrupt notifications
* Controlling time triggered wake up interrupts
#### Timer Modes
A timer channel can be configured in "one-shot mode" or "continuous mode".
##### Continuous Mode
If the timer has reached the value zero starting from target time, the timer shall continue running with the value "target time" at next timer tick and start decrementing again.
##### One Shot Mode
If the timer has reached the zero, starting from the target time, the timer shall stop automatically and maintain its timer value unchanged.
```{NOTE}
The tick duration of a timer channel depends on channel specific settings (part of GPT driver) as well as on system clock and settings of the clock tree controlled by the MCU module.
```
### Hardware Features
#### HW Features supported
CPU-Timer2 is reserved for real-time operating system uses (for example, TI-RTOS), but if CPU-Timer2 is not used by real-time operating systems then, CPU-Timer2 can also be used for other applications. The CPU-Timer0 and CPU-Timer1 run off of SYSCLK. The CPU-Timer2 normally runs off of SYSCLK, but can also use INTOSC1, INTOSC2 or XTAL. The CPU-Timer interrupt signals (TINT0, TINT1, TINT2) are connected to PIPE Module.
```{figure} Assets/images/Gpt_CPU_Timers.png
:alt: GPT CPU Timers
:align: center
GPT CPU Timers
```
The general operation of the CPU-Timer is as follows:
* The 32-bit counter register, TIMH:TIM, is loaded with the value in the period register PRDH:PRD.
* The counter decrements once every (TPR[TDDRH:TDDR]+1) SYSCLKOUT cycles, where TDDRH:TDDR is
the timer divider.
* When the counter reaches 0, a timer interrupt output signal generates an interrupt pulse.
#### Not supported Features
None
#### Non compliance
Below AUTOSAR design requirement are not supported for GPT Driver :
[**SWS_Gpt_00382** ,**SWS_Gpt_00383**, **SWS_Gpt_00384**, **SWS_Gpt_00385**, **SWS_Gpt_00386**, **SWS_Gpt_00390**, **SWS_Gpt_00391**, **SWS_Gpt_00395**, **SWS_Gpt_00396**, **SWS_Gpt_00397**, **SWS_Gpt_00402**, **SWS_Gpt_00398**, **SWS_Gpt_00399**, **SWS_Gpt_00400**, **SWS_Gpt_00401**, **SWS_Gpt_00403**, **ECUC_Gpt_00335**, **ECUC_Gpt_00335**]
>>Rejection Reason : Since this device has less number of timer instances available; this functionality is not supported as it would require blocking of additional timers and would leave no instances available for regular use.
[**SWS_Gpt_00127**, **SWS_Gpt_00258**, **SWS_Gpt_00339**, **SWS_Gpt_00151**, **SWS_Gpt_00255**, **SWS_Gpt_00152**, **SWS_Gpt_00153**, **SWS_Gpt_00164**, **SWS_Gpt_00165**, **SWS_Gpt_00341**, **SWS_Gpt_00231**, **SWS_Gpt_00201**, **SWS_Gpt_00392**, **SWS_Gpt_00393**, **SWS_Gpt_00159**, **SWS_Gpt_00157**, **SWS_Gpt_00155**, **SWS_Gpt_00202**, **SWS_Gpt_00215**, **SWS_Gpt_00229**, **SWS_Gpt_00160**, **SWS_Gpt_00158**, **SWS_Gpt_00156**, **SWS_Gpt_00203**, **SWS_Gpt_00230**, **SWS_Gpt_00216**, **SWS_Gpt_00321**, **SWS_Gpt_00322**, **SWS_Gpt_00323**, **SWS_Gpt_00324**, **SWS_Gpt_00325**, **ECUC_Gpt_00311**, **ECUC_Gpt_00235**, **ECUC_Gpt_00313**, **ECUC_Gpt_00320**]
>>Rejection Reason : Even though the underlying hardware provides wakeup capability the timers are connected to same clock sources as the CPU; once we enter Low Power Mode these clocks are gated. So timers will also stop working in low power mode. Hence, this functionality is not enabled in Gpt.
### Source files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂Dio\
┃ ┣ 📂**Gpt**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Gpt.h** : *Contains the API declarations of the Gpt driver to be used by upper layers.*\
┃ ┃ ┃ ┗ 📜**Gpt_Priv.h** : *contains the private functions declarations*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Gpt.c** : *contains the implementation of the API’s for GPT driver.*\
┃ ┃ ┃ ┣ 📜**Gpt_Irq.c** : *contains the implementation for GPT interrupts handlers.*\
┃ ┃ ┃ ┗ 📜**Gpt_Priv.c** : *contains the implementation for GPT private functions which will directly interact with hardware registers.*\
┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂hw_include\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Mcu\
┃ ┗ 📂Port\
┣ 📂examples\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{figure} Assets/images/Gpt_Header_File_Structure.png
:alt: GPT MCAL AUTOSAR
:align: center
Gpt Header File Structure.
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Scheduling
None
#### Error handling
##### Development Error Reporting
Development errors are reported to the DET using the service Det_ReportError(), when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
#### Error codes
##### Development Errors
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|API service called without module initialization|GPT_E_UINIT|0x0A|
|API service for initialization called when already initialized|GPT_E_ALREADY_INITIALIZED|0x0D|
|API error return code: Init function failed |GPT_E_INIT_FAILED|0x0E|
|API parameter checking: invalid channel|GPT_E_PARAM_CHANNEL|0x14|
|API parameter checking: invalid value|GPT_E_PARAM_VALUE|0x15|
|API parameter checking: invalid pointer|GPT_E_PARAM_POINTER|0x16|
|API parameter checking: invalid Predef Time|GPT_E_PARAM_PREDEF_TIMER|0x17|
|API parameter checking: invalid mode|GPT_E_PARAM_MODE|0x1F|
##### Runtime Errors
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|API service called when timer channel is still busy (running)|GPT_E_BUSY|0x0B|
|API service called when driver is in wrong mode|GPT_E_MODE|0x0C|
### Used resources
#### Interrupt Handling
The Driver doesn’t register any interrupts handler (ISR), it’s expected that consumer of this driver registers the required interrupt handler.
For every Gpt channel with notification enabled, an ISR requires to be registered. The Interrupt number associated with instance of the Timer is detailed in TRM (also, please refer the Example application).
|Timer Instance| Interrupt Name | Interrupt handler (if notification is enabled)|
|-----|----------------|-------|
| CPUTIMER0 | CPU_TINT0 | Gpt_Ch0Isr|
| CPUTIMER1 | CPU_TINT1 | Gpt_Ch1Isr|
| CPUTIMER2 | CPU_TINT2 | Gpt_Ch2Isr|
```{NOTE}
Same interrupt category should be configured in Os module
```
#### Instance support
|CPU instances|supported|
|-------|-------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
#### Hardware-Software Mapping
The table below describes the CPU Timer registers used by GPT module and the base address for the corresponding registers
Below image shows Gpt driver Hardware-Software mapping. For more information related to HW/SW mapping, refer the F29 Reference Manual.
```{figure} Assets/images/Gpt_HW_SW_Mapping.png
:alt: GPT HW/SW MAPPING
:align: center
Gpt HW/SW Mapping.
```
### Integration description
#### Dependent modules
##### DET
This implementation depends on the DET in order to report development errors The detection of development errors is configurable (ON / OFF), The switch GPT_CFG_DEV_ERROR_DETECT will activate or deactivate the detection of all development errors.
##### SchM
If multiple AUTOSAR runnables have access to the same Data Store Memory block, the exported AUTOSAR specification enforces data consistency by using an AUTOSAR exclusive area. With this specification, the runnables have mutually exclusive access to the per-instance memory global data, which prevents data corruption. Beside the OS, the BSW Scheduler provides functions that GPT module calls at begin and end of critical sections.
This implementation requires 1 level of exclusive access to guard critical sections.
The data consistency mechanism that has to be applied to an ExclusiveArea might be domain, ECU or even project specific. The decision which mechanism has to be
applied by RTE / Basic Software Scheduler is taken during ECU integration by setting the Exclusive Area configuration parameter **RteExclusiveAreaImplMechanism**. This parameter is an input for RTE generator. \
For GPT Module, data consistency and exclusive access to critical sections are required for the following sections as shown in the table below:
| Exclusive Area Functions used | Gpt Function calling Exclusive Area | Need for Exclusive Area | Recommended Exclusive Area Mapping |
|-------|-------|-------|-------|
|GPT_EXCLUSIVE_AREA_0 | Gpt_StartTimer
Gpt_StopTimer
Gpt_EnableNotification
Gpt_DisableNotification| To protect against multiple access for shared resources, *i.e. Timer Registers*, which can lead to race condition | **OS_RESOURCE** : If the Gpt APIs are only called from pre-emptible task context, its recommended to use this mechanism as it takes care of resource access protection and task priority management.
**None**: If Gpt APIs are only called from non pre-emptible task context or during init, its recommended to use this mechanism as multiple access protection to shared resource is not needed. |
##### MCU
MCU Module is required to initialize all the clock to be used by different peripherals
#### Multi-core and Resource allocator
The GPT module is not managed by the Resource Allocator. The GPT driver on F29H85x uses CPU timers (CPUTIMER0, CPUTIMER1, CPUTIMER2), which are core-local peripherals tightly coupled to each CPU core. Because CPU timers are inherently core-specific and do not require cross-core resource arbitration, they are not represented in the Resource Allocator configuration. No Resource Allocator instance allocation is needed for the GPT module.
### Configuration
The Gpt Driver implementation supports multiple configuration variants, namely Gpt Post-Build config and Pre-Compile config. The driver expects generated **Gpt_cfg.h** to be present as input file.
The associated Gpt driver configuration generated source files are **Gpt_Cfg.c** or
**Gpt_PBcfg.c**
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files.
```{Note}
If CPU Timer2 is used in OS, parameter 'GptUseTimer2InOS' should be checked in GPT configurator.
```
#### Configuration Parameters
##### GptChannelConfigSet
This container is the base of a Configuration Set which contains the configured GPT channels. This way, different configuration sets can be defined for post-build process.
###### GptUseTimer2InOS
| Item ||
|--------|---------------|
| **Name** | GptUseTimer2InOS |
| **Description** | Enable/Disable of CPU timer2 usage in OS |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### GptChannelConfiguration
Configuration of an individual GPT channel.
###### GptChannelId
| Item ||
|--------|---------------|
| **Name** | GptChannelId |
| **Description** | Channel Id of the GPT channel. This value will be assigned to the symbolic name derived of the GptChannelConfiguration container short name. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 2 |
| **Min-value** | 0 |
###### GptChannelMode
| Item ||
|--------|---------------|
| **Name** | GptChannelMode |
| **Description** | Specifies the behavior of the timer channel after the target time is reached. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | GPT_CH_MODE_ONESHOT |
| **Range** | GPT_CH_MODE_CONTINUOUS
GPT_CH_MODE_ONESHOT |
###### GptChannelPrescaleValue
| Item ||
|--------|---------------|
| **Name** | GptChannelPrescaleValue |
| **Description** | The input GPT clock will be divided by this value |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| Post-Build-Time | VARIANT-POST-BUILD |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### GptEnableWakeup
| Item ||
|--------|---------------|
| **Name** | GptEnableWakeup |
| **Description** | Enables wakeup capability of MCU for a channel. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### GptNotification
| Item ||
|--------|---------------|
| **Name** | GptNotification |
| **Description** | Function pointer to callback function (for non-wakeup notification) |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | true |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### GptSimulationStatus
| Item ||
|--------|---------------|
| **Name** | GptSimulationStatus |
| **Description** | Specifies the simulation state(Enable/Disable) of the timer. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | GPT_SIM_DISABLE |
| **Range** | GPT_SIM_DISABLE
GPT_SIM_ENABLE |
###### GptSimulationMode
| Item ||
|--------|---------------|
| **Name** | GptSimulationMode |
| **Description** | Specifies the behavior of the timer in simulation mode(Stop timer at next counter decrement or Stop timer at nect elapsed time). |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | GPT_SIM_STOP_TIMER_AT_NEXT_COUNTER_DEC |
| **Range** | GPT_SIM_STOP_TIMER_AT_NEXT_COUNTER_DEC
GPT_SIM_STOP_TIMER_AT_NEXT_TIMER_ELAPSE |
###### GptTypeofInterrupt
| Item ||
|--------|---------------|
| **Name** | GptTypeofInterrupt |
| **Description** | Type of ISR function |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | GPT_ISR_CAT1_RTINT |
| **Range** | GPT_ISR_CAT1_RTINT
GPT_ISR_CAT1_INT
GPT_ISR_CAT2 |
###### GptChannelClkSrcRef
| Item ||
|--------|---------------|
| **Name** | GptChannelClkSrcRef |
| **Description** | Reference to the GptClockReferencePoint from which the channel |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### GptWakeupConfiguration
Function pointer to callback function (for wakeup notification).
###### GptWakeupSourceRef
| Item ||
|--------|---------------|
| **Name** | GptWakeupSourceRef |
| **Description** | In case the wakeup-capability is true this value is transmitted to the Ecu State Manager. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
##### GptConfigurationOfOptApiServices
This container contains all configuration switches for configuring optional API services of the GPT driver.
###### GptDeinitApi
| Item ||
|--------|---------------|
| **Name** | GptDeinitApi |
| **Description** | Adds / removes the service Gpt_DeInit() from the code. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### GptEnableDisableNotificationApi
| Item ||
|--------|---------------|
| **Name** | GptEnableDisableNotificationApi |
| **Description** | Adds / removes the services Gpt_EnableNotification() and Gpt_DisableNotification from the code. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### GptTimeElapsedApi
| Item ||
|--------|---------------|
| **Name** | GptTimeElapsedApi |
| **Description** | Adds / removes the service Gpt_GetTimeElapsed() from the code |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### GptTimeRemainingApi
| Item ||
|--------|---------------|
| **Name** | GptTimeRemainingApi |
| **Description** | Adds / removes the service Gpt_GetTimeRemaining() from the code. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### GptVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | GptVersionInfoApi |
| **Description** | Adds / removes the service Gpt_GetVersionInfo() from the code. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### GptWakeupFunctionalityApi
| Item ||
|--------|---------------|
| **Name** | GptWakeupFunctionalityApi |
| **Description** | Adds / removes the services Gpt_SetMode(), Gpt_EnableWakeup() Gpt_DisableWakeup() and Gpt_CheckWakeup() from the code. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
##### GptDriverConfiguration
This container contains the module-wide configuration (parameters) of the GPT Driver
###### GptDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | GptDevErrorDetect |
| **Description** | Switches the development error detection and notification on or off. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### GptPredefTimer100us32bitEnable
| Item ||
|--------|---------------|
| **Name** | GptPredefTimer100us32bitEnable |
| **Description** | Enables/disables the GPT Predef Timer 100?s32bit. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### GptPredefTimer1usEnablingGrade
| Item ||
|--------|---------------|
| **Name** | GptPredefTimer1usEnablingGrade |
| **Description** | Specifies the grade of enabling the GPT Predef Timers with 1?s tick duration. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | GPT_PREDEF_TIMER_1US_DISABLED |
| **Range** | GPT_PREDEF_TIMER_1US_16BIT_ENABLED
GPT_PREDEF_TIMER_1US_16_24BIT_ENABLED
GPT_PREDEF_TIMER_1US_16_24_32BIT_ENABLED
GPT_PREDEF_TIMER_1US_DISABLED |
###### GptReportWakeupSource
| Item ||
|--------|---------------|
| **Name** | GptReportWakeupSource |
| **Description** | Enables/Disables wakeup source reporting. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### GptClockReferencePoint
This container contains a parameter, which represents a reference to a container of the type McuClockReferencePoint (defined in module MCU).
###### GptClockReference
| Item ||
|--------|---------------|
| **Name** | GptClockReference |
| **Description** | Reference to a container of the type McuClockReferencePoint, to select an input clock. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
Refer [AUTOSAR_SWS_GPTDriver section: 10 Configuration specification](https://www.autosar.org/fileadmin/standards/R4.3.1/CP/AUTOSAR_SWS_GPTDriver.pdf) for configuration parameters details
#### Steps To Configure Gpt Module
1. Open EB Tresos configurator tool, load Gpt. Select the Config Variant ( Precompile/Post-Build)
2. Go to GptChannelConfiguration Container tab and create a new container.
3. Configure the channels parameters for all channels.
4. Save the configuration and generate the configuration.
### Examples
The example applications demonstrates use of Gpt module, the list below identifies key steps performed in the example.
Support both Post Build and Pre Compile Configuration Variants
#### Gpt_Example_Timers
##### Overview Of Gpt_Example_Timers
* Gpt_Example_Timers
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
* Initializes Gpt driver using Gpt_Init()
* Gpt_GetVersionInfo will get the software version info details
* Gpt_DeInit()
* DeInitializes Gpt driver using Gpt_DeInit()
* Gpt_Init()
* Initialize Gpt Driver
* Enable notification for all channels using Gpt_EnableNotification()
* Start timer for all channels using Gpt_StartTimer()
* Wait for 1.1 seconds for timers notified by one time
* Stop all timers using Gpt_StopTimer
* DeInitializes Gpt driver
##### Setup required to run Gpt_Example_Timers example
* Connect the hardware and power up
* Connect the uart and set up the baudrate to check the log on serial console
##### How to run Gpt_Example_Timers example
* Open CCS and import Gpt_Example_Timers Example
* Build project and start debug project
##### Sample Log For Gpt_Example_Timers
```{literalinclude} Assets/text/Gpt/Gpt_Example_Timers.txt
```
#### Gpt_Example_OneShotMode
##### Overview Of Gpt_Example_OneShotMode
* Gpt_Example_OneShotMode
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
* Initializes Gpt driver using Gpt_Init()
* Gpt_DeInit()
* DeInitializes Gpt driver using Gpt_DeInit()
* Gpt_Init()
* Initialize Gpt Driver
* Enable notification for all channels using Gpt_EnableNotification()
* Start timer for all channels using Gpt_StartTimer() for 10ms timeout
* Wait for 11 milliseconds for timers notified by one time
* Stop all timers using Gpt_StopTimer
* Start timer for all channels using Gpt_StartTimer() for 100ms timeout
* Wait for 101 milliseconds for timers notified by one time
* Stop all timers using Gpt_StopTimer
* Start timer for all channels using Gpt_StartTimer() for 1s timeout
* Wait for 11 seconds for timers notified by one time
* Stop all timers using Gpt_StopTimer
* Start timer for all channels using Gpt_StartTimer() for max tick timeout
* Wait for max tick time for timers notified by one time
* Stop all timers using Gpt_StopTimer
* DeInitializes Gpt driver
##### Setup required to run Gpt_Example_OneShotMode example
* Connect the hardware and power up
* Connect the uart and set up the baudrate to check the log on serial console
##### How to run Gpt_Example_OneShotMode example
* Open CCS and import Gpt_Example_OneShotMode Example
* Build project and start debug project
##### Sample Log For Gpt_Example_OneShotMode
```{literalinclude} Assets/text/Gpt/Gpt_Example_OneShotMode.txt
```
#### Gpt_Example_MixedMode
##### Overview Of Gpt_Example_MixedMode
* Gpt_Example_MixedMode
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
* Initializes Gpt driver using Gpt_Init()
* Gpt_DeInit()
* DeInitializes Gpt driver using Gpt_DeInit()
* Gpt_Init()
* Initialize Gpt Driver
* Enable notification for all channels using Gpt_EnableNotification()
* Start timer for channel 1&2 channels using Gpt_StartTimer()
* Wait for 1.1 seconds for timers notified by one time
* Stop channel 1&2 timers using Gpt_StopTimer
* DeInitializes Gpt driver
##### Setup required to run Gpt_Example_MixedMode example
* Connect the hardware and power up
* Connect the uart and set up the baudrate to check the log on serial console
##### How to run Gpt_Example_MixedMode example
* Open CCS and import Gpt_Example_MixedMode Example
* Build project and start debug project
##### Sample Log For Gpt_Example_MixedMode
```{literalinclude} Assets/text/Gpt/Gpt_Example_MixedMode.txt
```
#### Gpt_Example_InterruptTimeout
##### Overview Of Gpt_Example_InterruptTimeout
* Gpt_Example_InterruptTimeout
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
* Initializes Gpt driver using Gpt_Init()
* Gpt_DeInit()
* DeInitializes Gpt driver using Gpt_DeInit()
* Gpt_Init()
* Initialize Gpt Driver
* Enable notification for all channels using Gpt_EnableNotification()
* Set DioChannel_0 to STD_HIGH
* Start timer for channel 1&2 channels using Gpt_StartTimer()
* Wait for 1.1 seconds for timers notified by one time
* Set DioChannel_0 to STD_LOW
* Check interrupt time is 1s or not manually.
* Stop channel 1&2 timers using Gpt_StopTimer
* DeInitializes Gpt driver
##### Setup required to run Gpt_Example_InterruptTimeout example
* Connect the hardware and power up
* Connect the uart and set up the baudrate to check the log on serial console
##### How to run Gpt_Example_InterruptTimeout example
* Open CCS and Import Gpt_Example_InterruptTimeout example
* Build project and start debug project
##### Sample Log For Gpt_Example_InterruptTimeout
```{literalinclude} Assets/text/Gpt/Gpt_Example_InterruptTimeout.txt
```
#### Gpt_Example_ContinuousMode
##### Overview Of Gpt_Example_ContinuousMode
* Gpt_Example_ContinuousMode
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
* Initializes Gpt driver using Gpt_Init()
* Gpt_DeInit()
* DeInitializes Gpt driver using Gpt_DeInit()
* Gpt_Init()
* Initialize Gpt Driver
* Enable notification for all channels using Gpt_EnableNotification()
* Start timer for all channels using Gpt_StartTimer() for 10ms timeout
* Wait for 11 milliseconds for timers notified by one time
* Stop all timers using Gpt_StopTimer
* Start timer for all channels using Gpt_StartTimer() for 100ms timeout
* Wait for 101 milliseconds for timers notified by one time
* Stop all timers using Gpt_StopTimer
* Start timer for all channels using Gpt_StartTimer() for 1s timeout
* Wait for 11 seconds for timers notified by one time
* Stop all timers using Gpt_StopTimer
* Start timer for all channels using Gpt_StartTimer() for max tick timeout
* Wait for max tick time for timers notified by one time
* Stop all timers using Gpt_StopTimer
* DeInitializes Gpt driver
##### Setup required to run Gpt_Example_ContinuousMode example
* Connect the hardware and power up
* Connect the uart and set up the baudrate to check the log on serial console
##### How to run Gpt_Example_ContinuousMode example
* Open CCS and import Gpt_Example_ContinuousMode Example
* Build project and start debug project
##### Sample Log For Gpt_Example_ContinuousMode
```{literalinclude} Assets/text/Gpt/Gpt_Example_ContinuousMode.txt
```
#### File Structure
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂Can\
┃ ┣ 📂DeviceSupport\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┃ ┣ 📂**Gpt_Example_ContinuousMode**\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜Gpt_Example_ContinuousMode.projectspec\
┃ ┃ ┃ ┣ 📂Gpt_Timers_ContinuousMode_config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Gpt.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port.xdm\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Gpt_Cfg.h** : *Contains the generated pre-compiler configuration header.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Gpt_Cfg.h** : *Contains the prebuild configuration parameters.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBCfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBCfg.c\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜**Gpt_Example_ContinuousMode.c**\
┃ ┃ ┃ ┣ 📜**Gpt_Example_ContinuousMode.h**\
┃ ┃ ┣ 📂Gpt_Example_InterruptTimeout\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜Gpt_Example_InterruptTimeout.projectspec\
┃ ┃ ┃ ┣ 📂Gpt_Interrupt_Timeout_config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dio.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Gpt.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port.xdm\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dio_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Gpt_Cfg.h** :*Contains the generated pre-compiler configuration header.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dio_LCfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Gpt_Cfg.h** : *Contains the prebuild configuration parameters.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBCfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBCfg.c\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜**Gpt_Example_InterruptTimeout.c**\
┃ ┃ ┃ ┣ 📜**Gpt_Example_InterruptTimeout.h**\
┃ ┃ ┣ 📂Gpt_Example_MixedMode\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜Gpt_Example_MixedMode.projectspec\
┃ ┃ ┃ ┣ 📂Gpt_Timers_MixedMode_config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Gpt.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port.xdm\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Gpt_Cfg.h** : *Contains the generated pre-compiler configuration header.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Gpt_Cfg.h** : *Contains the prebuild configuration parameters.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBCfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBCfg.c\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜**Gpt_Example_MixedMode.c**\
┃ ┃ ┃ ┣ 📜**Gpt_Example_MixedMode.h**\
┃ ┃ ┣ 📂Gpt_Example_OneShotMode\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜Gpt_Example_OneShotMode.projectspec\
┃ ┃ ┃ ┣ 📂Gpt_Timers_OneShotMode_config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Gpt.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port.xdm\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Gpt_Cfg.h** :*Contains the generated pre-compiler configuration header.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Gpt_Cfg.h** : *Contains the prebuild configuration parameters.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBCfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBCfg.c\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜**Gpt_Example_OneShotMode.c**\
┃ ┃ ┃ ┣ 📜**Gpt_Example_OneShotMode.h**\
┃ ┃ ┗ 📂Gpt_Example_Timers\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜Gpt_Example_Timers.projectspec\
┃ ┃ ┃ ┣ 📂Gpt_Example_Timers_config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Gpt.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port.xdm\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Gpt_Cfg.h** : *Contains the generated pre-compiler configuration header.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Gpt_Cfg.h** : *Contains the prebuild configuration parameters.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBCfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBCfg.c\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜**Gpt_Example_Timers.c**\
┃ ┃ ┃ ┣ 📜**Gpt_Example_Timers.h**\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{Note}
Either Gpt_PBcfg.c OR Gpt_Cfg.c will be present based on selected config variant by user
```
## LIN Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|COM|Communication|
|ECU|Electronic Control Unit|
|EcuM|ECU Manager|
|DEM|Diagnostic Event Manager|
|DET|Default Error Tracer|
|ISR|Interrupt Service Routine|
|LIN|Local Interconnect Network|
|MCAL|Micro Controller Abstraction Layer|
|MCU|Micro Controller Unit|
|OS|Operating System|
|PDU|Protocol Data Unit|
|PID|Protected ID|
|PLL|Phase-Locked Loop|
|RAM|Random Access Memory|
|RX|Reception|
|SCI|Serial Communication Interface|
|SDU|Service Data Unit|
|SFR|Special Function Register|
|SPAL|Standard Peripheral Abstraction Layer|
|SRS|Software Requirement Specification|
|SW|Software|
|SWS|Software Specification|
|TP|Transport Layer|
|TX|Transmission|
|UART|Universal Asynchronous Receiver Transmitter|
|XML|Extensible Markup Language|
### Introduction
This document details AUTOSAR BSW LIN module implementation
|Supported AUTOSAR Release|**4.3.1**|
|------|-------------|
|**Supported Configuration Variants** | **Post-build, Pre-Compile**|
|**Vendor ID** | **LIN_VENDOR_ID (44)**|
|**Module ID** | **LIN_MODULE_ID (82)**|
LIN stands For Local Interconnect Network. The LIN driver is a communication driver and is part of the micro-controller abstraction layer (MCAL).
It performs the hardware access and offers a hardware independent API to the upper layer.
The only upper layer, which has access to the LIN driver, is the LIN Interface.
A LIN driver can support more than one channel/Instance. This means that the LIN driver can handle one or
more LIN channels as long as they are belonging to the same LIN hardware unit.
```{figure} Assets/images/Lin_Autosar_MCAL.png
:alt: LIN MCAL AUTOSAR
:align: center
Lin MCAL AUTOSAR
```
### Functional Overview
As the amount of electrical systems and components continue to grow as automobiles become more intelligent, safe, and comfortable.
The growth of these components and systems demand a need for communication transceivers, to facilitate their interaction in the most advantageous way possible for manufacturers.
LIN was developed to manage communication between these components and systems in an efficient and straightforward fashion, where the bandwidth and versatility of CAN was not needed;
though in most instances, it is a sub-bus to the CAN bus.
```{figure} Assets/images/LIN_Overview.png
:alt: LIN Overview
:align: center
LIN Overview
```
The LIN standard is based on the SCI (UART) serial data link format.
The communication concept is single-commander/multiple-responder with a message identification for multi-cast transmission between any network nodes.
### Hardware Features
#### Hardware Features supported
* Compatibility with LIN 1.3,2.0 and 2.1 protocols
* Configurable Baud rate up to 20 kbps
* Two external pins: LINRX and LINTX
* Multi-buffered receive and transmit units
* 2^31 programmable transmission rates with 7 fractional bits
* Wake-up on LINRX dominant level from transceiver
* Identification masks for message filtering
* Automatic bus idle detection
* Capability to use Direct Memory Access (DMA) for transmit and receive data
* Update wake-up/go to sleep
* Automatic commander header generation
* Programmable synchronization break field
* Synchronization field
* Identifier field
* Responder Automatic Synchronization
* Synchronization break detection
* Optional baud rate update
* Synchronization validation
* Automatic wake-up support
* Wake-up signal generation
* Expiration times on wake-up signals
* Error detection
* Bit error
* Bus error
* No-response error
* Checksum error
* Synchronization field error
* Parity error
* 2 interrupt lines with priority encoding for:
* Receive
* Transmit
* ID, error, and status
* Support for LIN 2.0 checksum
* Enhanced synchronizer finite state machine (FSM) support for frame processing
* Enhanced handling of extended frames
* Enhanced baud rate generator
#### Not supported Features
* Apart from Wake up Interrupt, support for the rest of the available interrupts are disabled by the driver. Wakeup Interrupt support is enabled as per autosar requirement. For errors or status checking, Polling method is being implemented.
* Current Transmission Abort is not supported by Hardware hence no support for transmission abort by Lin Driver.
* Timeout is not needed by the hardware as there are no register reads in loop for timeout error to occur hence Production/TimeOut errors reporting is also not Supported.
#### Non compliance
**Below AUTOSAR requirements are partially supported for LIN driver:**
**SWS_Lin_00207** : Constants, global data types and functions that are only used by LIN driver internally, are declared in Lin.c.
> Partial Rejection Reason : *Internal Function are also declared in Lin_Priv.h File.*
**SWS_Lin_00235 : Icu_DisableNotification/Icu_EnableNotification.**
> Partial Rejection Reason : *ICU enable/disable notification is not needed as LIN IP can be accessed directly from Microcontroller/CPU Core*
**SWS_BSW_00042** : Detection of Development Errors: The detection and reporting of Development errors shall be performed only if the configuration parameter for detection of Development errors is set
>Partial Non Compliance Reason : Few Null pointer input parameter checks are needed irrespective of Development errors is set, to handle MISRA requirement.
**SWS_Lin_00209** : Lin_Wakeup: During the state transition from LIN_CH_SLEEP to LIN_CH_OPERATIONAL the LIN Driver shall ensure that the rest of the cluster is awake. This is achieved by issuing a wake-up request, forcing the bus to the dominant state for 250 μs to 5 ms
>Partial Non Compliance Reason : The LIN hardware IP used in F29x has a limitation when transmitting a standard wakeup signal, which can cause the hardware to enter an undefined state. To mitigate this issue, the driver implements a workaround by using a LIN header frame with a configurable ID (LinWakeupId) instead of the standard wakeup signal. This approach conforms to the LIN 2.1 specification while avoiding the hardware limitation. The LinWakeupId parameter can be configured in the EB Tresos configurator and should be set to an unused ID in the LIN network to prevent conflicts with actual communication frames.
**Below AUTOSAR requirement is rejected for LIN driver:**
**SWS_Lin_00074** : The function Lin_GoToSleep shall terminate ongoing frame transmission of prior transmission requests, even if the transmission is unsuccessfully completed.
> Rejection Reason : *Hardware limitation. Transmission Abort is not supported by Lin Hardware.*
### Source files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂Can\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂hw_include\
┃ ┣ 📂**Lin**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Lin.h** : *Contains the APIs of the LIN driver to be used by upper layers.*\
┃ ┃ ┃ ┗ 📜**Lin_Priv.h** : *LIN private header file which contains the private functions declarations, etc.*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Lin.c** : *Contains the implementation of the APIs for LIN driver.*\
┃ ┃ ┃ ┣ 📜**Lin_Irq.c** : *LIN interrupt source file which contains the implementation for LIN interrupts handlers.*\
┃ ┃ ┃ ┗ 📜**Lin_Priv.c** : *Contains Functions that supports the APIs for LIN driver.*\
┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┣ 📂examples\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{figure} Assets/images/Lin_Header_File_Structure.png
:alt: LIN Header File Structure
:align: center
Lin Header File Structure
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Error Handling
##### Development Error Reporting
Those errors shall be detected and fixed during development phase. In most cases, those errors are software
errors. The detection of errors that shall only occur during development can be switched off for production
code. Development errors are reported to the DET using the service Det_ReportError(),when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
#### Error codes
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|API service used without module initialization|LIN_E_UNINIT|0x00|
|API service used with an invalid or inactive channel parameter|LIN_E_INVALID_CHANNEL|0x02|
|API service called with invalid configuration pointer|LIN_E_INVALID_POINTER|0x03|
|Invalid state transition for the current state |LIN_E_STATE_TRANSITION|0x04|
|API service called with a NULL pointer |LIN_E_PARAM_POINTER|0x05|
|Timeout caused by hardware error|LIN_E_TIMEOUT|Assigned by DEM|
### Safety Mechanism
|TI Diagnostic Unique Identifier| Summary | Description |
|----|-----|-------|
|LIN6|Data Parity Error Detection|Data Parity error should be detected while reception of data and LIN_RX_ERROR will be returned by Lin_GetStatus API|
|LIN7|Overrun Error Detection|Overrun Error should be detected while reception of data and LIN_RX_ERROR will be returned by Lin_GetStatus API|
|LIN8|Frame Error Detection|Frame Error should be detected while reception of data and LIN_RX_ERROR will be returned by Lin_GetStatus API|
|LIN9|LIN Physical Bus Error Detection|Physical Bus Error should be detected while transmission of data and LIN_TX_HEADER_ERROR will be returned by Lin_GetStatus API|
|LIN10|LIN No-Response Error Detection|No-Response Error should be detected while reception of data and LIN_RX_NO_RESPONSE will be returned by Lin_GetStatus API|
|LIN11|Bit Error Detection|Bit Error error should be detected while transmission of data and LIN_TX_ERROR will be returned by Lin_GetStatus API|
|LIN12|LIN Checksum Error Detection|Checksum Error should be detected while reception of data and LIN_RX_ERROR will be returned by Lin_GetStatus API|
|LIN13|LIN ID Parity Error Detection|LIN ID Parity Error should be detected while reception of data and LIN_RX_ERROR will be returned by Lin_GetStatus API|
```{NOTE}
More details of Safety Mechanisms can be found in Safety Manual.
```
### Silicon errata workarounds and recommendation
For detailed silicon errata, refer to the [F29H85x, F29P58x, and F29P32x Real-Time MCUs Silicon Errata](https://www.ti.com/lit/er/sprz569c/sprz569c.pdf).
| Advisory | Workaround in MCAL driver | Recommended actions for user |
|----------|--------------------------|-------------------------------|
| LIN Unable to Wake Up Using 0xF0 Wake-Up Key | Transmitting the standard 0xF0 wake-up signal causes the LIN hardware to enter an undefined state. The driver works around this by transmitting an unused LIN header frame as the wake-up signal instead, which is compliant with the LIN 2.1 specification. | Configure the wake-up frame ID via the `LinWakeupId` parameter under `LinGeneral` in EB Tresos. It is recommended to use ID `0x3F`, which is an unused reserved ID in the LIN network, to avoid conflicts with active communication frames. |
### Used resources
#### Interrupt Handling
Lin driver provides ISR for wake up detection. The interrupt vector lines to be used is configurable in Lin driver.
The ISR for Wake up detection is implemented in the file Lin_Irq.c.
|Lin Instance| Interrupt Name | Interrupt handler|
|------------|----------------|-----------------|
|LINA| LINA_0 | Lin_A_Int0ISR|
|LINA| LINA_1 | Lin_A_Int1ISR|
|LINB| LINB_0 | Lin_B_Int0ISR|
|LINB| LINB_1 | Lin_B_Int1ISR|
```{Note}
Same Interrupt Category needs to be configured in both Lin and OS Modules.
```
#### Instance support
|CPU instances|Supported|
|-------|-------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
#### Hardware-Software Mapping
Below image shows LIN driver Hardware-Software mapping. For more information related to HW/SW mapping, refer the F29x Reference Manual.
```{figure} Assets/images/LIN_HW_SW_Mapping.png
:alt: LIN HW/SW Mapping
:align: center
LIN HW/SW Mapping
```
### Integration description
#### Dependent modules
##### DET
This implementation depends on the DET in order to report development errors
The detection of development errors is configurable (ON / OFF), The switch LIN_DEV_ERROR_DETECT will activate or deactivate the detection of all development errors.
In development mode, the Lin module reports development error through the Det_ReportError function of
module DET.
##### PORT
The Port driver configures the port pins used for the LIN driver as input or output. Hence, the Port driver has to be initialized prior to the use of LIN functions. Otherwise, LIN driver functions will exhibit undefined behavior.
##### DEM
MCU Production errors are reported to DEM ( Diagnostic Event Manager ) Module.
The Lin module reports production errors to the Diagnostic Event Manager.
##### MCU
The hardware of the internal LIN hardware unit depends on the system clock, pre-scaler(s) and PLL. Hence,
the length of the LIN bit timing depends on the clock settings made in module MCU. The LIN driver module
will not take care of setting the registers that configure the clock, pre-scaler(s) and PLL (e.g. switching on/off
the PLL) in its init functions. The MCU module must do this.
##### OS
The LIN driver uses interrupts and therefore there is a dependency on the OS, which configures the interrupt
sources.
##### EcuM
The LIN driver uses WakeUp source configured by EcuM, and report the WakeUp events to EcuM module.
##### SchM
If multiple AUTOSAR runnables have access to the same Data Store Memory block, the exported AUTOSAR specification enforces data consistency by using an AUTOSAR exclusive area. With this specification, the runnables have mutually exclusive access to the per-instance memory global data, which prevents data corruption. Beside the OS, the BSW Scheduler provides functions that LIN module calls at begin and end of critical sections. This implementation requires 1 level of exclusive access to guard critical sections.
The data consistency mechanism that has to be applied to an ExclusiveArea might be domain, ECU or even project specific. The decision which mechanism has to be applied by RTE / Basic Software Scheduler is taken during ECU integration by setting the Exclusive Area configuration parameter **RteExclusiveAreaImplMechanism**. This parameter is an input for RTE generator.
For LIN Module, data consistency and exclusive access to critical sections are required for the following sections as shown in the table below:
| Exclusive Area Functions used | LIN Function calling Exclusive Area | Need for Exclusive Area | Recommended Exclusive Area Mapping |
|-------|-------|-------|-------|
|LIN_EXCLUSIVE_AREA_0| Lin_SendFrame
Lin_GoToSleep
Lin_GoToSleepInternal
Lin_Wakeup
Lin_WakeupInternal
Lin_GetStatus | To protect against multiple access for shared resources |**ALL_INTERRUPT_BLOCKING** : All interrupts should be blocked to ensure consistent transmission of LIN master response frames. This is important to ensure the proper transmission of master response frames, where header and response are transmitted separately and any interrupt occurring between them can affect the master response in-frame response space. |
#### Resource Allocator
The LIN module uses the Resource Allocator to allocate LIN peripheral instances to CPU cores and configure their memory-mapped base addresses. Each allocation is placed inside a **Context** that maps to a CPU core (e.g. `CPU1`). The **CurrentContext** parameter in the Resource Allocator selects which Context is active for MCAL execution. See the [Resource Allocator Module User Guide](Module_User_Guide_ResourceAllocator.md) for details on configuring device-specific settings.
The **Frame** parameter (`FRAME0`–`FRAME3`) selects the memory-mapped frame for the instance, enabling simultaneous access from different initiators without arbitration stalls. The **BaseAddr** is auto-calculated based on the selected instance and frame. The **DebugHaltEnabled** and **StandbyModeEnabled** parameters control peripheral behaviour during CPU debug halt and standby low-power modes respectively.
##### Resource Allocator Usage Example
To allocate LINA to CPU1 using FRAME0:
1. In the Resource Allocator configuration, create a new Lin instance allocation under the CPU1 Context
2. Set **InstanceName** to `LINA`
3. Set **Frame** to `FRAME0`
4. The **BaseAddr** will be automatically calculated as `LINA_BASE_FRAME(0U)`
5. Optionally configure **DebugHaltEnabled** and **StandbyModeEnabled**
```text
Resource Allocator Configuration:
├── Context (Core: CPU1)
│ └── LinInstanceAllocation
│ ├── InstanceName: LINA
│ ├── Frame: FRAME0
│ ├── BaseAddr: LINA_BASE_FRAME(0U) [auto-calculated]
│ ├── DebugHaltEnabled: true
│ └── StandbyModeEnabled: true
```
### Configuration
The Lin Driver implementation supports multiple configuration variants, namely Lin Post-Build config and Pre-Compile config. The driver expects generated **Lin_Cfg.h** to be present as input file.
The associated Lin driver configuration generated source file is **Lin_PBcfg.c** or **Lin_Cfg.c**
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files.
```{Note}
Refer section [Getting Started with EB Tresos](./MCAL_Configuration_and_EB_Tresos.md#getting-started-with-eb-tresos) of Chapter **MCAL Configuration and EB Tresos** for more information on how to load plugin and generate the configuration files.
```
#### Configuration Precautions
User should pass the configuration input only from EB Tresos tool. Manual changes in input config files might lead to unexpected behavior.
```{NOTE}
More details related to Configuration precautions can be found in Safety Manual.
```
#### Configuration Parameters
##### LinDemEventParameterRefs
| Item ||
|--------|---------------|
| **Name** | LinDemEventParameterRefs |
| **Description** | Container for the references to DemEventParameter elements which shall be invoked using the API Dem_SetEventStatus in case the corresponding error occurs. The EventId is taken from the referenced DemEventParameter's DemEventId symbolic value. The standardized errors are provided in this container and can be extended by vendor-specific error references. |
| **Post-build-variant-multiplicity** | false |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
##### LinGeneral
This container contains the parameters related to each LIN Driver Unit.
###### LinIndex
| Item ||
|--------|---------------|
| **Name** | LinIndex |
| **Description** | Specifies the InstanceId of this module instance. If only one instance is present it shall have the Id 0. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1 |
| **Min-value** | 0 |
###### LinTimeoutDuration
| Item ||
|--------|---------------|
| **Name** | LinTimeoutDuration |
| **Description** | Specifies the maximum number of loops for blocking function until a timeout is raised in short term wait loops |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 65535 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### LinWakeupId
| Item ||
|--------|---------------|
| **Name** | LinWakeupId |
| **Description** | Specifies the LIN ID used to transmit a header instead of a wakeup signal due to hardware constraints. The hardware enters an undefined state when a standard wakeup signal is transmitted. To mitigate this limitation, an unused header frame is utilized as the wakeup signal, which conforms to the LIN2.1 specification |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 63 |
| **Max-value** | 63 |
| **Min-value** | 0 |
###### LinDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | LinDevErrorDetect |
| **Description** | Switches the development error detection and notification on or off. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### LinVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | LinVersionInfoApi |
| **Description** | Switches the Lin_GetVersionInfo function ON or OFF. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### LinSysClockRef
| Item ||
|--------|---------------|
| **Name** | LinSysClockRef |
| **Description** | Reference to the SYSTEM clock source configuration, which is set in the MCU driver configuration. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
##### LinGlobalConfig
This container contains the global configuration parameter of the Lin driver.
###### LinChannel
This container contains the configuration (parameters) of the LIN Controller(s).
###### LinChannelBaudRate
| Item ||
|--------|---------------|
| **Name** | LinChannelBaudRate |
| **Description** | Specifies the baud rate of the LIN channel |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1000 |
| **Max-value** | 20000 |
| **Min-value** | 1000 |
###### LinChannelId
| Item ||
|--------|---------------|
| **Name** | LinChannelId |
| **Description** | Identifies the LIN channel. Replaces LIN_CHANNEL_INDEX_NAME from the LIN SWS. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1 |
| **Min-value** | 0 |
###### LinLoopbackMode
| Item ||
|--------|---------------|
| **Name** | LinLoopbackMode |
| **Description** | Select loopback mode to be used for this Lin instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | LIN_LOOPBACK_DISABLED |
| **Range** | LIN_LOOPBACK_DISABLED
LIN_LOOPBACK_INTERNAL
LIN_LOOPBACK_EXTERNAL |
###### LinChannelWakeupSupport
| Item ||
|--------|---------------|
| **Name** | LinChannelWakeupSupport |
| **Description** | Specifies if the LIN hardware channel supports wake up functionality |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | False |
###### LinISRType
| Item ||
|--------|---------------|
| **Name** | LinISRType |
| **Description** | Select ISR type to be used for this Lin instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | LIN_ISR_CAT2 |
| **Range** | LIN_ISR_CAT1_RTINT
LIN_ISR_CAT1_INT
LIN_ISR_CAT2 |
###### LinInterruptLineSelect
| Item ||
|--------|---------------|
| **Name** | LinInterruptLineSelect |
| **Description** | Select interrupt line to be used for this Lin instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | LIN_INTERRUPT_LINE_NUM_0 |
| **Range** | LIN_INTERRUPT_LINE_NUM_0
LIN_INTERRUPT_LINE_NUM_1 |
###### LinInstance
| Item ||
|--------|---------------|
| **Name** | LinInstance |
| **Description** | Reference to the LIN Instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### LinChannelEcuMWakeupSource
| Item ||
|--------|---------------|
| **Name** | LinChannelEcuMWakeupSource |
| **Description** | This parameter contains a reference to the Wakeup Source for this controller as defined in the ECU State Manager. |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### LinClockRef
| Item ||
|--------|---------------|
| **Name** | LinClockRef |
| **Description** | Reference to the LIN clock source configuration, which is set in the MCU driver configuration. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### LinBaudrateConfig
This container contains the baudrate configuration parameter of the Lin driver.
###### LinChannelPrescalar
| Item ||
|--------|---------------|
| **Name** | LinChannelPrescalar |
| **Description** | Prescalar to derive LINCLK from VCLK |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.0 |
| **Max-value** | 1.6777215E7 |
| **Min-value** | 0.0 |
###### LinChannelFractionalDivider
| Item ||
|--------|---------------|
| **Name** | LinChannelFractionalDivider |
| **Description** | The M field of the BRSR register modifies the integer prescaler P for fine tuning of the baud rate. The M value adds in increments of 1/16 of the P value. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.0 |
| **Max-value** | 15.0 |
| **Min-value** | 0.0 |
Refer [AUTOSAR_SWS_LINDriver section: 10 Configuration specification](https://www.autosar.org/fileadmin/standards/R4.3.1/CP/AUTOSAR_SWS_LINDriver.pdf) for configuration parameters details
#### Steps To Configure Lin Module
1. Open EB Tresos configurator tool and load Port, Mcu, EcuM, Os, Dem and Lin modules.
2. Open PORT module plugin and configure required pins as LINTX, LINRX.
3. Open Mcu and Dem Module to Configure Lin Clock and Dem Error for Mcu and Lin.
4. Open EcuM Module and Configure the Wakeup source for Lin Wakeup.
5. Open LIN module plugin, Select the Config Variant (Pre-compile/Post-Build).
6. In LIN module plugin configure required parameters.
7. Save the configuration and generate the configuration.
### Examples
The example application demonstrates use of Lin module, the list below identifies key steps performed in the examples.
#### Hardware Setup Required
* Since there is no inbuilt transceiver, external transceiver needs to be connected. Users can use [TLIN1021DEVM](https://www.ti.com/tool/TLIN1021DEVM) as external transceiver.
* Refer to the documentation or user manual of the PLIN device and TLIN1021DEVM.
* For reference, user can follow the connection as per the following image.
```{figure} Assets/images/Lin_extsetup.png
:alt: LIN External Hardware Setup Required
:align: center
LIN External Hardware Setup Required
```
* Open the PLIN configuration software on your PC. The software is usually provided by the manufacturer of the PLIN device.
* Establish connection between the software and the PLIN using the "Connect" option.
* Set the baud rate to 9600 and select mode as Slave.
* Ensure all connections are secure and properly plugged into their respective connectors on both the PLIN device and the board.
* While running Lin_Example_SendData example, make sure to configure the LIN frames 20h and 30h as Publisher in the PLIN configuration software.
#### Lin_Example_Init_Sleep_Wakeup
##### Overview Of Lin_Example_Init_Sleep_Wakeup
* **Lin_Example_Init_Sleep_Wakeup**
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes Lin Tx and Rx Pins, and UART Pins using Port_Init()
* Lin_Init will Initializes the Lin Driver on LINA instance.
* Lin_CheckWakeUp_and_Sleep_Internal
* Lin_GoToSleepInternal will move the Lin module to internal sleep.
* Lin_WakeupInternal will wake up Lin module from internal sleep.
* Lin_CheckWakeUp_and_Sleep
* Lin_GoToSleep will send Lin module to sleep by sending Go to sleep command on Lin Bus
* Lin_Wakeup will move Lin Module to wake up state by sending Wake up command on Lin Bus
* Lin_GetStatus will return the current status of the Lin Driver
##### Setup required to run Lin_Example_Init_Sleep_Wakeup
##### How to run Lin_Example_Init_Sleep_Wakeup
* Open CCS and import Lin Example
* Build project and start debug project
##### Sample Log of Lin_Example_Init_Sleep_Wakeup
```{literalinclude} Assets/text/Lin/F29H85x/Lin_Example_Init_Sleep_Wakeup.txt
```
#### Lin_Example_SendData
##### Overview Of Lin_Example_SendData
* **Lin_Example_SendData**
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes Lin Tx and Rx Pins, and UART Pins using Port_Init()
* Lin_Init and Lin_WakeupInternal Will initialize the Lin Module and will update the channel state to active
* LinSendFrame_Master_Response will Send header and data to Slave 1.
* LinSendFrame_Slave_Response will send header and expects data from Slave 1.
* LinSendFrame_Slave_To_Slave will send header ( Slave 1 will send data to Slave 2 ).
##### Setup required to run Lin_Example_SendData
* Install PLIN tool to configure as Slaves.
##### How to run Lin_Example_SendData
* Open CCS and import Lin Example
* Build project and start debug project
* Data On Lin Bus can be seen on PLIN Tool
##### Sample Log of Lin_Example_SendData
```{literalinclude} Assets/text/Lin/F29H85x/Lin_Example_SendData.txt
```
#### Lin_Example_Sleep_Wakeup_Interrupt
##### Overview Of Lin_Example_Sleep_Wakeup_Interrupt
* **Lin_Example_Sleep_Wakeup_Interrupt**
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes Lin Tx and Rx Pins, and UART Pins using Port_Init()
* Lin_Init will initialize the Lin Module
* Lin_CheckWakeUp_and_Sleep
* Lin_GoToSleep will send go to sleep command to Lin Bus. Lin state is SLEEP.
* Waits for Wake Up pulse for WakeUp Interrupt to trigger. ( Need to send wakeup pulse on LIN BUS )
* Lin_CheckWakeup will check if wake up request has been received.
* Lin_GetStatus will check if after wake up channel state is again Operational i.e. Wake Up success.
##### Setup required to run Lin_Example_Sleep_Wakeup_Interrupt
* Install PLIN tool to configure as Slave.
##### How to run Lin_Example_Sleep_Wakeup_Interrupt
* Open CCS and import Lin Example
* Build project and start debug project
* Send wakeup pulse from PLIN Tool when lin is in sleep
##### Sample Log of Lin_Example_Sleep_Wakeup_Interrupt
```{literalinclude} Assets/text/Lin/F29H85x/Lin_Example_Sleep_Wakeup_Interrupt.txt
```
#### File Structure
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂Can\
┃ ┣ 📂DeviceSupport\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂**Lin**\
┃ ┃ ┣ 📂**Lin_Example_Init_Sleep_Wakeup**\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜**Lin_Example_Init_Sleep_Wakeup.projectspec**\
┃ ┃ ┃ ┣ 📂Lin_Example_Init_Sleep_Wakeup_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Lin.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port.xdm\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Lin_Cfg.h** : *Contains the generated pre-compiler configuration header*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Lin_PBcfg.c** : *Contains the Post build configuration parameters*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBcfg.c\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┃ ┗ 📜**Lin_Example_Init_Sleep_Wakeup.c** : *Int Sleep Wakeup Example application for Lin*\
┃ ┃ ┣ 📂**Lin_Example_SendData**\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜**Lin_Example_SendData.projectspec**\
┃ ┃ ┃ ┣ 📂Lin_Example_SendData_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Lin.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port.xdm\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Lin_Cfg.h** : *Contains the generated pre-compiler configuration header*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Lin_PBcfg.c** : *Contains the Post build configuration parameters*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBcfg.c\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┃ ┗ 📜**Lin_Example_SendData.c** : *Send Data Example application for Lin*\
┃ ┃ ┗ 📂**Lin_Example_Sleep_Wakeup_Interrupt**\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜**Lin_Example_Sleep_Wakeup_Interrupt.projectspec**\
┃ ┃ ┃ ┣ 📂Lin_Example_Sleep_Wakeup_Interrupt_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Lin.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port.xdm\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Lin_Cfg.h** : *Contains the generated pre-compiler configuration header*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Lin_PBcfg.c** : *Contains the Post build configuration parameters*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBcfg.c\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┃ ┗ 📜**Lin_Example_Sleep_Wakeup_Interrupt.c** : *Wakeup Interrupt Example application for Lin*\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
## MCU Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|RTE|Runtime Environment|
|BSW|Basic Software|
|MCU|Micro-Controller Unit|
|MCAL|Micro-Controller Abstraction Layer|
|API|Application Programming Interface|
|DET|Default Error Tracer|
|HW |Hardware|
|SW |Software|
|I/O|Input/Output|
### Introduction
The MCU module initializes, configures and controls the internal hardware to realize MCU driver as detailed in AUTOSAR BSW MCU Driver Specification.
The MCU functionality is realized through the CLOCK IP available on the device. Following sections highlight key aspects of this implementation which would be of interest to an integrator.
```{figure} Assets/images/Mcu_Autosar_MCAL.png
:alt: MCU MCAL AUTOSAR
:align: center
MCU MCAL AUTOSAR
```
This document details AUTOSAR BSW MCU module implementation
|Supported AUTOSAR Release|**4.3.1**|
|------|-------------|
| **Supported Configuration Variants** | **Pre-Compile & Post Build**|
| **Vendor ID** | **MCU_VENDOR_ID (44)**|
| **Module ID** | **MCU_MODULE_ID (101)**|
### Functional Overview
The MCU driver provides services for basic micro-controller initialization, reduced power modes, clock initialization, reset and micro-controller specific functions required by other MCAL software modules. The MCU Driver abstracts the access to the micro-controller’s hardware pins.
* Initialization of MCU clock, PLL, Clock pre-scalers and MCU clock distribution.
* Initialization of MCU RAM sections.
* Activation of MCU reduced power modes.
* Activation of a MCU reset.
* Provides a service to get the reset reason from hardware.
* Support of External clock output (XCLKOUT) feature to observe a clock directly for debug and testing purposes
* Provides a service to get the system clock used by the hardware.
### Hardware Features
#### Hardware Features supported
The main features includes Clocking, Low Power Modes, Resets functionality and Ram initialization. Details are explained in below sections.
##### Clocking functionality
The below figure provides an overview of the device clocking system.
```{figure} Assets/images/Mcu_Clocking_Details.png
:alt: MCU CLOCKING
:align: center
MCU CLOCKING
```
```{Note}
The diagram shown above may vary depending on the specific device being used. For accurate and up-to-date information, please consult the device's TRM.
```
###### Primary Internal Oscillator (INTOSC2)
At power-up, the device is clocked from an on-chip 10 MHz oscillator (INTOSC2). INTOSC2 is the primary
internal clock source, and is the default system clock at reset.
###### Backup Internal Oscillator (INTOSC1)
The device also includes a redundant on-chip 10 MHz oscillator (INTOSC1). INTOSC1 is a backup clock source
that normally only clocks the watchdog timers and missing clock detection circuit (MCD).
###### External Oscillator (XTAL)
The dedicated X1 and X2 pins support an external clock source (XTAL), which can be used as the main system
The clock sources discussed above can be multiplied (via PLL) and divided down to produce the desired clock frequencies for the application
###### Oscillator Clock (OSCCLK)
One of INTOSC2, XTAL, or INTOSC1 must be chosen to be the controller reference clock (OSCCLK) for the
CPU and most of the peripherals. OSCCLK can be used directly or applied through the system PLL to reach a
higher frequency. At reset, OSCCLK is the default system clock and is connected to INTOSC2.
###### System PLL Output Clock (PLLRAWCLK)
The system PLL allows the device to run at the maximum rated operating frequency, and in most applications
generates the main system clock. This PLL uses OSCCLK as a reference, and features a fractional multiplier
and slip detection
###### PLL
The PLL is responsible for synthesizing an output frequency from the input clock (from the oscillator). The PLL divides the reference input for a lower frequency input into the PLL by (reference divider + 1). Then multiplies this internal frequency by Integer multiplier to get the VCO output clock. The PLL output is divided by (output divider + 1) to generate PLLRAWCLK that is further divided by system clock divider to generate PLLSYSCLK.
The generated system clock should not exceed more than the maximum supported frequency 200 MHZ.
###### MCAN Bit Clock
The bit clock can also be connected to PLLCLK or AUXCLKIN via the CLKSRCCTL2 register. There is an independent selection for each MCAN bit clock source.
###### CPU Timer2 Clock (TIMER2CLK)
Timer 2 is connected to CPUx.SYSCLK by default, but can also be connected to INTOSC1, INTOSC2, XTAL TMR2CLKCTL register. This register also provides a separate prescale divider for timer 2.
###### External Clock Output (XCLKOUT)
It is sometimes necessary to observe a clock directly for debug and testing purposes. The external clock output
(XCLKOUT) feature supports this by connecting a clock to external pins GPIO73. The available
clock sources are PLLSYSCLK, PLLRAWCLK, XTAL, INTOSC1 and INTOSC2.
To use XCLKOUT, first select the clock source via the CLKSRCCTL3 register. Next, select the desired output
divider via the XCLKOUTDIVSEL register. Finally, connect either GPIO73 using the GPIO configuration registers
##### Resets
The below resets explains the types and effects of the different resets on this device.
###### External Reset (XRS)
The external reset (XRS) is the main chip-level reset for the device. XRS resets all CPUs, HSM , all
peripherals and I/O pin configurations, and most of the system control registers.The XRSn bit in the RESC register is set whenever XRS is driven low for any reason. This bit is then cleared by the boot ROM.
###### Simulate External Reset
In some cases to simulate the external reset (XRS) in software, set the XRSn bit to 1 in the SIMRESET register
using CPU1 software. This toggles the XRS pin; hence, the full device resets (just like an external reset).
After this reset, the SIMRESET_XRSn bit in the RESC register is set. Software can read this bit to know the
cause of reset and clear the status by writing a 1 into the corresponding bit in the RESCCLR register
###### Power-On Reset (POR)
The power-on reset (POR) circuit creates a clean reset throughout the device during power-up. A POR resets everything that XRS does, along with the register – the reset cause register (RESC).
After a POR, the POR and XRSn bits in RESC are set. These bits are then cleared by the boot ROM.
###### Watchdog Reset (WDRS)
Each CPU has a watchdog timer that can optionally trigger a reset that lasts for 512 INTOSC1 cycles.
After a watchdog reset, the WDRSn bit in the RESC register is set. Software can read this bit to know the cause
of reset and clear the status by writing a 1 into the corresponding bit in the RESCCLR register
##### Low Power Modes Activation
The device has two clock-gating, low-power modes. All low-power modes are entered by setting the LPMCR register and executing the IDLE instruction.
###### IDLE
IDLE is a standard feature of the CPU. In this mode, the CPU clock is gated while all peripheral clocks are left running.
Any enabled interrupt wakes up the CPU from IDLE mode. To enter IDLE mode, set LPMCR.LPM to 0x0 and execute the IDLE instruction
###### STANDBY
STANDBY is a more aggressive low-power mode that gates both the CPU clock and any peripheral clocks
derived from the CPU SYSCLK or PLLSYSCLK.
STANDBY is good for an application where the wake-up signal comes from an external system (or CPU subsystem) rather than a peripheral input.
An NMI (or optionally) any interrupt or a configured GPIO can wake the CPU from STANDBY mode. Each GPIO from GPIO0-63 can be configured to wake the CPU when the GPIO are driven active low
###### Configuring IDLE or STANDBY Mode in EB Tresos
The low power mode is selected using the **`McuMode`** parameter inside **`McuModeSettingConf`** in EB Tresos:
| `McuMode` value | Mode activated |
|:---------------:|:--------------:|
| `0` | IDLE |
| `1` | STANDBY |
##### Ram Initialization
The RAM Memory sections can be filled from any base address up to the section size with the byte value specified in the default value, writing a specified number of bytes at once (1, 2, 4, or 8 bytes) as defined by the write size. The Base Address, Section Size, Default Value, and Write Size are configuration parameters for each RAM section
```{Note}
Refer Device Data sheet for memory sections
```
##### CPU1 Lockstep Mode
The F29H85x device supports CPU lockstep mode, where CPU1 and CPU2 can operate in a redundant comparison mode for safety-critical applications. When lockstep mode is enabled, both CPUs execute identical instructions simultaneously, and their outputs are continuously compared.
###### Lockstep Mode Overview
**Lockstep Configuration:**
* Configured via the **CPU1_Lockstep** parameter in ResourceAllocator module
* Initialized during `Mcu_Init()`
**When Lockstep is Enabled:**
* CPU1 and CPU2 execute the same instructions in parallel
* Outputs from both CPUs are compared cycle-by-cycle
* Any mismatch between CPU1 and CPU2 outputs triggers a safety response
* Provides hardware-level redundancy for functional safety applications
**When Lockstep is Disabled:**
* CPU1 and CPU2 operate independently (if CPU2 is available)
* Each CPU can execute different code
* Suitable for non-safety-critical or multi-core applications
###### Lockstep Configuration
The lockstep mode is configured in the ResourceAllocator module and applied during MCU initialization.
**Configuration Path:** ResourceAllocator → ResourceAllocatorGeneral → CPU1_Lockstep
**Available Options:**
* **true**: Enable lockstep mode
* **false**: Disable lockstep mode (default)
```{warning}
Lockstep mode can only be enabled when CPU2 is available for the selected device variant. Attempting to enable lockstep without CPU2 will result in a configuration error.
```
###### Peripheral Clock Gating with CPUSEL
In addition to lockstep configuration, the MCU module configures peripheral clock gating based on CPU selection (CPUSEL). Each peripheral can be assigned to a specific CPU core, controlling which CPU has access to that peripheral.
**CPUSEL Configuration:**
* Configured in ResourceAllocator via the Context and Core parameters
* Automatically assigned based on the context under which the peripheral is defined
* Written to peripheral configuration registers during `Mcu_Init()`
```{seealso}
For CPUSEL and FRAMESEL configuration details, refer to the [ResourceAllocator User Guide](Module_User_Guide_ResourceAllocator.md#frame-selection-framesel).
```
#### Not supported Features
None
#### Non compliance
Below AUTOSAR design requirements are not supported for Mcu Driver :\
**SWS_Mcu_00216** : *Mcu_Lcfg.c shall include Mcu_Cbk.h for a link time configuration*
>Rejection Reason : Callback functions are not required in Mcu module and Mcu module doesn't have any Link Time configuration input file, it only supports Pre-Compile and Mcu-Build configurations.
**SWS_Mcu_00218** : *Mcu_PBcfg.c shall include Mcu_Cbk.h for post build time configuration*
>Rejection Reason : Callback functions are not required in Mcu module.
For more details, Refer [AUTOSAR_SWS_McuDriver](https://www.autosar.org/fileadmin/standards/R4.3.1/CP/AUTOSAR_SWS_MCUDriver.pdf)
### Source files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂Can\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂hw_include\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Port\
┃ ┗ 📂**Mcu**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Mcu.h** : *Contains the API declarations of the Mcu driver to be used by upper layers.*\
┃ ┃ ┃ ┗ 📜**Mcu_Priv.h** : *Contains data structures and Internal function declarations.*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Mcu.c** : *Contains the implementation of the API for Mcu driver.*\
┃ ┃ ┃ ┗ 📜**Mcu_Priv.c** : *Contains Functions that support the API for Mcu driver*\
┃ ┃ ┗ 📜CMakeLists.txt\
┣ 📂examples\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{figure} Assets/images/Mcu_Header_File_Structure.png
:alt: Mcu Header File Structure
:align: center
Mcu Header File Structure
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Scheduling
None
#### Error handling
##### Development Error Reporting
Development errors are reported to the DET using the service Det_ReportError(), when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
##### Extended Production Error Reporting
Extended production errors are reported to the DEM using the service Dem_SetEventStatus(),
when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
#### Error codes
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|API parameter checking: Mcu_init service called with invalid config parameter|MCU_E_PARAM_CONFIG|0x0A|
|API parameter checking: McuInitClock service called with invalid ClockSetting parameter|MCU_E_PARAM_CLOCK|0x0B|
|API parameter checking: Mcu_SetMode service called with invalid McuMode parameter|MCU_E_PARAM_MODE|0x0C|
|API parameter checking: Mcu_InitRamSection service called with invalid Ram Section parameter|MCU_E_PARAM_RAMSECTION|0x0D|
|Mcu_DistributePllClock service checks PLL lock status|MCU_E_PLL_NOT_LOCKED|0x0E|
|API invoked without performing Mcu_init|MCU_E_UNINIT|0x0F|
|API called with a NULL_PTR|MCU_E_PARAM_POINTER|0x10|
|API called without performing Mcu_InitClock|MCU_E_UNINIT_CLOCK|0x12|
### Safety Mechanism
|TI Diagnostic Unique Identifier| Summary | Description |
|------------|-----------------|----------------|
|RST2|Reset Cause Information| Reset cause information is provided by API Mcu_GetResetReason and Error detection are Reported to DET |
|RST9|Peripheral Soft Reset | Peripheral soft resets are performed by API Mcu_InitClock and Error detection are Reported to DET |
|SYS2|Lock Mechanism for Control Registers| Lock mechanism for clock & peripheral config critical registers is provided in driver code with enable/disable option |
|CLK5|External monitoring of clock via XCLKOUT| External monitoring of clock is provided by API Mcu_InitClock in driver code with enable/disable option |
|CLK14|Peripheral Clock Gating | Peripheral soft resets are performed by API Mcu_InitClock and Error detection are Reported to DET |
```{NOTE}
More details of Safety Mechanisms can be found in Safety Manual.
```
### Silicon errata workarounds and recommendation
For detailed silicon errata, refer to the [F29H85x, F29P58x, and F29P32x Real-Time MCUs Silicon Errata](https://www.ti.com/lit/er/sprz569c/sprz569c.pdf).
| Advisory | Workaround in MCAL driver | Recommended actions for user |
|----------|--------------------------|-------------------------------|
| System: Issuing device reset (XRSn) can cause unexpected fault if SYSCLKDIVSEL.PLLSYSCLKDIV = 0 | No workaround is implemented in the Mcu driver. The configurator tool provides a warning whenever the user configures SYSCLKDIVSEL.PLLSYSCLKDIV = 0 (divide by 1) | Avoid configuring SYSCLKDIVSEL.PLLSYSCLKDIV = 0 (divide by 1); use 1 (divide by 2) or a higher divider value instead. |
| MCD: Missing Clock Detect should be disabled when the PLL is enabled (PLLCLKEN = 1) | The Mcu driver implements the workaround by disabling MCD (MCDCR.MCLKOFF = 1) before enabling the PLL. | No additional user action is required when PLL is enabled through the Mcu driver |
### Used resources
#### Interrupt Handling
There are no Interrupts in Mcu
#### Instance support
|CPU instances|supported|
|-------|-------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
#### Hardware-Software Mapping
Below image shows Mcu driver Hardware-Software mapping. For more information related to HW/SW mapping, refer the F29 Reference Manual.
```{figure} Assets/images/Mcu_HW_SW_Mapping.png
:alt: Mcu HW/SW Mapping
:align: center
Mcu HW/SW Mapping
```
### Integration description
#### Dependent modules
##### DET
This implementation depends on the DET in order to report development errors
The detection of development errors is configurable (ON / OFF), The switch MCU_CFG_DEV_ERROR_DETECT will activate or deactivate the detection of all development errors.
##### DEM
This implementation depends on the DEM in order to report Extended production errors and can be turned OFF. The switch MCU_CFG_DEM_ENABLE will activate or deactivate the detection of all extended production errors. If clock failure notification is enabled in the configuration set and a clock source failure error occurs, the error code MCU_E_CLOCK_FAILURE shall be reported.
##### SchM
If multiple AUTOSAR runnables have access to the same Data Store Memory block, the exported AUTOSAR specification enforces data consistency by using an AUTOSAR exclusive area. With this specification, the runnables have mutually exclusive access to the per-instance memory global data, which prevents data corruption. Beside the OS, the BSW Scheduler provides functions that MCU module calls at begin and end of critical sections. This implementation requires 1 level of exclusive access to guard critical sections.
The data consistency mechanism that has to be applied to an ExclusiveArea might be domain, ECU or even project specific. The decision which mechanism has to be applied by RTE / Basic Software Scheduler is taken during ECU integration by setting the Exclusive Area configuration parameter **RteExclusiveAreaImplMechanism**. This parameter is an input for RTE generator.
For MCU Module, data consistency and exclusive access to critical sections are required for the following sections as shown in the table below:
| Exclusive Area Functions used | MCU Function calling Exclusive Area | Need for Exclusive Area | Recommended Exclusive Area Mapping |
|-------|-------|-------|-------|
|MCU_EXCLUSIVE_AREA_0| Mcu_GetSystemClock| To protect against multiple access for shared resources | **OS_RESOURCE** : If the MCU API is only called from pre-emptible task context, its recommended to use this mechanism as it takes care of resource access protection and task priority management.
**None**: If MCU API is only called from non pre-emptible task context or during init, its recommended to use this mechanism as multiple access protection to shared resource is not needed. |
#### Multi-core and Resource allocator
The MCU module is not managed by the Resource Allocator. The MCU driver handles system-level resources such as Clock configuration and Low Power Mode, which can only be performed from CPU1. These system-level resources are not represented in the Resource Allocator configuration. No Resource Allocator instance allocation is needed for the MCU module.
### Configuration
The Mcu Driver implementation supports multiple configuration variants, namely Mcu Post-Build config and Pre-Compile config. The driver expects generated **Mcu_cfg.h** to be present as input file.
The associated Mcu driver configuration generated source files are **Mcu_Cfg.c** or
**Mcu_PBcfg.c**
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files.
#### Configuration Parameters
##### McuGeneralConfiguration
This container contains the configuration (parameters) of the MCU driver.
###### McuDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | McuDevErrorDetect |
| **Description** | Switches the development error detection and notification on or off. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### McuClockConfigLockCriticalRegisters
| Item ||
|--------|---------------|
| **Name** | McuClockConfigLockCriticalRegisters |
| **Description** | Switches the Lock for clock configuration critical registers on or off. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### McuCpuPeripheralConfigLockCriticalRegisters
| Item ||
|--------|---------------|
| **Name** | McuCpuPeripheralConfigLockCriticalRegisters |
| **Description** | Switches the Lock for cpu peripheral configuration critical registers on or off. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### McuCpuSystemLockCriticalRegisters
| Item ||
|--------|---------------|
| **Name** | McuCpuSystemLockCriticalRegisters |
| **Description** | Switches the Lock for cpu system critical registers on or off. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### McuGetRamStateApi
| Item ||
|--------|---------------|
| **Name** | McuGetRamStateApi |
| **Description** | Pre-processor switch to enable/disable the API Mcu_GetRamState. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuInitClock
| Item ||
|--------|---------------|
| **Name** | McuInitClock |
| **Description** | If this parameter is set to FALSE, the clock initialization has to be disabled from the MCU driver. This concept applies when there are some write once clock registers and a bootloader is present. If this parameter is set to TRUE, the MCU driver is responsible of the clock initialization. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuNoPll
| Item ||
|--------|---------------|
| **Name** | McuNoPll |
| **Description** | This parameter shall be set True, if the H/W does not have a PLL or the PLL circuitry is enabled after the power on without S/W intervention. In this case MCU_DistributePllClock has to be disabled and MCU_GetPllStatus has to return MCU_PLL_STATUS_UNDEFINED. Otherwise this parameters has to be set False |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPerformResetApi
| Item ||
|--------|---------------|
| **Name** | McuPerformResetApi |
| **Description** | Pre-processor switch to enable / disable the use of the function Mcu_PerformReset() |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | McuVersionInfoApi |
| **Description** | Pre-processor switch to enable / disable the API to read out the modules version information. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
##### McuModuleConfiguration
This container contains the configuration (parameters) of the MCU driver
###### McuClockSrcFailureNotification
| Item ||
|--------|---------------|
| **Name** | McuClockSrcFailureNotification |
| **Description** | Enables/Disables clock failure notification. In case this feature is not supported by HW the setting should be disabled. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | DISABLED |
| **Range** | DISABLED
ENABLED |
###### McuNumberOfMcuModes
| Item ||
|--------|---------------|
| **Name** | McuNumberOfMcuModes |
| **Description** | This parameter shall represent the number of Modes available for the MCU. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 255 |
| **Min-value** | 1 |
###### McuRamSectors
| Item ||
|--------|---------------|
| **Name** | McuRamSectors |
| **Description** | This parameter shall represent the number of RAM sectors available for the MCU. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### McuResetSetting
| Item ||
|--------|---------------|
| **Name** | McuResetSetting |
| **Description** | This parameter relates to the MCU specific reset configuration. This applies to the function Mcu_PerformReset, which performs a microcontroller reset using the hardware feature of the microcontroller. |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 255 |
| **Min-value** | 1 |
###### McuClockSettingConfig
This container contains the configuration (parameters) for the Clock settings of the MCU. Please see MCU031 for more information on the MCU clock settings.
###### McuClockSettingId
| Item ||
|--------|---------------|
| **Name** | McuClockSettingId |
| **Description** | The Id of this McuClockSettingConfig to be used as argument for the API call "Mcu_InitClock". |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### McuClockReferencePoint
This container defines a reference point in the Mcu Clock tree. It defines the frequency which then can be used by other modules as an input value. Lower multiplicity is 1, as even in the simplest case (only one frequency is used), there is one frequency to be defined.
###### McuClockReferencePointFrequency
| Item ||
|--------|---------------|
| **Name** | McuClockReferencePointFrequency |
| **Description** | This is the frequency for the specific instance of the McuClockReferencePoint container. It shall be given in Hz. This will not be autocalulated based on the configured divider. The user has to take care of calculating the value based on the clock source and divider value |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 2.0E8 |
| **Max-value** | INF |
| **Min-value** | 0.0 |
###### McuClkConfig
Device specific clock settings
###### McuClockSource
| Item ||
|--------|---------------|
| **Name** | McuClockSource |
| **Description** | Configures the clock source. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MCU_CLKSRC_XTAL |
| **Range** | MCU_CLKSRC_OSC2
MCU_CLKSRC_OSC1
MCU_CLKSRC_XTAL
MCU_CLKSRC_XTAL_SE |
###### McuExternalClkFreq
| Item ||
|--------|---------------|
| **Name** | McuExternalClkFreq |
| **Description** | Frequency of the external clock source (XTAL) in Hz. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 20000000 |
| **Max-value** | 25000000 |
| **Min-value** | 10000000 |
###### McuSysClkDiv
| Item ||
|--------|---------------|
| **Name** | McuSysClkDiv |
| **Description** | Configures the System Clock Divider. Value should be 1 or even value up to 64. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 2 |
| **Max-value** | 64 |
| **Min-value** | 1 |
###### McuHsmClkDiv
| Item ||
|--------|---------------|
| **Name** | McuHsmClkDiv |
| **Description** | Configures the HSM Clock Divider. Value should be 1 or even value up to 16. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MCU_HSMCLK_DIV_16 |
| **Range** | MCU_HSMCLK_DIV_1
MCU_HSMCLK_DIV_2
MCU_HSMCLK_DIV_4
MCU_HSMCLK_DIV_8
MCU_HSMCLK_DIV_16 |
###### McuEpwmClkDiv
| Item ||
|--------|---------------|
| **Name** | McuEpwmClkDiv |
| **Description** | Configures the EPWM Clock Divider. Value should be 1 or 2. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MCU_EPWMCLK_DIV_2 |
| **Range** | MCU_EPWMCLK_DIV_1
MCU_EPWMCLK_DIV_2 |
###### McuEmifClkDiv
| Item ||
|--------|---------------|
| **Name** | McuEmifClkDiv |
| **Description** | Configures the EMIF Clock Divider. Value should be 1 or 2 or 4. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MCU_EMIFCLK_DIV_2 |
| **Range** | MCU_EMIFCLK_DIV_1
MCU_EMIFCLK_DIV_2
MCU_EMIFCLK_DIV_4 |
###### McuLinClkConfig
Device specific Lin clock settings
###### McuLinInstance
| Item ||
|--------|---------------|
| **Name** | McuLinInstance |
| **Description** | Configures the Instance ID for Lin module. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MCU_LIN_A |
| **Range** | MCU_LIN_A
MCU_LIN_B |
###### McuLinClkDiv
| Item ||
|--------|---------------|
| **Name** | McuLinClkDiv |
| **Description** | Configures the Lin Clock Divider. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MCU_LINCLK_DIV_2 |
| **Range** | MCU_LINCLK_DIV_1
MCU_LINCLK_DIV_2
MCU_LINCLK_DIV_4 |
###### McuMCanClkConfig
Device specific MCan clock settings
###### McuMCanInstance
| Item ||
|--------|---------------|
| **Name** | McuMCanInstance |
| **Description** | Configures the Instance ID for MCan module. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MCU_MCAN_A |
| **Range** | MCU_MCAN_A
MCU_MCAN_B
MCU_MCAN_C
MCU_MCAN_D
MCU_MCAN_E
MCU_MCAN_F |
###### McuMCanClockSource
| Item ||
|--------|---------------|
| **Name** | McuMCanClockSource |
| **Description** | Configures the clock source for MCan module. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MCU_MCANCLKSRC_PERxSYSCLK |
| **Range** | MCU_MCANCLKSRC_PERxSYSCLK
MCU_MCANCLKSRC_AUXCLKIN
MCU_MCANCLKSRC_PLLRAWCLK |
###### McuMCanClkDiv
| Item ||
|--------|---------------|
| **Name** | McuMCanClkDiv |
| **Description** | Configures the MCan Clock Divider. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MCU_MCANCLK_DIV_20 |
| **Range** | MCU_MCANCLK_DIV_1
MCU_MCANCLK_DIV_2
MCU_MCANCLK_DIV_3
MCU_MCANCLK_DIV_4
MCU_MCANCLK_DIV_5
MCU_MCANCLK_DIV_6
MCU_MCANCLK_DIV_7
MCU_MCANCLK_DIV_8
MCU_MCANCLK_DIV_9
MCU_MCANCLK_DIV_10
MCU_MCANCLK_DIV_11
MCU_MCANCLK_DIV_12
MCU_MCANCLK_DIV_13
MCU_MCANCLK_DIV_14
MCU_MCANCLK_DIV_15
MCU_MCANCLK_DIV_16
MCU_MCANCLK_DIV_17
MCU_MCANCLK_DIV_18
MCU_MCANCLK_DIV_19
MCU_MCANCLK_DIV_20 |
###### McuCpuTimerClkConfig
Device specific CPU Timer clock settings
###### McuCpuTimer2ClockSource
| Item ||
|--------|---------------|
| **Name** | McuCpuTimer2ClockSource |
| **Description** | Configures the clock source for CpuTimer 2 module. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MCU_CPUTIMERCLKSRC_SYSCLK |
| **Range** | MCU_CPUTIMERCLKSRC_SYSCLK
MCU_CPUTIMERCLKSRC_INTOSC1
MCU_CPUTIMERCLKSRC_INTOSC2
MCU_CPUTIMERCLKSRC_XTAL |
###### McuCpuTimer2ClkDiv
| Item ||
|--------|---------------|
| **Name** | McuCpuTimer2ClkDiv |
| **Description** | Configures the CpuTimer 2 prescalar. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 5 |
| **Min-value** | 1 |
###### McuExternalClkOutConfig
Device specific External clock output settings
###### McuExternalClockOut
| Item ||
|--------|---------------|
| **Name** | McuExternalClockOut |
| **Description** | External Clock output Enable flag. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuExternalClockOutSource
| Item ||
|--------|---------------|
| **Name** | McuExternalClockOutSource |
| **Description** | Configures the clock source for External clock output module. |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MCU_XCLKOUTSRC_PLLSYS |
| **Range** | MCU_XCLKOUTSRC_PLLSYS
MCU_XCLKOUTSRC_CPU1CLK
MCU_XCLKOUTSRC_CPU2CLK
MCU_XCLKOUTSRC_CPU3CLK
MCU_XCLKOUTSRC_INTOSC1
MCU_XCLKOUTSRC_INTOSC2
MCU_XCLKOUTSRC_XTALOSC |
###### McuExternalClkOutDiv
| Item ||
|--------|---------------|
| **Name** | McuExternalClkOutDiv |
| **Description** | Configures the External clock output divider. |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MCU_XCLKOUT_DIV_8 |
| **Range** | MCU_XCLKOUT_DIV_1
MCU_XCLKOUT_DIV_2
MCU_XCLKOUT_DIV_4
MCU_XCLKOUT_DIV_8 |
###### McuEthercatClkConfig
Device specific Ethercat clock settings
###### McuEthercatPhyClkEnable
| Item ||
|--------|---------------|
| **Name** | McuEthercatPhyClkEnable |
| **Description** | Ethercat Clock Enable value. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MCU_ECAT_PHYCLK_ENABLE |
| **Range** | MCU_ECAT_PHYCLK_ENABLE
MCU_ECAT_PHYCLK_DISABLE |
###### McuEthercatClkDiv
| Item ||
|--------|---------------|
| **Name** | McuEthercatClkDiv |
| **Description** | Configures the Ethercat clock divider. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MCU_ECATCLKOUT_DIV_8 |
| **Range** | MCU_ECATCLKOUT_DIV_1
MCU_ECATCLKOUT_DIV_2
MCU_ECATCLKOUT_DIV_3
MCU_ECATCLKOUT_DIV_4
MCU_ECATCLKOUT_DIV_5
MCU_ECATCLKOUT_DIV_6
MCU_ECATCLKOUT_DIV_7
MCU_ECATCLKOUT_DIV_8 |
###### McuPllConfig
Device specific PLL settings
###### McuPLLRefDiv
| Item ||
|--------|---------------|
| **Name** | McuPLLRefDiv |
| **Description** | Configures Reference Clock Divider. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 32 |
| **Min-value** | 1 |
###### McuPLLIntMult
| Item ||
|--------|---------------|
| **Name** | McuPLLIntMult |
| **Description** | Configures Integer Multiplier. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 30 |
| **Max-value** | 255 |
| **Min-value** | 4 |
###### McuPLLOutDiv
| Item ||
|--------|---------------|
| **Name** | McuPLLOutDiv |
| **Description** | Configures Output Clock Divider. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 3 |
| **Max-value** | 32 |
| **Min-value** | 1 |
###### McuPeripheralClock0
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock0 |
| **Description** | Device specific Peripheral Clock settings |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock1
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock1 |
| **Description** | Peripheral Clock Gating - EMIF |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock2
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock2 |
| **Description** | Device specific Peripheral Clock settings - EPWM |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock3
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock3 |
| **Description** | Device specific Peripheral Clock settings - ECAP |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock4
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock4 |
| **Description** | Device specific Peripheral Clock settings - EQEP |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock6
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock6 |
| **Description** | Device specific Peripheral Clock settings - SDFM |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock7
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock7 |
| **Description** | Device specific Peripheral Clock settings - SCI, UART |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock8
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock8 |
| **Description** | Device specific Peripheral Clock settings - SPI |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock9
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock9 |
| **Description** | Device specific Peripheral Clock settings - I2C |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock10
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock10 |
| **Description** | Device specific Peripheral Clock settings - CAN |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock13
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock13 |
| **Description** | Device specific Peripheral Clock settings - ADC |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock14
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock14 |
| **Description** | Device specific Peripheral Clock settings - CMPSS |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock16
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock16 |
| **Description** | Device specific Peripheral Clock settings- Buf DAC |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock17
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock17 |
| **Description** | Device specific Peripheral Clock settings - CLB |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock18
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock18 |
| **Description** | Device specific Peripheral Clock settings - FSI |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock19
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock19 |
| **Description** | Device specific Peripheral Clock settings - LIN |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock20
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock20 |
| **Description** | Device specific Peripheral Clock settings - PMBUS |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock21
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock21 |
| **Description** | Device specific Peripheral Clock settings - DCC |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock23
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock23 |
| **Description** | Device specific Peripheral Clock settings - EtherCAT |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock25
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock25 |
| **Description** | Device specific Peripheral Clock settings - HRCAL0,1,2 |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock27
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock27 |
| **Description** | Device specific Peripheral Clock settings - EPG |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock28
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock28 |
| **Description** | Device specific Peripheral Clock settings - ADCCHECKER |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock30
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock30 |
| **Description** | Device specific Peripheral Clock settings - SENT |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuPeripheralClock32
| Item ||
|--------|---------------|
| **Name** | McuPeripheralClock32 |
| **Description** | Device specific Peripheral Clock settings - WADI |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### McuDemEventParameterRefs
| Item ||
|--------|---------------|
| **Name** | McuDemEventParameterRefs |
| **Description** | Container for the references to DemEventParameter elements which shall be invoked using the API Dem_SetEventStatus in case the corresponding error occurs. The EventId is taken from the referenced DemEventParameter's DemEventId symbolic value. The standardized errors are provided in this container and can be extended by vendor-specific error references. |
| **Post-build-variant-multiplicity** | false |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### McuModeSettingConf
This container contains the configuration (parameters) for the Mode setting of the MCU. Please see MCU035 for more information on the MCU mode settings.
###### McuMode
| Item ||
|--------|---------------|
| **Name** | McuMode |
| **Description** | The parameter represents the MCU Mode settings. IDLE Mode :0, STANDBY mode :1 |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1 |
| **Min-value** | 0 |
###### McuQualPeriod
| Item ||
|--------|---------------|
| **Name** | McuQualPeriod |
| **Description** | The number of OSCCLK clock cycles used to qualify the selected inputs when waking from STANDBY mode. |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 2 |
| **Max-value** | 65 |
| **Min-value** | 2 |
###### McuEnableWDWakeup
| Item ||
|--------|---------------|
| **Name** | McuEnableWDWakeup |
| **Description** | Enable/Disable using watchdog to wakeup from standby or halt mode |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### McuRamSectorSettingConf
This container contains the configuration (parameters) for the RAM Sector setting. Please see MCU030 for more information on RAM sec-tor settings.
###### McuRamDefaultValue
| Item ||
|--------|---------------|
| **Name** | McuRamDefaultValue |
| **Description** | This parameter shall represent the Data pre-setting to be initialized |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### McuRamSectionBaseAddress
| Item ||
|--------|---------------|
| **Name** | McuRamSectionBaseAddress |
| **Description** | This parameter shall represent the MCU RAM section base address |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### McuRamSectionSize
| Item ||
|--------|---------------|
| **Name** | McuRamSectionSize |
| **Description** | This parameter represents the MCU RAM Section size in bytes. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### McuRamSectionWriteSize
| Item ||
|--------|---------------|
| **Name** | McuRamSectionWriteSize |
| **Description** | This parameter shall define the size in bytes of data which can be written into RAM at once. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 8 |
| **Min-value** | 1 |
Refer [AUTOSAR_SWS_MCUDriver section: 10 Configuration specification](https://www.autosar.org/fileadmin/standards/R4.3.1/CP/AUTOSAR_SWS_MCUDriver.pdf) for configuration parameters details
#### Steps To Configure Mcu Module
1. Open EB Tresos configurator tool, load Mcu and Dem modules. Select the Config Variant ( Precompile/Post-Build)
2. Open DEM module plugin and register DEM event "MCU_E_CLOCK_FAILURE" to report extended production error if there are any clock failures
3. Open MCU module plugin and make sure that clock setting, ram sectors, power modes values are there and configurations are created with values
4. Make sure that clock configurations like clocksource, pll settings, peripheral clock gating, MCAN, LIN and other peripherals details are provided
5. Make sure that Low power configurations like mode type, Qualification period, Wdog wakeup flags are provided
6. Make sure that RAM section configurations like default value, section size, write size etc are provided (to test RAM init functionality)
7. Save the configuration and generate the configuration.
### Examples
The example application demonstrates use of Mcu module, the list below identifies key steps performed the example.
#### MCU_Example_Clock
##### Overview of MCU_Example_Clock
* Mcu_Example_Clock
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
* Validate the clock value from register values
* Measure the XCLKOUT hardware pin GPIO73 using Oscilloscope or logic analyzer and expected value to be 25Mhz
```{figure} Assets/images/Mcu_XCLK_Output.png
:alt: Mcu XCLK Output
:align: center
Mcu XCLK Output
```
##### Setup required to run MCU_Example_Clock
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
* Connect GPIO73 Pin to Oscilloscope or logic analyzer to trace the XCLKOUT frequency
##### How to run MCU_Example_Clock
* Open CCS and Import Mcu Clock example
* Build project and start debug project
##### Sample Log of MCU_Example_Clock
```{literalinclude} Assets/text/Mcu/Mcu_Example_Clock.txt
```
#### Mcu_Example_PowerMode
##### Overview of Mcu_Example_PowerMode
* Mcu_Example_PowerMode
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
* Activate low power modes (standby mode)
* Wakeup from standby mode using configured GPIO wakeup Pins
##### Setup required to run Mcu_Example_PowerMode
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
##### How to run Mcu_Example_PowerMode
* Open CCS and Import Mcu Powermode example
* Build project and start debug project
##### Sample Log of Mcu_Example_PowerMode
```{literalinclude} Assets/text/Mcu/Mcu_Example_PowerMode.txt
```
#### Mcu_Example_Ram
##### Overview of Mcu_Example_Ram
* Mcu_Example_Ram
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
* Initializes the Ram sectors
* Validate the Ram sectors
##### Setup required to run Mcu_Example_Ram
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
##### How to run Mcu_Example_Ram
* Open CCS and Import Mcu Ram example
* Build project and start debug project
##### Sample Log of Mcu_Example_Ram
```{literalinclude} Assets/text/Mcu/Mcu_Example_Ram.txt
```
#### Mcu_Example_Reset
##### Overview of Mcu_Example_Reset
* Mcu_Example_Reset
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
* Get reset reason value for POR, XRS and SW Resets
* Perform simulated external reset
##### Setup required to run Mcu_Example_Reset
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
##### How to run Mcu_Example_Reset
* Open CCS and Import Mcu Reset example
* Build project and start debug project
##### Sample Log of Mcu_Example_Reset
```{literalinclude} Assets/text/Mcu/Mcu_Example_Reset.txt
```
#### File Structure
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂Can\
┃ ┣ 📂DeviceSupport\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂Port\
┃ ┣ 📂**Mcu**\
┃ ┃ ┗ 📂 **📂Mcu_Example_Clock**\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜**📜Mcu_Example_Clock.projectspec**\
┃ ┃ ┃ ┣ 📂Mcu_Clock_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Port.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Mcu.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Mcu_Cfg.h** : *Contains the generated pre-compiler configuration header.*\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Port_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Mcu_PBcfg.c** : *Contains the Post build configuration parameters.*\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┗ ┗ 📜**Mcu_Example_Clock.c** : *Example application for Mcu*\
┃ ┗ 📜CMakeLists.txt\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{Note}
Either Mcu_PBcfg.c OR Mcu_Cfg.c will be present based on selected config variant by user
```
## PORT Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|RTE|Runtime Environment|
|BSW|Basic Software|
|GPIO|General Purpose Input Output|
|MCAL|Micro Controller Abstraction Layer|
|API|Application Programming Interface|
|DET|Default Error Tracer|
|HW |Hardware|
|SW |Software|
|I/O|Input/Output|
### Introduction
The Port driver module is an I/O driver in AUTOSAR Basic Software (BSW) layer. PORT driver provide the services for initializing the whole PORT structure of the microcontroller.
It is used to assign various functionalities to Port and port pins (e.g. GPIOs, ADC, SPI and other peripheral modes)
```{figure} Assets/images/Port_Autosar_MCAL.png
:alt: PORT MCAL AUTOSAR
:align: center
PORT MCAL AUTOSAR
```
This document details AUTOSAR BSW PORT module implementation
|Supported AUTOSAR Release|**4.3.1**|
|------|-------------|
| **Supported Configuration Variants** | **Pre-Compile & Post Build**|
| **Vendor ID** | **PORT_VENDOR_ID (44)**|
| **Module ID** | **PORT_MODULE_ID (124)**|
### Functional Overview
The Port module shall provide the service for initializing the whole PORT structure of the microcontroller. Many ports and port pins can be assigned to various functionalities, For e.g.
* General purpose I/O
* CAN
* SPI
* ADC
* LIN
etc
Up to twelve independent peripheral signals are multiplexed on a single GPIO-enabled pin in addition to the CPU-controlled I/O capability. Each pin output can be controlled by either a peripheral or one of the CPU controllers.
PORT driver module shall complete the overall configuration and initialization of the port structure which is used in other dependent driver modules. Therefore, other dependent modules driver works on pins and ports which are configured by the PORT driver. Hence PORT driver shall be initialized prior to use of other driver modules functions. Otherwise those functions might exhibit undefined behavior.
### Hardware Features
#### Hardware Features supported
Features Supported at a high level are:
* Configure each port and port pin (Input/Output, Pin driver characteristics).
* Set pins to an initial default value.
* Refresh the direction of the initial configuration.
* Switch the port pin configuration during runtime.
* Pin direction changeable during runtime.
* Port mode changeable during runtime.
##### Port Structure
For the device there are up to 8 Possible I/O Ports. Up to twelve independent peripheral signals are multiplexed on a single GPIO-enabled pin in addition to the CPU-controlled I/O capability.
Each pin output can be controlled by either a peripheral or one of the CPU controllers.
|Port | GPIO Number | Port ID |
|------|-------------|---------|
|Port A| 0 - 31 | 0 |
|Port B| 32 - 63 | 1 |
|Port C| 64 - 95 | 2 |
|Port D| 96 - 127 | 3 |
|Port E| 128 - 159 | 4 |
|Port F| 160 - 191 | 5 |
|Port G| 192 - 223 | 6 |
|Port H| 224 - 255 | 7 |
##### AIOs
Some GPIOs are multiplexed with analog pins and only have digital input functionality. These are also referred to as AIOs. Pins with only an AIO option on this port can only function in input mode. See the device data sheet for list of AIO signals. By default, these pins function as analog pins and the GPIOs are in a high-impedance state.
##### AGPIOs
Some GPIOs are multiplexed with analog pins and have digital input and output functionality. These are also referred to as AGPIOs. Unlike AIOs, AGPIOs have full input and output capability. By default, the AGPIOs are not connected and must be configured.
##### Input Qualification
The input qualification scheme has been designed to be very flexible. Input qualification can be configured by user using the configurator tool. In the case of a GPIO input pin, the qualification can be specified as only synchronized to SYSCLKOUT or qualification by a sampling window. For pins that are configured as peripheral inputs, the input can also be asynchronous in addition to synchronized to SYSCLKOUT or qualified by a sampling window. The remainder of this section describes the options available.
* No Synchronization (Asynchronous Input) : This mode is used for peripherals where input synchronization is not required or the peripheral itself performs the
synchronization. Examples include communication ports McBSP, SCI, SPI, and I2C. In addition, the ePWM trip zone (TZn) signals can function independent of the presence of SYSCLKOUT
* Synchronization to SYSCLKOUT Only : This is the default qualification mode of all the pins at reset. In this mode, the input signal is only synchronized to the system clock (SYSCLKOUT). Because the incoming signal is asynchronous, a SYSCLKOUT period of delay is needed for the input to the device to be changed. No further qualification is performed on the signal.
* Qualification Using a Sampling Window : In this mode, the signal is first synchronized to the system clock (SYSCLKOUT) and then qualified by a specified
number of cycles before the input is allowed to change. Two parameters are specified by the user for this type of qualification: (1) the sampling period, or how often the signal is sampled, and (2) the number of samples to be
taken.
```{NOTE}
Using input synchronization when the peripheral itself performs the synchronization can cause unexpected results. The user must make sure that the GPIO pin is configured for asynchronous in this case.
```
##### GPIO and Peripheral Muxing
Up to twelve different peripheral functions are multiplexed to each pin along with a general-purpose input/output (GPIO) function. This allows user to choose the peripheral mix and pinout that works best for your particular application.
```{NOTE}
Available Pin Packages:
Port Driver needs to be initialized as per the available pin package. Refer Device Data Sheet for details about available pin packages.
```
#### Not supported Features
* Out of total number of available pins for a particular pin package, there are few reserved/not configurable pins.
```{NOTE}
Refer Device Data Sheet for details about reserved/non-configurable pins for the respective pin package.
```
* Lock Configuration and Lock Commit configuration as not supported for the module
#### Non compliance
Below AUTOSAR design requirements are not supported/partially supported for Port Driver :\
**SWS_Port_00205** : *Port_Lcfg.c shall include Port_MemMap.h and Port.h*
>Rejection Reason : Port Driver doesn't have any Link Time configuration input file, it only supports Pre-Compile and Port-Build configurations.
**ECUC_Port_00127** : *Pin Id of the port pin. Range : 1 .. 65535*
>Partial Non Compliance Reason : In current implementation, Pin Id range starts from 0 instead of 1 as mapping of Pin Id to GPIOs starts from 0. Therefore Port Pin Id Range is 0 to Number of Pins in Pin package. i.e for 256 pin package , range will be 0-255.
**SWS_BSW_00042** : Detection of Development Errors: The detection and reporting of Development errors shall be performed only if the configuration parameter for detection of Development errors is set
>Partial Non Compliance Reason : Few Null pointer input parameter checks are needed irrespective of Development errors is set, to handle MISRA requirement.
For more details, Refer [AUTOSAR_SWS_PortDriver : Section: 5.1.2 : Header File Structure](https://www.autosar.org/fileadmin/standards/R4.3.1/CP/AUTOSAR_SWS_PortDriver.pdf)
### Source files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂Can\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂hw_include\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Mcu\
┃ ┗ 📂**Port**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Port.h** : *Contains the API declarations of the Port driver to be used by upper layers.*\
┃ ┃ ┃ ┣ 📜**Port_Pin_Map.h** : *Contains the MACROs to define GPIO MUX values.*\
┃ ┃ ┃ ┗ 📜**Port_Priv.h** : *Contains data structures and Internal function declarations.*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Port.c** : *Contains the implementation of the API for Port driver.*\
┃ ┃ ┃ ┗ 📜**Port_Priv.c** : *Contains Functions that support the API for Port driver*\
┃ ┃ ┗ 📜CMakeLists.txt\
┣ 📂examples\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{figure} Assets/images/Port_Header_File_Structure.png
:alt: Port Header File Structure
:align: center
Port Header File Structure
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Scheduling
None
#### Error handling
##### Development Error Reporting
Development errors are reported to the DET using the service Det_ReportError(), when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
#### Error codes
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|Invalid Port Pin ID requested.|PORT_E_PARAM_PIN|0x0A|
|Port Pin not configured as changeable.|PORT_E_DIRECTION_UNCHANGEABLE|0x0B|
|API Port_Init service called with wrong parameter.|PORT_E_INIT_FAILED|0x0C|
|API Port_SetPinMode service called when mode is unchangeable. Invalid Mode Passed|PORT_E_PARAM_INVALID_MODE|0x0D|
|API Port_SetPinMode service called when mode is unchangeable.|PORT_E_MODE_UNCHANGEABLE|0x0E|
|API service called without module initialization.|PORT_E_UNINIT|0x0F|
|API called with a Null Pointer.|PORT_E_PARAM_POINTER|0x10|
### Safety Mechanism
|TI Diagnostic Unique Identifier| Summary | Description |
|----|-----|-------|
|GPIO1|Lock Mechanism for Control Registers|Port Pins Pad control register configuration can be locked and locked configurations can be committed. If user calls Port_Init or Port_SetPinMode APIs after committing the locked configuration, it will result in DET error PORT_E_INIT_FAILED or PORT_PIN_MODE_UNCHANGEABLE respectively|
```{NOTE}
Locked Configurations can be committed by user during runtime. After committing the configurations, user won't be able to change the configurations during runtime. To change the configuration after committing, hard reset will be required.
More details of Safety Mechanisms can be found in Safety Manual.
```
### Used resources
#### Interrupt Handling
There are no Interrupts in Port
#### Instance support
|CPU instances|supported|
|-------|-------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
#### Hardware-Software Mapping
Below image shows Port driver Hardware-Software mapping. For more information related to HW/SW mapping, refer the F29x Reference Manual.
```{figure} Assets/images/Port_HW_SW_Mapping.png
:alt: Port HW/SW Mapping
:align: center
Port HW/SW Mapping
```
### Integration description
#### Dependent modules
##### DET
This implementation depends on the DET in order to report development errors
The detection of development errors is configurable (ON / OFF), The switch PORT_DEV_ERROR_DETECT will activate or deactivate the detection of all development errors.
##### SchM
If multiple AUTOSAR runnables have access to the same Data Store Memory block, the exported AUTOSAR specification enforces data consistency by using an AUTOSAR exclusive area. With this specification, the runnables have mutually exclusive access to the per-instance memory global data, which prevents data corruption. Beside the OS, the BSW Scheduler provides functions that PORT module calls at begin and end of critical sections.
This implementation requires 1 level of exclusive access to guard critical sections.
The data consistency mechanism that has to be applied to an ExclusiveArea might be domain, ECU or even project specific. The decision which mechanism has to be
applied by RTE / Basic Software Scheduler is taken during ECU integration by setting the Exclusive Area configuration parameter **RteExclusiveAreaImplMechanism**. This parameter is an input for RTE generator. \
For Port Module, data consistency and exclusive access to critical sections are required for the following sections as shown in the table below:
| Exclusive Area Functions used | Port Function calling Exclusive Area | Need for Exclusive Area | Recommended Exclusive Area Mapping |
|-------|-------|-------|-------|
|PORT_EXCLUSIVE_AREA_0 | Port_SetPinDirection
Port_RefreshPortDirection
Port_SetPinMode | To protect against multiple access for shared resources, *i.e. GPIO Data and Mode Registers*, which can lead to race condition | **OS_RESOURCE** : If the Port APIs are only called from pre-emptible task context, its recommended to use this mechanism as it takes care of resource access protection and task priority management.
**None**: If Port APIs are only called from non pre-emptible task context or during init, its recommended to use this mechanism as multiple access protection to shared resource is not needed. |
##### MCU
MCU Module is required to initialize all the clock to be used by different peripherals
#### Resource Allocator Integration
The Port module integrates with the Resource Allocator plugin to determine available pin configurations based on the selected device, package, and variant.
**How Port Uses Resource Allocator:**
1. **Device Selection**: The Resource Allocator configuration specifies the target device family (F29H85x, F29P32x, or F29P58x)
2. **Package Selection**: The selected pin package (e.g., 256-pin, 176-pin, 144-pin) determines which GPIO pins are physically available
3. **Variant Selection**: The device variant may affect available pin functionalities
**Configuration Dependency:**
When configuring the Port module in EB Tresos:
* The Resource Allocator plugin must be added and configured first
* The Port plugin reads the device and package information from Resource Allocator
* Available pin options in PortPinName and PortPinPeripheralSignal are filtered based on the selected package
* Only pins that exist on the selected package variant are shown as configurable options
**Multi-core Consideration:**
On F29H85x, PinMux configuration can only be performed from CPU1. Therefore, the Port module running on CPU1 sets the PinMux settings for all GPIO pins used across all CPU cores in the system. The **PortPinCoreSelect** parameter in the Port configuration specifies which CPU core owns each pin, but the actual PinMux register writes are always performed by CPU1.
**Benefits:**
* Prevents configuration of pins that don't exist on the target package
* Automatically filters peripheral mux options based on device capabilities
* Ensures generated configuration matches the physical device
```{NOTE}
The Resource Allocator plugin must be configured before the Port plugin to ensure correct pin availability filtering. Refer to the [Resource Allocator Module User Guide](./Module_User_Guide_ResourceAllocator.md) for configuration details.
```
### Configuration
The Port Driver implementation supports multiple configuration variants, namely Port Post-Build config and Pre-Compile config. The driver expects generated **Port_cfg.h** to be present as input file.
The associated Port driver configuration generated source files are **Port_Cfg.c** or
**Port_PBcfg.c**
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files.
```{Note}
Refer section [Getting Started with EB Tresos](./MCAL_Configuration_and_EB_Tresos.md#getting-started-with-eb-tresos) of Chapter **MCAL Configuration and EB Tresos** for more information on how to load plugin and generate the configuration files.
```
#### Configuration Parameters
##### PortConfigSet
This container contains the configuration parameters and sub containers of the AUTOSAR Port module.
###### PortContainer
Container collecting the PortPins.
###### PortNumberOfPortPins
| Item ||
|--------|---------------|
| **Name** | PortNumberOfPortPins |
| **Description** | The number of specified PortPins in this PortContainer. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 256 |
| **Min-value** | 1 |
###### PortPin
Configuration of the individual port pins.
###### PortPinPeripheral
| Item ||
|--------|---------------|
| **Name** | PortPinPeripheral |
| **Description** | Available Peripherals for the pin package |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ADC_EXTMUXSEL |
| **Range** | ADC_EXTMUXSEL
AIO
ANALOG
EPWM
FSIRX
FSITX
GPIO
I2C
JTAG
LIN
MCAN
OTHER
OUTPUTXBAR
PMBUS
SD
SENT
SPI
UART
XTAL |
###### PortPinPeripheralInstance
| Item ||
|--------|---------------|
| **Name** | PortPinPeripheralInstance |
| **Description** | Available instances for the Peripheral selected |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ADCA_EXTMUXSEL |
| **Range** | ADCA_EXTMUXSEL
ADCB_EXTMUXSEL
ADCC_EXTMUXSEL
ADCD_EXTMUXSEL
ADCE_EXTMUXSEL
AIO160
AIO161
AIO162
AIO163
AIO164
AIO165
AIO166
AIO167
AIO168
AIO169
AIO170
AIO171
AIO172
AIO173
AIO174
AIO175
AIO176
AIO177
AIO178
AIO179
AIO180
AIO181
AIO182
AIO183
AIO184
AIO185
AIO186
AIO187
AIO188
AIO189
AIO190
AIO191
AIO192
AIO193
AIO194
AIO195
AIO196
AIO197
AIO198
AIO199
AIO200
AIO201
AIO202
AIO203
AIO204
AIO205
AIO206
AIO207
AIO208
AIO209
AIO210
AIO211
AIO212
AIO213
ANALOG
EPWM1
EPWM10
EPWM11
EPWM12
EPWM13
EPWM14
EPWM15
EPWM16
EPWM17
EPWM18
EPWM2
EPWM3
EPWM4
EPWM5
EPWM6
EPWM7
EPWM8
EPWM9
FSIRXA
FSIRXB
FSIRXC
FSIRXD
FSITXA
FSITXB
FSITXC
FSITXD
GPIO0
GPIO1
GPIO10
GPIO100
GPIO101
GPIO103
GPIO105
GPIO11
GPIO12
GPIO127
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO2
GPIO20
GPIO21
GPIO219
GPIO22
GPIO220
GPIO221
GPIO222
GPIO223
GPIO224
GPIO225
GPIO226
GPIO227
GPIO228
GPIO229
GPIO23
GPIO230
GPIO231
GPIO232
GPIO233
GPIO234
GPIO235
GPIO236
GPIO237
GPIO238
GPIO239
GPIO24
GPIO240
GPIO241
GPIO242
GPIO243
GPIO244
GPIO245
GPIO246
GPIO247
GPIO248
GPIO249
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO3
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO4
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO48
GPIO49
GPIO5
GPIO50
GPIO51
GPIO52
GPIO53
GPIO54
GPIO55
GPIO56
GPIO57
GPIO58
GPIO59
GPIO6
GPIO60
GPIO61
GPIO62
GPIO63
GPIO64
GPIO65
GPIO66
GPIO67
GPIO68
GPIO69
GPIO7
GPIO70
GPIO71
GPIO72
GPIO73
GPIO74
GPIO75
GPIO76
GPIO77
GPIO78
GPIO79
GPIO8
GPIO80
GPIO81
GPIO82
GPIO83
GPIO84
GPIO85
GPIO86
GPIO87
GPIO88
GPIO89
GPIO9
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94
GPIO95
GPIO96
GPIO97
GPIO98
GPIO99
I2CA
I2CB
INPUTXBAR
JTAG
LINA
LINB
MCANA
MCANB
MCANC
MCAND
MCANE
MCANF
OTHER
OUTPUTXBAR1
OUTPUTXBAR10
OUTPUTXBAR11
OUTPUTXBAR12
OUTPUTXBAR13
OUTPUTXBAR14
OUTPUTXBAR15
OUTPUTXBAR16
OUTPUTXBAR2
OUTPUTXBAR3
OUTPUTXBAR4
OUTPUTXBAR5
OUTPUTXBAR6
OUTPUTXBAR7
OUTPUTXBAR8
OUTPUTXBAR9
PMBUSA
SD1
SD2
SD3
SD4
SENT1
SENT2
SENT3
SENT4
SENT5
SENT6
SPIA
SPIB
SPIC
SPID
SPIE
UARTA
UARTB
UARTC
UARTD
UARTE
UARTF
XTAL |
###### PortPinPeripheralSignal
| Item ||
|--------|---------------|
| **Name** | PortPinPeripheralSignal |
| **Description** | Select specific type of peripheral signal pin of interest |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | A0_C24_DACA_OUT |
| **Range** | A0_C24_DACA_OUT
A10_GPIO228
A11_GPIO229
A12
A13
A14_B14_C14_D14_E14
A15_B15_C15_D15_E15
A1_C25
A2_D24
A3_D25
A4_D28
A5_D29
A6_E24_GPIO224
A7_E25_GPIO225
A8_GPIO226
A9_GPIO227
ADCA_EXTMUXSEL0
ADCA_EXTMUXSEL1
ADCA_EXTMUXSEL2
ADCA_EXTMUXSEL3
ADCB_EXTMUXSEL0
ADCB_EXTMUXSEL1
ADCB_EXTMUXSEL2
ADCB_EXTMUXSEL3
ADCC_EXTMUXSEL0
ADCC_EXTMUXSEL1
ADCC_EXTMUXSEL2
ADCC_EXTMUXSEL3
ADCD_EXTMUXSEL0
ADCD_EXTMUXSEL1
ADCD_EXTMUXSEL2
ADCD_EXTMUXSEL3
ADCE_EXTMUXSEL0
ADCE_EXTMUXSEL1
ADCE_EXTMUXSEL2
ADCE_EXTMUXSEL3
ADCSOCAO
ADCSOCBO
AIO160
AIO161
AIO162
AIO163
AIO164
AIO165
AIO166
AIO167
AIO168
AIO169
AIO170
AIO171
AIO172
AIO173
AIO174
AIO175
AIO176
AIO177
AIO178
AIO179
AIO180
AIO181
AIO182
AIO183
AIO184
AIO185
AIO186
AIO187
AIO188
AIO189
AIO190
AIO191
AIO192
AIO193
AIO194
AIO195
AIO196
AIO197
AIO198
AIO199
AIO200
AIO201
AIO202
AIO203
AIO204
AIO205
AIO206
AIO207
AIO208
AIO209
AIO210
AIO211
AIO212
AIO213
B0_C26_VDAC
B10_GPIO234
B11_GPIO235
B12
B13
B16
B17
B1_C27
B2_D26
B3_D27
B4_D30
B5_D31
B6_E26_GPIO230
B7_E27_GPIO231
B8_GPIO232
B9_GPIO233
C0_E28
C10
C11
C12
C13
C16
C17
C1_E29
C2_E30
C3_E31
C4
C5
C6_GPIO236
C7_GPIO237
C8_GPIO238
C9_GPIO239
D0_B24
D10
D11
D12
D13
D16
D17
D1_B25
D2_B26
D3_B27
D4_B28_GPIO240
D5_B29_GPIO241
D6_B30_GPIO242
D7_B31_GPIO243
D8_C28_GPIO244
D9_C29_GPIO245
E0_A24_DACB_OUT
E10
E11
E12
E13
E16
E17
E1_A25
E2_A26
E3_A27
E4_A28_GPIO246
E5_A29_GPIO247
E6_A30_GPIO248
E7_A31_GPIO249
E8_C30
E9_C31
EPWM10_A
EPWM10_B
EPWM11_A
EPWM11_B
EPWM12_A
EPWM12_B
EPWM13_A
EPWM13_B
EPWM14_A
EPWM14_B
EPWM15_A
EPWM15_B
EPWM16_A
EPWM16_B
EPWM17_A
EPWM17_B
EPWM18_A
EPWM18_B
EPWM1_A
EPWM1_B
EPWM2_A
EPWM2_B
EPWM3_A
EPWM3_B
EPWM4_A
EPWM4_B
EPWM5_A
EPWM5_B
EPWM6_A
EPWM6_B
EPWM7_A
EPWM7_B
EPWM8_A
EPWM8_B
EPWM9_A
EPWM9_B
ERRORSTS
FSIRXA_CLK
FSIRXA_D0
FSIRXA_D1
FSIRXB_CLK
FSIRXB_D0
FSIRXB_D1
FSIRXC_CLK
FSIRXC_D0
FSIRXC_D1
FSIRXD_CLK
FSIRXD_D0
FSIRXD_D1
FSITXA_CLK
FSITXA_D0
FSITXA_D1
FSITXB_CLK
FSITXB_D0
FSITXB_D1
FSITXC_CLK
FSITXC_D0
FSITXC_D1
FSITXD_CLK
FSITXD_D0
FSITXD_D1
GPIO0
GPIO1
GPIO10
GPIO100
GPIO101
GPIO103
GPIO105
GPIO11
GPIO12
GPIO127
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO2
GPIO20
GPIO21
GPIO219
GPIO22
GPIO220
GPIO221
GPIO222
GPIO223
GPIO224
GPIO225
GPIO226
GPIO227
GPIO228
GPIO229
GPIO23
GPIO230
GPIO231
GPIO232
GPIO233
GPIO234
GPIO235
GPIO236
GPIO237
GPIO238
GPIO239
GPIO24
GPIO240
GPIO241
GPIO242
GPIO243
GPIO244
GPIO245
GPIO246
GPIO247
GPIO248
GPIO249
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO3
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO4
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO48
GPIO49
GPIO5
GPIO50
GPIO51
GPIO52
GPIO53
GPIO54
GPIO55
GPIO56
GPIO57
GPIO58
GPIO59
GPIO6
GPIO60
GPIO61
GPIO62
GPIO63
GPIO64
GPIO65
GPIO66
GPIO67
GPIO68
GPIO69
GPIO7
GPIO70
GPIO71
GPIO72
GPIO73
GPIO74
GPIO75
GPIO76
GPIO77
GPIO78
GPIO79
GPIO8
GPIO80
GPIO81
GPIO82
GPIO83
GPIO84
GPIO85
GPIO86
GPIO87
GPIO88
GPIO89
GPIO9
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94
GPIO95
GPIO96
GPIO97
GPIO98
GPIO99
I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA
INPUTXBAR1
INPUTXBAR10
INPUTXBAR11
INPUTXBAR12
INPUTXBAR13
INPUTXBAR14
INPUTXBAR15
INPUTXBAR16
INPUTXBAR17
INPUTXBAR18
INPUTXBAR19
INPUTXBAR2
INPUTXBAR20
INPUTXBAR21
INPUTXBAR22
INPUTXBAR23
INPUTXBAR24
INPUTXBAR25
INPUTXBAR26
INPUTXBAR27
INPUTXBAR28
INPUTXBAR29
INPUTXBAR3
INPUTXBAR30
INPUTXBAR31
INPUTXBAR32
INPUTXBAR33
INPUTXBAR34
INPUTXBAR35
INPUTXBAR36
INPUTXBAR37
INPUTXBAR38
INPUTXBAR39
INPUTXBAR4
INPUTXBAR40
INPUTXBAR41
INPUTXBAR42
INPUTXBAR43
INPUTXBAR44
INPUTXBAR45
INPUTXBAR46
INPUTXBAR47
INPUTXBAR48
INPUTXBAR49
INPUTXBAR5
INPUTXBAR50
INPUTXBAR51
INPUTXBAR52
INPUTXBAR53
INPUTXBAR54
INPUTXBAR55
INPUTXBAR56
INPUTXBAR57
INPUTXBAR58
INPUTXBAR59
INPUTXBAR6
INPUTXBAR60
INPUTXBAR61
INPUTXBAR62
INPUTXBAR63
INPUTXBAR64
INPUTXBAR7
INPUTXBAR8
INPUTXBAR9
LINA_RX
LINA_TX
LINB_RX
LINB_TX
MCANA_RX
MCANA_TX
MCANB_RX
MCANB_TX
MCANC_RX
MCANC_TX
MCAND_RX
MCAND_TX
MCANE_RX
MCANE_TX
MCANF_RX
MCANF_TX
OUTPUTXBAR1
OUTPUTXBAR10
OUTPUTXBAR11
OUTPUTXBAR12
OUTPUTXBAR13
OUTPUTXBAR14
OUTPUTXBAR15
OUTPUTXBAR16
OUTPUTXBAR2
OUTPUTXBAR3
OUTPUTXBAR4
OUTPUTXBAR5
OUTPUTXBAR6
OUTPUTXBAR7
OUTPUTXBAR8
OUTPUTXBAR9
PMBUSA_ALERT
PMBUSA_CTL
PMBUSA_SCL
PMBUSA_SDA
SD1_C1
SD1_C2
SD1_C3
SD1_C4
SD1_D1
SD1_D2
SD1_D3
SD1_D4
SD2_C1
SD2_C2
SD2_C3
SD2_C4
SD2_D1
SD2_D2
SD2_D3
SD2_D4
SD3_C1
SD3_C2
SD3_C3
SD3_C4
SD3_D1
SD3_D2
SD3_D3
SD3_D4
SD4_C1
SD4_C2
SD4_C3
SD4_C4
SD4_D1
SD4_D2
SD4_D3
SD4_D4
SENT1
SENT2
SENT3
SENT4
SENT5
SENT6
SPIA_CLK
SPIA_PICO
SPIA_POCI
SPIA_PTE
SPIB_CLK
SPIB_PICO
SPIB_POCI
SPIB_PTE
SPIC_CLK
SPIC_PICO
SPIC_POCI
SPIC_PTE
SPID_CLK
SPID_PICO
SPID_POCI
SPID_PTE
SPIE_CLK
SPIE_PICO
SPIE_POCI
SPIE_PTE
SYNCOUT
TDI
TDO
UARTA_RX
UARTA_TX
UARTB_RX
UARTB_TX
UARTC_RX
UARTC_TX
UARTD_RX
UARTD_TX
UARTE_RX
UARTE_TX
UARTF_RX
UARTF_TX
X1
X2
XCLKOUT |
###### PortPhysicalPinId
| Item ||
|--------|---------------|
| **Name** | PortPhysicalPinId |
| **Description** | Identifying The physical Pin Number on the selected Pin Package. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | PORT_PIN_1 |
| **Range** | PORT_PIN_1
PORT_PIN_10
PORT_PIN_100
PORT_PIN_102
PORT_PIN_103
PORT_PIN_104
PORT_PIN_105
PORT_PIN_106
PORT_PIN_107
PORT_PIN_108
PORT_PIN_109
PORT_PIN_11
PORT_PIN_110
PORT_PIN_111
PORT_PIN_112
PORT_PIN_113
PORT_PIN_114
PORT_PIN_115
PORT_PIN_116
PORT_PIN_117
PORT_PIN_118
PORT_PIN_119
PORT_PIN_12
PORT_PIN_120
PORT_PIN_121
PORT_PIN_123
PORT_PIN_124
PORT_PIN_125
PORT_PIN_126
PORT_PIN_127
PORT_PIN_128
PORT_PIN_129
PORT_PIN_13
PORT_PIN_130
PORT_PIN_131
PORT_PIN_132
PORT_PIN_133
PORT_PIN_134
PORT_PIN_135
PORT_PIN_136
PORT_PIN_138
PORT_PIN_139
PORT_PIN_14
PORT_PIN_140
PORT_PIN_141
PORT_PIN_142
PORT_PIN_143
PORT_PIN_144
PORT_PIN_145
PORT_PIN_146
PORT_PIN_148
PORT_PIN_149
PORT_PIN_15
PORT_PIN_150
PORT_PIN_151
PORT_PIN_154
PORT_PIN_155
PORT_PIN_156
PORT_PIN_157
PORT_PIN_158
PORT_PIN_159
PORT_PIN_16
PORT_PIN_160
PORT_PIN_161
PORT_PIN_162
PORT_PIN_163
PORT_PIN_164
PORT_PIN_165
PORT_PIN_166
PORT_PIN_167
PORT_PIN_17
PORT_PIN_170
PORT_PIN_171
PORT_PIN_172
PORT_PIN_173
PORT_PIN_174
PORT_PIN_175
PORT_PIN_176
PORT_PIN_18
PORT_PIN_19
PORT_PIN_2
PORT_PIN_20
PORT_PIN_21
PORT_PIN_22
PORT_PIN_23
PORT_PIN_24
PORT_PIN_25
PORT_PIN_26
PORT_PIN_27
PORT_PIN_28
PORT_PIN_29
PORT_PIN_30
PORT_PIN_31
PORT_PIN_32
PORT_PIN_33
PORT_PIN_34
PORT_PIN_35
PORT_PIN_36
PORT_PIN_37
PORT_PIN_38
PORT_PIN_39
PORT_PIN_4
PORT_PIN_40
PORT_PIN_41
PORT_PIN_42
PORT_PIN_43
PORT_PIN_44
PORT_PIN_45
PORT_PIN_46
PORT_PIN_47
PORT_PIN_48
PORT_PIN_49
PORT_PIN_5
PORT_PIN_50
PORT_PIN_51
PORT_PIN_52
PORT_PIN_53
PORT_PIN_54
PORT_PIN_55
PORT_PIN_56
PORT_PIN_57
PORT_PIN_58
PORT_PIN_59
PORT_PIN_6
PORT_PIN_60
PORT_PIN_61
PORT_PIN_62
PORT_PIN_63
PORT_PIN_64
PORT_PIN_65
PORT_PIN_66
PORT_PIN_67
PORT_PIN_68
PORT_PIN_69
PORT_PIN_7
PORT_PIN_70
PORT_PIN_71
PORT_PIN_72
PORT_PIN_73
PORT_PIN_74
PORT_PIN_75
PORT_PIN_76
PORT_PIN_77
PORT_PIN_78
PORT_PIN_79
PORT_PIN_8
PORT_PIN_80
PORT_PIN_81
PORT_PIN_82
PORT_PIN_83
PORT_PIN_84
PORT_PIN_85
PORT_PIN_86
PORT_PIN_87
PORT_PIN_88
PORT_PIN_89
PORT_PIN_9
PORT_PIN_90
PORT_PIN_91
PORT_PIN_92
PORT_PIN_93
PORT_PIN_94
PORT_PIN_95
PORT_PIN_96
PORT_PIN_97
PORT_PIN_98
PORT_PIN_99
PORT_PIN_A10
PORT_PIN_A11
PORT_PIN_A12
PORT_PIN_A13
PORT_PIN_A14
PORT_PIN_A15
PORT_PIN_A2
PORT_PIN_A3
PORT_PIN_A4
PORT_PIN_A5
PORT_PIN_A6
PORT_PIN_A7
PORT_PIN_A8
PORT_PIN_A9
PORT_PIN_B1
PORT_PIN_B10
PORT_PIN_B11
PORT_PIN_B12
PORT_PIN_B13
PORT_PIN_B14
PORT_PIN_B15
PORT_PIN_B16
PORT_PIN_B2
PORT_PIN_B3
PORT_PIN_B4
PORT_PIN_B5
PORT_PIN_B6
PORT_PIN_B7
PORT_PIN_B8
PORT_PIN_B9
PORT_PIN_C1
PORT_PIN_C10
PORT_PIN_C11
PORT_PIN_C12
PORT_PIN_C13
PORT_PIN_C14
PORT_PIN_C15
PORT_PIN_C16
PORT_PIN_C2
PORT_PIN_C3
PORT_PIN_C4
PORT_PIN_C5
PORT_PIN_C6
PORT_PIN_C7
PORT_PIN_C8
PORT_PIN_C9
PORT_PIN_D1
PORT_PIN_D10
PORT_PIN_D11
PORT_PIN_D12
PORT_PIN_D13
PORT_PIN_D14
PORT_PIN_D15
PORT_PIN_D16
PORT_PIN_D2
PORT_PIN_D3
PORT_PIN_D4
PORT_PIN_D5
PORT_PIN_D6
PORT_PIN_D7
PORT_PIN_D8
PORT_PIN_D9
PORT_PIN_E1
PORT_PIN_E13
PORT_PIN_E14
PORT_PIN_E16
PORT_PIN_E2
PORT_PIN_E3
PORT_PIN_E4
PORT_PIN_E5
PORT_PIN_F1
PORT_PIN_F13
PORT_PIN_F16
PORT_PIN_F2
PORT_PIN_F3
PORT_PIN_F4
PORT_PIN_F5
PORT_PIN_G1
PORT_PIN_G13
PORT_PIN_G14
PORT_PIN_G15
PORT_PIN_G16
PORT_PIN_G2
PORT_PIN_G3
PORT_PIN_G4
PORT_PIN_G5
PORT_PIN_H1
PORT_PIN_H13
PORT_PIN_H14
PORT_PIN_H15
PORT_PIN_H16
PORT_PIN_H2
PORT_PIN_H3
PORT_PIN_H4
PORT_PIN_H5
PORT_PIN_J1
PORT_PIN_J13
PORT_PIN_J14
PORT_PIN_J15
PORT_PIN_J16
PORT_PIN_J2
PORT_PIN_J3
PORT_PIN_J4
PORT_PIN_J5
PORT_PIN_K1
PORT_PIN_K13
PORT_PIN_K14
PORT_PIN_K15
PORT_PIN_K16
PORT_PIN_K2
PORT_PIN_K3
PORT_PIN_K4
PORT_PIN_K5
PORT_PIN_L1
PORT_PIN_L14
PORT_PIN_L15
PORT_PIN_L16
PORT_PIN_L2
PORT_PIN_L3
PORT_PIN_L4
PORT_PIN_L5
PORT_PIN_M1
PORT_PIN_M13
PORT_PIN_M14
PORT_PIN_M15
PORT_PIN_M16
PORT_PIN_M2
PORT_PIN_M3
PORT_PIN_M4
PORT_PIN_M5
PORT_PIN_M6
PORT_PIN_M7
PORT_PIN_M8
PORT_PIN_M9
PORT_PIN_N10
PORT_PIN_N11
PORT_PIN_N12
PORT_PIN_N13
PORT_PIN_N14
PORT_PIN_N15
PORT_PIN_N16
PORT_PIN_N3
PORT_PIN_N4
PORT_PIN_N5
PORT_PIN_N6
PORT_PIN_N7
PORT_PIN_N8
PORT_PIN_N9
PORT_PIN_P1
PORT_PIN_P10
PORT_PIN_P11
PORT_PIN_P12
PORT_PIN_P13
PORT_PIN_P14
PORT_PIN_P15
PORT_PIN_P16
PORT_PIN_P2
PORT_PIN_P3
PORT_PIN_P4
PORT_PIN_P5
PORT_PIN_P6
PORT_PIN_P7
PORT_PIN_P8
PORT_PIN_P9
PORT_PIN_R1
PORT_PIN_R10
PORT_PIN_R11
PORT_PIN_R12
PORT_PIN_R13
PORT_PIN_R14
PORT_PIN_R16
PORT_PIN_R2
PORT_PIN_R3
PORT_PIN_R5
PORT_PIN_R6
PORT_PIN_R7
PORT_PIN_R8
PORT_PIN_R9
PORT_PIN_T10
PORT_PIN_T11
PORT_PIN_T12
PORT_PIN_T13
PORT_PIN_T14
PORT_PIN_T2
PORT_PIN_T3
PORT_PIN_T5
PORT_PIN_T6
PORT_PIN_T7
PORT_PIN_T8
PORT_PIN_T9 |
###### PortPinName
| Item ||
|--------|---------------|
| **Name** | PortPinName |
| **Description** | Device Pin Name for reference. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | A0_C24_DACA_OUT |
| **Range** | A0_C24_DACA_OUT
A10_GPIO228
A11_GPIO229
A12
A13
A14_B14_C14_D14_E14
A15_B15_C15_D15_E15
A1_C25
A2_D24
A3_D25
A4_D28
A5_D29
A6_E24_GPIO224
A7_E25_GPIO225
A8_GPIO226
A9_GPIO227
B0_C26_VDAC
B10_GPIO234
B11_GPIO235
B12
B13
B16
B17
B1_C27
B2_D26
B3_D27
B4_D30
B5_D31
B6_E26_GPIO230
B7_E27_GPIO231
B8_GPIO232
B9_GPIO233
C0_E28
C10
C11
C12
C13
C16
C17
C1_E29
C2_E30
C3_E31
C4
C5
C6_GPIO236
C7_GPIO237
C8_GPIO238
C9_GPIO239
D0_B24
D10
D11
D12
D13
D16
D17
D1_B25
D2_B26
D3_B27
D4_B28_GPIO240
D5_B29_GPIO241
D6_B30_GPIO242
D7_B31_GPIO243
D8_C28_GPIO244
D9_C29_GPIO245
E0_A24_DACB_OUT
E10
E11
E12
E13
E16
E17
E1_A25
E2_A26
E3_A27
E4_A28_GPIO246
E5_A29_GPIO247
E6_A30_GPIO248
E7_A31_GPIO249
E8_C30
E9_C31
FLT3
GPIO0
GPIO1
GPIO10
GPIO100
GPIO101
GPIO103
GPIO105
GPIO11
GPIO12
GPIO127
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO2
GPIO20
GPIO21
GPIO219_ERRORSTS
GPIO22
GPIO220_X1
GPIO221_X2
GPIO222_TDI
GPIO223_TDO
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO3
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO4
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO48
GPIO49
GPIO5
GPIO50
GPIO51
GPIO52
GPIO53
GPIO54
GPIO55
GPIO56
GPIO57
GPIO58
GPIO59
GPIO6
GPIO60
GPIO61
GPIO62
GPIO63
GPIO64
GPIO65
GPIO66
GPIO67
GPIO68
GPIO69
GPIO7
GPIO70
GPIO71
GPIO72
GPIO73
GPIO74
GPIO75
GPIO76
GPIO77
GPIO78
GPIO79
GPIO8
GPIO80
GPIO81
GPIO82
GPIO83
GPIO84
GPIO85
GPIO86
GPIO87
GPIO88
GPIO89
GPIO9
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94
GPIO95
GPIO96
GPIO97
GPIO98
GPIO99
TCK
TMS
VDD
VDDA
VDDIO
VREFHIAB
VREFHICDE
VREFLOAB
VREFLOCDE
VREGENZ
VSS
VSSA
VSSOSC
XRSn |
###### PortPinId
| Item ||
|--------|---------------|
| **Name** | PortPinId |
| **Description** | Pin Id of the port pin. This value will be assigned to the symbolic name derived from the port pin container short name. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 256 |
| **Min-value** | 0 |
###### PortAnalogMode
| Item ||
|--------|---------------|
| **Name** | PortAnalogMode |
| **Description** | Select whether the pin operates in Analog Mode. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | PORT_ANALOG_ENABLED |
| **Range** | PORT_ANALOG_DISABLED
PORT_ANALOG_ENABLED |
###### PortPinInitialMode
| Item ||
|--------|---------------|
| **Name** | PortPinInitialMode |
| **Description** | Port pin mode from mode list for use with Port_Init() function. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ADCA_EXTMUXSEL0 |
| **Range** | ADCA_EXTMUXSEL0
ADCA_EXTMUXSEL1
ADCA_EXTMUXSEL2
ADCA_EXTMUXSEL3
ADCB_EXTMUXSEL0
ADCB_EXTMUXSEL1
ADCB_EXTMUXSEL2
ADCB_EXTMUXSEL3
ADCC_EXTMUXSEL0
ADCC_EXTMUXSEL1
ADCC_EXTMUXSEL2
ADCC_EXTMUXSEL3
ADCD_EXTMUXSEL0
ADCD_EXTMUXSEL1
ADCD_EXTMUXSEL2
ADCD_EXTMUXSEL3
ADCE_EXTMUXSEL0
ADCE_EXTMUXSEL1
ADCE_EXTMUXSEL2
ADCE_EXTMUXSEL3
ADCSOCAO
ADCSOCBO
AIO160
AIO161
AIO162
AIO163
AIO164
AIO165
AIO166
AIO167
AIO168
AIO169
AIO170
AIO171
AIO172
AIO173
AIO174
AIO175
AIO176
AIO177
AIO178
AIO179
AIO180
AIO181
AIO182
AIO183
AIO184
AIO185
AIO186
AIO187
AIO188
AIO189
AIO190
AIO191
AIO192
AIO193
AIO194
AIO195
AIO196
AIO197
AIO198
AIO199
AIO200
AIO201
AIO202
AIO203
AIO204
AIO205
AIO206
AIO207
AIO208
AIO209
AIO210
AIO211
AIO212
AIO213
EMIF1_A0
EMIF1_A1
EMIF1_A10
EMIF1_A11
EMIF1_A12
EMIF1_A13
EMIF1_A14
EMIF1_A15
EMIF1_A16
EMIF1_A17
EMIF1_A18
EMIF1_A19
EMIF1_A2
EMIF1_A3
EMIF1_A4
EMIF1_A5
EMIF1_A6
EMIF1_A7
EMIF1_A8
EMIF1_A9
EMIF1_BA0
EMIF1_BA1
EMIF1_CAS
EMIF1_CLK
EMIF1_CS0n
EMIF1_CS2n
EMIF1_CS3n
EMIF1_CS4n
EMIF1_D0
EMIF1_D1
EMIF1_D10
EMIF1_D11
EMIF1_D12
EMIF1_D13
EMIF1_D14
EMIF1_D15
EMIF1_D16
EMIF1_D17
EMIF1_D18
EMIF1_D19
EMIF1_D2
EMIF1_D20
EMIF1_D21
EMIF1_D22
EMIF1_D23
EMIF1_D24
EMIF1_D25
EMIF1_D26
EMIF1_D27
EMIF1_D28
EMIF1_D29
EMIF1_D3
EMIF1_D30
EMIF1_D31
EMIF1_D4
EMIF1_D5
EMIF1_D6
EMIF1_D7
EMIF1_D8
EMIF1_D9
EMIF1_DQM0
EMIF1_DQM1
EMIF1_DQM2
EMIF1_DQM3
EMIF1_OEn
EMIF1_RAS
EMIF1_RNW
EMIF1_SDCKE
EMIF1_WAIT
EMIF1_WEn
EPWM10_A
EPWM10_B
EPWM11_A
EPWM11_B
EPWM12_A
EPWM12_B
EPWM13_A
EPWM13_B
EPWM14_A
EPWM14_B
EPWM15_A
EPWM15_B
EPWM16_A
EPWM16_B
EPWM17_A
EPWM17_B
EPWM18_A
EPWM18_B
EPWM1_A
EPWM1_B
EPWM2_A
EPWM2_B
EPWM3_A
EPWM3_B
EPWM4_A
EPWM4_B
EPWM5_A
EPWM5_B
EPWM6_A
EPWM6_B
EPWM7_A
EPWM7_B
EPWM8_A
EPWM8_B
EPWM9_A
EPWM9_B
ERRORSTS
ESC_GPI0
ESC_GPI1
ESC_GPI10
ESC_GPI11
ESC_GPI12
ESC_GPI13
ESC_GPI14
ESC_GPI15
ESC_GPI16
ESC_GPI17
ESC_GPI18
ESC_GPI19
ESC_GPI2
ESC_GPI20
ESC_GPI21
ESC_GPI22
ESC_GPI23
ESC_GPI24
ESC_GPI25
ESC_GPI26
ESC_GPI27
ESC_GPI28
ESC_GPI29
ESC_GPI3
ESC_GPI30
ESC_GPI31
ESC_GPI4
ESC_GPI5
ESC_GPI6
ESC_GPI7
ESC_GPI8
ESC_GPI9
ESC_GPO0
ESC_GPO1
ESC_GPO10
ESC_GPO11
ESC_GPO12
ESC_GPO13
ESC_GPO14
ESC_GPO15
ESC_GPO16
ESC_GPO17
ESC_GPO18
ESC_GPO19
ESC_GPO2
ESC_GPO20
ESC_GPO21
ESC_GPO22
ESC_GPO23
ESC_GPO24
ESC_GPO25
ESC_GPO26
ESC_GPO27
ESC_GPO28
ESC_GPO29
ESC_GPO3
ESC_GPO30
ESC_GPO31
ESC_GPO4
ESC_GPO5
ESC_GPO6
ESC_GPO7
ESC_GPO8
ESC_GPO9
ESC_I2C_SCL
ESC_I2C_SDA
ESC_LATCH0
ESC_LATCH1
ESC_LED_ERR
ESC_LED_LINK0_ACTIVE
ESC_LED_LINK1_ACTIVE
ESC_LED_RUN
ESC_LED_STATE_RUN
ESC_MDIO_CLK
ESC_MDIO_DATA
ESC_PDI_UC_IRQ
ESC_PHY0_LINKSTATUS
ESC_PHY1_LINKSTATUS
ESC_PHY_CLK
ESC_PHY_RESETn
ESC_RX0_CLK
ESC_RX0_DATA0
ESC_RX0_DATA1
ESC_RX0_DATA2
ESC_RX0_DATA3
ESC_RX0_DV
ESC_RX0_ERR
ESC_RX1_CLK
ESC_RX1_DATA0
ESC_RX1_DATA1
ESC_RX1_DATA2
ESC_RX1_DATA3
ESC_RX1_DV
ESC_RX1_ERR
ESC_SYNC0
ESC_SYNC1
ESC_TX0_CLK
ESC_TX0_DATA0
ESC_TX0_DATA1
ESC_TX0_DATA2
ESC_TX0_DATA3
ESC_TX0_ENA
ESC_TX1_CLK
ESC_TX1_DATA0
ESC_TX1_DATA1
ESC_TX1_DATA2
ESC_TX1_DATA3
ESC_TX1_ENA
FSIRXA_CLK
FSIRXA_D0
FSIRXA_D1
FSIRXB_CLK
FSIRXB_D0
FSIRXB_D1
FSIRXC_CLK
FSIRXC_D0
FSIRXC_D1
FSIRXD_CLK
FSIRXD_D0
FSIRXD_D1
FSITXA_CLK
FSITXA_D0
FSITXA_D1
FSITXB_CLK
FSITXB_D0
FSITXB_D1
FSITXC_CLK
FSITXC_D0
FSITXC_D1
FSITXD_CLK
FSITXD_D0
FSITXD_D1
GPIO0
GPIO1
GPIO10
GPIO100
GPIO101
GPIO103
GPIO105
GPIO11
GPIO12
GPIO127
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO2
GPIO20
GPIO21
GPIO219
GPIO22
GPIO220
GPIO221
GPIO222
GPIO223
GPIO224
GPIO225
GPIO226
GPIO227
GPIO228
GPIO229
GPIO23
GPIO230
GPIO231
GPIO232
GPIO233
GPIO234
GPIO235
GPIO236
GPIO237
GPIO238
GPIO239
GPIO24
GPIO240
GPIO241
GPIO242
GPIO243
GPIO244
GPIO245
GPIO246
GPIO247
GPIO248
GPIO249
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO3
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO4
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO48
GPIO49
GPIO5
GPIO50
GPIO51
GPIO52
GPIO53
GPIO54
GPIO55
GPIO56
GPIO57
GPIO58
GPIO59
GPIO6
GPIO60
GPIO61
GPIO62
GPIO63
GPIO64
GPIO65
GPIO66
GPIO67
GPIO68
GPIO69
GPIO7
GPIO70
GPIO71
GPIO72
GPIO73
GPIO74
GPIO75
GPIO76
GPIO77
GPIO78
GPIO79
GPIO8
GPIO80
GPIO81
GPIO82
GPIO83
GPIO84
GPIO85
GPIO86
GPIO87
GPIO88
GPIO89
GPIO9
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94
GPIO95
GPIO96
GPIO97
GPIO98
GPIO99
I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA
LINA_RX
LINA_TX
LINB_RX
LINB_TX
MCANA_RX
MCANA_TX
MCANB_RX
MCANB_TX
MCANC_RX
MCANC_TX
MCAND_RX
MCAND_TX
MCANE_RX
MCANE_TX
MCANF_RX
MCANF_TX
OUTPUTXBAR1
OUTPUTXBAR10
OUTPUTXBAR11
OUTPUTXBAR12
OUTPUTXBAR13
OUTPUTXBAR14
OUTPUTXBAR15
OUTPUTXBAR16
OUTPUTXBAR2
OUTPUTXBAR3
OUTPUTXBAR4
OUTPUTXBAR5
OUTPUTXBAR6
OUTPUTXBAR7
OUTPUTXBAR8
OUTPUTXBAR9
PMBUSA_ALERT
PMBUSA_CTL
PMBUSA_SCL
PMBUSA_SDA
PORT_MUXMODE_NA
SD1_C1
SD1_C2
SD1_C3
SD1_C4
SD1_D1
SD1_D2
SD1_D3
SD1_D4
SD2_C1
SD2_C2
SD2_C3
SD2_C4
SD2_D1
SD2_D2
SD2_D3
SD2_D4
SD3_C1
SD3_C2
SD3_C3
SD3_C4
SD3_D1
SD3_D2
SD3_D3
SD3_D4
SD4_C1
SD4_C2
SD4_C3
SD4_C4
SD4_D1
SD4_D2
SD4_D3
SD4_D4
SENT1
SENT2
SENT3
SENT4
SENT5
SENT6
SPIA_CLK
SPIA_PICO
SPIA_POCI
SPIA_PTE
SPIB_CLK
SPIB_PICO
SPIB_POCI
SPIB_PTE
SPIC_CLK
SPIC_PICO
SPIC_POCI
SPIC_PTE
SPID_CLK
SPID_PICO
SPID_POCI
SPID_PTE
SPIE_CLK
SPIE_PICO
SPIE_POCI
SPIE_PTE
SYNCOUT
TDI
TDO
UARTA_RX
UARTA_TX
UARTB_RX
UARTB_TX
UARTC_RX
UARTC_TX
UARTD_RX
UARTD_TX
UARTE_RX
UARTE_TX
UARTF_RX
UARTF_TX
XCLKOUT |
###### PortPinDirection
| Item ||
|--------|---------------|
| **Name** | PortPinDirection |
| **Description** | The initial direction of the pin (IN or OUT). If the direction is not changeable, the value configured here is fixed. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | PORT_PIN_IN |
| **Range** | PORT_PIN_IN
PORT_PIN_NA
PORT_PIN_OUT |
###### PortPinDirectionChangeable
| Item ||
|--------|---------------|
| **Name** | PortPinDirectionChangeable |
| **Description** | Parameter to indicate if the direction is changeable on a port pin during runtime. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | False |
###### PortPinPadConfig
| Item ||
|--------|---------------|
| **Name** | PortPinPadConfig |
| **Description** | Enable Push-Pull or Open Drain functionality. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | PORT_PIN_TYPE_STD |
| **Range** | PORT_PIN_TYPE_STD
PORT_PIN_TYPE_OPEN_DRAIN
PORT_PIN_TYPE_NA |
###### PortPinPullUpConfig
| Item ||
|--------|---------------|
| **Name** | PortPinPullUpConfig |
| **Description** | Enable Pull Up. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### PortPinQualificationMode
| Item ||
|--------|---------------|
| **Name** | PortPinQualificationMode |
| **Description** | Synchronization mode of the peripheral signals. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | PORT_QUAL_SYNC |
| **Range** | PORT_QUAL_SYNC
PORT_QUAL_3SAMPLE
PORT_QUAL_6SAMPLE
PORT_QUAL_ASYNC
PORT_QUAL_NA |
###### PortPinQualificationPeriod
| Item ||
|--------|---------------|
| **Name** | PortPinQualificationPeriod |
| **Description** | Qualification period of the peripheral signals. NOTE: The PortPinQualificationPeriod should be set to the same value for each pair of 8 consecutive GPIOs. For Instance: Qualification sampling period for GPIO0 to GPIO7: 0x00,QUALPRDx = PLLSYSCLK 0x01,QUALPRDx = PLLSYSCLK/2 0x02,QUALPRDx = PLLSYSCLK/4 .... 0xFF,QUALPRDx = PLLSYSCLK/510 Reset type: SYSRSn |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 510 |
| **Min-value** | 0 |
###### PortPinLevelValue
| Item ||
|--------|---------------|
| **Name** | PortPinLevelValue |
| **Description** | Port Pin Level value from Port pin list. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | PORT_PIN_LEVEL_LOW |
| **Range** | PORT_PIN_LEVEL_HIGH
PORT_PIN_LEVEL_LOW
PORT_PIN_LEVEL_NA |
###### PortPinCoreSelect
| Item ||
|--------|---------------|
| **Name** | PortPinCoreSelect |
| **Description** | Selection of core to which pin is to be mapped. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | PORT_CORE_CPU1 |
| **Range** | PORT_CORE_CPU1
PORT_CORE_CPU2
PORT_CORE_CPU3 |
###### PortEnableWakeUpPinLPM
| Item ||
|--------|---------------|
| **Name** | PortEnableWakeUpPinLPM |
| **Description** | Use/Don't use the GPIO Pin as a wakeup source for the low power modes - standby/halt. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### PortPinMode
| Item ||
|--------|---------------|
| **Name** | PortPinMode |
| **Description** | Port pin mode from mode list. NOTE: While configuring the PortPinMode, ensure that the selected mux mode is available for the specific device variant by checking the datasheet as the pinmuxmode list contains a superset of values for all the variants. |
| **Multiplicity-Configuration-Class** | -- |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ADCA_EXTMUXSEL0 |
| **Range** | ADCA_EXTMUXSEL0
ADCA_EXTMUXSEL1
ADCA_EXTMUXSEL2
ADCA_EXTMUXSEL3
ADCB_EXTMUXSEL0
ADCB_EXTMUXSEL1
ADCB_EXTMUXSEL2
ADCB_EXTMUXSEL3
ADCC_EXTMUXSEL0
ADCC_EXTMUXSEL1
ADCC_EXTMUXSEL2
ADCC_EXTMUXSEL3
ADCD_EXTMUXSEL0
ADCD_EXTMUXSEL1
ADCD_EXTMUXSEL2
ADCD_EXTMUXSEL3
ADCE_EXTMUXSEL0
ADCE_EXTMUXSEL1
ADCE_EXTMUXSEL2
ADCE_EXTMUXSEL3
ADCSOCAO
ADCSOCBO
AIO160
AIO161
AIO162
AIO163
AIO164
AIO165
AIO166
AIO167
AIO168
AIO169
AIO170
AIO171
AIO172
AIO173
AIO174
AIO175
AIO176
AIO177
AIO178
AIO179
AIO180
AIO181
AIO182
AIO183
AIO184
AIO185
AIO186
AIO187
AIO188
AIO189
AIO190
AIO191
AIO192
AIO193
AIO194
AIO195
AIO196
AIO197
AIO198
AIO199
AIO200
AIO201
AIO202
AIO203
AIO204
AIO205
AIO206
AIO207
AIO208
AIO209
AIO210
AIO211
AIO212
AIO213
EMIF1_A0
EMIF1_A1
EMIF1_A10
EMIF1_A11
EMIF1_A12
EMIF1_A13
EMIF1_A14
EMIF1_A15
EMIF1_A16
EMIF1_A17
EMIF1_A18
EMIF1_A19
EMIF1_A2
EMIF1_A3
EMIF1_A4
EMIF1_A5
EMIF1_A6
EMIF1_A7
EMIF1_A8
EMIF1_A9
EMIF1_BA0
EMIF1_BA1
EMIF1_CAS
EMIF1_CLK
EMIF1_CS0n
EMIF1_CS2n
EMIF1_CS3n
EMIF1_CS4n
EMIF1_D0
EMIF1_D1
EMIF1_D10
EMIF1_D11
EMIF1_D12
EMIF1_D13
EMIF1_D14
EMIF1_D15
EMIF1_D16
EMIF1_D17
EMIF1_D18
EMIF1_D19
EMIF1_D2
EMIF1_D20
EMIF1_D21
EMIF1_D22
EMIF1_D23
EMIF1_D24
EMIF1_D25
EMIF1_D26
EMIF1_D27
EMIF1_D28
EMIF1_D29
EMIF1_D3
EMIF1_D30
EMIF1_D31
EMIF1_D4
EMIF1_D5
EMIF1_D6
EMIF1_D7
EMIF1_D8
EMIF1_D9
EMIF1_DQM0
EMIF1_DQM1
EMIF1_DQM2
EMIF1_DQM3
EMIF1_OEn
EMIF1_RAS
EMIF1_RNW
EMIF1_SDCKE
EMIF1_WAIT
EMIF1_WEn
EPWM10_A
EPWM10_B
EPWM11_A
EPWM11_B
EPWM12_A
EPWM12_B
EPWM13_A
EPWM13_B
EPWM14_A
EPWM14_B
EPWM15_A
EPWM15_B
EPWM16_A
EPWM16_B
EPWM17_A
EPWM17_B
EPWM18_A
EPWM18_B
EPWM1_A
EPWM1_B
EPWM2_A
EPWM2_B
EPWM3_A
EPWM3_B
EPWM4_A
EPWM4_B
EPWM5_A
EPWM5_B
EPWM6_A
EPWM6_B
EPWM7_A
EPWM7_B
EPWM8_A
EPWM8_B
EPWM9_A
EPWM9_B
ERRORSTS
ESC_GPI0
ESC_GPI1
ESC_GPI10
ESC_GPI11
ESC_GPI12
ESC_GPI13
ESC_GPI14
ESC_GPI15
ESC_GPI16
ESC_GPI17
ESC_GPI18
ESC_GPI19
ESC_GPI2
ESC_GPI20
ESC_GPI21
ESC_GPI22
ESC_GPI23
ESC_GPI24
ESC_GPI25
ESC_GPI26
ESC_GPI27
ESC_GPI28
ESC_GPI29
ESC_GPI3
ESC_GPI30
ESC_GPI31
ESC_GPI4
ESC_GPI5
ESC_GPI6
ESC_GPI7
ESC_GPI8
ESC_GPI9
ESC_GPO0
ESC_GPO1
ESC_GPO10
ESC_GPO11
ESC_GPO12
ESC_GPO13
ESC_GPO14
ESC_GPO15
ESC_GPO16
ESC_GPO17
ESC_GPO18
ESC_GPO19
ESC_GPO2
ESC_GPO20
ESC_GPO21
ESC_GPO22
ESC_GPO23
ESC_GPO24
ESC_GPO25
ESC_GPO26
ESC_GPO27
ESC_GPO28
ESC_GPO29
ESC_GPO3
ESC_GPO30
ESC_GPO31
ESC_GPO4
ESC_GPO5
ESC_GPO6
ESC_GPO7
ESC_GPO8
ESC_GPO9
ESC_I2C_SCL
ESC_I2C_SDA
ESC_LATCH0
ESC_LATCH1
ESC_LED_ERR
ESC_LED_LINK0_ACTIVE
ESC_LED_LINK1_ACTIVE
ESC_LED_RUN
ESC_LED_STATE_RUN
ESC_MDIO_CLK
ESC_MDIO_DATA
ESC_PDI_UC_IRQ
ESC_PHY0_LINKSTATUS
ESC_PHY1_LINKSTATUS
ESC_PHY_CLK
ESC_PHY_RESETn
ESC_RX0_CLK
ESC_RX0_DATA0
ESC_RX0_DATA1
ESC_RX0_DATA2
ESC_RX0_DATA3
ESC_RX0_DV
ESC_RX0_ERR
ESC_RX1_CLK
ESC_RX1_DATA0
ESC_RX1_DATA1
ESC_RX1_DATA2
ESC_RX1_DATA3
ESC_RX1_DV
ESC_RX1_ERR
ESC_SYNC0
ESC_SYNC1
ESC_TX0_CLK
ESC_TX0_DATA0
ESC_TX0_DATA1
ESC_TX0_DATA2
ESC_TX0_DATA3
ESC_TX0_ENA
ESC_TX1_CLK
ESC_TX1_DATA0
ESC_TX1_DATA1
ESC_TX1_DATA2
ESC_TX1_DATA3
ESC_TX1_ENA
FSIRXA_CLK
FSIRXA_D0
FSIRXA_D1
FSIRXB_CLK
FSIRXB_D0
FSIRXB_D1
FSIRXC_CLK
FSIRXC_D0
FSIRXC_D1
FSIRXD_CLK
FSIRXD_D0
FSIRXD_D1
FSITXA_CLK
FSITXA_D0
FSITXA_D1
FSITXB_CLK
FSITXB_D0
FSITXB_D1
FSITXC_CLK
FSITXC_D0
FSITXC_D1
FSITXD_CLK
FSITXD_D0
FSITXD_D1
GPIO0
GPIO1
GPIO10
GPIO100
GPIO101
GPIO103
GPIO105
GPIO11
GPIO12
GPIO127
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO2
GPIO20
GPIO21
GPIO219
GPIO22
GPIO220
GPIO221
GPIO222
GPIO223
GPIO224
GPIO225
GPIO226
GPIO227
GPIO228
GPIO229
GPIO23
GPIO230
GPIO231
GPIO232
GPIO233
GPIO234
GPIO235
GPIO236
GPIO237
GPIO238
GPIO239
GPIO24
GPIO240
GPIO241
GPIO242
GPIO243
GPIO244
GPIO245
GPIO246
GPIO247
GPIO248
GPIO249
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO3
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO4
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO48
GPIO49
GPIO5
GPIO50
GPIO51
GPIO52
GPIO53
GPIO54
GPIO55
GPIO56
GPIO57
GPIO58
GPIO59
GPIO6
GPIO60
GPIO61
GPIO62
GPIO63
GPIO64
GPIO65
GPIO66
GPIO67
GPIO68
GPIO69
GPIO7
GPIO70
GPIO71
GPIO72
GPIO73
GPIO74
GPIO75
GPIO76
GPIO77
GPIO78
GPIO79
GPIO8
GPIO80
GPIO81
GPIO82
GPIO83
GPIO84
GPIO85
GPIO86
GPIO87
GPIO88
GPIO89
GPIO9
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94
GPIO95
GPIO96
GPIO97
GPIO98
GPIO99
I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA
LINA_RX
LINA_TX
LINB_RX
LINB_TX
MCANA_RX
MCANA_TX
MCANB_RX
MCANB_TX
MCANC_RX
MCANC_TX
MCAND_RX
MCAND_TX
MCANE_RX
MCANE_TX
MCANF_RX
MCANF_TX
OUTPUTXBAR1
OUTPUTXBAR10
OUTPUTXBAR11
OUTPUTXBAR12
OUTPUTXBAR13
OUTPUTXBAR14
OUTPUTXBAR15
OUTPUTXBAR16
OUTPUTXBAR2
OUTPUTXBAR3
OUTPUTXBAR4
OUTPUTXBAR5
OUTPUTXBAR6
OUTPUTXBAR7
OUTPUTXBAR8
OUTPUTXBAR9
PMBUSA_ALERT
PMBUSA_CTL
PMBUSA_SCL
PMBUSA_SDA
PORT_MUXMODE_NA
SD1_C1
SD1_C2
SD1_C3
SD1_C4
SD1_D1
SD1_D2
SD1_D3
SD1_D4
SD2_C1
SD2_C2
SD2_C3
SD2_C4
SD2_D1
SD2_D2
SD2_D3
SD2_D4
SD3_C1
SD3_C2
SD3_C3
SD3_C4
SD3_D1
SD3_D2
SD3_D3
SD3_D4
SD4_C1
SD4_C2
SD4_C3
SD4_C4
SD4_D1
SD4_D2
SD4_D3
SD4_D4
SENT1
SENT2
SENT3
SENT4
SENT5
SENT6
SPIA_CLK
SPIA_PICO
SPIA_POCI
SPIA_PTE
SPIB_CLK
SPIB_PICO
SPIB_POCI
SPIB_PTE
SPIC_CLK
SPIC_PICO
SPIC_POCI
SPIC_PTE
SPID_CLK
SPID_PICO
SPID_POCI
SPID_PTE
SPIE_CLK
SPIE_PICO
SPIE_POCI
SPIE_PTE
SYNCOUT
TDI
TDO
UARTA_RX
UARTA_TX
UARTB_RX
UARTB_TX
UARTC_RX
UARTC_TX
UARTD_RX
UARTD_TX
UARTE_RX
UARTE_TX
UARTF_RX
UARTF_TX
XCLKOUT |
###### PortPinModeChangeable
| Item ||
|--------|---------------|
| **Name** | PortPinModeChangeable |
| **Description** | Parameter to indicate if the mode is changeable on a port pin during runtime. True: Port Pin mode changeable allowed. False: Port Pin mode changeable not permitted. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
##### PortGeneral
Module wide configuration parameters of the PORT driver.
###### PortDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | PortDevErrorDetect |
| **Description** | Switches the development error detection and notification on or off. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### PortSetPinDirectionApi
| Item ||
|--------|---------------|
| **Name** | PortSetPinDirectionApi |
| **Description** | Pre-processor switch to enable / disable the use of the function Port_SetPinDirection(). |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### PortSetPinModeApi
| Item ||
|--------|---------------|
| **Name** | PortSetPinModeApi |
| **Description** | Pre-processor switch to enable / disable the use of the function Port_SetPinMode(). |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### PortVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | PortVersionInfoApi |
| **Description** | Pre-processor switch to enable / disable the API to read out the modules version information. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### PortLockConfiguration
| Item ||
|--------|---------------|
| **Name** | PortLockConfiguration |
| **Description** | Lock All pins configuration. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
Refer [AUTOSAR_SWS_PortDriver section: 10 Configuration specification](https://www.autosar.org/fileadmin/standards/R4.3.1/CP/AUTOSAR_SWS_PortDriver.pdf) for more configuration parameters details
```{NOTE}
The analog signals on this device are multiplexed with digital inputs and outputs. Some of these analog IO (AIO) pins do not have digital output capability. Others of these pins are analog pins capable of full digital input and output capability (AGPIO). Analog pins with AIO (digital input only) capability contain "AIO" signals in the Pin Attributes table of the device data sheet. Analog pins with full input and output capability (AGPIO pins) contain "GPIO" signals in the Pin Attributes table of the device data sheet. AGPIO pins also have pin names with both analog signals and GPIO in the name.
```
#### Steps To Configure Port Module
1. Open EB Tresos configurator tool and Select the Config Variant ( Precompile/Post-Build)
2. Go to Port Container tab and create a new container
3. Open the created container and go to PortPin container to create a portPin configuration. ( Multiple PortPin configurations can be created )
4. Open the created Port pin, and configure the pin parameters
5. Select the Port pin peripheral instance ( Mode ) which needs to be configured and accordingly select the Peripheral Signal. As per selected Signal, physical pin ID needs to be selected from the list
6. Once the above options are configured, run the auto-calculate wizard before proceeding to the next step.
7. Configure the other parameters as per pin usage.
8. Open Port pin Mode tab and add the default port pin mode ( at least one mode is required for this field ). Other supported modes for that pin can also be configured if user needs to change the mode for the pin afterwards.
9. Configure the number of port pins in port container general tab
10. Save the configuration and generate the configuration.
### Examples
The example application demonstrates use of Port module, the list below identifies key steps performed in the example.
#### Overview
* Port_Example_Init
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes one pin from each port as GPIO Output using Port_Init()
* Port_SetPinDirection Changes the direction of GPIO0 pin to Input ( LED can be connected to GPIO0 to observe the behavior )
* Port_RefreshPinDirection will refresh the direction of the pins where direction changeable is FALSE
* Port_SetPinMode will change the Mode from GPIO to CAND_TX of the GPIO0 pin
* Port_GetVersionInfo will get the software version info details
#### Setup required to run example
#### How to run examples
* Open CCS and import Port Example
* Build project and start debug project
##### Sample Log of Port_Example_Init
```{literalinclude} Assets/text/Port/F29H85x/Port_Example_Init_Log.txt
```
#### File Structure
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂Can\
┃ ┣ 📂DeviceSupport\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂Mcu\
┃ ┣ 📂**Port**\
┃ ┃ ┗ 📂 **Port_Example_Init**\
┃ ┃ ┃ ┣ 📂ccs\
┃ ┃ ┃ ┃ ┗ 📜**Port_Example_Init.projectspec**\
┃ ┃ ┃ ┣ 📂Port_Example_Init_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Port.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Port_Cfg.h** : *Contains the generated pre-compiler configuration header.**\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Port_PBcfg.c** : *Contains the Post build configuration parameters.*\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┗ ┗ 📜**📂Port_Example_Init.c** : *Example application for Port*\
┃ ┗ 📜CMakeLists.txt\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{Note}
Either Port_PBcfg.c OR Port_Cfg.c will be present based on selected config variant by user
## SPI Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|SPI |Serial peripheral Interface|
|AUTOSAR |AUTomotive Open System ARchitecture|
|BSW |Basic Software|
|RTE |Runtime Environment|
|MCAL |MicroController Abstraction Layer|
|API |Application Programming Interface|
|ECU |Electronic Control Unit|
|CS |Chip Select|
|MISO |Master Input Slave Output|
|MOSI |Master Output Slave Input|
|Master |A device controlling other devices (slaves)|
|Slave |A device being completely controlled by a master device|
|Channel |A Channel is a software exchange medium for data that are defined with the same criteria: Config. Parameters, Number of Data elements with same size and data pointers (Source & Destination) or location. |
|Job |A Job is composed of one or several Channels with the same Chip Select (is not released during the processing of Job). A Job is considered atomic and therefore cannot be interrupted by another Job. A Job has an assigned priority.|
|Sequence |A Sequence is a number of consecutive Jobs to transmit but it can be rescheduled between Jobs using a priority mechanism. A Sequence transmission is interruptible (by another Sequence transmission) or not depending on a static configuration|
|ID|Identification Number of an element (Channel, Job, Sequence)|
|EB|Externally buffered channels. Buffers containing data to transfer are outside the SPI Handler/Driver|
|IB |Internally buffered channels. Buffers containing data to transfer are inside the SPI Handler/Driver.|
|NMI |Non Maskable Interrupt|
|OS |Operating System|
|DET |Default Error Tracer|
|DEM |Diagnostic Event Manager – module to handle diagnostic relevant events.|
|DAR |Decision Analysis and Resolution|
|SoC |System on a Chip|
### Introduction
The SPI driver provides services for basic transmission and reception of SPI data using channels, Jobs and Sequences software components.
These API's and components can be used by an application.
```{figure} Assets/images/Spi_Autosar_MCAL.png
:alt: SPI MCAL AUTOSAR
:align: center
SPI MCAL AUTOSAR
```
This document details AUTOSAR BSW SPI module implementation
|Supported AUTOSAR Release|**4.3.1**|
|------|-------------|
| **Supported Configuration Variants** | **Pre-Compile, Link-Time & Post Build**|
| **Vendor ID** | **SPI_VENDOR_ID (44)**|
| **Module ID** | **SPI_MODULE_ID (83)**|
### Functional Overview
A SPI bus is a Controller-peripheral multi node bus system, the controller sets a Chip Select (CS) to select a peripheral for data communication. The SPI (Serial Peripheral Interface) has a 4-wire synchronous serial interface. Data communication is enabled with a Chip Select wire (CS). Data is transmitted with a 3-wire interface consisting of wires for serial data input (MOSI), serial data output (MISO) and Serial ClocK (SCK). The following SPI module provides channel based read, write and transfer access to different devices on SPI busses. A SPI channel represents data elements (8 to 16 data bits). These channels could be combined in sequence which shall not be interrupted (e.g. Daisy-Chain, EEPROM). Channels have a static configuration defining baud rate, chip select A SPI device is generally identified by the used SPI hardware unit and the associated chip select line. This module can operate only as SPI controller.
### Hardware Features
#### Hardware Features supported
* Two operational modes: Controller and Peripheral
* Baud rate: 125 different programmable rates. The maximum baud rate that can be employed is limited by the
maximum speed of the I/O buffers used on the SPI pins. See the device data sheet for more details.
* Data word length: 1 to 16 data bits
* Four clocking schemes (controlled by clock polarity and clock phase bits) include:
* Falling edge without phase delay: SPICLK active-high. SPI transmits data on the falling edge of the SPICLK signal and receives data on the rising edge of the SPICLK signal.
* Falling edge with phase delay: SPICLK active-high. SPI transmits data one half-cycle ahead of the falling edge of the SPICLK signal and receives data on the falling edge of the SPICLK signal.
* Rising edge without phase delay: SPICLK inactive-low. SPI transmits data on the rising edge of the SPICLK signal and receives data on the falling edge of the SPICLK signal.
* Rising edge with phase delay: SPICLK inactive-low. SPI transmits data one half-cycle ahead of the rising edge of the SPICLK signal and receives data on the rising edge of the SPICLK signal.
* Simultaneous receive and transmit operation (transmit function can be disabled in software)
* Transmitter and receiver operations are accomplished through either interrupt- driven or polled algorithm
* Delayed transmit control
* 16-level transmit/receive FIFO
* High-speed mode
#### Not supported Features
* The SPI Handler/Driver does not handle peripheral mode(slave mode).
* The SPI Handler/Driver only supports full-duplex mode, and F29x SPI three-wire mode is a half-duplex communication, three-wire mode is not supported in SPI Handler/Driver as per AUTOSAR.
* The LEVEL 2 SPI Handler/Driver is specified for microcontrollers that have to provide, at least, two SPI busses using separated hardware units. Otherwise, using this level of functionality does not make sense.
* SPIPTE inversion for digital audio interface receive mode on devices with two SPI modules- since it requires SPI to be configured as peripheral mode, it is not handled in SPI Handler/Driver as per AUTOSAR
#### Non compliance
* Since F29x SPI is 16 bit, SPI transfer/receive of word length greater than 16 bits are not supported.
**SWS_BSW_00042** : Detection of Development Errors: The detection and reporting of Development errors shall be performed only if the configuration parameter for detection of Development errors is set
>Partial Non Compliance Reason : Few Null pointer input parameter checks are needed irrespective of Development errors is set, to handle MISRA requirement.
**SWS_Spi_00263** : Chip Select shall be handled during Job transmission and shall be released at the end of it. This Chip Select handling shall be done according to the Job configuration parameters.
>Partial Non Compliance Reason : When peripheral engine is used, the CS might be pulled to idle state even in between channel transfer after every 8 bit or 16 bit transfer. This is a hardware limitation where the CS line cannot be controlled to stay at the active state throughout the job transfer. As a workaround, GPIO can be used as a CS so that the GPIO acts as a CS and remains in the active state throughout the job completion. This will be handled by the SPI driver and is configurable using the configuration parameter SpiCsSelection.
### Source files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂Can\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂hw_include\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Port\
┃ ┣ 📂Mcu\
┃ ┣ 📂**Spi**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Spi.h** : *Contains the API’s of the Spi driver to be used by upper layers.*\
┃ ┃ ┃ ┣ 📜**Spi_Priv.h** : *Contains data structures and Internal function declarations.*\
┃ ┃ ┃ ┣ 📜**Spi_Reg_Access.h** : *Contains the MACROs for Spi register access.*\
┃ ┃ ┃ ┗ 📜**Spi_Utils.h** : *Contains Internal function declarations.*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Spi.c** : *Contains the implementation of the API's for Spi driver.*\
┃ ┃ ┃ ┣ 📜**Spi_Irq.c** : *contains the implementation for Spi interrupts handlers.*\
┃ ┃ ┃ ┣ 📜**Spi_Priv.c** : *Contains Functions that support the API's for Spi driver*\
┃ ┃ ┃ ┗ 📜**Spi_Utils.c** : *Contains Functions that support the API's for Spi driver*\
┃ ┃ ┗ 📜CMakeLists.txt\
┣ 📂examples\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{figure} Assets/images/Spi_Header_File_Structure.png
:alt: Spi_Header_File_Structure
:align: center
Spi_Header_File_Structure
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Scheduling
|Schedule Function API|Description|
|------------|---------------|
|Spi_MainFunction_Handling| This function performs the polling of Rx interrupt flag and performs next transmission |
#### Error handling
##### Development Error Reporting
Development errors are reported to the DET using the service Det_ReportError(),when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
Development RunTime errors are reported to the DET using the service Det_ReportRuntimeError().
###### Error codes
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|API SPI_Init service is called while the SPI the driver has already been initialized|SPI_E_ALREADY_INITIALIZED|0x4A|
|API service used without module initialization|SPI_E_UNINIT|0x1A|
|APIs called with a Null Pointer|SPI_E_PARAM_POINTER|0x10|
|API parameter checking: invalid channel|SPI_E_PARAM_CHANNEL|0x0A|
|API parameter checking: invalid job|SPI_E_PARAM_JOB|0x0B|
|API parameter checking: invalid sequence|SPI_E_PARAM_SEQ|0x0C|
|API parameter checking: invalid length|SPI_E_PARAM_LENGTH|0x0D|
|API parameter checking: invalid HWUnit|SPI_E_PARAM_UNIT|0x0E|
|Runtime Error - Services called in a wrong sequence|SPI_E_SEQ_PENDING|0x2A|
|Runtime Error - Synchronous transmission service|SPI_E_SEQ_IN_PROCESS|0x3A|
##### Extended Production Error Reporting
Extended production errors are reported to the DEM using the service Dem_SetEventStatus(),
when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
### Safety Mechanism
|TI Diagnostic Unique Identifier| Summary | Description |
|SPI6|SPI Data Overrun Detection|Error detection are notified to user and Reported to DEM|
```{NOTE}
More details of Safety Mechanisms can be found in Safety Manual.
```
### Used resources
#### Interrupt Handling
[AUTOSAR_SWS_SPIDriver section: 10 Configuration specification](https://www.autosar.org/fileadmin/standards/R4.3.1/CP/AUTOSAR_SWS_SPIHandlerDriver.pdf), details the expected behavior and control flow for ISR implementation, please refer the same.
The Driver doesn’t register any interrupts handler (ISR), it’s expected that consumer of this driver registers the required interrupt handler.
For every SPI Instance, an ISR requires to be registered. The Interrupt number associated with instance of the SPI is detailed in TRM (also, please refer the Example application).
Interrupt type should be selected in SPI plugin.
|SPI Instance| Interrupt Name | Interrupt handler|
|------------|----------------|-----------------|
|SPIA| SPIA_RXINT | Spi_A_RxISR|
|SPIB| SPIB_RXINT | Spi_B_RxISR|
|SPIC| SPIC_RXINT | Spi_C_RxISR|
|SPID| SPID_RXINT | Spi_D_RxISR|
|SPIE| SPIE_RXINT | Spi_E_RxISR|
```{NOTE}
Same Interrupt Category needs to be configured in both SPI and OS Modules.
SPI Tx Interrupt is not used by SPI driver.
```
#### Instance support
|CPU instances|supported|
|-------|-------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
#### Hardware-Software Mapping
Below image shows SPI driver Hardware-Software mapping. For more information related to HW, refer the F29x Reference Manual.
```{figure} Assets/images/Spi_Hw_Sw_Mapping.png
:alt: SPI HW/SW Mapping
:align: center
Spi HW/SW Mapping
```
### Integration description
#### Dependent modules
##### DET
This implementation depends on the DET in order to report development errors
The detection of development errors is configurable (ON / OFF), The switch SPI_CFG_DEV_ERROR_DETECT will activate or deactivate the detection of all development errors.
##### DEM
SPI Production errors are reported to DEM ( Diagnostic Event Manager ) Module.
##### SchM
If multiple AUTOSAR runnables have access to the same Data Store Memory block, the exported AUTOSAR specification enforces data consistency by using an AUTOSAR exclusive area. With this specification, the runnables have mutually exclusive access to the per-instance memory global data, which prevents data corruption. Beside the OS, the BSW Scheduler provides functions that SPI module calls at begin and end of critical sections. This implementation requires 1 level of exclusive access to guard critical sections.
The data consistency mechanism that has to be applied to an ExclusiveArea might be domain, ECU or even project specific. The decision which mechanism has to be applied by RTE / Basic Software Scheduler is taken during ECU integration by setting the Exclusive Area configuration parameter **RteExclusiveAreaImplMechanism**. This parameter is an input for RTE generator.
For SPI Module, data consistency and exclusive access to critical sections are required for the following sections as shown in the table below:
| Exclusive Area Functions used | SPI Function calling Exclusive Area | Need for Exclusive Area | Recommended Exclusive Area Mapping |
|-------|-------|-------|-------|
|SPI_EXCLUSIVE_AREA_0| Spi_AsyncTransmit
Spi_Cancel
Spi_SyncTransmit
Spi_GetHWUnitStatus
Spi_WriteIB
Spi_ReadIB
Spi_SetupEB| To protect against multiple access for shared resources | **OS_RESOURCE** : If the SPI APIs are only called from pre-emptible task context, its recommended to use this mechanism as it takes care of resource access protection and task priority management.
**None**: If SPI APIs are only called from non pre-emptible task context or during init, its recommended to use this mechanism as multiple access protection to shared resource is not needed. |
##### MCU
MCU Module is required to initialize all the clock to be used by different peripherals.
##### PORT
PORT Module is required to initialize Pin configurations and MUX mode for SPI Instances.
##### DIO
Dio Module is required to handle SPI chip select when GPIO is configured to use as chip select.
#### Resource Allocator
The SPI module uses the Resource Allocator to allocate SPI peripheral instances to CPU cores and configure their memory-mapped base addresses. Each allocation is placed inside a **Context** that maps to a CPU core (e.g. `CPU1`). The **CurrentContext** parameter in the Resource Allocator selects which Context is active for MCAL execution. See the [Resource Allocator Module User Guide](Module_User_Guide_ResourceAllocator.md) for details on configuring device-specific settings.
The **Frame** parameter (`FRAME0`–`FRAME3`) selects the memory-mapped frame for the instance, enabling simultaneous access from different initiators without arbitration stalls. The **BaseAddr** is auto-calculated based on the selected instance and frame. The **DebugHaltEnabled** and **StandbyModeEnabled** parameters control peripheral behaviour during CPU debug halt and standby low-power modes respectively.
##### Resource Allocator Usage Example
To allocate SPIA to CPU1 using FRAME0:
1. In the Resource Allocator configuration, create a new Spi instance allocation under the CPU1 Context
2. Set **InstanceName** to `SPIA`
3. Set **Frame** to `FRAME0`
4. The **BaseAddr** will be automatically calculated as `SPIA_BASE_FRAME(0U)`
5. Optionally configure **DebugHaltEnabled** and **StandbyModeEnabled**
```text
Resource Allocator Configuration:
├── Context (Core: CPU1)
│ └── SpiInstanceAllocation
│ ├── InstanceName: SPIA
│ ├── Frame: FRAME0
│ ├── BaseAddr: SPIA_BASE_FRAME(0U) [auto-calculated]
│ ├── DebugHaltEnabled: true
│ └── StandbyModeEnabled: true
```
### Configuration
The Spi Driver implementation supports multiple configuration variants
The driver expects generated **Spi_Cfg.h** to be present as input file.
The associated Spi driver configuration generated source files are **Spi_LCfg.c** if Link-Time variant is selected and **Spi_PBcfg.c** if Post-Build config variant is selected, only **Spi_Cfg.c** if Pre-Compile variant is selected
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files.
#### Configuration Parameters
##### SpiDemEventParameterRefs
| Item ||
|--------|---------------|
| **Name** | SpiDemEventParameterRefs |
| **Description** | Container for the references to DemEventParameter elements which shall be invoked using the API Dem_SetEventStatus in case the corresponding error occurs. The EventId is taken from the referenced DemEventParameter's DemEventId symbolic value. The standardized errors are provided in this container and can be extended by vendor-specific error references. |
| **Multiplicity-Configuration-Class** | -- |
| Link Time | VARIANT-LINK-TIME |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
##### SpiDriver
This container contains the configuration parameters and sub containers of the AUTOSAR Spi module.
###### SpiMaxChannel
| Item ||
|--------|---------------|
| **Name** | SpiMaxChannel |
| **Description** | This parameter contains the number of Channels configured. It will be gathered by tools during the configuration stage. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 1 |
| **Min-value** | 1 |
###### SpiMaxJob
| Item ||
|--------|---------------|
| **Name** | SpiMaxJob |
| **Description** | Total number of Jobs configured. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 65535 |
| **Min-value** | 1 |
###### SpiMaxSequence
| Item ||
|--------|---------------|
| **Name** | SpiMaxSequence |
| **Description** | Total number of Sequences configured. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### SpiSequenceTimeOut
| Item ||
|--------|---------------|
| **Name** | SpiSequenceTimeOut |
| **Description** | TimeOut value for sync transmission in seconds, if sync transmission didn't happen within this time frame transmission will be aborted and DET runtime error is reported with SPI_E_SEQ_TIMEOUT error code |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 5.0E-5 |
| **Max-value** | 10.0 |
| **Min-value** | 1.0E-6 |
###### SpiCounterClockRef
| Item ||
|--------|---------------|
| **Name** | SpiCounterClockRef |
| **Description** | This parameter references the SYSCLK to convert timeout values from milliseconds to clock ticks. Users should ensure the correct clock reference point is selected to achieve accurate timeout calculations. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
###### SpiChannel
All data needed to configure one SPI-channel
###### SpiChannelId
| Item ||
|--------|---------------|
| **Name** | SpiChannelId |
| **Description** | SPI Channel ID, used as parameter in SPI API functions. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### SpiChannelType
| Item ||
|--------|---------------|
| **Name** | SpiChannelType |
| **Description** | Buffer usage with EB/IB channel. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | IB |
| **Range** | EB
IB |
###### SpiDataWidth
| Item ||
|--------|---------------|
| **Name** | SpiDataWidth |
| **Description** | This parameter is the width of a transmitted data unit. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 8 |
| **Max-value** | 16 |
| **Min-value** | 1 |
###### SpiDefaultData
| Item ||
|--------|---------------|
| **Name** | SpiDefaultData |
| **Description** | The default data to be transmitted when (for internal buffer or external buffer) the pointer passed to Spi_WriteIB (for internal buffer) or to Spi_SetupEB (for external buffer) is NULL. In case of SpiDataWidth is less than 16, only LSB bits are considered and MSB bits are ignored |
| **Multiplicity-Configuration-Class** | -- |
| Link Time | VARIANT-LINK-TIME |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | true |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 65535 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### SpiEbMaxLength
| Item ||
|--------|---------------|
| **Name** | SpiEbMaxLength |
| **Description** | This parameter contains the maximum size (number of data elements) of data buffers in case of EB Channels and only. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### SpiIbNBuffers
| Item ||
|--------|---------------|
| **Name** | SpiIbNBuffers |
| **Description** | This parameter contains the maximum number of data buffers in case of IB Channels and only. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### SpiTransferStart
| Item ||
|--------|---------------|
| **Name** | SpiTransferStart |
| **Description** | This parameter defines the first starting bit for transmission. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | MSB |
| **Range** | LSB
MSB |
###### SpiJob
All data needed to configure one SPI-Job, amongst others the connection between the internal SPI unit and the special settings for an external device is done.
###### SpiHwUnitSynchronous
| Item ||
|--------|---------------|
| **Name** | SpiHwUnitSynchronous |
| **Description** | If SpiHwUnitSynchronous is set to "SYNCHRONOUS", the SpiJob uses its containing SpiDriver in a synchronous manner. If it is set to "ASYNCHRONOUS", it uses the driver in an asynchronous way. If the parameter is not set, the SpiChannel uses the driver also in an asynchronous way. |
| **Multiplicity-Configuration-Class** | -- |
| Link Time | VARIANT-LINK-TIME |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | true |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | SYNCHRONOUS |
| **Range** | ASYNCHRONOUS
SYNCHRONOUS |
###### SpiJobEndNotification
| Item ||
|--------|---------------|
| **Name** | SpiJobEndNotification |
| **Description** | This parameter is a reference to a notification function. |
| **Multiplicity-Configuration-Class** | -- |
| Link Time | VARIANT-LINK-TIME |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | true |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### SpiJobId
| Item ||
|--------|---------------|
| **Name** | SpiJobId |
| **Description** | SPI Job ID, used as parameter in SPI API functions. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### SpiJobPriority
| Item ||
|--------|---------------|
| **Name** | SpiJobPriority |
| **Description** | Priority set accordingly to SPI093: 0, lowest, 3, highest priority |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 3 |
| **Min-value** | 0 |
###### SpiDeviceAssignment
| Item ||
|--------|---------------|
| **Name** | SpiDeviceAssignment |
| **Description** | Reference to the external device used by this job |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### SpiChannelList
References to SPI channels and their order within the Job.
###### SpiChannelIndex
| Item ||
|--------|---------------|
| **Name** | SpiChannelIndex |
| **Description** | This parameter specifies the order of Channels within the Job. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### SpiChannelAssignment
| Item ||
|--------|---------------|
| **Name** | SpiChannelAssignment |
| **Description** | A job reference to a SPI channel. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### SpiSequence
All data needed to configure one SPI-sequence
###### SpiInterruptibleSequence
| Item ||
|--------|---------------|
| **Name** | SpiInterruptibleSequence |
| **Description** | This parameter allows or not this Sequence to be suspended by another one. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### SpiSeqEndNotification
| Item ||
|--------|---------------|
| **Name** | SpiSeqEndNotification |
| **Description** | This parameter is a reference to a notification function. |
| **Multiplicity-Configuration-Class** | -- |
| Link Time | VARIANT-LINK-TIME |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | true |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### SpiSequenceId
| Item ||
|--------|---------------|
| **Name** | SpiSequenceId |
| **Description** | SPI Sequence ID, used as parameter in SPI API functions. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### SpiJobAssignment
| Item ||
|--------|---------------|
| **Name** | SpiJobAssignment |
| **Description** | A sequence references several jobs, which are executed during a communication sequence |
| **Multiplicity-Configuration-Class** | -- |
| Link Time | VARIANT-LINK-TIME |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | true |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### SpiExternalDevice
The communication settings of an external device. Closely linked to SpiJob.
###### SpiExternalDeviceId
| Item ||
|--------|---------------|
| **Name** | SpiExternalDeviceId |
| **Description** | The index of the corresponding external device config associated with job. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### SpiBaudrate
| Item ||
|--------|---------------|
| **Name** | SpiBaudrate |
| **Description** | This parameter is the communication baudrate in bits per second (bps), Range is SYSCLK/128 to SYSCLK/4 |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.0 |
| **Max-value** | 5000000.0 |
| **Min-value** | 0.0 |
```{Note}
SPI Baudrate field in the configurator is implemented as float due to AUTOSAR requirement. If a float value is configured as baud rate, the calculated clock divider value is rounded to an integer. Therefore, floating point values for baud rate are not supported.
```
###### SpiclkDivider
| Item ||
|--------|---------------|
| **Name** | SpiclkDivider |
| **Description** | This parameter is the SPIBRR value |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 127 |
| **Min-value** | 0 |
###### SpiCsIdentifier
| Item ||
|--------|---------------|
| **Name** | SpiCsIdentifier |
| **Description** | This parameter is the symbolic name to identify the Chip Select (CS) allocated to this Job. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | SPI_PERIPHERAL_CS_IDENTIFIER |
###### SpiCsPolarity
| Item ||
|--------|---------------|
| **Name** | SpiCsPolarity |
| **Description** | This parameter defines the active polarity of Chip Select. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | LOW |
| **Range** | HIGH
LOW |
###### SpiCsSelection
| Item ||
|--------|---------------|
| **Name** | SpiCsSelection |
| **Description** | When the Chip select handling is enabled (see SpiEnableCs), then this parameter specifies if the chip select is handled automatically by Peripheral HW engine or via general purpose IO by Spi driver. |
| **Multiplicity-Configuration-Class** | -- |
| Link Time | VARIANT-LINK-TIME |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | true |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CS_VIA_PERIPHERAL_ENGINE |
| **Range** | CS_VIA_GPIO
CS_VIA_PERIPHERAL_ENGINE |
###### SpiDataShiftEdge
| Item ||
|--------|---------------|
| **Name** | SpiDataShiftEdge |
| **Description** | This parameter defines the SPI data shift edge. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | TRAILING |
| **Range** | LEADING
TRAILING |
###### SpiEnableCs
| Item ||
|--------|---------------|
| **Name** | SpiEnableCs |
| **Description** | This parameter enables or not the Chip Select handling functions. If this parameter is enabled then parameter SpiCsSelection further details the type of chip selection. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### SpiHwUnit
| Item ||
|--------|---------------|
| **Name** | SpiHwUnit |
| **Description** | This parameter is the symbolic name to identify the HW SPI Hardware |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | SPIA |
| **Range** | SPIA
SPIB
SPIC
SPID
SPIE |
###### SpiShiftClockIdleLevel
| Item ||
|--------|---------------|
| **Name** | SpiShiftClockIdleLevel |
| **Description** | This parameter defines the SPI shift clock idle level. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | LOW |
| **Range** | HIGH
LOW |
###### SpiDataWordDelay
| Item ||
|--------|---------------|
| **Name** | SpiDataWordDelay |
| **Description** | This parameter defines the SPI delay between every transfer from FIFO transmit buffer to transmit shift register, work only in FIFO mode |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### SpiSysClockRef
| Item ||
|--------|---------------|
| **Name** | SpiSysClockRef |
| **Description** | Reference to the SPI clock source configuration, which is set in the MCU driver configuration. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | true |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
###### SpiCsGpioRef
| Item ||
|--------|---------------|
| **Name** | SpiCsGpioRef |
| **Description** | Reference to the Dio channel configuration to get symbolic name from Dio, which is set in the DIO driver configuration |
| **Multiplicity-Configuration-Class** | -- |
| Link Time | VARIANT-LINK-TIME |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| Post-Build-Time | VARIANT-POST-BUILD |
###### SpiHwUnitConfig
HW Unit configurations
###### SpiHighSpeedMode
| Item ||
|--------|---------------|
| **Name** | SpiHighSpeedMode |
| **Description** | Enables High speed mode for SPI instance, Note: Since only selected pins support HS mode, to enable high speed communication apropriate HS pins shall be configured for SPI in port configration, please check c29x TRM and data sheet for HS mode supported pins |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| **Default-value** | false |
###### SpiLoopBackMode
| Item ||
|--------|---------------|
| **Name** | SpiLoopBackMode |
| **Description** | Enables Loop Back mode for SPI instance |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| **Default-value** | false |
###### SpiFifoModeEnable
| Item ||
|--------|---------------|
| **Name** | SpiFifoModeEnable |
| **Description** | Enables FIFO mode for SPI instance |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| **Default-value** | true |
###### SpiIrqType
| Item ||
|--------|---------------|
| **Name** | SpiIrqType |
| **Description** | Type of Isr function: CAT1 realtime interrupt or CAT1 : interrupt void func(void) or CAT2 : ISR(func) |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | SPI_ISR_CAT2 |
| **Range** | SPI_ISR_CAT1_RTINT
SPI_ISR_CAT1_INT
SPI_ISR_CAT2 |
###### SpiHwUnitType
| Item ||
|--------|---------------|
| **Name** | SpiHwUnitType |
| **Description** | Reference to the SPI Instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
##### SpiGeneral
General configuration settings for SPI-Handler
###### SpiCancelApi
| Item ||
|--------|---------------|
| **Name** | SpiCancelApi |
| **Description** | Switches the Spi_Cancel function ON or OFF. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### SpiChannelBuffersAllowed
| Item ||
|--------|---------------|
| **Name** | SpiChannelBuffersAllowed |
| **Description** | Selects the SPI Handler/Driver Channel Buffers usage allowed and delivered, IB = 0; EB = 1; IB/EB = 2; |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 2 |
| **Max-value** | 2 |
| **Min-value** | 0 |
###### SpiChannelInternalBufferMaxLength
| Item ||
|--------|---------------|
| **Name** | SpiChannelInternalBufferMaxLength |
| **Description** | Internal Buffer length in bytes - applicable for SpiChannelBuffer type - SPI_IB. This is the maximum length that can be allocated by each channel and it is fixed.Can vary buffer length per channel by configuring SpiIbNBuffers and SpiDataWidth. Refer MCAL-24874 and MCAL-25127 |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| Post-Build-Time | VARIANT-POST-BUILD |
| **Default-value** | 64 |
| **Max-value** | 131070 |
| **Min-value** | 1 |
###### SpiDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | SpiDevErrorDetect |
| **Description** | Switches the development error detection and notification on or off. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### SpiHwStatusApi
| Item ||
|--------|---------------|
| **Name** | SpiHwStatusApi |
| **Description** | Switches the Spi_GetHWUnitStatus function ON or OFF. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### SpiInterruptibleSeqAllowed
| Item ||
|--------|---------------|
| **Name** | SpiInterruptibleSeqAllowed |
| **Description** | Switches the Interruptible Sequences handling functionality ON or OFF. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### SpiLevelDelivered
| Item ||
|--------|---------------|
| **Name** | SpiLevelDelivered |
| **Description** | Selects the SPI Handler/Driver level of scalable functionality that is available and delivered. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 2 |
| **Min-value** | 0 |
###### SpiMainFunctionPeriod
| Item ||
|--------|---------------|
| **Name** | SpiMainFunctionPeriod |
| **Description** | This parameter defines the cycle time of the function Spi_MainFunction_Handling in seconds. The parameter is not used by the driver it self, but it is used by upper layer. |
| **Multiplicity-Configuration-Class** | -- |
| Link Time | VARIANT-LINK-TIME |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.01 |
| **Max-value** | INF |
| **Min-value** | 0.0 |
###### SpiSupportConcurrentSyncTransmit
| Item ||
|--------|---------------|
| **Name** | SpiSupportConcurrentSyncTransmit |
| **Description** | Specifies whether concurrent Spi_SyncTransmit() calls for different sequences shall be configurable. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### SpiUserCallbackHeaderFile
| Item ||
|--------|---------------|
| **Name** | SpiUserCallbackHeaderFile |
| **Description** | Header file name which will be included by the Spi. The value of this parameter shall be used as h-char-sequence or q-char-sequence according to ISO C90 section 6.10.2 "source file inclusion". The parameter value MUST NOT represent a path, since ISO C90 does not specify how such a path is treated (i.e., this is implementation defined (and additionally depends on the operating system and the underlying file system)). |
| **Multiplicity-Configuration-Class** | -- |
| Link Time | VARIANT-LINK-TIME |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | HeaderFileName |
###### SpiVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | SpiVersionInfoApi |
| **Description** | Switches the Spi_GetVersionInfo function ON or OFF. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
Refer [AUTOSAR_SWS_SPIDriver section: 10 Configuration specification](https://www.autosar.org/fileadmin/standards/R4.3.1/CP/AUTOSAR_SWS_SPIDriver.pdf) for configuration parameters details
#### Steps To Configure Spi Module
1. Open EB Tresos configurator tool and load Port, Mcu, Ecum, Os, Dem and Spi modules
2. Open PORT module plugin and configure required pins as MISO, MOSI, CLK, CS.
3. Open SPI module plugin, Select the Config Variant (Pre-compile or Link-Time or Post-Build)
4. In SPI module plugin configure required parameters.
5. Save the configuration and generate the configuration.
### Examples
The example application demonstrates use of Spi module, the list below identifies key steps performed the example.
#### Spi_Example_Sync_AsyncTransfer
##### Overview of Spi_Example_Sync_AsyncTransfer
* Spi_Example_Sync_AsyncTransfer
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes required port pins for SPI.
* Spi_Init()
* Write the data into channels if channel buffer type is IB,setup buffer if channel buffer type is EB.
* Transmit One sequence Synchronously.
* Transmit another sequence Asynchronously.
* Check for HWUnit, Job, Sequence status.
* Read the data from channels.
* Validate the received data with pre-defined transmit data.
##### Setup required to run Spi_Example_Sync_AsyncTransfer
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
##### How to run Spi_Example_Sync_AsyncTransfer
* Open CCS and Import Spi_Example_Sync_AsyncTransfer
* Build project and start debug project
##### Sample Log of Spi_Example_Sync_AsyncTransfer
```{literalinclude} Assets/text/Spi/F29H85x/Spi_Example_Sync_AsyncTransfer.txt
```
#### Spi_Example_AsyncTransfer_Interrupt
##### Overview of Spi_Example_AsyncTransfer_Interrupt
* Spi_Example_AsyncTransfer_Interrupt
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes required port pins for SPI.
* Spi_Init()
* Write the data into channels if channel buffer type is IB,setup buffer if channel buffer type is EB.
* Transmit data asynchronously.
* Check for HWUnit, Job, Sequence status.
* Read the data from channels.
* Validate the received data with pre-defined transmit data.
##### Setup required to run Spi_Example_AsyncTransfer_Interrupt
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
##### How to run Spi_Example_AsyncTransfer_Interrupt
* Open CCS and Import Spi_Example_AsyncTransfer_Interrupt
* Build project and start debug project
##### Sample Log of Spi_Example_AsyncTransfer_Interrupt
```{literalinclude} Assets/text/Spi/F29H85x/Spi_Example_AsyncTransfer_Interrupt.txt
```
#### Spi_Example_SyncTransfer
##### Overview of Spi_Example_SyncTransfer
* Spi_Example_SyncTransfer
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes required port pins for SPI.
* Spi_Init()
* Write the data into channels if channel buffer type is IB,setup buffer if channel buffer type is EB.
* Transmit data synchronously.
* Check for HWUnit, Job, Sequence status.
* Read the data from channels.
* Validate the received data with pre-defined transmit data.
##### Setup required to run Spi_Example_SyncTransfer
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
##### How to run Spi_Example_SyncTransfer
* Open CCS and Import Spi_Example_SyncTransfer
* Build project and start debug project
##### Sample Log of Spi_Example_SyncTransfer
```{literalinclude} Assets/text/Spi/F29H85x/Spi_Example_SyncTransfer.txt
```
#### Spi_Example_External_Loopback
##### Overview of Spi_Example_External_Loopback
* Spi_Example_External_Loopback
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes required port pins for SPI.
* Call Spi_Init() to initialize SPI Driver
* Initialize Internal and External Buffers.
* Transmit data synchronously.
* Read the data from channels.
* Received data can be seen in Spi_DestBuf0
* Validate the received data with pre-defined transmit data.
##### Setup required to run Spi_Example_External_Loopback
* Connect the hardware and power up
* Makes sure to disable the S2 POCI switch on the XDS110 to OFF (Only when used with SOM EVM) as shown below:
```{figure} Assets/images/S2_POCI_Switch_XDS110.png
:alt: S2 POCI Switch on XDS110 Debugger
:align: center
S2 POCI Switch on XDS110 Debugger
```
* Place the SOM on Bank Mode 2 and disable FOTA.
* Make necessary connections between SPI A and SPI D as shown in the figure below:
```{figure} Assets/images/Spi_Example_External_Loopback_Connections.png
:alt: SPI Example External Loopback Connections
:align: center
SPI Example External Loopback Connections
```
* Connect the uart set up to check the log on serial console
##### How to run Spi_Example_External_Loopback
* Build the example to generate .out.
* Connect to CPU1 and load only the Spi_Example_External_Loopback_merged.out.
* After the program is loaded, run CPU1.
* CPU1 configures and releases CPU3 out of reset.
* CPU1 pauses due to software breakpoint (EMUSTOP0).
* Connect to CPU3 target now. C29x3.out would have started execution as soon as it is released from reset.
* Resume CPU1 after CPU3 starts running.
```{Note}
Note: To visualize the CPU3 source file (in debug mode), load the CPU3.out by clicking on the "Load Symbols" option.
```
##### Sample Log of Spi_Example_External_Loopback
```{literalinclude} Assets/text/Spi/F29H85x/Spi_Example_External_Loopback.txt
```
#### File Structure
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂Can\
┃ ┣ 📂DeviceSupport\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┣ 📂**Spi**\
┃ ┃ ┣ 📂 **Spi_Example_Sync_AsyncTransfer**\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜**Spi_Example_Sync_AsyncTransfer.projectspec**\
┃ ┃ ┃ ┣ 📂F29H85x_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Port.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Spi.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Spi_Cfg.h** : *Contains the generated pre-compiler configuration header.*\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Port_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Spi_PBcfg.c** : *Contains the Post build configuration parameters.*\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜**Spi_Example_Sync_AsyncTransfer.c** : *Example application for Spi*\
┃ ┃ ┃ ┗ 📜**Spi_Example_Sync_AsyncTransfer.h** : *Example application for Spi*\
┃ ┃ ┣ 📂 **Spi_Example_AsyncTransfer_Interrupt**\
┃ ┃ ┗ 📂 **Spi_Example_SyncTransfer**\
┃ ┗ 📜CMakeLists.txt\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{Note}
Spi_PBcfg.c will be present if Post-Build config variant is selected, only Spi_Cfg.c will be present if Pre-Compile variant is selected and only Spi_Lcfg.c will be present if Link-Time variant is selected
```
## WDG Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|RTE|Runtime Environment|
|BSW|Basic Software|
|MCU|Micro-Controller Unit|
|MCAL|Micro-Controller Abstraction Layer|
|API|Application Programming Interface|
|DET|Default Error Tracer|
|DEM|Diagnostics Event Manager|
|HW |Hardware|
|SW |Software|
|I/O|Input/Output|
|WDG|Watchdog|
### Introduction
The Wdg module provides services for initialization, changing the operation mode and setting the trigger condition (timeout).
```{figure} Assets/images/Wdg_Autosar_MCAL.png
:alt: WDG MCAL AUTOSAR
:align: center
WDG MCAL AUTOSAR
```
This document details AUTOSAR BSW WDG module implementation
|Supported AUTOSAR Release|**: 4.3.1**|
|-------------------------|-----------|
| **Supported Configuration Variants** | **: Pre-Compile, Link-Time & Post Build**|
| **Vendor ID** | **: WDG_VENDOR_ID (44)**|
| **Module ID** | **: WDG_MODULE_ID (102)**|
### Functional Overview
The watchdog module generates an output pulse 512 watchdog-clocks (WDCLKs) wide whenever the 8-bit watchdog up counter has reached the maximum value. The watchdog clock source is INTOSC1 which is 10 MHz clock. Software must periodically write a 0x55 + 0xAA sequence into the watchdog key register to reset the watchdog counter. The counter can also be disabled.
```{figure} Assets/images/Wdg_Timer_Module.png
:alt: WDG MCAL AUTOSAR
:align: center
WDG TIMER MODULE
```
### Hardware Features
#### Hardware Features supported
The main features includes Servicing the Watchdog Timer, Minimum Window Check, Watchdog Reset or Watchdog Interrupt Mode and Watchdog Operation in Low-Power Modes. Details are explained in below sections.
##### Servicing the Watchdog Timer
The watchdog counter (WDCNTR) is reset when the proper sequence is written to the WDKEY register before the 8-bit watchdog counter overflows. The WDCNTR is reset-enabled when a value of 0x55 is written to the WDKEY. When the next value written to the WDKEY register is 0xAA, then the WDCNTR is reset. Any value written to the WDKEY other than 0x55 or 0xAA causes no action. Any sequence of 0x55 and 0xAA values can be written to the WDKEY without causing a system reset; only a write of 0x55 followed by a write of 0xAA to the WDKEY resets the WDCNTR.
##### Minimum Window Check
To complement the timeout mechanism, the watchdog also contains an optional "windowing" feature that requires a minimum delay between counter resets.
To set the window minimum, write the desired minimum watchdog count to the WDWCR register. This value takes effect after the next WDKEY sequence. From then on, any attempt to service the watchdog when WDCNTR is less than WDWCR triggers a watchdog interrupt or reset. When WDCNTR is greater than or equal to WDWCR, the watchdog can be serviced normally.
##### Watchdog Reset or Watchdog Interrupt Mode
The watchdog can be configured in the SCSR register to either reset the device (WDRST) or assert an interrupt (WDINT), if the watchdog counter reaches the maximum value.
**Reset mode**: If the watchdog is configured to reset the device, then the WDRST signal pulls the device reset (XRS) pin low for 512 OSCCLK cycles when the watchdog counter reaches the maximum value.
**Interrupt mode**: When the watchdog counter expires, the watchdog asserts an interrupt by driving the WDINT signal low for 512 OSCCLK cycles. WDINT is mapped to the PIPE module to assert appropriate CPU interrupt line as configured.
##### Watchdog Operation in Low-Power Modes
**IDLE mode**: In IDLE mode, the watchdog interrupt (WDINT) signal can generate an interrupt to the CPU to take the CPU out of IDLE mode.
**STANDBY mode**:In STANDBY mode, clocks to the peripherals are turned off based on LPMCR, PCLKCRx and STANDBYEN registers. The CPU clock is gated when entering STANDBY mode based on LPMCR.LPM configuration but the watchdog remains functional since the module runs off the internal oscillator clock (INTOSC1). The WDINTsignal is applied to the Low Power Modes (LPM) block, so that the LPM block can be used to wake the CPU from STANDBY low-power mode.
#### Not supported Features
None
#### Non compliance
Below AUTOSAR design requirements are not supported for Wdg Driver:
**SWS_Wdg_00136** : *The function SetTriggerCondition shall reset the watchdog timeout counter according to the timeout value passed.*
>Rejection Reason : When user request non zero timeout value in Wdg_SetTriggerCondition API, it will be ignored. Due to hardware limitation, it is not possible to set the hardware watchdog counter value based on user provided timeout. Timeout value will always remain as per statically configured slow and fast mode timeout values.
**SWS_Wdg_00034** : *General design rule: configure Start address of trigger routine*
>Rejection Reason : Trigger routine information is not provided by hardware and not needed by the system.
**SWS_Wdg_00076** : *External Watchdog Driver*
>Rejection Reason : Internal watchdog is only supported, external watchdog support is not part of the current implementation.
For more details, Refer [AUTOSAR_SWS_WdgDriver](https://www.autosar.org/fileadmin/standards/R4.3.1/CP/AUTOSAR_SWS_WatchdogDriver.pdf)
### Source files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂Can\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂hw_include\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┗ 📂**Wdg**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Wdg_Priv.h** : *Contains data structures and Internal function declarations.*\
┃ ┃ ┃ ┗ 📜**Wdg.h** : *Contains the API declarations of the Wdg driver to be used by upper layers.*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Wdg_Priv.c** : *Contains Functions that support the API for Wdg driver*\
┃ ┃ ┃ ┗ 📜**Wdg.c** : *Contains the implementation of the API for Wdg driver.*\
┃ ┃ ┗ 📜CMakeLists.txt\
┣ 📂examples\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{figure} Assets/images/Wdg_Header_File_Structure.png
:alt: Wdg Header File Structure
:align: center
Wdg Header File Structure
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Scheduling
None
#### Error handling
##### Development Error Reporting
Development errors are reported to the DET using the service Det_ReportError(), when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
##### Extended Production Error Reporting
Extended production errors are reported to the DEM using the service Dem_SetEventStatus(), when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
#### Error codes
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|API service used in wrong context: |WDG_E_DRIVER_STATE|0x10|
|API service called with wrong / inconsistent parameter(s): |WDG_E_PARAM_MODE|0x11|
|API service called with wrong / inconsistent parameter(s): |WDG_E_PARAM_CONFIG|0x12|
|The passed timeout value is higher than the maximum timeout value: |WDG_E_PARAM_TIMEOUT|0x13|
|API is called with wrong pointer value|WDG_E_PARAM_POINTER|0x14|
|Invalid configuration set selection|WDG_E_INIT_FAILED|0x15|
### Safety Mechanism
|TI Diagnostic Unique Identifier| Summary | Description |
|------------|-----------------|----------------|
|CLK6| Internal Watchdog | Error detection are notified to user and Reported to DET & DEM |
```{NOTE}
More details of Safety Mechanisms can be found in Safety Manual.
```
### Used resources
#### Interrupt Handling
There are no Interrupts in Wdg. The Watchdog module does not use any hardware interrupts; it operates by triggering a system reset upon timeout expiry.
#### Instance support
|CPU instances|supported|
|-------|-------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
#### Hardware-Software Mapping
Below image shows Wdg driver Hardware-Software mapping. For more information related to HW/SW mapping, refer the F29 Reference Manual.
```{figure} Assets/images/Wdg_HW_SW_Mapping.png
:alt: Wdg HW/SW Mapping
:align: center
Wdg HW/SW Mapping
```
### Integration description
#### Dependent modules
##### DET
This implementation depends on the DET in order to report development errors. The detection of development errors is configurable (ON / OFF), The switch WDG_DEV_ERROR_DETECT will activate or deactivate the detection of all development errors.
##### DEM
This implementation depends on the DEM in order to report Extended production errors and can be turned OFF. The switch WDG_DEM_ENABLE will activate or deactivate the detection of all extended production errors.
#### Multi-core and Resource allocator
The WDG module is not managed by the Resource Allocator. The Watchdog timer on F29H85x is a system-level peripheral that is exclusively controlled by CPU1 and cannot be allocated to other cores. Because the Watchdog is not a shareable, multi-core resource, it is not represented in the Resource Allocator configuration. No Resource Allocator instance allocation is needed for the WDG module.
### Configuration
The Wdg Driver implementation supports multiple configuration variants, namely Wdg Post-Build config and Pre-Compile config. The driver expects generated **Wdg_Cfg.h** to be present as input file.
The associated Wdg driver configuration generated source files are **Wdg_Cfg.c** or **Wdg_Lcfg.c** or **Wdg_PBcfg.c**
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files.
#### Configuration Parameters
##### WdgDemEventParameterRefs
| Item ||
|--------|---------------|
| **Name** | WdgDemEventParameterRefs |
| **Description** | Container for the references to DemEventParameter elements which shall be invoked using the API Dem_SetEventStatus in case the corresponding error occurs. The EventId is taken from the referenced DemEventParameter's DemEventId symbolic value. The standardized errors are provided in this container and can be extended by vendor-specific error references. |
| **Post-build-variant-multiplicity** | false |
| **Multiplicity-Configuration-Class** | -- |
| Link Time | VARIANT-LINK-TIME |
| Post-Build Time | VARIANT-POST-BUILD |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
##### WdgGeneral
All general parameters of the watchdog driver are collected here.
###### WdgDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | WdgDevErrorDetect |
| **Description** | Switches the development error detection and notification on or off. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### WdgDisableAllowed
| Item ||
|--------|---------------|
| **Name** | WdgDisableAllowed |
| **Description** | Compile switch to allow / forbid disabling the watchdog driver during runtime. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### WdgIndex
| Item ||
|--------|---------------|
| **Name** | WdgIndex |
| **Description** | Specifies the InstanceId of this module instance. If only one instance is present it shall have the Id 0. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### WdgInitialTimeout
| Item ||
|--------|---------------|
| **Name** | WdgInitialTimeout |
| **Description** | This is read only parameter just to display the initial timeout value based on the default mode. The initial timeout (sec) for the trigger condition to be initialized during Init function. It shall be not larger than WdgMaxTimeout. (click on auto calculate before generating) |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.1 |
| **Max-value** | 0.1 |
| **Min-value** | 0.0 |
###### WdgMaxTimeout
| Item ||
|--------|---------------|
| **Name** | WdgMaxTimeout |
| **Description** | This is read only parameter just to display the maximum timeout value based on the default mode. The maximum timeout (sec) to which the watchdog trigger condition can be initialized.Set the fast/slow mode timeout settings. (click on auto calculate before generating) |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 6.684672000000001 |
| **Max-value** | 7.0 |
| **Min-value** | 0.0 |
###### WdgRunArea
| Item ||
|--------|---------------|
| **Name** | WdgRunArea |
| **Description** | Represents the watchdog driver execution area is either from ROM(Flash) or RAM as required with the particular microcontroller. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | RAM |
| **Range** | RAM
ROM |
###### WdgTriggerLocation
| Item ||
|--------|---------------|
| **Name** | WdgTriggerLocation |
| **Description** | Location (memory address) of the watchdog trigger routine. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### WdgVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | WdgVersionInfoApi |
| **Description** | Compile switch to enable / disable the version information API |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Link-Time | VARIANT-LINK-TIME |
| Post-Build-Time | VARIANT-POST-BUILD |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
Refer [AUTOSAR_SWS_WDGDriver section: 10 Configuration specification](https://www.autosar.org/fileadmin/standards/R4.3.1/CP/AUTOSAR_SWS_WatchdogDriver.pdf) for configuration parameters details
#### Steps To Configure Wdg Module
1. Open EB Tresos configurator tool, load Wdg and Dem modules. Select the Config Variant ( Precompile/Post-Build/Link-Time)
2. Open DEM module plugin and register DEM event "WDG_E_DISABLE_REJECTED" & "WDG_E_MODE_FAILED" to report extended production errors
3. Open WDG module plugin and make sure that required parameters and mode settings are configured correctly
4. Make sure that fastmode, slowmode configuration settings are provided
5. Save the configuration and generate the configuration.
### Examples
The example application demonstrates use of Wdg module, the list below identifies key steps performed the example.
#### Wdg_Example_Service
##### Overview of Wdg_Example_Service
* Wdg_Example_Service
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
* Verify the wdg servicing without expiry on configured timeouts
##### Setup required to run Wdg_Example_Service
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
##### How to run Wdg_Example_Service
* Open CCS and Import Wdg_Example_Service example
* Build project and start debug project
##### Sample Log of Wdg_Example_Service
```{literalinclude} Assets/text/Wdg/Wdg_Example_Service.txt
```
#### Wdg_Example_Interrupt
##### Overview of Wdg_Example_Interrupt
* Wdg_Example_Interrupt
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
* Verify the wdg interrupts generation on timeout
##### Setup required to run Wdg_Example_Interrupt
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
##### How to run Wdg_Example_Interrupt
* Open CCS and Import Wdg_Example_Interrupt example
* Build project and start debug project
##### Sample Log of Wdg_Example_Interrupt
```{literalinclude} Assets/text/Wdg/Wdg_Example_Interrupt.txt
```
#### Wdg_Example_Reset
##### Overview of Wdg_Example_Reset
* Wdg_Example_Reset
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
* Demonstrates watchdog timer reset functionality when the watchdog is intentionally not serviced
* Detects reset reason using Mcu_GetResetReason() API to identify MCU_WATCHDOG_RESET (value = 3)
* Uses USER_REG1_PORESETN register to maintain a persistent counter across watchdog resets. This register retains data until PORESETn, so there should not be any other PORESETn in between.
* Repeats the watchdog timeout cycle up to 20 times to verify reset behavior
* After completion, disables the watchdog using Wdg_SetMode(WDGIF_OFF_MODE)
##### Setup required to run Wdg_Example_Reset
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
##### How to run Wdg_Example_Reset
* Open CCS and Import Wdg_Example_Reset example
* Build project and start debug project
##### Sample Log of Wdg_Example_Reset
```{literalinclude} Assets/text/Wdg/Wdg_Example_Reset.txt
:language: none
```
#### File Structure
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂Can\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┣ 📂**Wdg**\
┃ ┃ ┗ 📂 **📂Wdg_Example_Service**\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜**📜Wdg_Example_Service.projectspec**\
┃ ┃ ┃ ┣ 📂📜Wdg_Service_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Wdg.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Wdg_Cfg.h** : *Contains the generated pre-compiler configuration header.*\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Wdg_PBcfg.c** : *Contains the Post build configuration parameters.*\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┗ ┗ 📜**Wdg_Example_Service.c** : *Example application for Wdg*\
┃ ┗ 📜CMakeLists.txt\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{Note}
Either Wdg_PBcfg.c OR Wdg_Lcfg.c OR Wdg_Cfg.c will be present based on selected config variant by user
```
## CDD ADC Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|ADC|Analog to Digital Conversion|
|API|Application Programming Interface|
|BSW|Basic Software|
|ECU|Electronic Control Unit|
|DET|Default Error Tracer|
|HW |Hardware|
|SW |Software|
|I/O|Input/Output|
|MCAL|Micro Controller Abstraction Layer|
|CDD|Complex Device Driver|
|OS|Operating System|
|RTE|Runtime Environment|
|SOC|Start of Conversion|
|EOC|End of Conversion|
|S&H|Sample and Hold|
|SAR|Successive-Approximation-Register|
|SYSCLK|System Clock|
|HW Unit|Represents a microcontroller input electronic device that includes all parts necessary to perform an “analogue to digital conversion"|
|ADC channel |Represents a logical ADC entity bound to one port pin. Multiple ADC entities can be mapped to the same port pin|
|ADC channel group|A group of ADC channels linked to the same ADC hardware unit (e.g., one Sample & Hold and one A/D converter).The conversion of the whole group is triggered by one trigger source.|
|ADC result buffer|The user of the ADC Driver has to provide a buffer for every group. This buffer can hold multiple samples of the same channel group if streaming access mode is selected. If single access mode is selected one sample of each group channel is held in the buffer.|
|Trigger Source|Source event that starts a single conversion or a continuous series of conversions.
Software Trigger: Software API call that starts the conversion of one ADC channel group or a continuous series of ADC channel group conversions.
Hardware Trigger: ADC internal trigger signal that starts one conversion of an ADC channel group. ADC hardware trigger are generated internally in the ADC hardware, e.g. based on an ADC timer or a trigger edge signal. The trigger hardware is tightly coupled or integrated in the ADC hardware. No software is required to start the ADC channel group conversion after the hardware trigger is detected.|
|Conversion Mode|One-Shot:The conversion of an ADC channel group is performed once after a trigger and the result is written to the assigned buffer.A trigger can be a software API call or a hardware event.
Continuous:The conversions of an ADC channel group are performed continuously after a software API call (start). The conversions themselves are running automatically (hardware/interrupt controlled). The Continuous conversions can be stopped by a software API call (stop).|
|Sampling Time|Time during which the analogue value is sampled (e.g. loading the capacitor, …)|
|Conversion Time|Time during which the sampled analogue value is converted into digital representation|
|Acquisition Time|Acquisition Time = Sampling Time+ Conversion Time|
|GPT|General Purpose Timer|
### Introduction
The ADC driver is a part of complex device drivers (CDD) which converts the analog input to digital. It provides services to start and stop a group conversion respectively to enable and disable the trigger source for a conversion. Furthermore, it provides services to enable and disable a notification mechanism and routines to query the status and result of the group conversions.
```{figure} Assets/images/Cdd_Adc_Autosar_CDD.png
:alt: CDD_ADC MCAL AUTOSAR
:align: center
CDD_ADC MCAL AUTOSAR
```
This document details AUTOSAR BSW CDD_ADC module implementation
|Supported AUTOSAR Release|**4.3.1**|
|------|-------------|
| **Supported Configuration Variants** | **Pre-Compile**|
| **Vendor ID** | **CDD_ADC_VENDOR_ID (44)**|
| **Module ID** | **CDD_ADC_MODULE_ID (255)**|
### Functional Overview
The ADC peripheral initializes and controls the internal Analogue Digital Converter Unit(s) of the microcontroller. The ADC peripheral in the device is Successive Approximation (SAR) type of ADC . The ADC peripherals on this device support selectable resolution of either 16 bit or 12 bit.The ADC is composed of a core and a wrapper; the core is composed of the analog circuits which include the channel select MUX, the Sample-and-Hold (S/H) circuit, the successive approximation circuits, voltage reference circuits, and other analog support circuits. The wrapper is composed of the digital circuits that configure and control the ADC. These circuits include the logic for programmable conversions, result registers, interfaces to analog circuits, interfaces to the peripheral buses,post-processing circuits, and interfaces to other on-chip peripherals.
```{note}
**ADC Converter Enable Timing:** The application should wait for the necessary delay after all ADC converters have begun powering up(Cdd_Adc_Init) before triggering any SOC conversion. Refer to the device data sheet for the specific timing requirement. This delay ensures proper ADC initialization and stable operation.
```
### Hardware Features
#### Hardware Features supported
The ADC module includes the following features:
* Selectable resolution of 12 bits or 16 bits.
* Ratiometric external reference set by VREFHI and VREFLO pins.
* Selectable internal reference of 2.5V or 3.3V.
* Differential signal conversions and Single-ended signal conversions.
* Input multiplexer with up to 80 channels (single-ended) or 40 channels (differential).
```{note}
F29P32x Device Variant Limitations: On F29P32x devices, the following features are not supported:
- 16-bit resolution mode: F29P32x ADC instances support 12-bit resolution only.
- Differential signal conversion mode: F29P32x ADC instances support single-ended conversions only.
See [Device-Variant Specific Limitations](#device-variant-specific-limitations) for details.
```
* External channel mux option to expand available ADC channels.
* 32 configurable SOCs.
* 32 individually addressable result registers.
* Two trigger repeater modules, enabling customizable hardware oversampling and undersampling modes with little or no CPU overhead.
* Multiple trigger sources -
* S/W (with available global synchronization for multiple ADCs) - software immediate start
* All ePWMs - ADCSOC A or B
* GPIO XINT2
* CPU Timers 0/1/2 (from each C29 core present)
* ADCINT1/2
* ECAP events in capture mode (CEVT1, CEVT2, CEVT3, and CEVT4) and APWM mode (period match,
compare match, or both)
```{note}
**Trigger Source Availability:** The trigger source list in the configuration tool contains a superset of all triggers available across all device variants. Before configuring a trigger source, verify its availability for your specific device variant by consulting the device datasheet.
```
* Four flexible PIPE interrupts
* Configurable interrupt placement
* Four post-processing blocks(PPB), each with:
* Saturating offset calibration
* Error from set-point calculation
* High, low, and zero-crossing compare, with interrupt and ePWM trip capability
* Trigger-to-sample delay capture
* Aggregation functions: max, min, sum, and average (binary shift)
* Configurable digital filter for high/low/zero-crossing compare
* Absolute value function
* Delta enable function
* Two's complement function
* Cycle by cycle enable function
* Result safety checkers to compare SOC results on same ADC or multiple ADC instances
```{figure} Assets/images/Cdd_Adc_Block_Diagram.png
:alt: Cdd_Adc Block diagram
:align: center
Cdd_Adc Block Diagram
```
```{figure} Assets/images/Cdd_Adc_SafetyChecker_Block_Diagram.png
:alt: Cdd_Adc Block diagram
:align: center
Cdd_Adc Result Safety Checker Block Diagram
```
#### Features not supported by Hardware
* The 1.65V internal reference mode is not supported when the ADC is configured for 16-bit resolution.
* Temperature sensor sampled in 16-bit mode. It can cause incorrect ADC results.To sample the temperature sensor, the ADC must be in single-ended 12-bit mode.
```{note}
**Temperature Sensor Sample Window Configuration:**
- The minimum sample window for the channel linked to the temperature sensor should be configured according to the device datasheet specifications to ensure accurate temperature readings.
- Refer to the device-specific datasheet for the recommended minimum sample window duration.
```
#### Device-Variant Specific Limitations
**F29P32x devices:**
* **16-bit resolution mode is not supported.** F29P32x ADC instances support 12-bit resolution only.
* **Differential signal conversion mode is not supported.** F29P32x ADC instances support single-ended conversions only.
```{note}
The device family is selected in the Resource Allocator module. Ensure the correct device variant (F29P32x, F29H85x, or F29P58x) is configured in the Resource Allocator so that device-specific constraints are applied correctly.
```
#### Features Not supported by the driver
* Burst mode
* PPB external hardware sync input
* PPB oversampling interrupt
#### Non compliance
None
### Source files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂Can\
┃ ┣ 📂**Cdd_Adc**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Cdd_Adc.h** : *Contains the API declarations of the Cdd_Adc driver to be used by upper layers.*\
┃ ┃ ┃ ┣ 📜**Cdd_Adc_Priv.h** : *Contains data structures and Internal function declarations.*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Cdd_Adc.c** : *Contains the implementation of the API for Cdd_Adc driver.*\
┃ ┃ ┃ ┣ 📜**Cdd_Adc_Irq.c** : *Contains the implementation for Cdd_Adc interrupts handlers.*\
┃ ┃ ┃ ┗ 📜**Cdd_Adc_Priv.c** : *Contains Functions that support the API for Cdd_Adc driver*\
┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Cdd_Sent\
┃ ┣ 📂Cdd_Xbar\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂hw_include\
┃ ┣ 📂Lin\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Mcu\
┃ ┗ 📂Port\
┃ ┗ 📂Spi\
┃ ┗ 📂Wdg\
┣ 📂examples\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{figure} Assets/images/Cdd_Adc_Header_File_Structure.png
:alt: Cdd_Adc Header File Structure
:align: center
Cdd_Adc Header File Structure
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Scheduling
None
#### Error handling
Development errors are reported to the DET using the service Det_ReportError(), when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
#### Error codes
##### Development Errors
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|API called when driver is not initialized|CDD_ADC_E_UNINIT|0x0AU|
|Init API called when the driver is already initialized|CDD_ADC_E_ALREADY_INITIALIZED|0x0DU|
|API called with incorrect configuration parameter|CDD_ADC_E_PARAM_EVENT|0x0EU|
|Init API called with non NULL_PTR
API called with NULL_PTR (except Init API)|CDD_ADC_E_PARAM_POINTER|0x14U|
|API called with invalid group ID|CDD_ADC_E_PARAM_GROUP|0x15U|
|Cdd_Adc_SetResolution API is called when the hardware is in Internal 3.3V reference mode or called on 12-bit ADC hardware units(ADCC,ADCD & ADCE) and 16bit resolution is requested|CDD_ADC_E_WRONG_RESOLUTION_MODE|0x18U|
|Cdd_Adc_EnableHardwareTrigger or Cdd_Adc_DisableHardwareTrigger API called on a group with conversion mode configured as continuous|CDD_ADC_E_WRONG_CONV_MODE|0x1AU|
|Incorrect API call for group conversion|CDD_ADC_E_WRONG_TRIGG_SRC|0x1BU|
|Cdd_Adc_EnableGroupNotification or Cdd_Adc_DisableGroupNotification API called for a group whose configuration set has no notification available|CDD_ADC_E_NOTIF_CAPABILITY|0x1CU|
|API called for group conversion before setting up the result buffer|CDD_ADC_E_BUFFER_UNINIT|0x1DU|
|API called with invalid hardware unit ID|CDD_ADC_E_INVALID_ID|0x22U|
|API called with invalid resolution|CDD_ADC_E_INVALID_RESOLUTION|0x23U|
|API called with invalid interrupt ID|CDD_ADC_E_INVALID_INTERRUPT_ID|0x24U|
|API called with wrong processing mode (e.g., DMA mode API called on non-DMA group)|CDD_ADC_E_WRONG_PROCESSING_MODE|0x25U|
|API called for group with wrong trigger source type|CDD_ADC_E_WRONG_TRIGG_TYPE|0x26U|
##### Runtime Errors
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|API called during ongoing group conversion|CDD_ADC_E_BUSY|0x0BU|
|API called when group conversion is not on-going|CDD_ADC_E_IDLE|0x0CU|
|Cdd_Adc_GetDelayStamp API called for software triggered PPB|CDD_ADC_E_WRONG_TRIGG_SRC|0x1BU|
|API called when safety checker is IDLE|CDD_ADC_E_CHECKER_IDLE|0x1FU|
|API called when safety checker is BUSY|CDD_ADC_E_CHECKER_BUSY|0x20U|
|Cdd_Adc_SetResolution API called on a hardware unit whose resolution is same as the requested resolution|CDD_ADC_E_ALREADY_SET|0x21U|
### Silicon errata workarounds and recommendation
For detailed silicon errata, refer to the [F29H85x, F29P58x, and F29P32x Real-Time MCUs Silicon Errata](https://www.ti.com/lit/er/sprz569c/sprz569c.pdf).
| Advisory | Workaround in MCAL driver | Recommended actions for user |
|----------|--------------------------|-------------------------------|
| ADC: Interrupts may stop if INTxCONT (Continue-to-Interrupt Mode) is not set | 1. Use Continue-to-Interrupt Mode to prevent the ADCINTFLG from blocking additional ADC interrupts (enable `CddAdcContinueToInterruptMode` for the specified interrupt in EB Tresos to use ContinueToInterrupt mode).
2. Check for an overflow condition(ADCINTOVF flag status) in the ISR when clearing the ADCINTFLG: check ADCINTOVF immediately after writing to ADCINTFLGCLR; if it is set, clear ADCINTOVF and write ADCINTFLGCLR a second time to ensure the ADCINTFLG is cleared. The ADCINTOVF register will be set, indicating an ADC conversion interrupt was lost.| Ensure there is always sufficient time to service the ADC ISR and clear the ADCINTFLG before the next ADC interrupt occurs to avoid this condition.|
### Used resources
#### Interrupt Handling
Cdd_Adc driver provides ISRs. The ISRs are implemented in the Cdd_Adc_Irq.c file.
Interrupt and the category should be selected in the Cdd_Adc plugin.The Interrupt ID associated with the ADC instance is mentioned in the TRM (also, please refer the Example application).
|Cdd_Adc Instance| Interrupt Name | Interrupt handler|
|------------|----------------|-----------------|
|ADCA| ADCAINT1 | Cdd_Adc_ADCA_Int1Isr|
|ADCA| ADCAINT2 | Cdd_Adc_ADCA_Int2Isr|
|ADCA| ADCAINT3 | Cdd_Adc_ADCA_Int3Isr|
|ADCA| ADCAINT4 | Cdd_Adc_ADCA_Int4Isr|
|ADCA| ADCA_EVT_INT | Cdd_Adc_ADCA_PpbEvtIntIsr|
|ADCB| ADCBINT1 | Cdd_Adc_ADCB_Int1Isr|
|ADCB| ADCBINT2 | Cdd_Adc_ADCB_Int2Isr|
|ADCB| ADCBINT3 | Cdd_Adc_ADCB_Int3Isr|
|ADCB| ADCBINT4 | Cdd_Adc_ADCB_Int4Isr|
|ADCB| ADCB_EVT_INT | Cdd_Adc_ADCB_PpbEvtIntIsr|
|ADCC| ADCCINT1 | Cdd_Adc_ADCC_Int1Isr|
|ADCC| ADCCINT2 | Cdd_Adc_ADCC_Int2Isr|
|ADCC| ADCCINT3 | Cdd_Adc_ADCC_Int3Isr|
|ADCC| ADCCINT4 | Cdd_Adc_ADCC_Int4Isr|
|ADCC| ADCC_EVT_INT | Cdd_Adc_ADCC_PpbEvtIntIsr|
|ADCD| ADCDINT1 | Cdd_Adc_ADCD_Int1Isr|
|ADCD| ADCDINT2 | Cdd_Adc_ADCD_Int2Isr|
|ADCD| ADCDINT3 | Cdd_Adc_ADCD_Int3Isr|
|ADCD| ADCDINT4 | Cdd_Adc_ADCD_Int4Isr|
|ADCD| ADCD_EVT_INT | Cdd_Adc_ADCD_PpbEvtIntIsr|
|ADCE| ADCEINT1 | Cdd_Adc_ADCE_Int1Isr|
|ADCE| ADCEINT2 | Cdd_Adc_ADCE_Int2Isr|
|ADCE| ADCEINT3 | Cdd_Adc_ADCE_Int3Isr|
|ADCE| ADCEINT4 | Cdd_Adc_ADCE_Int4Isr|
|ADCE| ADCE_EVT_INT | Cdd_Adc_ADCE_PpbEvtIntIsr|
```{Note}
Same Interrupt Category needs to be configured in both Cdd_Adc and OS Module.
Since all the PPBs in an ADC hardware share the same interrupt, the category must match for all the PPB containers under an ADC hardware unit container.
```
```{note}
**Early Interrupt Pulse Mode (CddAdcInterruptPulseMode = CDD_ADC_PULSE_END_OF_ACQ_WIN):** In early interrupt mode, the ADC interrupt is triggered before the conversion results are ready, allowing the application to perform necessary pre-work so that it can act on the ADC results immediately when they become available.
The `CddAdcInterruptCycleoffset` parameter configures the number of additional SYSCLK cycles after the falling edge of the SOC pulse(at the end of the acquisition window) before the ADCINT flag is set. If the configured delay extends beyond the End-Of-Conversion (EOC), the interrupt is generated at EOC.
The driver ISR does not poll the ADCINTxRESULT flag to verify the result latch status before reading. It is recommended to configure a sufficient `CddAdcInterruptCycleoffset` delay to ensure the results are ready.
```
#### Instance support
|CPU instances|supported|
|-------|-------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
#### Hardware-Software Mapping
Below image shows Cdd_Adc driver Hardware-Software mapping. For more information related to HW/SW mapping, refer the F29x Technical Reference Manual.
```{figure} Assets/images/Cdd_Adc_Hw_Sw_Mapping.png
:alt: Cdd_Adc HW/SW Mapping
:align: center
Cdd_Adc HW/SW Mapping
```
### Integration description
#### ADC + DMA Integration Guide
##### Overview
The F29x MCAL ADC driver supports integration with the Real-Time Direct Memory Access (RTDMA) controller. This integration enables automatic transfer of ADC conversion results to memory without CPU intervention, allowing higher sampling rates and freeing the CPU for other tasks.
##### Enabling DMA Mode
DMA mode is enabled at the group level using the boolean parameter `CddAdcEnableDma` in EB Tresos configuration tool. Since no MCAL RTDMA driver is available, the application must use the SDK's RTDMA driver for integration.
##### API Behavior in DMA Mode
When DMA is enabled for a group:
* **Group Status Updates**: The ADC ISR does not execute in DMA mode. Therefore, group status updates (e.g., BUSY to COMPLETED), result pointer updates, and re-triggering of software-triggered group conversions do not occur automatically.
* **Status Update API**: Use `Cdd_Adc_UpdateStatusThroughDma` API to manually update group status. This API behaves like the ADC ISR but does not copy conversion results. Call this API from the DMA completion interrupt handler. Calling this API on groups not configured for DMA mode results in a `CDD_ADC_E_WRONG_PROCESSING_MODE` runtime error.
* **Unsupported APIs**: The `Cdd_Adc_SetupResultBuffer`, `Cdd_Adc_ReadGroup` and `Cdd_Adc_GetStreamLastPointer` APIs are not supported for DMA-enabled groups since group status updates are not guaranteed .
* **Result Buffer Setup**: Do not call `Cdd_Adc_SetupResultBuffer` API. The DMA driver is responsible for providing the destination address for ADC conversion results.
* **Buffer Size**: The application must ensure the destination buffer has sufficient space for all channel conversions in the group.
```{note}
The ADC interrupt (End-Of-Conversion) triggers the DMA transfer. This same interrupt line is also routed to the CPU. To prevent ISR execution when using DMA mode, do not configure the corresponding interrupt in the OS plugin.
```
##### Integration Steps
To integrate ADC with DMA:
1. Enable DMA mode for the ADC group in EB Tresos configuration
2. Set the source address to the ADC result register
3. Set the destination address to the application's result buffer in memory
4. Configure the ADC End-Of-Conversion interrupt as the DMA trigger source
```{note}
Early ADC interrupt trigger to DMA is not supported by the ADC driver.
```
#### Dependent modules
##### DET
This driver depends on the DET in order to report development and runtime errors.
The detection of development errors is configurable ON/OFF. The switch CDD_ADC_DEV_ERROR_DETECT will activate or deactivate the detection of development errors. Runtime errors are reported even when CDD_ADC_DEV_ERROR_DETECT is OFF.
##### SchM
If multiple AUTOSAR runnables have access to the same Data Store Memory block, the exported AUTOSAR specification enforces data consistency by using an AUTOSAR exclusive area. With this specification, the runnables have mutually exclusive access to the per-instance memory global data, which prevents data corruption. Beside the OS, the BSW Scheduler provides functions that CDD ADC module calls at begin and end of critical sections. This implementation requires 1 level of exclusive access to guard critical sections.
The data consistency mechanism that has to be applied to an ExclusiveArea might be domain, ECU or even project specific. The decision which mechanism has to be applied by RTE / Basic Software Scheduler is taken during ECU integration by setting the Exclusive Area configuration parameter **RteExclusiveAreaImplMechanism**. This parameter is an input for RTE generator.
For CDD_ADC Module, data consistency and exclusive access to critical sections are required for the following sections as shown in the table below:
| Exclusive Area Functions used | CDD_ADC Function calling Exclusive Area | Need for Exclusive Area | Recommended Exclusive Area Mapping |
|-------|-------|-------|-------|
|CDD_ADC_EXCLUSIVE_AREA_0| Cdd_Adc_StartGroupConversion
Cdd_Adc_StopGroupConversion
Cdd_Adc_ReadGroup
Cdd_Adc_EnableHardwareTrigger
Cdd_Adc_DisableHardwareTrigger
Cdd_Adc_EnableGroupNotification
Cdd_Adc_DisableGroupNotification
Cdd_Adc_GetGroupStatus
Cdd_Adc_GetStreamLastPointer
Cdd_Adc_SetupResultBuffer
Cdd_Adc_StartResultChecker
Cdd_Adc_StopResultChecker
Cdd_Adc_ClearCheckerEvt
Cdd_Adc_StartGlobalSwTrig
Cdd_Adc_StopGlobalSwTrig
Cdd_Adc_SetResolution
Cdd_Adc_ReadPpbValue
Cdd_Adc_ReadPartialPpbValue
Cdd_Adc_ReadPpb
Cdd_Adc_ClearPpbEvt
Cdd_Adc_GetDelayStamp
Cdd_Adc_GetTemperatureC
Cdd_Adc_GetTemperatureK
Cdd_Adc_SetInternalTestNode| To protect against multiple access for shared resources | **OS_RESOURCE** : If the CDD ADC APIs are only called from pre-emptible task context, its recommended to use this mechanism as it takes care of resource access protection and task priority management.
**None**: If CDD ADC APIs are only called from non pre-emptible task context or during init, its recommended to use this mechanism as multiple access protection to shared resource is not needed. |
##### MCU
MCU Module is required for the ADC clock initialization.
##### Port
The Port module configures the analog port pins used for the ADC driver. Hence, the Port driver has to be initialized prior to use ADC functions and to observe proper conversion results. Otherwise incorrect conversion results will be observed.
##### OS
The Cdd_Adc driver uses interrupts and therefore depends on OS, which configures the interrupts.
#### Resource Allocator
The ADC module uses the Resource Allocator to allocate ADC peripheral instances to CPU cores and configure their memory-mapped base addresses. Each allocation is placed inside a **Context** that maps to a CPU core (e.g. `CPU1`). The **CurrentContext** parameter in the Resource Allocator selects which Context is active for MCAL execution. See the [Resource Allocator Module User Guide](Module_User_Guide_ResourceAllocator.md) for details on configuring device-specific settings.
The ADC Context container supports four types of allocations:
- **`Cdd_AdcAllocatedInstance`**: Allocates an ADC hardware instance. **InstanceName** uses the `CDD_` prefix (e.g. `CDD_ADCA`).
- **`CddAdcSafetyCheckerInstance`**: Allocates an ADC safety checker instance (e.g. `ADCSAFETYCHECK1`).
- **`CddAdcCheckerInterruptEvtInstance`**: Allocates an ADC safety checker interrupt event instance (e.g. `ADCSAFETYCHECKINTEVT1`).
- **`CddAdcGlobalSoftwareForce`**: Allocates the ADC global software force registers (max 1, shared across all CPUs).
Each allocation supports **Frame** (`FRAME0`–`FRAME3`), **DebugHaltEnabled**, and **StandbyModeEnabled** parameters. The **BaseAddr** is auto-calculated based on the selected instance and frame.
##### Resource Allocator Usage Example
To allocate CDD_ADCA to CPU1 using FRAME0:
1. In the Resource Allocator configuration, create a new `Cdd_AdcAllocatedInstance` under the CPU1 Context
2. Set **InstanceName** to `CDD_ADCA`
3. Set **Frame** to `FRAME0`
4. The **BaseAddr** will be automatically calculated as `ADCA_BASE_FRAME(0U)`
5. Optionally add `CddAdcSafetyCheckerInstance`, `CddAdcCheckerInterruptEvtInstance`, and `CddAdcGlobalSoftwareForce` allocations as needed
```text
Resource Allocator Configuration:
├── Context (Core: CPU1)
│ └── Cdd_Adc
│ ├── Cdd_AdcAllocatedInstance
│ │ ├── InstanceName: CDD_ADCA
│ │ ├── Frame: FRAME0
│ │ ├── BaseAddr: ADCA_BASE_FRAME(0U) [auto-calculated]
│ │ ├── DebugHaltEnabled: true
│ │ └── StandbyModeEnabled: true
│ ├── CddAdcSafetyCheckerInstance
│ │ ├── SafetyCheckerInstance: ADCSAFETYCHECK1
│ │ ├── Frame: FRAME0
│ │ └── BaseAddr: ADCSAFETYCHECK1_BASE_FRAME(0U) [auto-calculated]
│ ├── CddAdcCheckerInterruptEvtInstance
│ │ ├── SafetyCheckerIntEvtInstance: ADCSAFETYCHECKINTEVT1
│ │ ├── Frame: FRAME0
│ │ └── BaseAddr: ADCSAFETYCHECKINTEVT1_BASE_FRAME(0U) [auto-calculated]
│ └── CddAdcGlobalSoftwareForce [max 1, shared across all CPUs]
│ ├── Frame: FRAME0
│ └── GlbSwFrcBaseAddr: ADCGLOBAL_BASE_FRAME(0U) [auto-calculated]
```
### Configuration
The Cdd_Adc Driver implementation supports only Pre-Compile configuration variant. The driver needs the generated configuration header file Cdd_Adc_Cfg.h as an input file to work.
The generated configuration source file Cdd_Adc_Cfg.c is also necessary for the driver configuration.
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files. If edited manually the driver may behavior might deviate from the expected behavior.
#### Configuration Parameters
##### CddAdcConfigSet
This container contains the configuration parameters and sub containers of the Cdd Adc module.
###### CddAdcEnableTemperatureSensor
| Item ||
|--------|---------------|
| **Name** | CddAdcEnableTemperatureSensor |
| **Description** | Enables/Disables the temperature sensor. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcLockTemperatureSensor
| Item ||
|--------|---------------|
| **Name** | CddAdcLockTemperatureSensor |
| **Description** | Locks the temperature sensor configuration register When enabled .This is editable only when the temperature sensor is enabled. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcInternalTestInput
| Item ||
|--------|---------------|
| **Name** | CddAdcInternalTestInput |
| **Description** | Selects the input source for the internal test nodes for the ADC hardware unit. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_TEST_NODE_NO_CONN |
| **Range** | CDD_ADC_TEST_NODE_NO_CONN
CDD_ADC_TEST_NODE_VDDCORE
CDD_ADC_TEST_NODE_VDDA
CDD_ADC_TEST_NODE_VSSA
CDD_ADC_TEST_NODE_VREFLOA
CDD_ADC_TEST_NODE_VREFLOB
CDD_ADC_TEST_NODE_CDAC1H
CDD_ADC_TEST_NODE_CDAC1L
CDD_ADC_TEST_NODE_CDAC2H
CDD_ADC_TEST_NODE_CDAC2L
CDD_ADC_TEST_NODE_CDAC3H
CDD_ADC_TEST_NODE_CDAC3L
CDD_ADC_TEST_NODE_CDAC4H
CDD_ADC_TEST_NODE_CDAC4L
CDD_ADC_TEST_NODE_CDAC5H
CDD_ADC_TEST_NODE_CDAC5L
CDD_ADC_TEST_NODE_CDAC6H
CDD_ADC_TEST_NODE_CDAC6L
CDD_ADC_TEST_NODE_CDAC7H
CDD_ADC_TEST_NODE_CDAC7L
CDD_ADC_TEST_NODE_CDAC8H
CDD_ADC_TEST_NODE_CDAC8L
CDD_ADC_TEST_NODE_CDAC9H
CDD_ADC_TEST_NODE_CDAC9L
CDD_ADC_TEST_NODE_CDAC10H
CDD_ADC_TEST_NODE_CDAC10L
CDD_ADC_TEST_NODE_CDAC11H
CDD_ADC_TEST_NODE_CDAC11L
CDD_ADC_TEST_NODE_ENZ_CALIB_GAIN_3P3 |
###### CddAdcHwUnitAnalogRefABVoltageMode
| Item ||
|--------|---------------|
| **Name** | CddAdcHwUnitAnalogRefABVoltageMode |
| **Description** | This parameter defines the voltage reference mode for ADC A and B hardware instances. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_REFERENCE_INTERNAL |
| **Range** | CDD_ADC_REFERENCE_INTERNAL
CDD_ADC_REFERENCE_EXTERNAL |
###### CddAdcHwUnitAnalogRefABVoltage
| Item ||
|--------|---------------|
| **Name** | CddAdcHwUnitAnalogRefABVoltage |
| **Description** | This parameter defines the reference voltage for A and B instances of the ADC. This paramter is applicable only when the voltage reference mode is INTERNAL. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_REFERENCE_2_5V |
| **Range** | CDD_ADC_REFERENCE_3_3V
CDD_ADC_REFERENCE_2_5V |
###### CddAdcHwUnitAnalogRefCDEVoltageMode
| Item ||
|--------|---------------|
| **Name** | CddAdcHwUnitAnalogRefCDEVoltageMode |
| **Description** | This parameter defines the voltage reference mode for C,D and E instances of the ADC. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_REFERENCE_INTERNAL |
| **Range** | CDD_ADC_REFERENCE_INTERNAL
CDD_ADC_REFERENCE_EXTERNAL |
###### CddAdcHwUnitAnalogRefCDEVoltage
| Item ||
|--------|---------------|
| **Name** | CddAdcHwUnitAnalogRefCDEVoltage |
| **Description** | This parameter defines the reference voltage for C,D and E instances of the ADC.This paramter is applicable only when the voltage reference mode is INTERNAL. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_REFERENCE_3_3V |
| **Range** | CDD_ADC_REFERENCE_3_3V
CDD_ADC_REFERENCE_2_5V |
###### CddAdcHwUnit
This container contains the driver configuration (parameters) for the ADC Hardware Unit
###### CddAdcHwInstance
| Item ||
|--------|---------------|
| **Name** | CddAdcHwInstance |
| **Description** | This parameter describes the ADC HW Unit instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADCA |
###### CddAdcHwUnitId
| Item ||
|--------|---------------|
| **Name** | CddAdcHwUnitId |
| **Description** | This parameter indicates harware unit index among all the configured hardware units. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
###### CddAdcSocPriorityMode
| Item ||
|--------|---------------|
| **Name** | CddAdcSocPriorityMode |
| **Description** | This parameter defines the SOC priority of the ADC hardware unit. If the selected priority is 0 then all SOCs are handled in round robin mode,for any other value channels with SOC number below the Priority value are handled in high priority mode and the rest of the SOCs will be handled in round robin mode. By default round robin mode is configured. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 32 |
| **Min-value** | 0 |
###### CddAdcHwUnitResolution
| Item ||
|--------|---------------|
| **Name** | CddAdcHwUnitResolution |
| **Description** | This parameter defines the resolution of the hardware unit assigned to the group(in bits). |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_RESOLUTION_12BIT |
| **Range** | CDD_ADC_RESOLUTION_12BIT
CDD_ADC_RESOLUTION_16BIT |
###### CddAdcHwUnitSignalMode
| Item ||
|--------|---------------|
| **Name** | CddAdcHwUnitSignalMode |
| **Description** | This parameter defines the signal mode of the group.Differential mode is supported only for ADC instances A and B. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_MODE_SINGLE_ENDED |
| **Range** | CDD_ADC_MODE_SINGLE_ENDED
CDD_ADC_MODE_DIFFERENTIAL |
###### CddAdcHwUnitClockPrescale
| Item ||
|--------|---------------|
| **Name** | CddAdcHwUnitClockPrescale |
| **Description** | This enum describes the clock prescale factor for the ADC Hardware unit. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_CLK_DIV_3_5 |
| **Range** | CDD_ADC_CLK_DIV_1_0
CDD_ADC_CLK_DIV_2_0
CDD_ADC_CLK_DIV_2_5
CDD_ADC_CLK_DIV_3_0
CDD_ADC_CLK_DIV_3_5
CDD_ADC_CLK_DIV_4_0
CDD_ADC_CLK_DIV_4_5
CDD_ADC_CLK_DIV_5_0
CDD_ADC_CLK_DIV_5_5
CDD_ADC_CLK_DIV_6_0
CDD_ADC_CLK_DIV_6_5
CDD_ADC_CLK_DIV_7_0
CDD_ADC_CLK_DIV_7_5
CDD_ADC_CLK_DIV_8_0
CDD_ADC_CLK_DIV_8_5 |
###### CddAdcClock
| Item ||
|--------|---------------|
| **Name** | CddAdcClock |
| **Description** | This parameter describes the ADC clock after the clock prescale factor for the ADC Hardware unit. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 5.714285714285714E7 |
| **Max-value** | 6.0E7 |
| **Min-value** | 5000000.0 |
###### CddAdcHwExternalMuxSelect
| Item ||
|--------|---------------|
| **Name** | CddAdcHwExternalMuxSelect |
| **Description** | This parameter determines whether the external mux channel is enabled for the ADC hardware unit. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcHwExternalMuxPreselectEnable
| Item ||
|--------|---------------|
| **Name** | CddAdcHwExternalMuxPreselectEnable |
| **Description** | This parameter determines whether the external mux preset is enabled for the ADC hardware unit. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcInterruptPulseMode
| Item ||
|--------|---------------|
| **Name** | CddAdcInterruptPulseMode |
| **Description** | This enumeration defines the interrupt pulse mode of the ADc hardware unit. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_PULSE_END_OF_CONV |
| **Range** | CDD_ADC_PULSE_END_OF_ACQ_WIN
CDD_ADC_PULSE_END_OF_CONV |
###### CddAdcInterruptCycleoffset
| Item ||
|--------|---------------|
| **Name** | CddAdcInterruptCycleoffset |
| **Description** | This parameter defines the delay from the fall edge of the SOC and the interrupt to be generated in SYSCLK cycles . |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CddAdcOpenShortDetectMode
| Item ||
|--------|---------------|
| **Name** | CddAdcOpenShortDetectMode |
| **Description** | This parameter defines the opens/shorts detection circuit mode . |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_OSDETECT_MODE_DISABLED |
| **Range** | CDD_ADC_OSDETECT_MODE_DISABLED
CDD_ADC_OSDETECT_MODE_VSSA
CDD_ADC_OSDETECT_MODE_VDDA
CDD_ADC_OSDETECT_MODE_5BY12_VDDA
CDD_ADC_OSDETECT_MODE_7BY12_VDDA
CDD_ADC_OSDETECT_MODE_5K_PULLDOWN_TO_VSSA
CDD_ADC_OSDETECT_MODE_5K_PULLUP_TO_VDDA
CDD_ADC_OSDETECT_MODE_7K_PULLDOWN_TO_VSSA |
###### CddAdcHwInstanceRef
| Item ||
|--------|---------------|
| **Name** | CddAdcHwInstanceRef |
| **Description** | This parameter refers to the ADC HW Unit instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddAdcClockReference
| Item ||
|--------|---------------|
| **Name** | CddAdcClockReference |
| **Description** | Reference to a container of the type McuClockReferencePoint, to select an input clock. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddAdcGroup
This container contains the Group configuration (parameters).
###### CddAdcGroupPriority
| Item ||
|--------|---------------|
| **Name** | CddAdcGroupPriority |
| **Description** | Priority of the group. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_ROUND_ROBIN |
| **Range** | CDD_ADC_HIGH_PRIORITY
CDD_ADC_ROUND_ROBIN |
###### CddAdcGroupSocMask
| Item ||
|--------|---------------|
| **Name** | CddAdcGroupSocMask |
| **Description** | SOC mask of the Adc hardware unit of the group. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### CddAdcGroupConversionMode
| Item ||
|--------|---------------|
| **Name** | CddAdcGroupConversionMode |
| **Description** | This parameter defines the type of conversion mode for the group. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_CONV_MODE_ONESHOT |
| **Range** | CDD_ADC_CONV_MODE_CONTINUOUS
CDD_ADC_CONV_MODE_ONESHOT |
###### CddAdcGroupTrigSrcType
| Item ||
|--------|---------------|
| **Name** | CddAdcGroupTrigSrcType |
| **Description** | Type of source event that starts a group conversion. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_TRIGG_SRC_SW |
| **Range** | CDD_ADC_TRIGG_SRC_HW
CDD_ADC_TRIGG_SRC_SW |
###### CddAdcGroupTrigSrc
| Item ||
|--------|---------------|
| **Name** | CddAdcGroupTrigSrc |
| **Description** | Source of the trigger that triggers the start of the conversion of all the channels in the group. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_TRIGGER_SW_ONLY |
| **Range** | CDD_ADC_TRIGGER_SW_ONLY |
###### CddAdcGroupAccessMode
| Item ||
|--------|---------------|
| **Name** | CddAdcGroupAccessMode |
| **Description** | This parameter defines the access mode of thegroup conversion results. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_ACCESS_MODE_SINGLE |
| **Range** | CDD_ADC_ACCESS_MODE_SINGLE
CDD_ADC_ACCESS_MODE_STREAMING |
###### CddAdcGroupHwTrigSignal
| Item ||
|--------|---------------|
| **Name** | CddAdcGroupHwTrigSignal |
| **Description** | Configures on which edge of the hardware trigger signal the driver should react, i.e. start the conversion (only if supported by the ADC hardware). |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_HW_TRIG_RISING_EDGE |
| **Range** | CDD_ADC_HW_TRIG_BOTH_EDGES
CDD_ADC_HW_TRIG_FALLING_EDGE
CDD_ADC_HW_TRIG_RISING_EDGE |
###### CddAdcGroupStreamingBufferMode
| Item ||
|--------|---------------|
| **Name** | CddAdcGroupStreamingBufferMode |
| **Description** | Configure streaming buffer as "linear buffer" (i.e. the ADC Driver stops the conversion as soon as the stream buffer is full) or as "ring buffer" (wraps around if the end of the stream buffer is reached). |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_STREAM_BUFFER_LINEAR |
| **Range** | CDD_ADC_STREAM_BUFFER_CIRCULAR
CDD_ADC_STREAM_BUFFER_LINEAR |
###### CddAdcGroupStreamingNumSamples
| Item ||
|--------|---------------|
| **Name** | CddAdcGroupStreamingNumSamples |
| **Description** | Number of ADC values to be acquired per channel in streaming access mode. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 255 |
| **Min-value** | 1 |
###### CddAdcEnableDma
| Item ||
|--------|---------------|
| **Name** | CddAdcEnableDma |
| **Description** | This parameter enables/disables DMA for the group. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcInterruptCategory
| Item ||
|--------|---------------|
| **Name** | CddAdcInterruptCategory |
| **Description** | This parameters defines the category of the interrupt. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ISR_CAT1_RTINT |
| **Range** | ISR_CAT1_INT
ISR_CAT1_RTINT
ISR_CAT2_INT |
###### CddAdcGroupNotification
| Item ||
|--------|---------------|
| **Name** | CddAdcGroupNotification |
| **Description** | Callback function for each group |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddAdcInterruptSelect
| Item ||
|--------|---------------|
| **Name** | CddAdcInterruptSelect |
| **Description** | This parameter defines to which interrupt the group is linked. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_INT1 |
| **Range** | CDD_ADC_INT1
CDD_ADC_INT2
CDD_ADC_INT3
CDD_ADC_INT4 |
###### CddAdcInterruptSocSelect
| Item ||
|--------|---------------|
| **Name** | CddAdcInterruptSocSelect |
| **Description** | This parameter allows interrupt as the trigger source of the group in addition to trigger select. This is applicable only for the interrupts CDD_ADC_INT1 and CDD_ADC_INT2. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_INT_SOC_TRIGGER_NONE |
| **Range** | CDD_ADC_INT_SOC_TRIGGER_NONE
CDD_ADC_INT_SOC_TRIGGER_ADCINT1
CDD_ADC_INT_SOC_TRIGGER_ADCINT2 |
###### CddAdcContinueToInterruptMode
| Item ||
|--------|---------------|
| **Name** | CddAdcContinueToInterruptMode |
| **Description** | This parameters enables/disables the continue to interrupt mode for the specified interrupt.When this mode is enabled then interrupt is generated irrespective of whether the flag bit is cleared or not else No further ADCINT pulses are generated until ADCINT flag is cleared. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcTrigRepeaterReference
| Item ||
|--------|---------------|
| **Name** | CddAdcTrigRepeaterReference |
| **Description** | Reference to the trigger repeater. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddAdcChannel
This container contains the channel configuration (parameters) depending on the hardware capability.
###### CddAdcChannelId
| Item ||
|--------|---------------|
| **Name** | CddAdcChannelId |
| **Description** | This parameter defines to the numeric ID of the channel on the ADC hardware unit. Only some channels are brought out on the device. Some of the channels are connected internally. So,while confguring the channel IDs make sure the channels have pin out on the deivce and are configured in Port. A particular channel is reserved for temperature sensor in every device. For example, in F29H85x device channel 20 is reserved for temperature sensor. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 31 |
| **Min-value** | 0 |
###### CddAdcSocNumber
| Item ||
|--------|---------------|
| **Name** | CddAdcSocNumber |
| **Description** | This parameter defines the assignment of the channel to the physical ADC hardware channel. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 31 |
| **Min-value** | 0 |
###### CddAdcSocExternalChannelSelect
| Item ||
|--------|---------------|
| **Name** | CddAdcSocExternalChannelSelect |
| **Description** | This parameter defines the assignment of the external channel based on the digital output pins. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 15 |
| **Min-value** | 0 |
###### CddAdcChannelSampleWindow
| Item ||
|--------|---------------|
| **Name** | CddAdcChannelSampleWindow |
| **Description** | Configuration of sampling time, i.e. the time during which the value is sampled, (in SYSCLK cycles) for each channel, if supported by hardware. Minimum value should be 15 to meet the minimum acquistsition window duration. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 15 |
| **Max-value** | 511 |
| **Min-value** | 15 |
###### CddAdcTriggerRepeater
This container contains the trigger repeater configuration (parameters) depending on the hardware capability. To have this container enabled trigger source type should be hardware, trigger source should be one of the repeaters and trigger repeater should be enabled in the CddAdcGeneral container.
###### CddAdcRepeaterInstance
| Item ||
|--------|---------------|
| **Name** | CddAdcRepeaterInstance |
| **Description** | Numeric ID of the trigger repeater instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1 |
| **Min-value** | 0 |
###### CddAdcRepeaterTriggerSrc
| Item ||
|--------|---------------|
| **Name** | CddAdcRepeaterTriggerSrc |
| **Description** | Trigger source of the trigger repeater. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_TRIGGER_CPU1INT0 |
| **Range** | CDD_ADC_TRIGGER_CPU1INT0
CDD_ADC_TRIGGER_CPU1INT1
CDD_ADC_TRIGGER_CPU1INT2
CDD_ADC_TRIGGER_GPIO
CDD_ADC_TRIGGER_EPWM1_SOCA
CDD_ADC_TRIGGER_EPWM1_SOCB
CDD_ADC_TRIGGER_EPWM2_SOCA
CDD_ADC_TRIGGER_EPWM2_SOCB
CDD_ADC_TRIGGER_EPWM3_SOCA
CDD_ADC_TRIGGER_EPWM3_SOCB
CDD_ADC_TRIGGER_EPWM4_SOCA
CDD_ADC_TRIGGER_EPWM4_SOCB
CDD_ADC_TRIGGER_EPWM5_SOCA
CDD_ADC_TRIGGER_EPWM5_SOCB
CDD_ADC_TRIGGER_EPWM6_SOCA
CDD_ADC_TRIGGER_EPWM6_SOCB
CDD_ADC_TRIGGER_EPWM7_SOCA
CDD_ADC_TRIGGER_EPWM7_SOCB
CDD_ADC_TRIGGER_EPWM8_SOCA
CDD_ADC_TRIGGER_EPWM8_SOCB
CDD_ADC_TRIGGER_EPWM9_SOCA
CDD_ADC_TRIGGER_EPWM9_SOCB
CDD_ADC_TRIGGER_EPWM10_SOCA
CDD_ADC_TRIGGER_EPWM10_SOCB
CDD_ADC_TRIGGER_EPWM11_SOCA
CDD_ADC_TRIGGER_EPWM11_SOCB
CDD_ADC_TRIGGER_EPWM12_SOCA
CDD_ADC_TRIGGER_EPWM12_SOCB
CDD_ADC_TRIGGER_CPU2INT0
CDD_ADC_TRIGGER_CPU2INT1
CDD_ADC_TRIGGER_CPU2INT2
CDD_ADC_TRIGGER_ECAP1
CDD_ADC_TRIGGER_ECAP2
CDD_ADC_TRIGGER_ECAP3
CDD_ADC_TRIGGER_ECAP4
CDD_ADC_TRIGGER_ECAP5
CDD_ADC_TRIGGER_ECAP6
CDD_ADC_TRIGGER_EPWM13_SOCA
CDD_ADC_TRIGGER_EPWM13_SOCB
CDD_ADC_TRIGGER_EPWM14_SOCA
CDD_ADC_TRIGGER_EPWM14_SOCB
CDD_ADC_TRIGGER_EPWM15_SOCA
CDD_ADC_TRIGGER_EPWM15_SOCB
CDD_ADC_TRIGGER_EPWM16_SOCA
CDD_ADC_TRIGGER_EPWM16_SOCB
CDD_ADC_TRIGGER_EPWM17_SOCA
CDD_ADC_TRIGGER_EPWM17_SOCB
CDD_ADC_TRIGGER_EPWM18_SOCA
CDD_ADC_TRIGGER_EPWM18_SOCB
CDD_ADC_TRIGGER_CPU3INT0
CDD_ADC_TRIGGER_CPU3INT1
CDD_ADC_TRIGGER_CPU3INT2 |
###### CddAdcRepeaterMode
| Item ||
|--------|---------------|
| **Name** | CddAdcRepeaterMode |
| **Description** | This parameter configures the trigger repeater mode. In oversampling mode (CddAdcTriggerCount+1) triggers are generated and in undersampling mode (CddAdcTriggerCount+1) triggers are suppressed. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | OVERSAMPLING_MODE |
| **Range** | OVERSAMPLING_MODE
UNDERSAMPLING_MODE |
###### CddAdcTriggerCount
| Item ||
|--------|---------------|
| **Name** | CddAdcTriggerCount |
| **Description** | This parameter selects the number of triggers. When 0 is selected 1 trigger is generated (pass-through). |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 127 |
| **Min-value** | 0 |
###### CddAdcTriggerPhaseDelay
| Item ||
|--------|---------------|
| **Name** | CddAdcTriggerPhaseDelay |
| **Description** | This parameter defines the number of SYSCLKs to delay the selected trigger before passing it onto the re-triggering logic. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CddAdcTriggerSpreadDelay
| Item ||
|--------|---------------|
| **Name** | CddAdcTriggerSpreadDelay |
| **Description** | This parameter defines the minimum number of SYSCLKs to wait before creating the next repeated trigger to the ADC. This parameter has no effect in undersampling mode or when the TriggerCount is set to 0 |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CddAdcPpbConfig
This container contains the PPB configuration (parameters) of the PPB.
###### CddAdcPpbInstance
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbInstance |
| **Description** | Numeric ID of the PPB number assigned to the channel. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 3 |
| **Min-value** | 0 |
###### CddAdcPpbSocNumber
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbSocNumber |
| **Description** | Soc number of the selected channel. This is a calculated value, it can't be edited. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 31 |
| **Min-value** | 0 |
###### CddAdcPpbCalibrationOffset
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbCalibrationOffset |
| **Description** | This parameters configures the offset calibration for the ADC channel.For values from 0 to 511,the configured value will be subtracted from the PPB result. For values from 512,(1024 - CddAdcPpbCalibrationOffset) value will be added to the PPB result. In case multiple PPBs point to the same SOC, only the OFFCAL of the lowest PPB ID will be applied. This offset value will be subtracted from the raw conversion result and stores the value in the ADC result register. The addition/subtraction satureated at o on the low ed and either 4095/65536 on the high end for 12-bit and 16-bit respectively. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1024 |
| **Min-value** | 0 |
###### CddAdcPpbReferenceOffset
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbReferenceOffset |
| **Description** | This parameters configures the reference offset value for the ADC channel.In 12-bit mode the reference offset shouldn't exceed 4095 in 12-bit and 65535 in 16-bit mode. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CddAdcPpbDeltaEnable
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbDeltaEnable |
| **Description** | This parameters configures the bit to enable/disable delta enable. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcPpbEnableTwosComplement
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbEnableTwosComplement |
| **Description** | This parameters configures the bit to enable/disable two's complement. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcPpbAbsoluteEnable
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbAbsoluteEnable |
| **Description** | This parameters configures the bit to enable/disable absolute value calculation. This is done before the two's complement logic, so enabling both CddAdcPpbEnableTwosComplement and CddAdcPpbAbsoluteEnable will always result in a negative PPB value. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcPpbCyclebyCycleEnable
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbCyclebyCycleEnable |
| **Description** | This parameters configures the bit to enable/disable cycle by cycle enable. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcPpbCompareSource
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbCompareSource |
| **Description** | This parameters configures the PPB result type used for the zero-crossing detect logic and threshold compare. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_COMPARE_PPBRESULT |
| **Range** | CDD_ADC_COMPARE_PPBRESULT
CDD_ADC_COMPARE_PPBPSUM
CDD_ADC_COMPARE_PPBSUM |
###### CddAdcPpbTripHighLimit
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbTripHighLimit |
| **Description** | High limit - used for limit checking for all types of PB results. When comparing to an ADCPPBxRESULT register, the upper bits will be ignored:TRIPHI[23:17] will be ignored in 16 bit mode and TRIPHI[23:13] will be ignored in 12 bit mode |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 8388607 |
| **Min-value** | -8388608 |
###### CddAdcPpbExtendedTripLowEnable
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbExtendedTripLowEnable |
| **Description** | This parameters configures the extended trip limit low.This value can be used to compare any PPBRESULT. This is non-editable It is always enabled |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddAdcPpbTripLowLimit
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbTripLowLimit |
| **Description** | Extended trip low limit - used for limit checking.When comparing to an ADCPPBxRESULT register, the upper bits will be ignored: TRIPLO2[23:17] will be ignored in 16 bit mode and TRIPLO2[23:13] will be ignored in 12 bit mode |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 8388607 |
| **Min-value** | -8388608 |
###### CddAdcPpbTripHighEventEnable
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbTripHighEventEnable |
| **Description** | Enabling this allows the corresponding rising trip high flag in the PPB to activate the event signal to the PWM blocks. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcPpbTripLowEventEnable
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbTripLowEventEnable |
| **Description** | Enabling this allows the corresponding rising trip low flag in the PPB to activate the event signal to the PWM blocks. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcPpbZeroCrossingEventEnable
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbZeroCrossingEventEnable |
| **Description** | Enabling this allows the corresponding rising zero crossing flag in the PPB to activate the event signal to the PWM blocks. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcPpbTripHighInterruptEnable
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbTripHighInterruptEnable |
| **Description** | Enabling this allows the corresponding rising trip high flag in the PPB to activate the event signal to the PIE. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcPpbTripLowInterruptEnable
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbTripLowInterruptEnable |
| **Description** | Enabling this allows the corresponding rising trip low flag in the PPB to activate the event signal to the PIE. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcPpbZeroCrossingInterruptEnable
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbZeroCrossingInterruptEnable |
| **Description** | Enabling this allows the corresponding rising zero crossing flag in the PPB to activate the event signal to the PIE. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcEventInterruptCategory
| Item ||
|--------|---------------|
| **Name** | CddAdcEventInterruptCategory |
| **Description** | This parameters defines the category of the interrupt. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ISR_CAT1_RTINT |
| **Range** | ISR_CAT1_INT
ISR_CAT1_RTINT
ISR_CAT2_INT |
###### CddAdcPpbEventInterruptNotification
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbEventInterruptNotification |
| **Description** | Callback function for each PPB that generaterd the event interrupt |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddAdcPpbAccumulationCountLimit
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbAccumulationCountLimit |
| **Description** | This parameters defines the oversampling limit Defines the number of conversion to accumulate before PSUM is automatically loaded into SUM. The minimum allowed value is zero. The maximum value allowed is the StreamingSamples value of the corresonding channel group. If the hardware unit is configured in 16-bit resolution mode with CddAdcPpbAccumulationCountLimit exceeding 128, it results in overflow in PPB partial sum register |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1024 |
| **Min-value** | 0 |
###### CddAdcPpbRightShift
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbRightShift |
| **Description** | The parameter defines the number of bits to right shift partial ppb result(PSUM) before writing to the final PPB result register(SUM). For 0, no right shit. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 10 |
| **Min-value** | 0 |
###### CddAdcPpbTripFilterEnable
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbTripFilterEnable |
| **Description** | This parameters configures the bit to enable/disable trip filter. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcPpbChannel
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbChannel |
| **Description** | Numeric ID of the channel whose result is to be compared. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddAdcTripFilterConfig
This container contains the channel configuration (parameters) depending on the hardware capability.
###### CddAdcTripFilterClk
| Item ||
|--------|---------------|
| **Name** | CddAdcTripFilterClk |
| **Description** | This parameters configures the bit to enable/disable trip filter.The effective prescale value is (CddAdcTripFilterClk + 1). This applies to the filter on both the high and low trips. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CddAdcTripFilterTreshold
| Item ||
|--------|---------------|
| **Name** | CddAdcTripFilterTreshold |
| **Description** | This parameters configures the trip filter. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 63 |
| **Min-value** | 0 |
###### CddAdcTripFilterSampleWindow
| Item ||
|--------|---------------|
| **Name** | CddAdcTripFilterSampleWindow |
| **Description** | This parameters configures the sample window for the digital trip filter. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 63 |
| **Min-value** | 0 |
###### CddAdcTripFilterLowEnable
| Item ||
|--------|---------------|
| **Name** | CddAdcTripFilterLowEnable |
| **Description** | This parameters configures the bit to enable/disable trip filter. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcTripFilterHighEnable
| Item ||
|--------|---------------|
| **Name** | CddAdcTripFilterHighEnable |
| **Description** | This parameters configures the bit to enable/disable trip filter. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcGlobalSwTrigger
This container configures the global software trigger.When configured Soc mask of all added ADC instances should match.
###### CddAdcGlbSwTrigId
| Item ||
|--------|---------------|
| **Name** | CddAdcGlbSwTrigId |
| **Description** | Numeric ID of global software trigger.This parameter is used for symbolic name generation. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### CddAdcHwGroup
This container contains the parameter for configuring the hardware for the global software trigger feature.
###### CddAdcHwUnit
| Item ||
|--------|---------------|
| **Name** | CddAdcHwUnit |
| **Description** | This parameter refers to the hardware unit to which the group belongs. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADCA |
###### CddAdcSocMask
| Item ||
|--------|---------------|
| **Name** | CddAdcSocMask |
| **Description** | This parameter refers to the hardware unit to which the group belongs. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### CddAdcHwGroupRef
| Item ||
|--------|---------------|
| **Name** | CddAdcHwGroupRef |
| **Description** | This paramter refers to the group to select the SOC numners for the global software trigger. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddAdcResultCheckerUnit
This container contains the safety result checker configuration (parameters).
###### CddAdcCheckerId
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerId |
| **Description** | Symbolic ID for a safety result checker instance.This ID should be unique. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
###### CddAdcCheckerTolerance
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerTolerance |
| **Description** | This paramter configures the tolerance for the difference between CHECKRESULT1 and CHECKRESULT2. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 167777216 |
| **Min-value** | 0 |
###### CddAdcCheckerInstanceRef
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerInstanceRef |
| **Description** | This parameter refers to the ADC safety checker instances. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddAdcSelResConfig1
This container contains the checker result1 configuration (parameters) whose results will be compared.
###### CddAdcCheckerResultType
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerResultType |
| **Description** | This parameter defines thw type of result that is being accessed - a raw result or a processed result. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_SAFETY_CHECKER_INPUT_SOC |
| **Range** | CDD_ADC_SAFETY_CHECKER_INPUT_SOC
CDD_ADC_SAFETY_CHECKER_INPUT_PPB
CDD_ADC_SAFETY_CHECKER_INPUT_PPBSUM |
###### CddAdcChannelReference
| Item ||
|--------|---------------|
| **Name** | CddAdcChannelReference |
| **Description** | Numeric ID of the channel whose result is to be compared. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddAdcPpbReference
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbReference |
| **Description** | Numeric ID of the channel whose result is to be compared. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddAdcSelResConfig2
This container contains the checker result2 configuration (parameters) whose results will be compared.
###### CddAdcCheckerResultType
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerResultType |
| **Description** | This parameter defines thw type of result that is being accessed - a raw result or a processed result. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ADC_SAFETY_CHECKER_INPUT_SOC |
| **Range** | CDD_ADC_SAFETY_CHECKER_INPUT_SOC
CDD_ADC_SAFETY_CHECKER_INPUT_PPB
CDD_ADC_SAFETY_CHECKER_INPUT_PPBSUM |
###### CddAdcChannelReference
| Item ||
|--------|---------------|
| **Name** | CddAdcChannelReference |
| **Description** | Reference to the channel whose result is to be compared. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddAdcPpbReference
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbReference |
| **Description** | Reference to the PPB unit whose result is to be compared. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddAdcCheckerIntEvtConfig
This container configures the triggers for interrupts and events from the safety checker units.
###### CddAdcIntEvtId
| Item ||
|--------|---------------|
| **Name** | CddAdcIntEvtId |
| **Description** | Symbolic ID for safety checker interrupt event instance.This ID should be unique. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
###### CddAdcCheckerIntEvtInstanceRef
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerIntEvtInstanceRef |
| **Description** | This parameter refers to the ADC HW Unit instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddAdcCheckerIntEvtConfiguration
Configure interrupts and events for the safety checker instance for the specified interrupt event block.
###### CddAdcSafetyCheckerInstance
| Item ||
|--------|---------------|
| **Name** | CddAdcSafetyCheckerInstance |
| **Description** | Reference to the safety checker instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddAdcCheckerIntSource
This container selects the source of the safety checker interrupt.
###### CddAdcCheckerRes1Ovf
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerRes1Ovf |
| **Description** | This paramter enables the result1 overflow as the source of the safety checker interrupt. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcCheckerRes2Ovf
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerRes2Ovf |
| **Description** | This paramter enables the result2 overflow as the source of the safety checker interrupt. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcCheckerOot
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerOot |
| **Description** | This paramter enables the out-of-tolerance as the source of the safety checker interrupt. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcCheckerEvt1Source
This container selects the source of the safety checker event signal.
###### CddAdcCheckerRes1Ovf
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerRes1Ovf |
| **Description** | This paramter enables the result1 overflow as the source of the safety checker event signal. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcCheckerRes2Ovf
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerRes2Ovf |
| **Description** | This paramter enables the result2 overflow as the source of the safety checker event signal. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcCheckerOot
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerOot |
| **Description** | This paramter enables the out-of-tolerance as the source of the safety checker event signal. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcCheckerEvt2Source
This container selects the source of the safety checker event signal.
###### CddAdcCheckerRes1Ovf
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerRes1Ovf |
| **Description** | This paramter enables the result1 overflow as the source of the safety checker event signal. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcCheckerRes2Ovf
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerRes2Ovf |
| **Description** | This paramter enables the result2 overflow as the source of the safety checker event signal. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcCheckerOot
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerOot |
| **Description** | This paramter enables the out-of-tolerance as the source of the safety checker event signal. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcCheckerEvt3Source
This container selects the source of the safety checker event signal.
###### CddAdcCheckerRes1Ovf
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerRes1Ovf |
| **Description** | This paramter enables the result1 overflow as the source of the safety checker event signal. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcCheckerRes2Ovf
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerRes2Ovf |
| **Description** | This paramter enables the result2 overflow as the source of the safety checker event signal. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcCheckerOot
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerOot |
| **Description** | This paramter enables the out-of-tolerance as the source of the safety checker event signal. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcCheckerEvt4Source
This container selects the source of the safety checker event signal.
###### CddAdcCheckerRes1Ovf
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerRes1Ovf |
| **Description** | This paramter enables the result1 overflow as the source of the safety checker event signal. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcCheckerRes2Ovf
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerRes2Ovf |
| **Description** | This paramter enables the result2 overflow as the source of the safety checker event signal. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcCheckerOot
| Item ||
|--------|---------------|
| **Name** | CddAdcCheckerOot |
| **Description** | This paramter enables the out-of-tolerance as the source of the safety checker event signal. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
##### CddAdcGeneral
General configuration (parameters) of the ADC Driver software module.
###### CddAdcDeInitApi
| Item ||
|--------|---------------|
| **Name** | CddAdcDeInitApi |
| **Description** | Adds / removes the service Cdd_Adc_DeInit() from the code. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddAdcDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | CddAdcDevErrorDetect |
| **Description** | Switches the development error detection and notification on or off. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcEnableStartStopGroupApi
| Item ||
|--------|---------------|
| **Name** | CddAdcEnableStartStopGroupApi |
| **Description** | Adds / removes the services Cdd_Adc_StartGroupConversion() and Cdd_Adc_StopGroupConversion() from the code. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddAdcEnableGlobalSoftwareTrigger
| Item ||
|--------|---------------|
| **Name** | CddAdcEnableGlobalSoftwareTrigger |
| **Description** | Adds / removes the services Cdd_Adc_StartGlobalSwTrig() and Cdd_Adc_StopGlobalSwTrig() from the code. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcNotifCapability
| Item ||
|--------|---------------|
| **Name** | CddAdcNotifCapability |
| **Description** | Determines, if the group notification mechanism (the functions to enable and disable the notifications) is available at runtime. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcHwTriggerApi
| Item ||
|--------|---------------|
| **Name** | CddAdcHwTriggerApi |
| **Description** | Adds / removes the services Cdd_Adc_EnableHardwareTrigger() and Cdd_Adc_DisableHardwareTrigger() from the code. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddAdcPpbEnable
| Item ||
|--------|---------------|
| **Name** | CddAdcPpbEnable |
| **Description** | This parameter enables safety checker capability for the module. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcReadGroupApi
| Item ||
|--------|---------------|
| **Name** | CddAdcReadGroupApi |
| **Description** | Adds / removes the service Cdd_Adc_ReadGroup() and from the code. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddAdcSafetyCheckerEnable
| Item ||
|--------|---------------|
| **Name** | CddAdcSafetyCheckerEnable |
| **Description** | This parameter enables safety checker capability for the module. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcSetResolutionApi
| Item ||
|--------|---------------|
| **Name** | CddAdcSetResolutionApi |
| **Description** | Adds / removes the service Cdd_Adc_SetResolution() from the code. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddAdcVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | CddAdcVersionInfoApi |
| **Description** | Adds / removes the service Cdd_Adc_GetVersionInfo() from the code. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
#### Steps To Configure Cdd_Adc Module
1. Open EB Tresos configurator tool, load Cdd_Adc module. Select the Precompile Config Variant.
2. Configure the required parameters.
3. Save the configuration and generate the configuration.
### Examples
The example applications demonstrates usecases of the Cdd_Adc driver APIs. The examples are explained below in detailed .
#### Cdd_Adc_Example_GlbSwTrig
##### Overview of Cdd_Adc_Example_GlbSwTrig
This example demonstrates how to use the global software trigger. It also demonstrates how PPB trip high and trip low limits work. The group conversion started with `Cdd_Adc_StartGlobalSwTrig` must be stopped with `Cdd_Adc_StopGlobalSwTrig`. `Cdd_Adc_StartGroupConversion` cannot be used before `Cdd_Adc_StopGlobalSwTrig` to start a new group conversion for a group that was already started with `Cdd_Adc_StartGlobalSwTrig`. First stop the global software trigger and then start the normal software group conversion.
When ADCAIN1 is connected to GND, the PPB result of PPB1 (linked to ADCAIN1) will be less than the configured trip low limit, setting the trip low event flag.
The PPB result of PPB2 (linked to ADCAIN1) will be greater than the configured trip high limit, setting the trip high event flag.
These events generate a PPB event interrupt to the CPU. While executing the PPB event ISR, the notifications corresponding to the set event flags are called. In this application, the notification count is incremented every time a notification is called.
* Cdd_Adc_Example_GlbSwTrig
* EcuM_Init()
* Initialize clock to 200 MHz using Mcu_Init()
* Initialize pins in analog mode with Port_Init()
* Initialize Cdd_Adc driver using Cdd_Adc_Init()
* Connect ADCAIN1 to GND to observe PPB trip high and trip low interrupts.
* Start global software trigger Id 0 conversion.
* Wait until all group conversions are completed and the PPB trip notification count is as expected.
* Re-trigger the global software conversion.
* Wait until all group conversions are completed and the PPB trip notification count is as expected.
* Stop the global software conversion with `Cdd_Adc_StopGlobalSwTrig` API.
* Start software group 1 conversion with `Cdd_Adc_StartGroupConversion`.
* Wait until the group conversion is complete.
* Print the execution successful statement.
* Conversion results can be observed from the buffer.
##### Setup required to run Cdd_Adc_Example_GlbSwTrig
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
* All ADC instances are configured for 2.5V internal reference voltage mode.
* Connect GND to ADCAIN1 pin to observe PPB trip interrupts.
* Connect desired voltage to ADCAIN0 and ADCAIN6 pins.
* Connect desired voltage to ADCBIN1, ADCBIN2 and ADCBIN3 pins.
* Connect desired voltage to ADCCIN0, ADCCIN25 and ADCCIN27 pins.
* Connect desired voltage to ADCDIN26 and ADCDIN27 pins.
* Connect desired voltage to ADCEIN24 and ADCEIN28 pins.
```{note}
ADCD and ADCE instances are not configured in this example for F29P32x devices.
```
##### How to run Cdd_Adc_Example_GlbSwTrig
* Open CCS and Import Cdd_Adc_Example_GlbSwTrig
* Build project and start debug project
##### Sample Log of Cdd_Adc_Example_GlbSwTrig
```{literalinclude} Assets/text/Cdd_Adc/F29H85x/Cdd_Adc_Example_GlbSwTrig.txt
```
#### Cdd_Adc_Example_Ppb_TrigRepeater
##### Overview of Cdd_Adc_Example_Ppb_TrigRepeater
This example verifies the Cdd_Adc PPB and trigger repeater features together.
For PPB1 (linked to ADCAIN28), the PPB result is compared against PPB trip limits. When a non-zero voltage is provided, the PPB result will exceed the trip high limit, setting the trip high event flag.
For PPB2 (linked to ADCAIN0), a non-zero ADC conversion result is produced; the two's complement of that value will be negative and less than the PPB trip low limit, setting the trip low event flag.
For PPB3 (linked to ADCAIN6), the PPB partial sum value is compared against PPB trip limits; when a non-zero voltage is provided, the partial PPB sum will exceed the trip high limit, setting the trip high event flag. A PPB event interrupt is generated to the CPU. While executing the PPB event ISR, the notifications corresponding to the set event flags are called.
* Cdd_Adc_Example_Ppb_TrigRepeater
* EcuM_Init()
* Initialize clock to 200 MHz using Mcu_Init()
* Initialize pins in analog mode with Port_Init()
* Initialize Cdd_Adc driver using Cdd_Adc_Init()
* Initialize Gpt driver using Gpt_Init() to use start timer API. Timer interrupt acts as a hardware trigger source for ADC sample conversion in this example.
* Verify group conversions with trigger repeater as the trigger source. CPU1 timer interrupt as the trigger source for the trigger repeater.
* Group0 and Group3 are triggered by trigger repeater configured in over-sampling mode.
* Group1 is triggered by trigger repeater configured in under-sampling mode.
* Group2 is triggered by timer interrupt.
* Group4 is configured for continuous conversions triggered by software.
* Group5 is triggered by the ADC interrupt generated by Group4 after a round of channel conversions.
* Number of timer interrupts required to complete the group conversions in over-sampling and under-sampling modes are printed.
* The ADC conversion results can be observed in the buffer.
##### Setup required to run Cdd_Adc_Example_Ppb_TrigRepeater
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
* ADCA and ADCB instances are configured for 2.5V internal reference voltage mode.
* Connect a non-zero voltage to ADCAIN0 pin to observe PPB trip low interrupt.
* Connect a non-zero voltage (greater than 0.7mV) to ADCAIN28 and ADCAIN6 pins to observe PPB trip high interrupt.
* Connect desired voltage to ADCAIN0, ADCAIN1, ADCAIN6, ADCAIN7, ADCAIN28, ADCAIN30 and ADCAIN31 pins.
* Connect desired voltage to ADCDIN0 and ADCDIN1 pins.
##### How to run Cdd_Adc_Example_Ppb_TrigRepeater
* Open CCS and Import Cdd_Adc_Example_Ppb_TrigRepeater
* Build project and start debug project
##### Sample Log of Cdd_Adc_Example_Ppb_TrigRepeater
```{literalinclude} Assets/text/Cdd_Adc/F29H85x/Cdd_Adc_Example_Ppb_TrigRepeater.txt
```
#### Cdd_Adc_Example_TempSensor
##### Overview Of Cdd_Adc_Example_TempSensor
Channel ID 20 on ADCA and ADCC are both connected to the temperature sensor internally. The ADC conversion results can be passed to `Cdd_Adc_GetTemperatureC` and `Cdd_Adc_GetTemperatureK` APIs to get the temperature value in Celsius and Kelvin respectively.
* Cdd_Adc_Example_TempSensor
* EcuM_Init()
* Initialize clock to 200 MHz using Mcu_Init()
* Initialize pins using Port_Init() to see the print statements on the console
* Initialize Cdd_Adc driver using Cdd_Adc_Init()
* Initialize Gpt driver using Gpt_Init() to use start timer API. Timer interrupt acts as a hardware trigger source for ADC sample conversion in this example.
* Verification of Cdd_Adc temperature sensor values.
##### Setup required to run Cdd_Adc_Example_TempSensor
* Connect the hardware and power up
* Connect the uart and set up the baudrate to check the log on serial console
##### How to run Cdd_Adc_Example_TempSensor
* Open CCS and import Cdd_Adc_Example_TempSensor Example
* Build project and start debug project
##### Sample Log of Cdd_Adc_Example_TempSensor
```{literalinclude} Assets/text/Cdd_Adc/F29H85x/Cdd_Adc_Example_TempSensor.txt
```
#### Cdd_Adc_Example_SwHwConversion
##### Overview of Cdd_Adc_Example_SwHwConversion
This example demonstrates software and hardware triggered ADC conversions and external voltage reference configuration. Additionally, this example demonstrates differential signal conversion mode and dynamic resolution switching, which are supported only on specific device variants.
The example also captures the delay stamp, which represents the number of system clock cycles between the group trigger and the actual start of conversion. The delay stamp API can only be called for PPBs linked to hardware-triggered groups.
ADC supports two signal modes:
- **Single-ended mode:** The input voltage to the converter is sampled through a single pin (ADCINx), referenced to VREFLO.
- **Differential signaling mode:** The input voltage to the converter is sampled through a pair of input pins — a positive input (ADCINxP) and a negative input (ADCINxN). The actual input voltage is the difference between the two (ADCINxP − ADCINxN).
```{note}
On F29P32x devices, differential signal conversion mode and 16-bit resolution are not supported. See [Device-Variant Specific Limitations](#device-variant-specific-limitations) for details.
```
* Cdd_Adc_Example_SwHwConversion
* EcuM_Init()
* Initialize clock to 200 MHz using Mcu_Init()
* Initialize pins in analog mode with Port_Init()
* Initialize Cdd_Adc driver using Cdd_Adc_Init()
* Initialize Gpt driver using Gpt_Init() to use start timer API. Timer interrupt acts as a hardware trigger source for ADC sample conversion in this example.
* `Cdd_Adc_SetupResultBuffer` API sets up the result buffer for the specified group. Channel conversion results that are linked to the group will be copied to this buffer.
* `Cdd_Adc_EnableGroupNotification` API enables notification for the specified group.
* Wait until all group conversions are complete.
* Print Group0 and Group1 channel conversion results.
* Change the resolution of the ADCA instance to 12-bit and ADCB instance to 16-bit.
* Start the group conversions again and observe conversion results in result buffer.
* Wait until all group conversions are complete.
* Delay stamp is captured for the hardware triggered group.
* Print Group0 and Group1 channel conversion results.
* The ADC conversion results before and after the resolution change can be observed in the result buffer.
##### Setup required to run Cdd_Adc_Example_SwHwConversion
* Connect the hardware and power up
* Connect the uart and set up the baudrate to check the log on serial console
* Since ADCA and ADCB are configured for external voltage reference mode, connect external voltage to VREFHIAB pin and VREFLOAB to GND (Put Switch S3 as per external voltage reference mode and S4 as per internal reference mode).
* ADCD is configured for 3.3V internal reference voltage mode.
* Connect available voltage to ADCAIN2, ADCAIN3 pins. Similarly connect voltage to ADCAIN4 and ADCAIN5 pins and observe the ADC conversion results from the buffer.
* Connect available voltage to ADCBIN4, ADCBIN5 pins. Similarly connect voltage to ADCBIN6 and ADCBIN7 pins and observe the ADC conversion results from the buffer.
* Connect desired voltage to ADCDIN0, ADCDIN1, ADCDIN2 and ADCDIN3 pins.
```{note}
For differential signal conversion, the difference between the two connected pin voltages is considered as the input for the conversion (e.g., ADCAIN2 − ADCAIN3, ADCBIN4 − ADCBIN5).
```
##### How to run Cdd_Adc_Example_SwHwConversion
* Open CCS and import Cdd_Adc_Example_SwHwConversion Example
* Build project and start debug project
##### Sample Log of Cdd_Adc_Example_SwHwConversion
```{literalinclude} Assets/text/Cdd_Adc/F29H85x/Cdd_Adc_Example_SwHwConversion.txt
```
#### Cdd_Adc_Example_DmaTransfer
##### Overview of Cdd_Adc_Example_DmaTransfer
This example demonstrates the DMA integration with the CDD ADC driver.
* Cdd_Adc_Example_DmaTransfer
* EcuM_Init()
* Initialize clock to 200 MHz using Mcu_Init()
* Initialize pins using Port_Init() to see the print statements on the console
* Initialize Cdd_Adc driver using Cdd_Adc_Init()
* Initialize Cdd_Pwm driver using Cdd_Pwm_Init()
* `AppUtils_Init()` to initialize App Utils
* `Cdd_Dma_Init()` to initialize DMA
* `Cdd_Pwm_ConfigureHardware()` to initialize PWM and generate 64KHz frequency waveform
* Call `Cdd_Adc_EnableHardwareTrigger` API to start the group conversion
* For every 15.625us a trigger is generated to ADC for conversion
* The result buffer is updated by DMA after the group is done and the interrupt is generated
* Continue this for 1 second and observe the behaviour
* Call `Cdd_Adc_DisableHardwareTrigger` to stop further triggers from PWM to ADC
* Wait until group status is IDLE
* Print the success statement after the example is executed successfully
* Observe the ADC conversion results in the buffer
##### Setup required to run Cdd_Adc_Example_DmaTransfer
* Connect the hardware and power up
* Connect the UART setup to check the log on serial console
* ADCA is configured for 2.5V internal reference voltage mode.
* Connect desired voltage to ADCAIN0, ADCAIN1, ADCAIN6, ADCAIN7, ADCAIN28, ADCAIN29, ADCAIN30 and ADCAIN31 pins.
##### How to run Cdd_Adc_Example_DmaTransfer
* Open CCS and import Cdd_Adc_Example_DmaTransfer
* Build project and start debug project
##### Sample Log of Cdd_Adc_Example_DmaTransfer
```{literalinclude} Assets/text/Cdd_Adc/F29H85x/Cdd_Adc_Example_DmaTransfer.txt
```
#### Example File Structure
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂Can\
┃ ┣ 📂**Cdd_Adc**\
┃ ┃ ┗ 📂**Cdd_Adc_Example_Ppb_TrigRepeater**\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜**Cdd_Adc_Example_Ppb_TrigRepeater.projectspec**\
┃ ┃ ┃ ┣ 📂Cdd_Adc_Example_Ppb_TrigRepeater_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Adc.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Gpt.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port.xdm\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Adc_Cfg.h** : *Contains the generated pre-compiler configuration header.**\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Gpt_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Adc_Cfg.c** : *Contains the Pre-compile build configuration parameters.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Gpt_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBcfg.c\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜**Cdd_Adc_Example_Ppb_TrigRepeater.c** : *Example application for Cdd_Adc.*\
┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Cdd_Sent\
┃ ┣ 📂Cdd_Xbar\
┃ ┣ 📂Device_Support\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂Lin\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┣ 📂Spi\
┃ ┣ 📂Wdg\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
## CDD DMA Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|CDD|Complex Device Driver|
|DMA|Direct Memory Access|
|RTDMA|Real-Time Direct Memory Access|
|API|Application Programming Interface|
|DET|Default Error Tracer|
|MPU|Memory Protection Unit|
|ESM|Error Signaling Module|
|SSU|Safety and Security Unit|
|HW|Hardware|
|SW|Software|
### Introduction
The CDD DMA driver is a Complex Device Driver that provides a hardware method of transferring data between peripherals and/or memory without intervention from the CPU.
```{figure} Assets/images/Cdd_Dma_AUTOSAR_MCAL.png
:alt: CDD DMA MCAL AUTOSAR
:align: center
Cdd Dma MCAL AUTOSAR
```
This document details AUTOSAR Cdd DMA module implementation
| Supported AUTOSAR Release | **4.3.1** |
|--------------------------------------|------------------------------|
| **Supported Configuration Variants** | **Pre-Compile** |
| **Vendor ID** | **CDD_DMA_VENDOR_ID (44)** |
| **Module ID** | **CDD_DMA_MODULE_ID (255)** |
### Functional Overview
The CDD DMA driver is part of the Complex Device Driver layer (CDD). The RTDMA provides a hardware method of transferring data between peripherals and/or memory without CPU intervention.
The RTDMA operates as a state machine with two nested loops that control data transfers:
#### Burst and Transfer Loops
The RTDMA uses a two-level nested loop structure to manage data transfers:
1. **Burst Loop (Inner Loop)**: The inner loop transfers a configured number of words (bytes) called a "burst". The burst size is specified by the BURST_SIZE and represents the smallest amount of data transferred at one time.
2. **Transfer Loop (Outer Loop)**: The outer loop repeats the burst operation for a configured number of times called "transfers". The transfer size is specified by the TRANSFER_SIZE.
**Transfer Process**:
- A DMA transfer is initiated by a peripheral or software trigger
- The inner burst loop executes, transferring the configured burst size
- After completing one burst, the next burst begins (if more transfers are pending)
- This continues until all configured transfers are complete
- Upon completion, a user-configurable notification callback can be invoked. The notification timing can be configured to trigger either at the beginning of a new transfer or at the end of the complete transfer.
#### Operating Modes
**One-Shot Mode**:
- When enabled: After the first trigger event, the DMA continuously transfers data in bursts until all configured transfers are complete
- When disabled: A separate trigger event is required for each burst transfer, continuing until all configured transfers are complete
```{Warning}
**One-shot mode must not be used with Priority 0 channels.** When one-shot mode is enabled, a single trigger can consume the majority of RTDMA bandwidth, potentially causing long CPU stalls as the DMA continuously processes bursts without allowing other channels to execute. This is especially problematic with Priority 0 channels, which can interrupt other ongoing transfers.
**Recommendation**: Configure a CPU timer (or similar periodic trigger) and disable one-shot mode to ensure controlled, time-sliced DMA operation that prevents bandwidth monopolization and CPU stalls.
```
**Continuous Mode**:
- When enabled: The RTDMA keeps the channel active even after all bursts in the transfer loop are complete. The channel remains ready to process the next transfer automatically
- When disabled: The RTDMA disables the channel after all bursts in the transfer loop are complete. The channel stops and must be re-enabled before another transfer can be started
```{Note}
One-shot mode and continuous mode are **independent settings** and can be enabled or disabled separately. Each mode controls a different aspect of the transfer behavior:
- **One-shot mode** controls whether multiple bursts execute from a single trigger
- **Continuous mode** controls whether the channel remains active after completing all transfers
```
#### Channel Priority
The RTDMA supports software-configurable priority levels for efficient channel arbitration:
**Round Robin Mode**:
- All channels have equal priority
- Each enabled channel is serviced in round-robin fashion: CH1 → CH2 → CH3 → ... → CH10 → CH1
- After each channel transfers a burst, the next channel is serviced
**Software-Configurable Priority (0-3)**:
- Each channel can be assigned a priority level from 0 to 3
- Default priority for all channels is 1
- Lower priority number = higher priority during arbitration
- When multiple channels have the same priority, the lowest channel number wins arbitration
**Priority 0 (Highest Priority)**:
- Channels configured with priority 0 are considered a special case and can interrupt the RTDMA state machine
- When a Priority 0 event occurs, the current word transfer on any other channel completes, then execution halts
- The Priority 0 channel is then serviced for its complete burst
- After the Priority 0 channel burst is complete, execution returns to the channel that was active when the Priority 0 event occurred
- Typically used for time-critical peripherals
#### Overrun Detection
The RTDMA includes overrun detection logic to identify when trigger events are lost:
- When a burst for a channel starts, the peripheral interrupt flag is cleared
- If an additional event trigger arrives between the time the flag is set and cleared by the burst start, the second trigger is lost
- This overrun condition is detected and flagged by the RTDMA
- Users can configure overrun notification to receive a callback when an overrun condition occurs.
#### Memory Protection Unit (MPU)
The RTDMA includes an integrated MPU for access protection and security:
**MPU Features**:
- Monitors DMA read/write interface buses continuously
- Detect errors, block access, and trigger an interrupt on any violations
- Supports up to 16 configurable memory regions
- Each region defines start and end addresses for read/write access permissions
- Channel-to-MPU mapping is orthogonal - each channel can be enabled in multiple MPU regions and vice versa
**MPU Operation**:
- When MPU is enabled, faults are communicated to the Error Signaling Module (ESM)
- MPU checks if an address belongs to any defined region
- MPU verifies that accesses have necessary permissions for the region
- Access violations result in blocked transactions and error reporting to Error Signaling Module (ESM)
### Hardware Features
#### Hardware Features Supported
Features supported at a high level are:
- 10 RTDMA channels with software configurable priority levels and independent Interrupt Controller interrupts
- Up to 256 hardware trigger sources to initiate RTDMA transfers
- Internal trigger generation for data transfers and trigger sources for channels
- Independent Read and Write buses
- Word Size: 8-bit, 16-bit, 32-bit, and 64-bit transfers
- Throughput: 1 cycle/word after the initial read-write access with 0 cycle read/write stall
- FIFO implemented within hardware to optimize data transfers
- Linear and circular addressing modes
- Support for multiple data transformation functions as data is transferred from source to destination
- Ability to reverse words, half words, and so on
- Access protection through the Memory Protection Unit (MPU)
#### Not supported Features
- Burst Mode Support for transfers with EMIF, since EMIF is not available on automotive devices
#### Non compliance
None
### Source files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂Adc\
┃ ┣ 📂Can\
┃ ┗ 📂**Cdd_Dma**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Cdd_Dma.h** : *Contains the API declarations of the Cdd DMA driver to be used by upper layers.*\
┃ ┃ ┃ ┗ 📜**Cdd_Dma_Priv.h** : *Contains data structures and Internal function declarations.*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Cdd_Dma.c** : *Contains the implementation of the API for Cdd DMA driver.*\
┃ ┃ ┃ ┣ 📜**Cdd_Dma_Irq.c** : *Contains the ISR implementation.*\
┃ ┃ ┃ ┗ 📜**Cdd_Dma_Priv.c** : *Contains Functions that support the API for Cdd DMA driver*\
┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂hw_include\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┣ 📂Spi\
┃ ┗ 📂Wdg\
┣ 📂examples\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{figure} Assets/images/Cdd_Dma_Header_File_Structure.png
:alt: Cdd DMA Header File Structure
:align: center
Cdd DMA Header File Structure
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Scheduling
None
#### Error handling
##### Development Error Reporting
Development errors are reported to the DET using the service Det_ReportError(), when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
#### Error codes
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|API service used without module initialization|CDD_DMA_E_UNINIT|0x0A|
|API called for reinitialization of already initialized DMA driver|CDD_DMA_E_ALREADY_INITIALIZED|0x0B|
|Initialization API failed|CDD_DMA_E_INIT_FAILED|0x0C|
|API service called with invalid parameter pointer|CDD_DMA_E_PARAM_POINTER|0x0D|
|API service called with invalid parameter value|CDD_DMA_E_PARAM_VALUE|0x0E|
|API service called during ongoing process|CDD_DMA_E_BUSY|0x0F|
|API service called to force or clear peripheral event trigger when peripheral event trigger is disabled|CDD_DMA_E_PERIPHERAL_EVENT_TRIGGER_DISABLED|0x10|
|API service called to enable peripheral event trigger when peripheral event trigger is already enabled|CDD_DMA_E_PERIPHERAL_EVENT_TRIGGER_ENABLED|0x11|
|API service called to start a channel when the channel is already running|CDD_DMA_E_ALREADY_RUNNING|0x12|
|API service called to halt a channel when the channel already halted|CDD_DMA_E_ALREADY_HALTED|0x13|
|API service called to modify DMA configurable properties when DMA configurable properties are committed|CDD_DMA_E_DMACFG_COMMITTED|0x14|
|API service called to modify DMA channel properties when DMA channel properties are committed|CDD_DMA_E_CHCFG_COMMITTED|0x15|
|API service called to modify DMA MPU region properties when DMA MPU region properties are committed|CDD_DMA_E_MPUR_COMMITTED|0x16|
|API service called to enable or disable MPU when DMA MPU configuration are committed|CDD_DMA_E_MPUCFG_COMMITTED|0x17|
|API service called to clear error flag when no overflow is detected|CDD_DMA_E_NO_OVERFLOW|0x18|
|API service called to clear peripheral event trigger when no event trigger exists|CDD_DMA_E_NO_TRIGGER|0x19|
### Used resources
#### Interrupt Handling
Each RTDMA channel has its own independent Interrupt Controller interrupt for CPU servicing. The DMA can generate interrupts at the completion of a transfer, at the beginning of the transfer process and during overrun detection. These interrupts allow the CPU to be notified of transfer completion or errors without polling.
The Driver doesn’t register any interrupts handler (ISR), it’s expected that consumer of this driver registers the required interrupt handler.
For every RTDMA channel, an ISR requires to be registered if Channel notification is enabled. The Interrupt number associated with RTDMA channel is detailed in TRM (also, please refer the Example application).
Interrupt category should be selected in the Cdd_Dma plugin.
| Cdd Dma Instance | Interrupt Name | Interrupt handler |
| ---------------- | -------------- | ----------------- |
| RTDMA1 | RTDMA1_CH1INT | Cdd_Dma_RTDMA1_CH1_Isr |
| RTDMA1 | RTDMA1_CH2INT | Cdd_Dma_RTDMA1_CH2_Isr |
| RTDMA1 | RTDMA1_CH3INT | Cdd_Dma_RTDMA1_CH3_Isr |
| RTDMA1 | RTDMA1_CH4INT | Cdd_Dma_RTDMA1_CH4_Isr |
| RTDMA1 | RTDMA1_CH5INT | Cdd_Dma_RTDMA1_CH5_Isr |
| RTDMA1 | RTDMA1_CH6INT | Cdd_Dma_RTDMA1_CH6_Isr |
| RTDMA1 | RTDMA1_CH7INT | Cdd_Dma_RTDMA1_CH7_Isr |
| RTDMA1 | RTDMA1_CH8INT | Cdd_Dma_RTDMA1_CH8_Isr |
| RTDMA1 | RTDMA1_CH9INT | Cdd_Dma_RTDMA1_CH9_Isr |
| RTDMA1 | RTDMA1_CH10INT | Cdd_Dma_RTDMA1_CH10_Isr |
| RTDMA2 | RTDMA2_CH1INT | Cdd_Dma_RTDMA2_CH1_Isr |
| RTDMA2 | RTDMA2_CH2INT | Cdd_Dma_RTDMA2_CH2_Isr |
| RTDMA2 | RTDMA2_CH3INT | Cdd_Dma_RTDMA2_CH3_Isr |
| RTDMA2 | RTDMA2_CH4INT | Cdd_Dma_RTDMA2_CH4_Isr |
| RTDMA2 | RTDMA2_CH5INT | Cdd_Dma_RTDMA2_CH5_Isr |
| RTDMA2 | RTDMA2_CH6INT | Cdd_Dma_RTDMA2_CH6_Isr |
| RTDMA2 | RTDMA2_CH7INT | Cdd_Dma_RTDMA2_CH7_Isr |
| RTDMA2 | RTDMA2_CH8INT | Cdd_Dma_RTDMA2_CH8_Isr |
| RTDMA2 | RTDMA2_CH9INT | Cdd_Dma_RTDMA2_CH9_Isr |
| RTDMA2 | RTDMA2_CH10INT | Cdd_Dma_RTDMA2_CH10_Isr |
#### Instance support
| CPU instances | supported |
|---------------|-----------|
| CPU 1 | YES |
| CPU 2 | NO |
| CPU 3 | NO |
#### Hardware-Software Mapping
Below image shows Cdd DMA driver Hardware-Software mapping. For more information related to HW/SW mapping, refer the F29x Reference Manual.
```{figure} Assets/images/Cdd_Dma_Hw_Sw_Mapping.png
:width: 75%
:alt: Cdd DMA HW/SW Mapping
:align: center
Cdd DMA HW/SW Mapping
```
### Integration description
#### Dependent modules
##### DET
This implementation depends on the DET in order to report development errors. The detection of development errors is configurable (ON / OFF). The switch CDD_DMA_DEV_ERROR_DETECT will activate or deactivate the detection of all development errors.
##### MCU
MCU Module is required to initialize all the clocks to be used by different peripherals including the RTDMA module.
#### Resource Allocator
The CDD DMA module uses the Resource Allocator to allocate RTDMA peripheral instances and channels to CPU cores and configure their memory-mapped base addresses and global properties. Each allocation is placed inside a **Context** that maps to a CPU core (e.g. `CPU1`). The **CurrentContext** parameter in the Resource Allocator selects which Context is active for MCAL execution. See the [Resource Allocator Module User Guide](Module_User_Guide_ResourceAllocator.md) for details on configuring device-specific settings.
The **Frame** parameter (`FRAME0`–`FRAME3`) selects the memory-mapped frame for the instance, enabling simultaneous access from different initiators without arbitration stalls. The **BaseAddr** is auto-calculated based on the selected instance, channel, and frame. Additional global RTDMA properties including priority schemes, emulation mode, channel priorities, and MPU configuration are also configured through the Resource Allocator.
##### Why Global-Level Configuration is Necessary
The F29 device architecture requires certain RTDMA configuration registers to be **writable only by CPU1**. These include:
- **Priority Scheme** (Round-robin vs. Software-configured)
- **Emulation Mode** (Stop vs. Free-run during debug halt)
- **Channel Priorities** (Priority levels 0-3 for each channel)
- **MPU Configuration** (Memory Protection Unit regions and permissions)
When SDK RTDMA is used on CPU2 or CPU3, these cores cannot directly configure the above global properties due to hardware write restrictions. Therefore, the Resource Allocator provides a centralized global configuration mechanism where:
1. **CPU1 configures all global DMA properties** in the Resource Allocator
2. **Individual channels are then allocated** to different CPU contexts (CPU1, CPU2, CPU3)
3. **Each CPU context can configure** channel-specific properties (source/destination addresses, transfer sizes, triggers, etc.)
This separation ensures that global hardware settings are properly initialized by CPU1 through the Resource Allocator, while each CPU can independently manage its allocated channels for data transfers using the appropriate driver interface.
##### Configuration Architecture
The DMA channel allocation follows a two-level hierarchical structure:
1. **Global Cdd_Dma Configuration Level** (`ResourceAllocatorGeneral/Cdd_Dma`): Defines available hardware instances, their global properties, and channels
2. **CPU Context Configuration Level** (`ResourceAllocatorGeneral/Context/Cdd_Dma`): Allocates specific channels from the global pool to individual CPU contexts
##### Resource Allocator Usage Example
To allocate RTDMA1 Channel 1 to CPU1 using FRAME0:
###### Step 1: Global Cdd_Dma Configuration (CPU1-Only Writable Settings)
At the global level (`ResourceAllocatorGeneral/Cdd_Dma`), configure the RTDMA hardware instance and its global properties. **These settings must be configured here because they are only writable by CPU1**:
1. Create a new `CddDmaHwInstance` (e.g., RTDMA1)
2. Set **InstanceName** to `RTDMA1` or `RTDMA2`
3. Set **Frame** to `FRAME0`, `FRAME1`, `FRAME2`, or `FRAME3` (applies to all channels in this instance)
4. Configure **CddDmaPriorityScheme**:
- `CDD_DMA_PRIORITY_ROUND_ROBIN`: All channels have equal priority, serviced sequentially
- `CDD_DMA_PRIORITY_SOFTWARE_CONFIG`: Channels use priority levels (0-3) configured per channel
5. Configure **CddDmaEmulationMode**:
- `CDD_DMA_EMULATION_STOP`: DMA halts during debugger breakpoints
- `CDD_DMA_EMULATION_FREE_RUN`: DMA continues running during debugger breakpoints
6. Configure **CddDmaMpuEnable** (true/false) to enable Memory Protection Unit
7. If MPU is enabled, configure **CddDmaMpuRegion** containers:
- Set **CddDmaMpuRegionId** (MPU1-MPU16)
- Set **CddDmaMpuStartAddress** and **CddDmaMpuEndAddress** (4KB aligned)
- Set **CddDmaMpuAccessPermission** (NO_ACCESS, READ_ACCESS, or READ_WRITE_ACCESS)
- Add **CddDmaMpuChannelEnable** references to channels that can access this region
8. Add `CddDmaChannel` containers for each channel you want to make available (CH1, CH2, ..., CH10)
9. For each channel:
- Set **ChannelName** (CH1, CH2, ..., CH10)
- Set **CddDmaChannelPriority** (0-3, only used if priority scheme is SOFTWARE_CONFIG)
- The **BaseAddr** will be automatically calculated (e.g., `RTDMA1CH1_BASE_FRAME(0U)`)
```text
ResourceAllocatorGeneral
└── Cdd_Dma
└── CddDmaHwInstance_RTDMA1
├── InstanceName: RTDMA1
├── Frame: FRAME0
├── CddDmaPriorityScheme: Software-configured
├── CddDmaEmulationMode: Free-run
└── CddDmaChannel_CH1
├── ChannelName: CH1
├── BaseAddr: RTDMA1CH1_BASE_FRAME(0U) [auto-calculated]
└── CddDmaChannelPriority: 1
```
**Important Constraints**:
- All channels within a single RTDMA hardware instance **must share the same frame selection**. The frame is configured at the `CddDmaHwInstance` level, not at the individual channel level.
- Global properties (priority scheme, emulation mode, channel priorities, MPU settings) are **hardware instance-level settings** and apply to all channels in that instance regardless of which CPU context they are allocated to.
###### Step 2: Context-Specific Channel Allocation
After defining channels in the global configuration, allocate them to specific CPU contexts:
1. In the Resource Allocator configuration, navigate to the desired Context (e.g., CPU1_Context)
2. Under `Context/Cdd_Dma`, create a new `CddDmaAllocatedChannel`
3. Set **ChannelRef** to reference the global channel (e.g., `/ResourceAllocatorGeneral/Cdd_Dma/CddDmaHwInstance_RTDMA1/CddDmaChannel_CH1`)
```text
ResourceAllocatorGeneral
└── Context (Core: CPU1)
└── Cdd_Dma
└── CddDmaAllocatedChannel
└── ChannelRef: /ResourceAllocatorGeneral/Cdd_Dma/
CddDmaHwInstance_RTDMA1/CddDmaChannel_CH1
```
**Key Points:**
- Each `CddDmaHwInstance` represents a physical RTDMA peripheral (RTDMA1 or RTDMA2)
- A channel can only be allocated to **one CPU context** (enforced by uniqueness validation)
- Only channels allocated to a context can be used by that context's software
- Once channels are allocated to a CPU context in the Resource Allocator, they are referenced in the Cdd_Dma module configuration
##### Multi-Core Usage Scenarios
###### Scenario 1: CPU1 using Cdd_Dma (AUTOSAR MCAL)
- CPU1 configures global DMA properties in Resource Allocator (priority scheme, emulation mode, channel priorities, MPU)
- Resource Allocator allocates channels to CPU1_Context
- CPU1 calls `Cdd_Dma_Init()` to configure global DMA properties and initialize the driver
- CPU1 uses Cdd_Dma APIs to configure channel-specific properties and perform transfers
###### Scenario 2: Mixed Usage (CPU1 with Cdd_Dma, CPU2/CPU3 with SDK RTDMA)
- CPU1 configures global DMA properties for both RTDMA1 and RTDMA2 in Resource Allocator
- Resource Allocator allocates RTDMA channels to CPU1_Context
- Resource Allocator allocates RTDMA channels to CPU2_Context or CPU3_Context
- CPU1 calls `Cdd_Dma_Init()` to configure global DMA properties and initialize the driver
- CPU1 uses Cdd_Dma APIs for it's channels
- CPU2/CPU3 uses SDK RTDMA APIs for it's channels
- All CPUs operate independently on their allocated channels, but share the same global configuration set by CPU1
###### Scenario 3: CPU2/CPU3 using only SDK RTDMA
- CPU1 configures global DMA properties for RTDMA instances in Resource Allocator (priority scheme, emulation mode, channel priorities, MPU)
- Resource Allocator allocates RTDMA channels to CPU2_Context or CPU3_Context
- CPU1 calls `Cdd_Dma_Init()` to configure global settings (even though CPU1 doesn't use any DMA channels)
- CPU2/CPU3 uses SDK RTDMA APIs for their allocated channels
- This scenario requires `Cdd_Dma_Init()` on CPU1 to properly configure the global hardware settings that are only writable by CPU1
### Configuration
The Cdd DMA Driver implementation supports single configuration variants, namely Pre-Compile config. The driver expects generated **Cdd_Dma_Cfg.h** to be present as input file.
The associated Cdd DMA driver configuration generated source file is **Cdd_Dma_Cfg.c**.
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files.
```{Note}
Refer section [Getting Started with EB Tresos](./MCAL_Configuration_and_EB_Tresos.md#getting-started-with-eb-tresos) of Chapter **MCAL Configuration and EB Tresos** for more information on how to load plugin and generate the configuration files.
```
#### Configuration Parameters
##### CddDmaGeneral
Contains the general configuration parameters of the CDD DMA module.
###### CddDmaLockConfigurations
| Item ||
|--------|---------------|
| **Name** | CddDmaLockConfigurations |
| **Description** | Enables locking of DMA configuration registers to prevent accidental modification during runtime. When enabled (true), the DMA configuration registers are write-protected after initialization. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddDmaDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | CddDmaDevErrorDetect |
| **Description** | Switches the development error detection and notification on or off. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddDmaVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | CddDmaVersionInfoApi |
| **Description** | Enables or disables the Cdd_Dma_GetVersionInfo() API. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
##### CddDmaConfig
This container contains the configuration parameters and sub containers of the Cdd_Dma module.
###### CddDmaChannel
This container contains the driver configuration for the DMA channel.
###### CddDmaInstance
| Item ||
|--------|---------------|
| **Name** | CddDmaInstance |
| **Description** | DMA instance ID derived from the selected channel reference. This is a non-editable parameter automatically populated based on CddDmaChannelRef. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | RTDMA1 |
| **Range** | RTDMA1
RTDMA2 |
###### CddDmaChannel
| Item ||
|--------|---------------|
| **Name** | CddDmaChannel |
| **Description** | DMA channel ID derived from the selected channel reference. This is a non-editable parameter automatically populated based on CddDmaChannelRef. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CH1 |
| **Range** | CH1
CH2
CH3
CH4
CH5
CH6
CH7
CH8
CH9
CH10 |
###### CddDmaInterruptCategory
| Item ||
|--------|---------------|
| **Name** | CddDmaInterruptCategory |
| **Description** | This parameters defines the category of the interrupt. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ISR_CAT1_RTINT |
| **Range** | ISR_CAT1_INT
ISR_CAT1_RTINT
ISR_CAT2_INT |
###### CddDmaChIntNotification
| Item ||
|--------|---------------|
| **Name** | CddDmaChIntNotification |
| **Description** | Interrupt notification function for transfer |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddDmaOverflowIntNotification
| Item ||
|--------|---------------|
| **Name** | CddDmaOverflowIntNotification |
| **Description** | Overflow Interrupt notification function |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddDmaChannelRef
| Item ||
|--------|---------------|
| **Name** | CddDmaChannelRef |
| **Description** | Reference to the RTDMA channel from the Resource Allocator. This links the configuration to a specific DMA channel available on the device. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
#### Steps To Configure Cdd DMA Module
1. Open EB Tresos configurator tool.
2. Ensure DMA channels have been allocated to the CPU context in the Resource Allocator module (see [Resource Allocator](#resource-allocator) section for details on channel allocation).
3. Navigate to the Cdd_Dma module configuration.
4. For each DMA channel to be used, create a `CddDmaChannel` container.
5. Within each `CddDmaChannel` container, configure the following parameters:
- **CddDmaChannelRef**: Reference to the allocated channel from the Resource Allocator path (`ResourceAllocatorGeneral/Context/Cdd_Dma/CddDmaAllocatedChannel`). This links the Cdd_Dma channel configuration to the channel allocated in the Resource Allocator.
- **CddDmaInterruptCategory**: Select the interrupt category for the channel:
- `ISR_CAT1_INT`
- `ISR_CAT1_RTINT`
- `ISR_CAT2_INT`
- **CddDmaChIntNotification**: Specify the callback function name to be invoked when a DMA transfer completes on this channel.
- **CddDmaOverflowIntNotification**: Specify the callback function name to be invoked when a DMA overflow interrupt occurs on this channel.\
6. Save the configuration and generate the configuration files.
```{Note}
Global configuration parameters such as channel ID, priority scheme, priorities, emulation mode and MPU configuration are managed in the Resource Allocator module, not in the Cdd_Dma module.
```
### Examples
The example applications demonstrate use of the Cdd_Dma module. The examples are explained below in detail.
#### Cdd_Dma_Example_Mem_Transfer
##### Overview of Cdd_Dma_Example_Mem_Transfer
This example demonstrates basic memory-to-memory DMA transfer functionality:
- Initialization
- `EcuM_Init()` Initializes clock to 200 MHz using `Mcu_Init()`
- `Cdd_Dma_Init()` initializes DMA driver with EB Tresos configuration
- `Cdd_Dma_GetVersionInfo()` retrieves software version information (vendor ID, module ID, SW version)
- Transfer Configuration
- Configures DMA channel properties using `Cdd_Dma_SetChannelProperties()`:
- Software trigger mode (`CDD_DMA_TRIGGER_SOFTWARE`)
- Continuous mode enabled
- 32-bit data size for read and write operations
- Channel interrupt enabled at end of transfer
- Overflow interrupt disabled
- Configures transfer parameters using `Cdd_Dma_SetTransferProperties()`:
- Burst size: 4 words (32-bit each)
- Transfer size: 16 bursts (total 64 words = 256 bytes)
- Source and destination step sizes: 4 bytes per word
- No address wrapping (wrap size set to maximum 65535)
- Source address: `TxData` buffer
- Destination address: `RxData` buffer
- Transfer Execution
- Starts DMA channel using `Cdd_Dma_StartChannelTransfer()`
- Triggers each burst individually using `Cdd_Dma_ForcePeripheralEventTrigger()`
- Monitors burst status using `Cdd_Dma_GetChannelStatus()` to wait for burst completion
- Verifies data integrity after each burst by comparing transmitted and received data
- Receives interrupt notification via `Cdd_Dma_Channel1_notification()` callback when entire transfer completes
- Stops DMA channel using `Cdd_Dma_StopChannelTransfer()`
- Reports transfer success or failure based on data verification
##### Sample Log of Cdd_Dma_Example_Mem_Transfer
```{literalinclude} Assets/text/Cdd_Dma/F29H85x/Cdd_Dma_Example_Mem_Transfer.txt
```
#### Cdd_Dma_Example_Mem_Transfer_Mpu
##### Overview of Cdd_Dma_Example_Mem_Transfer_Mpu
This example demonstrates RTDMA Memory Protection Unit (MPU) functionality by intentionally triggering an MPU violation:
- Initialization
- `EcuM_Init()` Initializes clock to 200 MHz using `Mcu_Init()`
- `Cdd_Dma_Init()` initializes DMA driver with EB Tresos configuration
- `Cdd_Dma_GetVersionInfo()` retrieves software version information (vendor ID, module ID, SW version)
- MPU Configuration
- Configures MPU region with specific address range:
- MPU Region Start Address: 0x200E0000
- MPU Region End Address: 0x200E0FFF
- Places transmit buffer (`TxData`) at 0x200E0100 (within MPU region)
- Places receive buffer (`RxData`) at 0x200E0FDC (intentionally extends outside MPU region to 0x200E101B)
- This configuration intentionally causes MPU violation when DMA attempts to write to receive buffer
- ESM and NMI Setup
- Registers custom NMI handler `CPU1_Custom_NMIHandler()`
- Configures Error Signaling Module (ESM)
- Transfer Configuration
- Configures DMA channel properties using `Cdd_Dma_SetChannelProperties()`:
- Software trigger mode (`CDD_DMA_TRIGGER_SOFTWARE`)
- Continuous mode enabled
- 32-bit data size for read and write operations
- Channel interrupt enabled at end of transfer
- Overflow interrupt disabled
- Configures transfer parameters using `Cdd_Dma_SetTransferProperties()`:
- Burst size: 4 words (32-bit each)
- Transfer size: 16 bursts (total 64 words = 256 bytes)
- Source and destination step sizes: 4 bytes per word
- No address wrapping (wrap size set to maximum 65535)
- Source address: `TxData` buffer
- Destination address: `RxData` buffer
- When DMA attempts to write to receive buffer outside MPU region:
- MPU detects security violation
- MPU signals Error Aggregator module
- Error Aggregator communicates fault to ESM
- ESM triggers NMI interrupt and blocks RTDMA access
- NMI handler increments `g_nmiCount` counter
- Verifies NMI was triggered as expected, confirming MPU protection is functioning correctly
- Reports pass if NMI occurred within timeout, fail otherwise
##### Sample Log of Cdd_Dma_Example_Mem_Transfer_Mpu
```{literalinclude} Assets/text/Cdd_Dma/F29H85x/Cdd_Dma_Example_Mem_Transfer_Mpu.txt
```
#### Setup Required to Run Examples
- Connect the hardware and power up
- Connect UART setup to check the log on serial console
#### How to Run Examples
- Open CCS and import the desired example (Cdd_Dma_Example_Mem_Transfer or Cdd_Dma_Example_Mem_Transfer_Mpu)
- Build project and start debug session
- Run the application and observe output on serial console
#### File Structure
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂Can\
┃ ┣ 📂Cdd_Adc\
┃ ┣ 📂**Cdd_Dma**\
┃ ┃ ┣ 📂**Cdd_Dma_Example_Mem_Transfer**\
┃ ┃ ┃ ┣ 📂Common\
┃ ┃ ┃ ┃ ┗ 📂tresos\
┃ ┃ ┃ ┃ ┗ 📂config\
┃ ┃ ┃ ┃ ┣ 📜**Cdd_Dma.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┗ 📜Os.xdm\
┃ ┃ ┃ ┣ 📂F29H85x\
┃ ┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Cdd_Dma_Example_Mem_Transfer.projectspec**\
┃ ┃ ┃ ┃ ┗ 📂Cdd_Dma_Example_Mem_Transfer_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Port.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜ResourceAllocator.xdm\
┃ ┃ ┃ ┃ ┣ 📂output\
┃ ┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Dma_Cfg.h** : *Contains the generated pre-compiler configuration header*\
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Dma_Cbk.h** : *Contains callback function declarations*\
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Dma_Cfg.c** : *Contains the generated pre-compiler configuration source*\
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📂swcd\
┃ ┃ ┃ ┃ ┃ ┣ 📜Cdd_Dma_BSWMD.arxml\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_BSWMD.arxml\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_BSWMD.arxml\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┃ ┗ 📜**Cdd_Dma_Example_Mem_Transfer.c** : *Example application for Cdd_Dma memory transfer*\
┃ ┃ ┗ 📂**Cdd_Dma_Example_Mem_Transfer_Mpu**\
┃ ┃ ┣ 📂Common\
┃ ┃ ┃ ┗ 📂tresos\
┃ ┃ ┃ ┗ 📂config\
┃ ┃ ┃ ┣ 📜**Cdd_Dma.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┗ 📜Os.xdm\
┃ ┃ ┣ 📂F29H85x\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜**Cdd_Dma_Example_Mem_Transfer_Mpu.projectspec**\
┃ ┃ ┃ ┗ 📂Cdd_Dma_Example_Mem_Transfer_Mpu_Config\
┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┣ 📜Port.xdm\
┃ ┃ ┃ ┃ ┗ 📜ResourceAllocator.xdm\
┃ ┃ ┃ ┣ 📂output\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Dma_Cfg.h** : *Contains the generated pre-compiler configuration header*\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Dma_Cbk.h** : *Contains callback function declarations*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Dma_Cfg.c** : *Contains the generated pre-compiler configuration source*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBcfg.c\
┃ ┃ ┃ ┃ ┗ 📂swcd\
┃ ┃ ┃ ┃ ┣ 📜Cdd_Dma_BSWMD.arxml\
┃ ┃ ┃ ┃ ┣ 📜Mcu_BSWMD.arxml\
┃ ┃ ┃ ┃ ┗ 📜Port_BSWMD.arxml\
┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┗ 📜**Cdd_Dma_Example_Mem_Transfer_Mpu.c** : *Example application for Cdd_Dma with MPU*\
┃ ┣ 📂Cdd_Ecap\
┃ ┣ 📂Cdd_I2c\
┃ ┣ 📂Cdd_Ipc\
┃ ┣ 📂Cdd_Pwm\
┃ ┣ 📂Cdd_Sent\
┃ ┣ 📂Cdd_Uart\
┃ ┣ 📂Cdd_Xbar\
┃ ┣ 📂DeviceSupport\
┃ ┣ 📂Dio\
┃ ┣ 📂Empty_Projects\
┃ ┣ 📂Fls\
┃ ┣ 📂Fls_Fapi\
┃ ┣ 📂Gpt\
┃ ┣ 📂Lin\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┣ 📂Rtdma\
┃ ┣ 📂Spi\
┃ ┣ 📂Wdg\
┃ ┗ 📜CMakeLists.txt\
┣ 📂plugins\
┗ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
## CDD ECAP Module
### Acronyms and Definitions
|Abbreviation/Term |Explanation |
|---------------------------------------------|-----------------------------------------------------------------------------------------------|
|API |Application Programming Interface |
|AUTOSAR |Automotive Open System Architecture |
|Activation condition |Type of edge that activates the measurement. Rising edge, Falling edge or Both edge |
|ACTIVE state |Input state of a CDD ECAP Channel, an activation edge has been detected. |
|BSW |Basic Software |
|CDD |Complex Device Driver |
|Circular buffer |An area of memory used to store a continuous stream of data by starting again at the beginning of the buffer after reaching the end. |
|Channel |Represents a logical entity bound to one input signal and the hardware resources for the configured measurement mode. |
|DET |Default Error Tracer |
|Duty cycle |Percentage of High Time to Period Time. (High Time / Period Time) * 100% |
|ECU |Electronic Control Unit |
|ECAP |Enhanced Capture |
|HRCAP |High resolution Capture |
|ECAP instance |Single ECAP hardware unit |
|GPIO |General Purpose Input Output |
|High time |Time in ticks during which signal level is high |
|HW |Hardware |
|IDLE state |Input state of an Cdd_Ecap Channel, no activation edge has been detected |
|Input state |Logical input state of an Cdd_Ecap Channel. It can be ACTIVE or IDLE. |
|Linear buffer |An area of memory used to store a stream of data by starting at the beginning of the buffer and stopping at the latest on reaching the end. |
|Low time |Time in ticks during which signal level is low |
|MCU |Microcontroller unit |
|Measurement mode |Measurement mode defines the capability for signal acquisition and evaluation. Possible modes: Signal Edge Detection / Notification, Signal Measurement, Timestamp, Edge Counter |
|Measurement mode, Edge counter |Functionality of an Edge Counter, counting of external edges |
|Measurement mode, Signal Edge Detection |Notification on signal edges. |
|Measurement mode, Signal Measurement |Measurement of elapsed High Time, elapsed Low Time, elapsed Period Time and Duty Cycle of an input signal. |
|Measurement mode, Timestamp |Generation of timestamps for signal edges, see Figure “Cdd_Ecap time stamp” |
|MCAL |Micro Controller Abstraction Layer |
|Period time |Time in ticks between consecutive rising edges or falling edges |
|RTE |Runtime Environment |
|SW |Software |
### Introduction
The Cdd ECAP Driver controls the input capture unit (ECAP) of the Texas Instruments F29H85x microcontroller.
Input capture is a fundamental technique used to measure the timing of external events, such as the width or period of pulses generated by sensors or other external devices. These measurements are essential for various automotive applications, including engine control, speed sensing, and position monitoring. The CDD ECAP driver provides a standardized interface for configuring and utilizing the microcontroller's enhanced CAPture (ECAP) hardware, ensuring that application software can interact with this functionality in a consistent manner across different AUTOSAR-compliant systems.
Cdd ECAP driver provides the following features:
- Period, Low, High time measurement
- Edge detection and notification
- Edge counting
- Edge time stamping
```{figure} Assets/images/Cdd_Ecap_Autosar_MCAL.png
:width: 75%
:alt: CDD ECAP MCAL AUTOSAR
:align: center
Cdd Ecap MCAL AUTOSAR
```
This document details AUTOSAR Cdd Ecap module implementation
|Supported AUTOSAR Release |**4.3.1** |
|---------------------------------------|-------------------------------|
| **Supported Configuration Variants** | **Pre-Compile** |
| **Vendor ID** | **CDD_ECAP_VENDOR_ID (44)** |
| **Module ID** | **CDD_ECAP_MODULE_ID (255)** |
### Functional Overview
F29H85x microcontroller incorporates six independent eCAP modules. These modules are specifically designed to accurately measure the time of arrival of external signals, making them indispensable for applications that require precise timing information. The eCAP peripheral is highly suitable for a wide range of input capture functionalities, such as :
- Speed measurements of rotating machinery (for example, toothed sprockets sensed by way of Hall sensors)
- Elapsed time measurements between position sensor pulses
- Period and duty cycle measurements of pulse train signals or pulse width modulation (PWM) signals
- Decoding current or voltage amplitude derived from duty cycle encoded current/voltage sensors
#### Input capture modes: Single shot capture mode and Continuous capture mode
F29H85x eCAP peripheral offers a variety of input capture modes, allowing it to be adapted to different types of input signals and measurement requirements.
One fundamental mode is the single-shot capture mode. In this mode, the eCAP module can be configured to capture the time-stamps of up to four sequential external events. After the configured number of events (ranging from one to four, as determined by the stop value setting) has been captured, the capture process is automatically halted, and the time-base counter and the contents of the capture registers are frozen until the eCAP module is explicitly re-armed. This mode is particularly useful for capturing a specific sequence of events or for applications where the input signal is not continuous.
Another key operational mode is the continuous capture mode. In this mode, the eCAP module continuously captures the time-stamps of external events into its four 32-bit capture registers. These registers function as a circular buffer: once all four registers have been filled with timestamp values, the next captured event will overwrite the timestamp in the first register (CAP1), and the process continues. This mode is ideal for continuously monitoring a stream of events and for applications where the time difference between consecutive events (e.g., the period of a signal) needs to be measured.
#### Absolute time-stamp capture and difference (delta) mode
The eCAP peripheral also supports different methods for capturing the timestamps.
In absolute time-stamp capture, the 32-bit time-base counter within the eCAP module runs continuously from zero up to its maximum value and then wraps around. When a configured trigger event (an edge on the input signal) occurs, the current value of this continuously running counter is captured and stored in one of the capture registers. This provides an absolute timestamp of when the event occurred relative to the start of the counter.
Conversely, in difference (delta) mode time-stamp capture, the 32-bit time-base counter is automatically reset to zero immediately after each successful capture event. In this mode, the value captured into the register represents the time that has elapsed since the previous capture event. This is particularly useful for directly measuring the time interval between consecutive pulses or events without needing to perform a subtraction of absolute timestamps in software.
#### Capture registers and event prescaler
In addition to these capture modes, the eCAP peripheral offers a high degree of flexibility in configuring the trigger events. For each of the four capture registers, the user can independently select the edge polarity of the input signal that will trigger a capture. This means that for different capture events in a sequence, one can configure to trigger on a rising edge, another on a falling edge, or even both edges. This flexibility is essential for analyzing complex input signals and for measuring various signal characteristics like pulse width and period. Furthermore, the eCAP peripheral includes an input capture signal prescaling feature. This prescaler allows the frequency of the clock signal that drives the eCAP's time-base counter to be divided by a programmable integer value ranging from 2 to 62. By adjusting the prescaler, the user can control the resolution of the time-base counter and the maximum time interval that can be measured before the counter overflows. A higher prescaler value results in a lower counter frequency, thus increasing the maximum measurable time but decreasing the resolution, and vice versa.
```{figure} Assets/images/Cdd_Ecap_Block_Diagram.png
:alt: Cdd Ecap Hardware block diagram
:align: center
Cdd Ecap Hardware Block Diagram
```
Value of the event prescalar other than 1 will make the duty cycle of the signal as 50%. Signal measurement and time-stamp modes are not recommended to use in this case as duty and high time calculation may not give true picture of the actual signal.
User can refer to the below diagram
```{figure} Assets/images/Cdd_Ecap_Prescale.png
:alt: Cdd Ecap Prescale output
:align: center
Cdd Ecap Prescaled waveform output Diagram.
```
#### High Resolution capture mode
HRCAP (High Resolution Capture) mode is a specialized capability of the ECAP (Enhanced Capture) module that provides higher precision timing measurements. All eCAP hardware is accessible to the HRCAP module. HRCAP module doesn't work on the eCAP clock(SYSCLK),
it works on an internal clock called HRCLK(high resolution clock). So, the capture registers will capture the values in HRCLK domain. For this APIs are provided to convert the captured time-stamps from HRCLK domain to SYSCLK domain. HRCAP works on a calibration
logic which is always running in the background. The calibration logic essentially calculates the scalefactor for timestamp conversion from HRCLK to SYSCLK domain. While capturing pulses using HRCAP, the capture registers also store information about the integer
as well as the fractional part of the captured pulse. So, the user must use float while dealing with HRCAP calculations and measurements otherwise they will lose the accuracy.
HRCAP has some variation in performance which results in a probability distribution. Pulse width of the measured signal can affect the accuracy and standard deviation of the measurement by HRCAP.
For more information user can refer to the device datasheet provided in this link: [datasheet](https://www.ti.com/lit/ds/symlink/f29h859tu-q1.pdf)
#### Measurement modes
```{figure} Assets/images/Cdd_Ecap_Waveform_Edge_Counting.png
:alt: Cdd Ecap Edge Counting Waveform
:align: center
Cdd Ecap Edge Counting Waveform
```
```{figure} Assets/images/Cdd_Ecap_Waveform_Timestamping.png
:alt: Cdd Ecap Timestamping Waveform
:align: center
Cdd Ecap Timestamping Waveform
```
```{figure} Assets/images/Cdd_Ecap_Waveform_Edge_Detection.png
:alt: Cdd Ecap Edge Detection Waveform
:align: center
Cdd Ecap Edge Detection Waveform
```
```{figure} Assets/images/Cdd_Ecap_Waveform_Signal_Measurement.png
:alt: Cdd Ecap Signal Measurement Waveform
:align: center
Cdd Ecap Signal Measurement Waveform
```
ECAP configuration for various activation conditions
| Measurement Mode | When Activation condition = Rising Edge | When Activation condition = Falling Edge | When Activation condition = Both Edge |
|----------------------------|----------------------------------------------|-------------------------------------------|---------------------------------------------|
| Edge Counter Mode |CAP1 - rising, Wrap at 1 | CAP1 - falling, Wrap at 1 | CAP1 - falling, CAP2 - rising, Wrap at 2 |
| Time Stamp Mode |CAP1 - rising, Wrap at 1 | CAP1 - falling, Wrap at 1 | CAP1 - falling, CAP2 - rising, Wrap at 2 |
| Signal Edge Detect |CAP1 - rising, Wrap at 1 | CAP1 - falling, Wrap at 1 | CAP1 - falling, CAP2 - rising, Wrap at 2 |
| Signal Measurement Mode |CAP1 - falling, CAP2 - rising, CAP3 - falling, CAP4 - rising. Same for all activation conditions | | |
### Hardware Features
#### Hardware Features supported
Features Supported at a high level are:
- 4-event time-stamp registers (CAP1-CAP4 each 32 bits) - in Measurement mode - Timestamping
- 256:1 input multiplexer
- 32 bit time counter
- Edge polarity selection for up to four sequenced time-stamp capture events
- Interrupt on either of the four events
- Continuous mode capture of time stamps in a four-deep circular buffer
- Difference (Delta) mode time-stamp capture and Absolute time-stamp capture
- HR mode is supported for high resolution capture of the signals
#### Not supported Features
- Cdd Ecap driver doesn't support APWM mode (single channel PWM generation from ECAP)
- Cdd Ecap driver doesn't support ECAP Synchronization (SYNCIN)
- Cdd Ecap doesn't support Signal monitoring units
- Cdd Ecap doesn't operate ECAP in Single-shot capture of up to four event time-stamps
#### Non compliance
None
### Source files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂Can\
┃ ┣ 📂Cdd_Adc\
┃ ┗ 📂**Cdd_Ecap**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Cdd_Ecap.h** : *Contains the API declarations of the Cdd Ecap driver to be used by upper layers.*\
┃ ┃ ┃ ┗ 📜**Cdd_Ecap_Priv.h** : *Contains data structures and Internal function declarations.*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Cdd_Ecap.c** : *Contains the implementation of the API for Cdd Ecap driver.*\
┃ ┃ ┃ ┣ 📜**Cdd_Ecap_Irq.c** : *Contains the implementation for Cdd Ecap interrupts handlers.*\
┃ ┃ ┃ ┗ 📜**Cdd_Ecap_Priv.c** : *Contains Functions that support the API for Cdd Ecap driver*\
┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Cdd_Ipc\
┃ ┣ 📂Cdd_Pwm\
┃ ┣ 📂Cdd_Sent\
┃ ┣ 📂Cdd_Uart\
┃ ┣ 📂Cdd_Xbar\
┃ ┣ 📂Dio\
┃ ┣ 📂Fls\
┃ ┣ 📂Gpt\
┃ ┣ 📂hw_include\
┃ ┣ 📂Lin\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┣ 📂Spi\
┃ ┗ 📂Wdg\
┣ 📂examples\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{figure} Assets/images/Cdd_Ecap_Header_File_Structure.png
:alt: Cdd Ecap Header File Structure
:align: center
Cdd Ecap Header File Structure
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Scheduling
None
#### Error handling
##### Development Error Reporting
Development errors are reported to the DET using the service Det_ReportError(), when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
#### Error codes
|Type of Error |Related Error code | Value (Hex)|
|-----------------------------------------------------------------------------|-------------------------------------|------------|
|API service called with invalid pointer |CDD_ECAP_E_PARAM_POINTER |0x0AU |
|API service called with invalid channel identifier or channel not configured |CDD_ECAP_E_PARAM_CHANNEL |0x0BU |
|API service called with an invalid or not feasible activation |CDD_ECAP_E_PARAM_ACTIVATION |0x0CU |
|Init Function Failed |CDD_ECAP_E_INIT_FAILED |0x0DU |
|API service used with invalid Buffer size |CDD_ECAP_E_PARAM_BUFFER_SIZE |0x0EU |
|API service called with invalid mode |CDD_ECAP_E_PARAM_MODE |0x0FU |
|API service called without module initialization |CDD_ECAP_E_UNINIT |0x14U |
|Cdd_Ecap_StopTimestamp called on channel not started or already stopped |CDD_ECAP_E_NOT_STARTED |0x15U |
|API service called while a running operation |CDD_ECAP_E_BUSY_OPERATION |0x16U |
|API service Cdd_Ecap_Init called when module already initialized |CDD_ECAP_E_ALREADY_INITIALIZED |0x17U |
|API service called when notify interval is invalid |CDD_ECAP_E_PARAM_NOTIFY_INTERVAL |0x18U |
|API service Cdd_Ecap_GetVersionInfo called and parameter is invalid |CDD_ECAP_E_PARAM_VINFO |0x19U |
|API service called with an invalid or not feasible start level |CDD_ECAP_E_PARAM_START_LEVEL |0x1AU |
|API service called with an invalid channel in the HR mode |CDD_ECAP_E_HR_CHANNEL |0x1BU |
### Used resources
#### Interrupt Handling
The Driver doesn’t register any interrupts handler (ISR), it’s expected that consumer of this driver registers the required interrupt handler.
For every Cdd ECAP channel, an ISR requires to be registered. The Interrupt number associated with instance of the ECAP is detailed in TRM (also, please refer the Example application).
Interrupt category should be selected in the Cdd_Ecap plugin.
Cdd_Ecap driver provides ISRs. The ISRs are implemented in the Cdd_Ecap_Irq.c file.
|Cdd Ecap ChannelInstance | Interrupt Name | Interrupt handler |
|---------------------------------|-------------------------------------------------------------------------------------------------------------------------------|-------------------------------|
| CDD ECAP Channel 0 | Depends on the ECAP HW instance used for the Cdd ECAP channel. ECAP1_INT/ECAP2_INT/ECAP3_INT/ECAP4_INT/ECAP5_INT/ECAP6_INT | Cdd_Ecap_ch0Notify |
| CDD ECAP Channel 1 | Depends on the ECAP HW instance used for the Cdd ECAP channel. ECAP1_INT/ECAP2_INT/ECAP3_INT/ECAP4_INT/ECAP5_INT/ECAP6_INT | Cdd_Ecap_ch1Notify |
| CDD ECAP Channel 2 | Depends on the ECAP HW instance used for the Cdd ECAP channel. ECAP1_INT/ECAP2_INT/ECAP3_INT/ECAP4_INT/ECAP5_INT/ECAP6_INT | Cdd_Ecap_ch2Notify |
| CDD ECAP Channel 3 | Depends on the ECAP HW instance used for the Cdd ECAP channel. ECAP1_INT/ECAP2_INT/ECAP3_INT/ECAP4_INT/ECAP5_INT/ECAP6_INT | Cdd_Ecap_ch3Notify |
| CDD ECAP Channel 4 | Depends on the ECAP HW instance used for the Cdd ECAP channel. ECAP1_INT/ECAP2_INT/ECAP3_INT/ECAP4_INT/ECAP5_INT/ECAP6_INT | Cdd_Ecap_ch4Notify |
| CDD ECAP Channel 5 | Depends on the ECAP HW instance used for the Cdd ECAP channel. ECAP1_INT/ECAP2_INT/ECAP3_INT/ECAP4_INT/ECAP5_INT/ECAP6_INT | Cdd_Ecap_ch5Notify |
| CDD ECAP Channel 4 | Depends on the HRCAP HW instance used for the Cdd ECAP channel. HRCAP5_INT/HRCAP6_INT | Cdd_Ecap_HR_ch4Notify |
| CDD ECAP Channel 5 | Depends on the HRCAP HW instance used for the Cdd ECAP channel. HRCAP5_INT/HRCAP6_INT | Cdd_Ecap_HR_ch5Notify |
```{Note}
Same Interrupt Category needs to be configured in both Cdd_Ecap and OS Modules.
```
#### Instance support
|CPU instances| supported |
|-------------|-----------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
#### Hardware-Software Mapping
Below image shows Cdd Ecap driver Hardware-Software mapping. For more information related to HW/SW mapping, refer the F29x Reference Manual.
```{figure} Assets/images/Cdd_Ecap_Hw_Sw_Mapping.png
:width: 75%
:alt: Cdd Ecap HW/SW Mapping
:align: center
Cdd Ecap HW/SW Mapping
```
### Integration description
#### Dependent modules
##### DET
This implementation depends on the DET in order to report development errors. The detection of development errors is configurable (ON / OFF), The switch CDD_ECAP_DEV_ERROR_DETECT will activate or deactivate the detection of all development errors.
##### MCU
MCU Module is required to initialize all the clock to be used by different peripherals
##### OS
The Cdd_Ecap driver uses interrupts and therefore there is a dependency on the OS, which configures the interrupt sources.
##### SchM
If multiple AUTOSAR runnables have access to the same Data Store Memory block, the exported AUTOSAR specification enforces data consistency by using an AUTOSAR exclusive area. With this specification, the runnables have mutually exclusive access to the per-instance memory global data, which prevents data corruption. Beside the OS, the BSW Scheduler provides functions that Cdd_Ecap module calls at begin and end of critical sections. This implementation requires 1 level of exclusive access to guard critical sections.
The data consistency mechanism that has to be applied to an ExclusiveArea might be domain, ECU or even project specific. The decision which mechanism has to be applied by RTE / Basic Software Scheduler is taken during ECU integration by setting the Exclusive Area configuration parameter RteExclusiveAreaImplMechanism. This parameter is an input for RTE generator.
For Cdd_Ecap Module, data consistency and exclusive access to critical sections are required for the following sections as shown in the table below:
| Exclusive Area Functions used | Cdd_Ecap Function calling Exclusive Area | Need for Exclusive Area | Recommended Exclusive Area Mapping |
|-----------------------------------------------|------------------------------------------|-------|-------|
|CDD_ECAP_EXCLUSIVE_AREA_0 | Cdd_Ecap_DisableNotificationEcap
Cdd_Ecap_EnableNotificationEcap
Cdd_Ecap_SetActivationConditionEcap
Cdd_Ecap_GetInputStateEcap
Cdd_Ecap_EnableEdgeDetectionEcap
Cdd_Ecap_DisableEdgeDetectionEcap
Cdd_Ecap_StartTimestampEcap
Cdd_Ecap_StopTimestampEcap
Cdd_Ecap_GetTimestampIndexEcap
Cdd_Ecap_ResetEdgeCountEcap
Cdd_Ecap_EnableEdgeCountEcap
Cdd_Ecap_DisableEdgeCountEcap
Cdd_Ecap_GetEdgeNumbersEcap
Cdd_Ecap_StartSignalMeasurementEcap
Cdd_Ecap_StopSignalMeasurementEcap
Cdd_Ecap_GetTimeElapsedEcap
Cdd_Ecap_GetDutyCycleValues | To protect against multiple access for shared resources | **ALL_INTERRUPT_BLOCKING** : All interrupts should be blocked as this API's can be called in the interrupts |
#### Resource Allocator
The ECAP module uses the Resource Allocator to allocate ECAP peripheral instances to CPU cores and configure their memory-mapped base addresses. Each allocation is placed inside a **Context** that maps to a CPU core (e.g. `CPU1`). The **CurrentContext** parameter in the Resource Allocator selects which Context is active for MCAL execution. See the [Resource Allocator Module User Guide](Module_User_Guide_ResourceAllocator.md) for details on configuring device-specific settings.
The **Frame** parameter (`FRAME0`–`FRAME3`) selects the memory-mapped frame for the instance, enabling simultaneous access from different initiators without arbitration stalls. The **BaseAddr** is auto-calculated based on the selected instance and frame. The **DebugHaltEnabled** and **StandbyModeEnabled** parameters control peripheral behaviour during CPU debug halt and standby low-power modes respectively.
##### Resource Allocator Usage Example
To allocate ECAP1 to CPU1 using FRAME0:
1. In the Resource Allocator configuration, create a new Ecap instance allocation under the CPU1 Context
2. Set **InstanceName** to `ECAP1`
3. Set **Frame** to `FRAME0`
4. The **BaseAddr** will be automatically calculated as `ECAP1_BASE_FRAME(0U)`
5. Optionally configure **DebugHaltEnabled** and **StandbyModeEnabled**
```text
Resource Allocator Configuration:
├── Context (Core: CPU1)
│ └── Cdd_EcapAllocatedInstance
│ ├── InstanceName: ECAP1
│ ├── Frame: FRAME0
│ ├── BaseAddr: ECAP1_BASE_FRAME(0U) [auto-calculated]
│ ├── DebugHaltEnabled: true
│ └── StandbyModeEnabled: true
```
### Configuration
The Cdd Ecap Driver implementation supports single configuration variants, namely Pre-Compile config. The driver expects generated **Cdd_Ecap_Cfg.h** to be present as input file.
The associated Cdd Ecap driver configuration generated source file is **Cdd_Ecap_Cfg.c**.
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files.
```{Note}
Refer section [Getting Started with EB Tresos](./MCAL_Configuration_and_EB_Tresos.md#getting-started-with-eb-tresos) of Chapter **MCAL Configuration and EB Tresos** for more information on how to load plugin and generate the configuration files.
```
#### Configuration Parameters
##### CddEcapConfigSet
This container contains the configuration parameters and sub containers of the AUTOSAR CddEcap module.
###### CddEcapChannel
Configuration of an individual CDD ECAP channel.
###### CddEcapChannelId
| Item ||
|--------|---------------|
| **Name** | CddEcapChannelId |
| **Description** | Channel Id of the CDD ECAP channel. This value will be assigned to the symbolic name derived of the CddEcapChannel container short name. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 255 |
###### CddEcapEmulationMode
| Item ||
|--------|---------------|
| **Name** | CddEcapEmulationMode |
| **Description** | Configures the emulation mode of the Cdd Ecap. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ECAP_EMULATION_FREE_RUN |
| **Range** | CDD_ECAP_EMULATION_STOP
CDD_ECAP_EMULATION_RUN_TO_ZERO
CDD_ECAP_EMULATION_FREE_RUN |
###### CddEcapDefaultStartEdge
| Item ||
|--------|---------------|
| **Name** | CddEcapDefaultStartEdge |
| **Description** | Configures the default-activation-edge which shall be used for this channel if there was no activation-edge configured by the call of service CddEcap_SetActivationCondition(). |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ECAP_RISING_EDGE |
| **Range** | CDD_ECAP_BOTH_EDGES
CDD_ECAP_FALLING_EDGE
CDD_ECAP_RISING_EDGE |
###### CddEcapInputSelect
| Item ||
|--------|---------------|
| **Name** | CddEcapInputSelect |
| **Description** | Configures the source to be used in order to give CDD ECAP the required input |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ECAP_INPUT_INPUTXBAR1 |
| **Range** | CDD_ECAP_INPUT_INPUTXBAR1
CDD_ECAP_INPUT_INPUTXBAR2
CDD_ECAP_INPUT_INPUTXBAR3
CDD_ECAP_INPUT_INPUTXBAR4
CDD_ECAP_INPUT_INPUTXBAR5
CDD_ECAP_INPUT_INPUTXBAR6
CDD_ECAP_INPUT_INPUTXBAR7
CDD_ECAP_INPUT_INPUTXBAR8
CDD_ECAP_INPUT_INPUTXBAR9
CDD_ECAP_INPUT_INPUTXBAR10
CDD_ECAP_INPUT_INPUTXBAR11
CDD_ECAP_INPUT_INPUTXBAR12
CDD_ECAP_INPUT_INPUTXBAR13
CDD_ECAP_INPUT_INPUTXBAR14
CDD_ECAP_INPUT_INPUTXBAR15
CDD_ECAP_INPUT_INPUTXBAR16
CDD_ECAP_INPUT_ECAP1_CLB1_OUT14
CDD_ECAP_INPUT_ECAP2_CLB1_OUT14
CDD_ECAP_INPUT_ECAP1_CLB1_OUT15
CDD_ECAP_INPUT_ECAP2_CLB1_OUT15
CDD_ECAP_INPUT_ECAP3_CLB2_OUT14
CDD_ECAP_INPUT_ECAP4_CLB2_OUT14
CDD_ECAP_INPUT_ECAP5_CLB2_OUT14
CDD_ECAP_INPUT_ECAP3_CLB2_OUT15
CDD_ECAP_INPUT_ECAP4_CLB2_OUT15
CDD_ECAP_INPUT_ECAP5_CLB2_OUT15
CDD_ECAP_INPUT_ECAP6_CLB3_OUT14
CDD_ECAP_INPUT_ECAP6_CLB3_OUT15
CDD_ECAP_INPUT_ECAP6_CLB4_OUT14
CDD_ECAP_INPUT_ECAP6_CLB4_OUT15
CDD_ECAP_INPUT_ECAP1_CLB5_OUT14
CDD_ECAP_INPUT_ECAP2_CLB5_OUT14
CDD_ECAP_INPUT_ECAP1_CLB5_OUT15
CDD_ECAP_INPUT_ECAP2_CLB5_OUT15
CDD_ECAP_INPUT_ECAP3_CLB6_OUT14
CDD_ECAP_INPUT_ECAP4_CLB6_OUT14
CDD_ECAP_INPUT_ECAP5_CLB6_OUT14
CDD_ECAP_INPUT_ECAP3_CLB6_OUT15
CDD_ECAP_INPUT_ECAP4_CLB6_OUT15
CDD_ECAP_INPUT_ECAP5_CLB6_OUT15
CDD_ECAP_INPUT_OUTPUTXBAR1
CDD_ECAP_INPUT_OUTPUTXBAR2
CDD_ECAP_INPUT_OUTPUTXBAR3
CDD_ECAP_INPUT_OUTPUTXBAR4
CDD_ECAP_INPUT_OUTPUTXBAR5
CDD_ECAP_INPUT_OUTPUTXBAR6
CDD_ECAP_INPUT_OUTPUTXBAR7
CDD_ECAP_INPUT_OUTPUTXBAR8
CDD_ECAP_INPUT_ADC_E_EVENT4
CDD_ECAP_INPUT_ADC_E_EVENT3
CDD_ECAP_INPUT_ADC_E_EVENT2
CDD_ECAP_INPUT_ADC_E_EVENT1
CDD_ECAP_INPUT_ADC_D_EVENT4
CDD_ECAP_INPUT_ADC_D_EVENT3
CDD_ECAP_INPUT_ADC_D_EVENT2
CDD_ECAP_INPUT_ADC_D_EVENT1
CDD_ECAP_INPUT_ADC_C_EVENT4
CDD_ECAP_INPUT_ADC_C_EVENT3
CDD_ECAP_INPUT_ADC_C_EVENT2
CDD_ECAP_INPUT_ADC_C_EVENT1
CDD_ECAP_INPUT_ADC_B_EVENT4
CDD_ECAP_INPUT_ADC_B_EVENT3
CDD_ECAP_INPUT_ADC_B_EVENT2
CDD_ECAP_INPUT_ADC_B_EVENT1
CDD_ECAP_INPUT_ADC_A_EVENT4
CDD_ECAP_INPUT_ADC_A_EVENT3
CDD_ECAP_INPUT_ADC_A_EVENT2
CDD_ECAP_INPUT_ADC_A_EVENT1
CDD_ECAP_INPUT_FSIA_RX_MSR_LINE
CDD_ECAP_INPUT_FSIA_RX_MSR_LINE_RISE
CDD_ECAP_INPUT_FSIA_RX_MSR_LINE_FALL
CDD_ECAP_INPUT_FSIB_RX_MSR_LINE
CDD_ECAP_INPUT_FSIB_RX_MSR_LINE_RISE
CDD_ECAP_INPUT_FSIB_RX_MSR_LINE_FALL
CDD_ECAP_INPUT_FSIC_RX_MSR_LINE
CDD_ECAP_INPUT_FSIC_RX_MSR_LINE_RISE
CDD_ECAP_INPUT_FSIC_RX_MSR_LINE_FALL
CDD_ECAP_INPUT_FSID_RX_MSR_LINE
CDD_ECAP_INPUT_FSID_RX_MSR_LINE_RISE
CDD_ECAP_INPUT_FSID_RX_MSR_LINE_FALL
CDD_ECAP_INPUT_SDFM2_FLT1_COMPARE_LOW
CDD_ECAP_INPUT_SDFM2_FLT2_COMPARE_LOW
CDD_ECAP_INPUT_SDFM2_FLT3_COMPARE_LOW
CDD_ECAP_INPUT_SDFM2_FLT4_COMPARE_LOW
CDD_ECAP_INPUT_SDFM1_FLT1_COMPARE_LOW
CDD_ECAP_INPUT_SDFM1_FLT2_COMPARE_LOW
CDD_ECAP_INPUT_SDFM1_FLT3_COMPARE_LOW
CDD_ECAP_INPUT_SDFM1_FLT4_COMPARE_LOW
CDD_ECAP_INPUT_SDFM2_FLT1_COMPARE_Z
CDD_ECAP_INPUT_SDFM2_FLT2_COMPARE_Z
CDD_ECAP_INPUT_SDFM2_FLT3_COMPARE_Z
CDD_ECAP_INPUT_SDFM2_FLT4_COMPARE_Z
CDD_ECAP_INPUT_SDFM1_FLT1_COMPARE_Z
CDD_ECAP_INPUT_SDFM1_FLT2_COMPARE_Z
CDD_ECAP_INPUT_SDFM1_FLT3_COMPARE_Z
CDD_ECAP_INPUT_SDFM1_FLT4_COMPARE_Z
CDD_ECAP_INPUT_SDFM2_FLT1_COMPARE_HIGH
CDD_ECAP_INPUT_SDFM2_FLT2_COMPARE_HIGH
CDD_ECAP_INPUT_SDFM2_FLT3_COMPARE_HIGH
CDD_ECAP_INPUT_SDFM2_FLT4_COMPARE_HIGH
CDD_ECAP_INPUT_SDFM1_FLT1_COMPARE_HIGH
CDD_ECAP_INPUT_SDFM1_FLT2_COMPARE_HIGH
CDD_ECAP_INPUT_SDFM1_FLT3_COMPARE_HIGH
CDD_ECAP_INPUT_SDFM1_FLT4_COMPARE_HIGH
CDD_ECAP_INPUT_SDFM2_FLT1_COMPARE_HIGH_OR_LOW
CDD_ECAP_INPUT_SDFM2_FLT2_COMPARE_HIGH_OR_LOW
CDD_ECAP_INPUT_SDFM2_FLT3_COMPARE_HIGH_OR_LOW
CDD_ECAP_INPUT_SDFM2_FLT4_COMPARE_HIGH_OR_LOW
CDD_ECAP_INPUT_SDFM1_FLT1_COMPARE_HIGH_OR_LOW
CDD_ECAP_INPUT_SDFM1_FLT2_COMPARE_HIGH_OR_LOW
CDD_ECAP_INPUT_SDFM1_FLT3_COMPARE_HIGH_OR_LOW
CDD_ECAP_INPUT_SDFM1_FLT4_COMPARE_HIGH_OR_LOW
CDD_ECAP_INPUT_ECAP5_ECAP6_DELAY_CLK
CDD_ECAP_INPUT_ECAP6_ECAP5_DELAY_CLK
CDD_ECAP_INPUT_ECATSYNC0
CDD_ECAP_INPUT_ECATSYNC1
CDD_ECAP_INPUT_CMPSS1_CTRIP_LOW
CDD_ECAP_INPUT_CMPSS2_CTRIP_LOW
CDD_ECAP_INPUT_CMPSS3_CTRIP_LOW
CDD_ECAP_INPUT_CMPSS4_CTRIP_LOW
CDD_ECAP_INPUT_CMPSS5_CTRIP_LOW
CDD_ECAP_INPUT_CMPSS6_CTRIP_LOW
CDD_ECAP_INPUT_CMPSS7_CTRIP_LOW
CDD_ECAP_INPUT_CMPSS8_CTRIP_LOW
CDD_ECAP_INPUT_CMPSS1_CTRIP_HIGH
CDD_ECAP_INPUT_CMPSS2_CTRIP_HIGH
CDD_ECAP_INPUT_CMPSS3_CTRIP_HIGH
CDD_ECAP_INPUT_CMPSS4_CTRIP_HIGH
CDD_ECAP_INPUT_CMPSS5_CTRIP_HIGH
CDD_ECAP_INPUT_CMPSS6_CTRIP_HIGH
CDD_ECAP_INPUT_CMPSS7_CTRIP_HIGH
CDD_ECAP_INPUT_CMPSS8_CTRIP_HIGH
CDD_ECAP_INPUT_GPIO8
CDD_ECAP_INPUT_GPIO9
CDD_ECAP_INPUT_GPIO22
CDD_ECAP_INPUT_GPIO23
CDD_ECAP_INPUT_CMPSS1_CTRIP_HIGH_OR_LOW
CDD_ECAP_INPUT_CMPSS2_CTRIP_HIGH_OR_LOW
CDD_ECAP_INPUT_CMPSS3_CTRIP_HIGH_OR_LOW
CDD_ECAP_INPUT_CMPSS4_CTRIP_HIGH_OR_LOW
CDD_ECAP_INPUT_CMPSS5_CTRIP_HIGH_OR_LOW
CDD_ECAP_INPUT_CMPSS6_CTRIP_HIGH_OR_LOW
CDD_ECAP_INPUT_CMPSS7_CTRIP_HIGH_OR_LOW
CDD_ECAP_INPUT_CMPSS8_CTRIP_HIGH_OR_LOW
CDD_ECAP_INPUT_ECAP1_INPUTXBAR7
CDD_ECAP_INPUT_ECAP2_INPUTXBAR8
CDD_ECAP_INPUT_ECAP3_INPUTXBAR9
CDD_ECAP_INPUT_ECAP4_INPUTXBAR10
CDD_ECAP_INPUT_ECAP5_INPUTXBAR11
CDD_ECAP_INPUT_ECAP6_INPUTXBAR12
CDD_ECAP_INPUT_SDFM4_FLT1_COMPARE_LOW
CDD_ECAP_INPUT_SDFM4_FLT2_COMPARE_LOW
CDD_ECAP_INPUT_SDFM4_FLT3_COMPARE_LOW
CDD_ECAP_INPUT_SDFM4_FLT4_COMPARE_LOW
CDD_ECAP_INPUT_SDFM3_FLT1_COMPARE_LOW
CDD_ECAP_INPUT_SDFM3_FLT2_COMPARE_LOW
CDD_ECAP_INPUT_SDFM3_FLT3_COMPARE_LOW
CDD_ECAP_INPUT_SDFM3_FLT4_COMPARE_LOW
CDD_ECAP_INPUT_SDFM4_FLT4_COMPARE_Z
CDD_ECAP_INPUT_SDFM3_FLT4_COMPARE_Z
CDD_ECAP_INPUT_SDFM4_FLT1_COMPARE_HIGH
CDD_ECAP_INPUT_SDFM4_FLT2_COMPARE_HIGH
CDD_ECAP_INPUT_SDFM4_FLT3_COMPARE_HIGH
CDD_ECAP_INPUT_SDFM4_FLT4_COMPARE_HIGH
CDD_ECAP_INPUT_SDFM3_FLT1_COMPARE_HIGH
CDD_ECAP_INPUT_SDFM3_FLT2_COMPARE_HIGH
CDD_ECAP_INPUT_SDFM3_FLT3_COMPARE_HIGH
CDD_ECAP_INPUT_SDFM3_FLT4_COMPARE_HIGH
CDD_ECAP_INPUT_SDFM4_FLT1_COMPARE_HIGH_OR_LOW
CDD_ECAP_INPUT_SDFM4_FLT2_COMPARE_HIGH_OR_LOW
CDD_ECAP_INPUT_SDFM4_FLT3_COMPARE_HIGH_OR_LOW
CDD_ECAP_INPUT_SDFM4_FLT4_COMPARE_HIGH_OR_LOW
CDD_ECAP_INPUT_SDFM3_FLT1_COMPARE_HIGH_OR_LOW
CDD_ECAP_INPUT_SDFM3_FLT2_COMPARE_HIGH_OR_LOW
CDD_ECAP_INPUT_SDFM3_FLT3_COMPARE_HIGH_OR_LOW
CDD_ECAP_INPUT_SDFM3_FLT4_COMPARE_HIGH_OR_LOW
CDD_ECAP_INPUT_EPWM18_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM17_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM16_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM15_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM14_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM13_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM12_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM11_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM10_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM9_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM8_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM7_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM6_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM5_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM4_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM3_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM2_DEL_ACTIVE
CDD_ECAP_INPUT_EPWM1_DEL_ACTIVE
CDD_ECAP_INPUT_GPIO11
CDD_ECAP_INPUT_GPIO12
CDD_ECAP_INPUT_GPIO13
CDD_ECAP_INPUT_GPIO14
CDD_ECAP_INPUT_ECAP1_EPG1_DATAOUT49
CDD_ECAP_INPUT_ECAP2_EPG1_DATAOUT50
CDD_ECAP_INPUT_ECAP3_EPG1_DATAOUT51
CDD_ECAP_INPUT_ECAP4_EPG1_DATAOUT52
CDD_ECAP_INPUT_ECAP5_EPG1_DATAOUT53
CDD_ECAP_INPUT_ECAP6_EPG1_DATAOUT54 |
###### CddEcapIrqType
| Item ||
|--------|---------------|
| **Name** | CddEcapIrqType |
| **Description** | Type of Isr function:
void functionname(void)
CAT1 see description in oil tool : interrupt void func(void)
CAT2 see description in oil tool : ISR(func) |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ISR_CAT1_INT |
| **Range** | ISR_CAT1_INT
ISR_CAT1_RINT
ISR_CAT2_INT |
###### CddEcapMeasurementMode
| Item ||
|--------|---------------|
| **Name** | CddEcapMeasurementMode |
| **Description** | Configures the measurement mode of this channel. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ECAP_MODE_EDGE_COUNTER |
| **Range** | CDD_ECAP_MODE_EDGE_COUNTER
CDD_ECAP_MODE_SIGNAL_EDGE_DETECT
CDD_ECAP_MODE_SIGNAL_MEASUREMENT
CDD_ECAP_MODE_TIMESTAMP |
###### CddEcapPrescaler
| Item ||
|--------|---------------|
| **Name** | CddEcapPrescaler |
| **Description** | Configures the prescale value, keep it as 0 if you want to bypass it |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ECAP_PRESCALAR_1 |
| **Range** | CDD_ECAP_PRESCALAR_1
CDD_ECAP_PRESCALAR_2
CDD_ECAP_PRESCALAR_4
CDD_ECAP_PRESCALAR_6
CDD_ECAP_PRESCALAR_8
CDD_ECAP_PRESCALAR_10
CDD_ECAP_PRESCALAR_12
CDD_ECAP_PRESCALAR_14
CDD_ECAP_PRESCALAR_16
CDD_ECAP_PRESCALAR_18
CDD_ECAP_PRESCALAR_20
CDD_ECAP_PRESCALAR_22
CDD_ECAP_PRESCALAR_24
CDD_ECAP_PRESCALAR_26
CDD_ECAP_PRESCALAR_28
CDD_ECAP_PRESCALAR_30
CDD_ECAP_PRESCALAR_32
CDD_ECAP_PRESCALAR_34
CDD_ECAP_PRESCALAR_36
CDD_ECAP_PRESCALAR_38
CDD_ECAP_PRESCALAR_40
CDD_ECAP_PRESCALAR_42
CDD_ECAP_PRESCALAR_44
CDD_ECAP_PRESCALAR_46
CDD_ECAP_PRESCALAR_48
CDD_ECAP_PRESCALAR_50
CDD_ECAP_PRESCALAR_52
CDD_ECAP_PRESCALAR_54
CDD_ECAP_PRESCALAR_56
CDD_ECAP_PRESCALAR_58
CDD_ECAP_PRESCALAR_60
CDD_ECAP_PRESCALAR_62 |
###### CddEcapClkFrequency
| Item ||
|--------|---------------|
| **Name** | CddEcapClkFrequency |
| **Description** | Reference to a container of the type McuClockReferencePoint, to select an input clock. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 200000000 |
| **Max-value** | 200000000 |
| **Min-value** | 2000000 |
###### CddEcapHREnable
| Item ||
|--------|---------------|
| **Name** | CddEcapHREnable |
| **Description** | This parameter enables HR mode for a particular Cdd Ecap channel. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddEcapChannelRef
| Item ||
|--------|---------------|
| **Name** | CddEcapChannelRef |
| **Description** | Reference to the ECAP Channel. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddEcapFunctionalClock
| Item ||
|--------|---------------|
| **Name** | CddEcapFunctionalClock |
| **Description** | Reference to a container of the type McuClockReferencePoint, to select an input clock. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddEcapSignalMeasurement
This container contains the configuration (parameters) in case the measurement mode is "CddEcapSignalMeasurement"
###### CddEcapSignalMeasurementProperty
| Item ||
|--------|---------------|
| **Name** | CddEcapSignalMeasurementProperty |
| **Description** | Configures the property that could be measured in case the mode is "CddEcapSignalMeasurement". |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ECAP_HIGH_TIME |
| **Range** | CDD_ECAP_HIGH_TIME
CDD_ECAP_LOW_TIME
CDD_ECAP_PERIOD_TIME |
###### CddEcapTimestampMeasurement
This container contains the configuration (parameters) in case the measurement mode is "CddEcapTimestamp"
###### CddEcapTimestampMeasurementProperty
| Item ||
|--------|---------------|
| **Name** | CddEcapTimestampMeasurementProperty |
| **Description** | Configures the handling of the buffer in case the mode is "Timestamp" |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_ECAP_CIRCULAR_BUFFER |
| **Range** | CDD_ECAP_CIRCULAR_BUFFER
CDD_ECAP_LINEAR_BUFFER |
###### CddEcapTimestampNotification
| Item ||
|--------|---------------|
| **Name** | CddEcapTimestampNotification |
| **Description** | Notification function if the number of requested timestamps |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddEcapSignalEdgeDetection
This container contains the configuration (parameters) in case the measurement mode is "CddEcapSignalEdgeDetection"
###### CddEcapSignalNotification
| Item ||
|--------|---------------|
| **Name** | CddEcapSignalNotification |
| **Description** | Notification function for signal notification. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
##### CddEcapGeneral
Configuration of general CDD ECAP parameters.
###### CddEcapDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | CddEcapDevErrorDetect |
| **Description** | Switches the development error detection and notification on or off. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddEcapDeInitApi
| Item ||
|--------|---------------|
| **Name** | CddEcapDeInitApi |
| **Description** | Adds / removes the service CddEcap_DeInit() from the code. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddEcapEdgeCountApi
| Item ||
|--------|---------------|
| **Name** | CddEcapEdgeCountApi |
| **Description** | Adds / removes all services related to the edge counting functionality as listed below, from the code: CddEcap_ResetEdgeCount(), CddEcap_EnableEdgeCount(), CddEcap_DisableEdgeCount(), CddEcap_GetEdgeNumbers(). |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddEcapEdgeDetectApi
| Item ||
|--------|---------------|
| **Name** | CddEcapEdgeDetectApi |
| **Description** | Adds / removes the services related to the edge detection functionality, from the code: |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddEcapGetDutyCycleValuesApi
| Item ||
|--------|---------------|
| **Name** | CddEcapGetDutyCycleValuesApi |
| **Description** | Adds / removes the service CddEcap_GetDutyCycleValues() from the code. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddEcapGetInputStateApi
| Item ||
|--------|---------------|
| **Name** | CddEcapGetInputStateApi |
| **Description** | Adds / removes the service CddEcap_GetInputState() from the code. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddEcapGetTimeElapsedApi
| Item ||
|--------|---------------|
| **Name** | CddEcapGetTimeElapsedApi |
| **Description** | Adds / removes the service CddEcap_GetTimeElapsed() from the code. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddEcapGetVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | CddEcapGetVersionInfoApi |
| **Description** | Adds / removes the service CddEcap_GetVersionInfo() from the code. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddEcapSignalMeasurementApi
| Item ||
|--------|---------------|
| **Name** | CddEcapSignalMeasurementApi |
| **Description** | Adds / removes the services CddEcap_StartSignalMeasurement() and CddEcap_StopSignalMeasurement() from the code. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddEcapTimestampApi
| Item ||
|--------|---------------|
| **Name** | CddEcapTimestampApi |
| **Description** | Adds / removes all services related to the timestamping functionality as listed below from the code: CddEcap_StartTimestamp(), CddEcap_StopTimestamp(), CddEcap_GetTimestampIndex(). |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddEcapHRConfigApi
| Item ||
|--------|---------------|
| **Name** | CddEcapHRConfigApi |
| **Description** | Adds / removes all services related to the high resolution functionality as listed below, from the code: . |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
#### Steps To Configure Cdd Ecap Module
1. Open EB Tresos configurator tool, load Cdd_Ecap module. Select the Precompile Config Variant.
2. Configure the required parameters.
3. Save the configuration and generate the configuration.
### Examples
The example applications demonstrates usecases of the Cdd Ecap driver APIs. The examples are explained below in detailed.
#### Cdd_Ecap_Capture_Signal
##### Overview of Cdd_Ecap_Capture_Signal
This example configures 4 channels of Cdd ECAP in different modes and captures a PWM signal.
| Cdd Ecap Channel | Measurement Mode | Input | ECAP Instance and interrupt used | Notification handler | Activation | Other |
|------------------|----------------------------|-------------|----------------------------------|----------------------|-----------------|---------------------------------------------------|
| Channel 0 | Signal Measurement Mode |INPUTXBAR7 | ECAP1, Interrupt 78 | | | Signal Measurement property is high time |
| Channel 1 | Time Stamp Mode |INPUTXBAR7 | ECAP2, Interrupt 79 |TimeStampNotify | Rising Edge | Buffer type is Circular |
| Channel 2 | Edge Counter Mode |INPUTXBAR7 | ECAP3, Interrupt 80 | | Rising Edge | |
| Channel 3 | Signal Edge Detect |INPUTXBAR7 | ECAP4, Interrupt 81 |SignalNotify | Rising Edge | |
Input Xbar 7 is configured to use GPIO1 as input
PWM signal (EPWM1_A) is generated on the GPIO0.
- Cdd_Ecap_Capture_Signal
- EcuM_Init()
- Initializes clock to 200 MHz using Mcu_Init().
- Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
- Initializes Cdd_Ecap driver using Cdd_Ecap_Init()
- Cdd_Ecap_StartSignalMeasurement starts signal measurement on Cdd ECAP Channel 0 using ECAP0. Cdd_Ecap_GetDutyCycleValues and Cdd_Ecap_GetTimeElapsed gets duty cycle values.
- Cdd_Ecap_StartTimestamp starts timestamping on Cdd ECAP Channel 1 using ECAP1 and Cdd_Ecap_EnableNotification enables timestamp notification
- Cdd_Ecap_EnableEdgeCount starts edge counting on Cdd ECAP Channel 2 using ECAP2
- Cdd_Ecap_EnableEdgeDetection starts edge detection on Cdd ECAP Channel 3 using ECAP3 and Cdd_Ecap_EnableNotification enables edge detection notification. Cdd_Ecap_GetInputState gets input state
- Cdd_Ecap_DeInit de-initializes Cdd ECAP
#### Setup required to run Cdd_Ecap_Capture_Signal
- Connect the hardware (Loopback from GPIO0 to GPIO1. On HSEC dock, this is from HSEC49 to HSEC50) and power up
- Connect the uart set up to check the log on serial console
#### How to run Cdd_Ecap_Capture_Signal
- Open CCS and import Cdd Ecap Example
- Build project and start debug project
##### Sample Log of Cdd_Ecap_Capture_Signal
```{literalinclude} Assets/text/Cdd_Ecap/F29H85x/Cdd_Ecap_Capture_Signal.logs
```
#### Cdd_Ecap_HrMode
##### Overview of Cdd_Ecap_HrMode
This example configures ECAP in HR mode and measures the high time and period time. This example demonstrates the HR mode for precise signal measurement.
A PWM signal of fixed duty and time period is used for this purpose.
| Cdd Ecap Channel | Measurement Mode | Input | ECAP Instance and interrupt used | Notification handler | Activation | Other |
|------------------|----------------------------|-------------|----------------------------------|----------------------|-----------------|---------------------------------------------------|
| Channel 0 | Signal Measurement Mode |INPUTXBAR7 | ECAP5, HRCAP5, Interrupt 82, 83 | | | Signal Measurement property is high time |
Input Xbar 7 is configured to use GPIO1 as input
PWM signal (EPWM1_A) is generated on the GPIO0.
- Cdd_Ecap_HrMode
- EcuM_Init()
- Initializes clock to 200 MHz using Mcu_Init().
- Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
- Initializes Cdd_Ecap driver using Cdd_Ecap_Init()
- Cdd_Ecap_StartSignalMeasurement starts signal measurement on Cdd ECAP Channel 0 using ECAP5. Cdd_Ecap_GetDutyCycleValues and Cdd_Ecap_GetTimeElapsed gets duty cycle values.
- Cdd_Ecap_GetHrScaleFactor returns scalefactor.
- Cdd_Ecap_ConvertHrTimeStampToEcapTimeStamp converts timestamp from HRCLK to SYSCLK domain
- Cdd_Ecap_DeInit de-initializes Cdd ECAP
#### Setup required to run Cdd_Ecap_HrMode
- Connect the hardware (Loopback from GPIO0 to GPIO1. On HSEC dock, this is from HSEC49 to HSEC50) and power up
- Connect the uart set up to check the log on serial console
#### How to run Cdd_Ecap_HrMode
- Open CCS and import Cdd Ecap Example
- Build project and start debug project
##### Sample Log of Cdd_Ecap_HrMode
```{literalinclude} Assets/text/Cdd_Ecap/F29H85x/Cdd_Ecap_HrMode.logs
```
#### File Structure
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂Can\
┃ ┣ 📂Cdd_Adc\
┃ ┣ 📂**Cdd Ecap**\
┃ ┃ ┣ 📂 **Cdd_Ecap_Capture_Signal**\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜**Cdd_Ecap_Capture_Signal.projectspec**\
┃ ┃ ┃ ┣ 📂Cdd_Ecap_Capture_Signal_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Port.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Cdd_Pwm.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Cdd_Xbar.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Cdd_Ecap.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Cdd_Pwm.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Cdd_Xbar.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Cdd_Ecap_Cfg.h** : *Contains the generated pre-compiler configuration header*\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Port_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Cdd_Pwm.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Cdd_Xbar.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Cdd_Ecap_Cfg.c** : *Contains the generated pre-compiler configuration source*\
┃ ┃ ┃ ┃ ┣ 📂swcd\
┃ ┃ ┃ ┃ ┃ ┗ 📜Cdd_Xbar_BSWMD.arxml\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┗ ┗ 📜**Cdd_Ecap_Capture_Signal.c**: *Example application for Cdd Ecap*\
┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Cdd_Ipc\
┃ ┣ 📂Cdd_Pwm\
┃ ┣ 📂Cdd_Sent\
┃ ┣ 📂Cdd_Uart\
┃ ┣ 📂Cdd_Xbar\
┃ ┣ 📂DeviceSupport\
┃ ┣ 📂Dio\
┃ ┣ 📂Fls\
┃ ┣ 📂Gpt\
┃ ┣ 📂Lin\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┣ 📂Spi\
┃ ┗ 📂Wdg\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
## CDD I2C Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|API|Application Programming Interface|
|BSW|Basic Software|
|DET|Default Error Tracer|
|I2C|Inter Integrated Circuit|
|MCAL|Micro Controller Abstraction Layer|
|MCU|Micro Controller Unit|
|OS|Operating System|
### Introduction
The I2C driver is part of complex device drivers (CDD) which provides API for the inter-integrated circuit (I2C) module.
The I2C driver provides an interface to communicate to the devices connected to the I2C bus. External components attached to this 2-wire serial bus can transmit/receive data to/from the device through the I2C module.
The following figure shows where the I2C is located in the AUTOSAR architecture.
```{figure} Assets/images/i2c/i2c_architecture.png
:alt: I2C Architecture
:align: center
I2C Architecture
```
| | |
|--------------------------------------|-------------|
| **Supported AUTOSAR Release** | **4.3.1** |
| **Supported Configuration Variants** | **Pre-Compile** |
| **Vendor ID** | **CDD_I2C_VENDOR_ID (44)(TEXAS INSTRUMENTS)** |
| **Module ID** | **CDD_I2C_MODULE_ID (255)** |
### Functional Overview
The I2C module provides an interface between the MCU and devices compliant with the NXP Semiconductors
Inter-IC bus (I2C bus) specification version 2.1, and connected by way of an I2C bus. External components
attached to this 2-wire serial bus can transmit/receive 1- to 8-bit data to/from the device through the I2C module.
The I2C driver supports Controller Mode (Master) and Target Mode (Slave) operation.
#### Controller Mode (Master)
In Controller Mode, the I2C instance initiates and controls all data transfers on the bus. The expected flow for utilization of the driver in controller mode is:
1. Interrupt registration (only required in case of interrupt mode)
2. I2C driver initialization using Cdd_I2c_Init()
3. Post initialization, buffer setup linking is done to point channels to their respective buffers using Cdd_I2c_SetupEB() or Cdd_I2c_SetupEBDynamic()
4. For writing data to target devices, Cdd_I2c_AsyncTransmit() is used in both polling as well as interrupt mode
5. For reception of data from I2C target devices, Cdd_I2c_AsyncTransmit() can be used in interrupt mode
6. If polling mode is being used, use Cdd_I2c_MainFunction() to process any sequence in the queue and update the status of the queue to real time value
#### Target Mode (Slave)
In Target Mode, the I2C instance responds to requests from a controller device on the bus. Target Mode supports interrupt mode only. The expected flow for utilization of the driver in target mode is:
1. I2C driver initialization using Cdd_I2c_Init() with the HW unit configured as Target Mode
2. Submit initial TX buffer using Cdd_I2c_TargetSubmitTxBuffer() for controller read requests
3. Submit initial RX buffer using Cdd_I2c_TargetSubmitRxBuffer() for controller write requests
4. Start target mode operation using Cdd_I2c_TargetStart()
5. Handle notifications via configured callbacks:
- Cdd_I2c_TargetRxStartNotification: Called when controller initiates write operation
- Cdd_I2c_TargetTxStartNotification: Called when controller initiates read operation
- Cdd_I2c_TargetRxCompleteNotification: Called when RX buffer is full or STOP is detected
- Cdd_I2c_TargetTxCompleteNotification: Called when TX buffer is empty or STOP is detected
- Cdd_I2c_TargetErrorNotification: Called on errors (overflow, underflow, no buffer, NACK)
6. In notification callbacks, submit new buffers as needed and process received/transmitted data
7. Stop target mode operation using Cdd_I2c_TargetStop() when done
```{note}
Controller and Target modes are mutually exclusive per HW unit and are configured at initialization time. Target Mode supports interrupt mode only and cannot be configured in polling mode.
```
### Hardware Features
On F29x platforms, there are 2 I2C instances I2CA and I2CB.
#### Hardware Features Supported
##### Common Features
| Feature | Description |
|---------|-------------|
| Polling Mode | Software polling for I2C events (at instance level) |
| Interrupt Mode | Hardware interrupt-driven operation (at instance level) |
| 7-bit Addressing | Standard 7-bit I2C address scheme |
| 10-bit Addressing | Extended 10-bit I2C address scheme |
| Configurable Own Address | Device's own I2C address configuration (at instance level) |
##### Controller Mode (Master) Features
| Feature | Description |
|---------|-------------|
| Configurable Baudrate | I2C bus speed configuration (at instance level) |
| Configurable Target Address | Address of target device to communicate with (at channel level) |
| Restart Mode | Stop or no-stop between channel transfers (at channel level) |
| Read/Write Operations | Separate read and write channel configurations (at channel level) |
| Multiple Channels per Sequence | Chain multiple transfers in a single sequence |
| Sequence Management | Queue and execute multiple sequences |
##### Target Mode (Slave) Features
| Feature | Description |
|---------|-------------|
| Address Matching | Respond when own address is detected on bus |
| TX/RX Buffer Management | Dynamic buffer submission for data transfer |
| Start Notifications | Callbacks when controller initiates read/write |
| Completion Notifications | Callbacks when transfer completes or STOP detected |
| Error Notifications | Callbacks for overflow, underflow, NACK, no buffer |
#### Hardware Features Not Supported by the Driver
* DMA Mode
* FIFO Mode
* Multi Master Mode and Arbitration Loss scenarios are not tested
#### Software Supported Features
##### Common Features
* Configurable Development Error Detection
* Configurable Hardware Units
* Configurable Data Length to Transfer
* HW Unit Reset API for Bus Recovery
* Configurable Controller/Target Mode per HW Unit
##### Controller Mode Features
* Configurable Sequence Size
* Configurable Channel Size
* Configurable Channels
* Configurable Sequences
* Multiple Channels in a Sequence
* Transfer Complete and Error Notification Callbacks
##### Target Mode Features
* Start/Stop Control API
* Dynamic TX/RX Buffer Submission
* Start Notification Callbacks (TX and RX)
* Complete Notification Callbacks (TX and RX)
* Error Notification Callback
* Event Notifications for Transfer Complete, STOP, Buffer Overflow/Underflow, and NACK conditions
### Source Files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂**Cdd_I2c**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Cdd_I2c_Hw.h** : *Contains data structures and Internal function declarations for HW access.*\
┃ ┃ ┃ ┣ 📜**Cdd_I2c_Priv.h** : *Contains data structures and Internal function declarations.*\
┃ ┃ ┃ ┣ 📜**Cdd_I2c_Utils.h** : *Contains internal function declarations for queue implementation.*\
┃ ┃ ┃ ┗ 📜**Cdd_I2c.h** : *Contains the API declarations of the Cdd_I2c driver to be used by upper layers.*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Cdd_I2c_Hw.c** : *Contains internal function definitions for HW access.*\
┃ ┃ ┃ ┣ 📜**Cdd_I2c_Irq.c** : *Contains the ISR implementation for both controller and target modes.*\
┃ ┃ ┃ ┣ 📜**Cdd_I2c_Priv.c** : *Contains internal function definitions that support the API.*\
┃ ┃ ┃ ┣ 📜**Cdd_I2c_Target.c** : *Contains target mode API implementation.*\
┃ ┃ ┃ ┣ 📜**Cdd_I2c_Utils.c** : *Contains internal function definitions for queue implementation.*\
┃ ┃ ┃ ┗ 📜**Cdd_I2c.c** : *Contains controller mode API implementation.*\
┃ ┃ ┗ 📜CMakeLists.txt
Description of generated files is provided below:
|Plugin Files |Description|
|-------|------|
|Cdd_I2c_Cfg.h |This file contains general container configuration parameters like DET error ON, Polling mode OFF, Sequence size, Queue size, Channel size etc.|
|Cdd_I2c_Cfg.c |Contains all channels Pre-Build Configuration parameters|
The below diagram shows the files structure for the I2C driver.
```{figure} Assets/images/Cdd_I2c_Header_File_Structure.png
:alt: I2C File Structure
:align: center
I2C File Structure
```
### Module Requirements
#### Memory Mapping
The objects (e.g. variables, functions, constants) are declared by compiler independent definitions – the compiler abstraction definitions. Each compiler abstraction definition is assigned to a memory section. The following table contains the memory section names and the compiler abstraction definitions of the I2C and illustrates their assignment among each other.
|Memory Mapping Sections|I2C_CODE|I2C_VAR_NO_INIT|I2C_VAR_INIT|I2C_CONST|I2C_CFG|I2C_APPL_CODE|I2C_APPL_DATA|
|-----|-----|-----|-----|-----|------|-----|-----|
| CDD_I2C_START_SEC_CODE|x| | | | | | |
| CDD_I2C_STOP_SEC_CODE|x| | | | | | |
| CDD_I2C_START_SEC_ISR_CODE|x| | | | | | |
| CDD_I2C_STOP_SEC_ISR_CODE|x| | | | | | |
| CDD_I2C_START_SEC_CONFIG_DATA| | | | |x| | |
| CDD_I2C_STOP_SEC_CONFIG_DATA| | | | |x| | |
| CDD_I2C_START_SEC_CONFIG_CONST_32| | | | |x| | |
| CDD_I2C_STOP_SEC_CONFIG_CONST_32| | | | |x| | |
| CDD_I2C_START_SEC_VAR_NOINIT_UNSPECIFIED| |x| | | | | |
| CDD_I2C_STOP_SEC_VAR_NOINIT_UNSPECIFIED| |x| | | | | |
| CDD_I2C_START_SEC_VAR_INIT_UNSPECIFIED| | |x| | | | |
| CDD_I2C_STOP_SEC_VAR_INIT_UNSPECIFIED| | |x| | | | |
| Application buffers passed to I2C| | | | | | |x|
| Notification called from I2C| | | | | |x| |
#### Scheduling
|Schedule Function API|Description|Applicable Mode|
|------------|---------------|---------------|
|Cdd_I2c_MainFunction|This function processes the I2C transmission in polling mode|Controller Mode only|
```{note}
Cdd_I2c_MainFunction is applicable only for Controller Mode. Target Mode operates entirely in interrupt-driven mode and does not require a cyclic main function. All Target Mode operations are handled through interrupt callbacks.
```
#### Error Handling
##### Development Error Reporting
By default, development errors are reported to the DET using the service Det_ReportError(), if development error reporting is enabled (i.e. precompile parameter CDD_I2C_DEV_ERROR_DETECT==STD_ON). If another module is used for development error reporting, the function prototype for reporting the error can be configured by the integrator, but must have the same signature as the service Det_ReportError(). The reported I2C ID is 255
##### Development Error Codes
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|No errors |CDD_I2C_E_NO_ERROR|0x00|
|API service used without module initialization |CDD_I2C_E_UNINIT|0x01|
|Init service called twice without DeInit|CDD_I2C_E_ALREADY_INITIALIZED|0x02|
|Channel out of bounds, exceeds the maximum number of configured channels|CDD_I2C_E_PARAM_CHANNEL|0x04|
|Sequence out of bounds, exceeds the maximum number of configured sequences|CDD_I2C_E_PARAM_SEQUENCE|0x05|
|Length out of bounds – a zero length is not accepted. The total length is limited to 65535|CDD_I2C_E_PARAM_LENGTH|0x06|
|An invalid version info pointer has been passed (a NULL_PTR)|CDD_I2C_E_PARAM_VINFO_PTR|0x07|
|An invalid configuration has been passed (a non NULL_PTR)|CDD_I2C_E_PARAM_CONFIG|0x08|
|Two invalid transmission buffers have been passed (no NULL_PTR/ or both NULL_PTR)|CDD_I2C_E_PARAM_TRANS_BUFFER|0x09|
|Address out of bounds, exceeds the limit of the configured address range|CDD_I2C_E_PARAM_ADDRESS|0x0A|
|Buffer direction conflicts with channel direction set via EB|CDD_I2C_E_PARAM_DIRECTION|0x0B|
|API service called with invalid HW unit ID|CDD_I2C_E_PARAM_HWUNIT|0x16|
|API service called with sequence is busy|CDD_I2C_E_SEQ_BUSY|0x17|
|API service called with invalid mode - controller or target|CDD_I2C_E_PARAM_MODE|0x18|
##### Runtime Error Codes
###### Controller Mode Runtime Errors
The following error codes are reported to the application via the Cdd_I2c_SequenceErrorNotification callback in controller mode:
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|NACK was received from target device|CDD_I2C_E_NACK_RECEIVED|0x01|
|Master lost arbitration (SDA stuck low or another master won arbitration)|CDD_I2C_E_ARBITRATION_FAILURE|0x02|
|SCL line is stuck low|CDD_I2C_E_BUS_FAILURE|0x03|
|Sequence was cancelled by user|CDD_I2C_E_CANCELLED|0x04|
|HW unit was reset (bus-off recovery)|CDD_I2C_E_HW_UNIT_RESET|0x08|
###### Target Mode Runtime Errors
The following error codes are reported to the application via target mode notification callbacks (Cdd_I2c_TargetRxCompleteNotification, Cdd_I2c_TargetTxCompleteNotification, or Cdd_I2c_TargetErrorNotification):
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|Target received NACK from controller|CDD_I2C_E_NACK_RECEIVED|0x01|
|RX buffer overflow occurred|CDD_I2C_E_RX_OVERFLOW|0x05|
|TX buffer underflow occurred|CDD_I2C_E_TX_UNDERFLOW|0x06|
|No buffer was submitted|CDD_I2C_E_NO_BUFFER|0x07|
### Used Resources
#### Interrupt Handling
Interrupt routines are provided by the CDD I2C driver is Cdd_I2c_Isr_Handler(). Basically, the ISR’s are in the file Cdd_I2c_Irq.c. User might edit it for adapting for the suitable OS.
Interrupt handler shall be provided for each instance of the CDD I2C driver.
The corresponding CDD I2C Interrupt numbers are:
| Hardware Unit| Interrupt Name | Interrupt handler|
|-----|-----|-----|
|I2CA| I2CA_INT | Cdd_I2c_I2CA_ISR|
|I2CB| I2CB_INT | Cdd_I2c_I2CB_ISR|
```{NOTE}
Same Interrupt Category needs to be configured in both I2C and OS Modules.
```
#### Instance Support
|CPU instances|supported|
|-------|-------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
### Integration Description
#### Dependent Modules
##### DET
The module I2C depends on the DET (by default) in order to report development errors. Detection and reporting of development errors can be enabled or disabled by the switch "Enable Development Error Detection" on the "General" container within the module I2C. The DET can be replaced optionally by an equivalent component which is responsible to recognize development errors, if no DET component is available.
##### MCU
The module MCU powers up the microcontroller’s peripherals at startup time and initializes clock source. Since the peripherals are also containing the registers for I/O functionality they have to be activated if it is intended to use them.
##### PORT
The module PORT enables the I2C lines at startup time. To operate the I2C properly, the PORT driver has to be configured. The PORT driver sets the Pins to the required values for the I2C to operate. The Pins used are SDA (serial data line) and SCL (serial clock). An open drain configuration is recommended. Some I2C drivers require the PORT for switching from I2C functionality to DIO functionality – to use the "clock free" procedure - and back.
##### SchM
If multiple AUTOSAR runnables have access to the same Data Store Memory block, the exported AUTOSAR specification enforces data consistency by using an AUTOSAR exclusive area. With this specification, the runnables have mutually exclusive access to the per-instance memory global data, which prevents data corruption. Beside the OS, the BSW Scheduler provides functions that CDD I2C module calls at begin and end of critical sections. This implementation requires 1 level of exclusive access to guard critical sections.
The data consistency mechanism that has to be applied to an ExclusiveArea might be domain, ECU or even project specific. The decision which mechanism has to be applied by RTE / Basic Software Scheduler is taken during ECU integration by setting the Exclusive Area configuration parameter RteExclusiveAreaImplMechanism. This parameter is an input for RTE generator.
For CDD_I2C Module, data consistency and exclusive access to critical sections are required for the following sections as shown in the table below:
| Exclusive Area Functions used | CDD_I2C Function calling Exclusive Area | Need for Exclusive Area | Recommended Exclusive Area Mapping |
|-------|-------|-------|-------|
|CDD_I2C_EXCLUSIVE_AREA_0 | Cdd_I2c_SetupEB()
Cdd_I2c_SetupEBDynamic()
Cdd_I2c_AsyncTransmit()
Cdd_I2c_Cancel()
Cdd_I2c_MainFunction() | To protect against multiple access for shared resources | **OS_RESOURCE** : If the I2C APIs are only called from pre-emptible task context, its recommended to use this mechanism as it takes care of resource access protection and task priority management.
**None**: If I2C APIs are only called from non pre-emptible task context or during init, its recommended to use this mechanism as multiple access protection to shared resource is not needed. |
#### Multi-core and Resource Allocator
The I2C module uses the Resource Allocator to allocate I2C peripheral instances to CPU cores and configure their memory-mapped base addresses. Each allocation is placed inside a **Context** that maps to a CPU core (e.g. `CPU1`). The **CurrentContext** parameter in the Resource Allocator selects which Context is active for MCAL execution. See the [Resource Allocator Module User Guide](Module_User_Guide_ResourceAllocator.md) for details on configuring device-specific settings.
##### Resource Allocator Usage Example
To allocate I2CA to CPU1 using FRAME0:
1. In the Resource Allocator configuration, create a new I2c instance allocation under the CPU1 Context
2. Set **InstanceName** to `I2CA`
3. Set **Frame** to `FRAME0`
4. Set **BaseAddr** to `I2CA_BASE_FRAME(0U)`
```text
Resource Allocator Configuration:
├── Context (Core: CPU1)
│ └── I2cInstanceAllocation
│ ├── InstanceName: I2CA
│ ├── Frame: FRAME0
│ └── BaseAddr: I2CA_BASE_FRAME(0U)
```
### Configuration
#### Configuration Parameters
##### CddI2cGeneral
General configuration settings for Complex device driver
###### CddI2cDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | CddI2cDevErrorDetect |
| **Description** | I2c Dev Error ON/OFF. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddI2cVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | CddI2cVersionInfoApi |
| **Description** | Pre-processor switch to enable/disable the get version info API. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddI2cCancelApi
| Item ||
|--------|---------------|
| **Name** | CddI2cCancelApi |
| **Description** | Pre-processor switch to enable/disable the cancel API. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddI2cStatusApi
| Item ||
|--------|---------------|
| **Name** | CddI2cStatusApi |
| **Description** | Pre-processor switch to enable/disable the get status API. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddI2cMainFunctionPeriod
| Item ||
|--------|---------------|
| **Name** | CddI2cMainFunctionPeriod |
| **Description** | This parameter describes the period for cyclic call to Cdd_I2c_MainFunction. Unit is seconds. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.01 |
| **Max-value** | INF |
| **Min-value** | 0.0 |
##### CddI2cHwConfig
This container contains the HW unit initialization parameters
###### CddI2cHwUnitMode
| Item ||
|--------|---------------|
| **Name** | CddI2cHwUnitMode |
| **Description** | Selects the operation mode of the I2C HW unit (Controller or Target). |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_I2C_MODE_CONTROLLER |
| **Range** | CDD_I2C_MODE_CONTROLLER
CDD_I2C_MODE_TARGET |
###### CddI2cHwUseInterrupts
| Item ||
|--------|---------------|
| **Name** | CddI2cHwUseInterrupts |
| **Description** | Switches to activate or deactivate interrupt controlled job processing for this HW unit. Always enabled in Target mode. |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddI2cHwBaudrate
| Item ||
|--------|---------------|
| **Name** | CddI2cHwBaudrate |
| **Description** | Channel Bit Rate (Range = 10kbps - 400kbps). Value needs to be provided in bits per second. |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 400000 |
| **Max-value** | 400000 |
| **Min-value** | 10000 |
###### CddI2cHwUnitFrequency
| Item ||
|--------|---------------|
| **Name** | CddI2cHwUnitFrequency |
| **Description** | Frequency which the HW unit will utilize(Range = 7 MHz - 12 MHz), please note that this differs from the bus frequency used for communication |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 10000000 |
| **Max-value** | 12000000 |
| **Min-value** | 7000000 |
###### CddI2cHwAddressScheme
| Item ||
|--------|---------------|
| **Name** | CddI2cHwAddressScheme |
| **Description** | Specifies whether the HW unit uses 7-bit or 10-bit addressing. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_I2C_ADDRESS_7_BIT |
| **Range** | CDD_I2C_ADDRESS_7_BIT
CDD_I2C_ADDRESS_10_BIT |
###### CddI2cHwOwnAddress
| Item ||
|--------|---------------|
| **Name** | CddI2cHwOwnAddress |
| **Description** | Own address - used in both 7 and 10-bit address mode. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 127 |
| **Max-value** | 1023 |
| **Min-value** | 0 |
###### CddI2cHwIrqType
| Item ||
|--------|---------------|
| **Name** | CddI2cHwIrqType |
| **Description** | This parameters defines the category of the interrupt. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ISR_CAT1_RTINT |
| **Range** | ISR_CAT1_INT
ISR_CAT1_RTINT
ISR_CAT2_INT |
###### CddI2cHwUnitRef
| Item ||
|--------|---------------|
| **Name** | CddI2cHwUnitRef |
| **Description** | Reference to I2c HW unit to use. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddI2cHwFunctionalClock
| Item ||
|--------|---------------|
| **Name** | CddI2cHwFunctionalClock |
| **Description** | Reference to a container of the type McuClockReferencePoint, to select an input clock. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddI2cTargetCallbacks
Container for target mode callback notifications. Only visible when HW unit is configured in Target mode.
###### CddI2cTargetTxStartNotification
| Item ||
|--------|---------------|
| **Name** | CddI2cTargetTxStartNotification |
| **Description** | Function pointer to callback function called when target TX start condition is detected. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddI2cTargetRxStartNotification
| Item ||
|--------|---------------|
| **Name** | CddI2cTargetRxStartNotification |
| **Description** | Function pointer to callback function called when target RX start condition is detected. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddI2cTargetTxCompleteNotification
| Item ||
|--------|---------------|
| **Name** | CddI2cTargetTxCompleteNotification |
| **Description** | Function pointer to callback function called when target TX is complete (stop condition or buffer fully transferred). |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddI2cTargetRxCompleteNotification
| Item ||
|--------|---------------|
| **Name** | CddI2cTargetRxCompleteNotification |
| **Description** | Function pointer to callback function called when target RX is complete (stop condition or buffer full). |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddI2cTargetErrorNotification
| Item ||
|--------|---------------|
| **Name** | CddI2cTargetErrorNotification |
| **Description** | Function pointer to callback function called when a target bus error occurs. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
##### CddI2cChConfig
This container contains the Channel configurations
###### CddI2cChDirection
| Item ||
|--------|---------------|
| **Name** | CddI2cChDirection |
| **Description** | Selection of Channel direction. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | WRITE |
| **Range** | WRITE
READ |
###### CddI2cChTargetAddress
| Item ||
|--------|---------------|
| **Name** | CddI2cChTargetAddress |
| **Description** | Set target address for channel |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1023 |
| **Min-value** | 0 |
###### CddI2cChTargetAddressScheme
| Item ||
|--------|---------------|
| **Name** | CddI2cChTargetAddressScheme |
| **Description** | Specifies whether channel is 7 bit or 10 bit. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ADDRESS_7_BIT |
| **Range** | ADDRESS_7_BIT
ADDRESS_10_BIT |
##### CddI2cSeqConfig
This container contains the Sequence configurations
###### CddI2cSeqCompleteNotify
| Item ||
|--------|---------------|
| **Name** | CddI2cSeqCompleteNotify |
| **Description** | Function pointer to callback function sequence complete notify |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddI2cSeqErrorNotify
| Item ||
|--------|---------------|
| **Name** | CddI2cSeqErrorNotify |
| **Description** | Function pointer to callback function sequence complete notify |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddI2cSeqRestartModeType
| Item ||
|--------|---------------|
| **Name** | CddI2cSeqRestartModeType |
| **Description** | I2c transfer mode. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | RESTART_MODE_STOP |
| **Range** | RESTART_MODE_STOP
RESTART_MODE_NOSTOP |
###### CddI2cSeqHwUnitAssignment
| Item ||
|--------|---------------|
| **Name** | CddI2cSeqHwUnitAssignment |
| **Description** | I2c HW unit reference to use. Only HW units configured in Controller mode are allowed. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddI2cSeqChList
References to I2c channels and their order within the Sequence.
###### CddI2cSeqChAssignment
| Item ||
|--------|---------------|
| **Name** | CddI2cSeqChAssignment |
| **Description** | A Sequence reference to a I2c channel. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
### Examples
The example applications demonstrates use of I2C module, the list below identifies key steps performed in the example.
#### Cdd_I2c_Interrupt and Cdd_I2c_Poll
##### Overview
* I2c Example (Interrupt and Polled Mode)
* Initialize clock using Mcu_Init()
* Initializes pins as I2C SDA and SCL using Port_Init()
* Get I2C version using Cdd_I2c_GetVersionInfo()
* Initialize I2c module using Cdd_I2c_Init()
* Set up channels using Cdd_I2c_SetupEBDynamic()
* Write data to target device
* Receive and process data
* De-initialize I2c module using Cdd_I2c_DeInit()
##### Setup Required to Run Example
* Connect the hardware and power up
* Connect the uart and set up the baudrate to check the log on serial console
* Note: I2C examples are supported only in F29x LP board
##### How to Run Examples
* Open CCS and import Cdd_I2c_Interrupt or Cdd_I2c_Poll Example
* Build project and start debug project
##### Sample Log
##### Sample Log of Cdd_I2c_Interrupt
```{literalinclude} Assets/text/Cdd_I2c/F29H85x/Cdd_I2c_Interrupt.txt
```
##### Sample Log of Cdd_I2c_Poll
```{literalinclude} Assets/text/Cdd_I2c/F29H85x/Cdd_I2c_Poll.txt
```
#### Cdd_I2c_Target_Loopback
##### Overview
This example demonstrates the I2C Target Mode (Slave) functionality with an external loopback configuration. The example uses two I2C instances on the same device:
- **I2CA** configured as **Target** (slave) at address 0x48
- **I2CB** configured as **Controller** (master)
- I2CA and I2CB are externally connected via wires
**Test Flow:**
1. Controller (I2CB) writes data to Target (I2CA), target receives and verifies
2. Controller (I2CB) reads data from Target (I2CA), controller verifies read data
##### Setup Required to Run Example
* Install Code Composer Studio (CCS) latest version
* Install compiler as recommended
* Connect the hardware and power up
* Connect the UART and set up the baudrate to check the log on serial console
* **IMPORTANT:** External wiring connections required on F29H85x LaunchPad:
* Connect **I2CA_SCL (J1 Pin 9)** to **I2CB_SCL (J5 Pin 49)** using a jumper wire
* Connect **I2CA_SDA (J1 Pin 10)** to **I2CB_SDA (J5 Pin 50)** using a jumper wire
```{note}
This example requires external wiring between I2CA and I2CB on the LaunchPad board. Without these connections, the example will not function properly.
```
##### How to Run Example
* Open CCS and import Cdd_I2c_Target_Loopback Example from the examples directory
* Ensure external wiring connections are in place as described above
* Build project and start debug
* Run the application
* Observe the UART console output for test results
##### Sample Log
```{code-block}
Cdd_I2c_Target_Loopback: Example Application - STARTS ...
Cdd I2c MCAL Version Info
-------------------------
Vendor ID : 44
Module ID : 255
SW Major Version : 1
SW Minor Version : 2
SW Patch Version : 0
Controller WR -> Target RX:
[0] WR: 0x00 RX: 0x00
[1] WR: 0x01 RX: 0x01
[2] WR: 0x02 RX: 0x02
[3] WR: 0x03 RX: 0x03
[4] WR: 0x04 RX: 0x04
[5] WR: 0x05 RX: 0x05
[6] WR: 0x06 RX: 0x06
[7] WR: 0x07 RX: 0x07
Target TX -> Controller RD:
[0] TX: 0x10 RD: 0x10
[1] TX: 0x11 RD: 0x11
[2] TX: 0x12 RD: 0x12
[3] TX: 0x13 RD: 0x13
[4] TX: 0x14 RD: 0x14
[5] TX: 0x15 RD: 0x15
[6] TX: 0x16 RD: 0x16
[7] TX: 0x17 RD: 0x17
Cdd_I2c_Target_Loopback: Example Application - ENDS (Passed)!!!
Cdd_I2c_Target_Loopback: All tests have passed
```
##### Expected Results
When the example runs successfully:
1. Version information is displayed showing I2C MCAL driver version
2. Controller write test: 8 bytes written by controller match the 8 bytes received by target
3. Controller read test: 8 bytes read by controller match the 8 bytes transmitted by target
4. Final message shows "ENDS (Passed)!!!" and "All tests have passed"
If the example fails, check:
- External wiring connections are correct
- Both I2CA and I2CB pins are properly configured in Port driver
- Target address 0x48 matches in both controller channel configuration and target HW unit configuration
## CDD IPC Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|CDD|Complex Device Driver|
|IPC|Inter Processor Communication|
|MCAL|Micro Controller Abstraction Layer|
|API|Application Programming Interface|
|DET|Default Error Tracer|
|HW |Hardware|
|SW |Software|
### Introduction
The Cdd Ipc driver is a Complex Device Driver that provides services that allows core hosting MCAL/AUTOSAR to communicate with other cores hosting SDK based IPC driver. This driver could be used to transmit and receive variable length messages up to 12 bytes between cores, via logical communication channels.
```{figure} Assets/images/CDD_IPC_AUTOSAR_MCAL.png
:width: 75%
:alt: CDD IPC MCAL AUTOSAR
:align: center
Cdd Ipc MCAL AUTOSAR
```
This document details AUTOSAR Cdd Ipc module implementation
|Supported AUTOSAR Release|**4.3.1**|
|-------------------------|---------|
| **Supported Configuration Variants** | **Pre-Compile**|
| **Vendor ID** | **CDD_IPC_VENDOR_ID (44)**|
| **Module ID** | **CDD_IPC_MODULE_ID (255)**|
### Functional Overview
This device has multiple CPUs on which distinct applications can run. These applications need to communicate with each other to realize the larger system level application. This means of communication is called Inter Processor Communication (IPC). Cdd Ipc modules allows core hosting MCAL/AUTOSAR to communicate with other cores hosting SDK based IPC driver.
```{figure} Assets/images/Cdd_Ipc_Module_Architecture.png
:width: 50%
:alt: Cdd Ipc module architecture
:align: center
Cdd Ipc module architecture
```
As depicted in architecture figure above, Cdd Ipc module has multiple IPC instances in each direction(Tx and Rx) between any two CPU cores. Each IPC instance includes 3 command registers in both Tx and Rx directions, with each register having 4-byte width.These command registers are used to transmit data between CPU cores. This architecture allows for the transmission of up to 12 bytes of data between any two CPU core pairs using a single IPC instance.
Each IPC instance can support up to 255 logical communication channels between two CPU cores, with each channel identified by a unique 8-bit Channel ID ranging from 1 to 255.
Key characteristics:
* Only one channel can be active for IPC communication within an instance at a time.
* Tx (Transmission) and Rx (Reception) operate independently of each other.
* Cdd Ipc provides a configurable option to select the number of IPC instances to be utilized for realizing channels in the Cdd Ipc driver.
* Cdd Ipc provides a configurable option to Cdd Ipc to integrate the Cdd Ipc driver with the AUTOSAR communication stack.
Tx channels can be configured in two modes:
* Interrupt Mode: Transmission of a message generates an interrupt on the remote core, notifying it of the incoming message.
* Polling Mode: The remote core must poll the configured Rx instances to receive messages, as no interrupt is generated upon message arrival.
The length of data, channel ID, Tx channel mode are transmitted between CPU cores using IPCFLG register.
| Bit | Purpose |
|----------------|---------|
|Bit 0 | 0 - Interrupt mode is not active
1 - Interrupt mode is active |
|Bit 1 | 0 - Polling mode is not active
1- Polling mode is active|
|Bit 2 | 0 - Not in synchronization process
1- Synchronization in progress |
|Bit 3 - Bit 15 | Reserved for future use |
|Bit 16 - Bit 23 | Channel ID |
|Bit 24 - Bit 27 | No. of bytes transmitted |
|Bit 28 - Bit 31 | Reserved for future use |
#### Cdd Ipc Integration with AUTOSAR Communication stack
Ipc is a communication protocol implemented in the Cdd Ipc driver. Similar to other communication protocols such as Can/Lin/Flexray, Ipc can also be integrated with AUTOSAR communication stack.
Cdd Ipc is a driver. This driver can directly act as a lower layer module for PduR without needing an interface layer in between.
Integration of Cdd Ipc driver with AUTOSAR com stack is optional and can be enabled by configuration parameter 'CddIpcIntegrationWithAsrComStackEnable'. When it is enabled, Cdd Ipc driver is responsible to call the receive indication to PduR and PduR is responsible to call transmit function to Cdd Ipc.
In order to achieve this, correct handle Ids should be configured in both Cdd Ipc and PduR. Please refer to the explanation of "Cdd_Ipc_Transmit" in Cdd Ipc driver.
#### Cdd Ipc Integration with SDK IPC HAL Driver
The Cdd_Ipc module allows the core hosting MCAL/AUTOSAR to communicate with other cores hosting SDK-based applications. To enable this communication, the F29H85X-SDK implements an IPC HAL driver that can work on the other cores.
The IPC HAL driver provides a hardware abstraction layer for the IPC hardware, enabling SDK-based applications to communicate with the AUTOSAR core through a standardized interface. This integration allows for seamless communication between different software environments running on different cores of the same SoC.
**Key features of the IPC HAL integration:**
* Synchronized communication: Both drivers implement synchronization mechanisms to ensure proper initialization and communication between cores.
* Configurable channels: The IPC HAL driver supports the same channel-based communication model as the Cdd_Ipc module.
* Support for both polling and interrupt-based communication: Similar to Cdd_Ipc, the IPC HAL driver supports both polling and interrupt-based reception of messages.
```{figure} Assets/images/Cdd_Ipc_Hal.png
:width: 75%
:alt: CDD IPC HAL Dataflow
:align: center
CDD IPC HAL Dataflow
```
### Hardware Features
#### Hardware Features supported
Features Supported at a high level are:
* Synchronization: The IPC module allows synchronization between two cores participating in IPC communication.
* Transmission of PDU: The IPC module allows transmission of Protocol Data Units (PDUs) by writing them to a dedicated buffers in the IPC hardware.
* Reception of PDU: Upon receiving a Protocol Data Unit (PDU) on a configured Rx instance, the IPC module can invoke the upper layer callback function and PduR Rx indication, passing a pointer to the received PDU as a parameter. This notification informs the upper layer about the successful reception of the PDU.
#### Not supported Features
* Cdd Ipc driver doesn't support the transmission of a response to a received message, despite hardware capabilities. To send a response, the application must initiate a separate PDU transmission.
* Cdd Ipc doesn't support cancellation of ongoing transmissions.
#### Non compliance
None
### Source files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂Can\
┃ ┣ 📂Cdd_Adc\
┃ ┣ 📂Cdd_Ecap\
┃ ┣ 📂Cdd_Pwm\
┃ ┗ 📂**Cdd_Ipc**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Cdd_Ipc.h** : *Contains the API declarations of the Cdd Ipc driver to be used by upper layers.*\
┃ ┃ ┃ ┗ 📜**Cdd_Ipc_Priv.h** : *Contains data structures and Internal function declarations.*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Cdd_Ipc.c** : *Contains the implementation of the API for Cdd Ipc driver.*\
┃ ┃ ┃ ┣ 📜**Cdd_Ipc_Irq.c** : *Contains the implementation for Cdd Ipc interrupts handlers.*\
┃ ┃ ┃ ┗ 📜**Cdd_Ipc_Priv.c** : *Contains Functions that support the API for Cdd Ipc driver*\
┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Cdd_Uart\
┃ ┣ 📂Cdd_Xbar\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂hw_include\
┃ ┣ 📂Lin\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┣ 📂Spi\
┃ ┗ 📂Wdg\
┣ 📂examples\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{figure} Assets/images/Cdd_Ipc_Header_File_Structure.png
:alt: Cdd Ipc Header File Structure
:align: center
Cdd Ipc Header File Structure
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Scheduling
|Schedule Function API|Description|
|------------|---------------|
|Cdd_Ipc_MainFunction_Read|This function performs the polling of configured IPC Rx instances for incoming messages.|
#### Error handling
##### Development Error Reporting
Development errors are reported to the DET using the service Det_ReportError(), when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
#### Error codes
|Type of Error | Related Error code | Value (Hex)|
|--------------|--------------------|------------|
|API called with uninitialized driver.|CDD_IPC_E_UNINIT|0x01|
|API called for reinitialization of already initialized driver.|CDD_IPC_E_ALREADY_INITIALIZED|0x02|
|API called with invalid parameter.|CDD_IPC_E_PARAM_VALUE|0x03|
|API called with invalid parameter pointer.|CDD_IPC_E_PARAM_POINTER|0x04|
|API called with invalid data length.|CDD_IPC_E_INVALID_LENGTH|0x05|
### Used resources
#### Interrupt Handling
The Driver doesn’t register any interrupts handler (ISR), it’s expected that consumer of this driver registers the required interrupt handler.
For every IPC Rx Instance, an ISR requires to be registered. The Interrupt number associated with instance of the IPC is detailed in TRM (also, please refer the Example application).
Interrupt category should be selected in the Cdd_Ipc plugin.
|Cdd Ipc Instance| Interrupt Name | Interrupt handler|
|----------------|----------------|-----------------|
| CDD_IPC_CPU1_L_CPU2_R_INST0 | IPC_INT1_1 | Cdd_Ipc_CPU1_L_CPU2_R_INST0_ISR |
| CDD_IPC_CPU1_L_CPU2_R_INST1 | IPC_INT1_2 | Cdd_Ipc_CPU1_L_CPU2_R_INST1_ISR |
| CDD_IPC_CPU1_L_CPU2_R_INST2 | IPC_INT1_3 | Cdd_Ipc_CPU1_L_CPU2_R_INST2_ISR |
| CDD_IPC_CPU1_L_CPU2_R_INST3 | IPC_INT1_4 | Cdd_Ipc_CPU1_L_CPU2_R_INST3_ISR |
| CDD_IPC_CPU1_L_CPU3_R_INST0 | IPC_INT2_1 | Cdd_Ipc_CPU1_L_CPU3_R_INST0_ISR |
| CDD_IPC_CPU1_L_CPU3_R_INST1 | IPC_INT2_2 | Cdd_Ipc_CPU1_L_CPU3_R_INST1_ISR |
| CDD_IPC_CPU1_L_CPU3_R_INST2 | IPC_INT2_3 | Cdd_Ipc_CPU1_L_CPU3_R_INST2_ISR |
| CDD_IPC_CPU1_L_CPU3_R_INST3 | IPC_INT2_4 | Cdd_Ipc_CPU1_L_CPU3_R_INST3_ISR |
```{Note}
Same Interrupt Category needs to be configured in both Cdd_Ipc and OS Modules.
```
#### Instance support
|CPU instances| supported |
|-------|-------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
#### Hardware-Software Mapping
Below image shows Cdd Ipc driver Hardware-Software mapping. For more information related to HW/SW mapping, refer the F29x Reference Manual.
```{figure} Assets/images/Cdd_Ipc_Hw_Sw_Mapping.png
:width: 75%
:alt: Cdd Ipc HW/SW Mapping
:align: center
Cdd Ipc HW/SW Mapping
```
### Integration description
#### Dependent modules
##### PduR
The PDU Router module provides services for routing of routing Protocol Data Units(I-PDUs) between various communication modules, ensuring seamless data transfer across different communication protocols. When the Cdd_Ipc module receives a message, it encapsulates the data into PDUs and sends them to the PduR with PDU id's. The PduR then routes these PDUs to the appropriate higher-layer modules. User need to configure configure PDUs in ECUC. Cdd_Ipc will generate symbolic names for those PDUs in Cdd_Ipc module.
```{Note}
* Symbolic names are used to call PduR receive indication.
* Symbolic name template follows : "PduRConf_PduRSrcPdu_PduRSrcPdu_{PduName}"
* PduName is the symbolic name configured in EcuC->Pdu Container.
* PduRSrcPdu_PduName must be the name of source PDU configuration container in PduR routing table.[As a result PduR will generate symbolic name “PduRConf_PduRSrcPdu_PduRSrcPdu_PduName”]
```
##### DET
This implementation depends on the DET in order to report development errors. The detection of development errors is configurable (ON / OFF), The switch CDD_IPC_DEV_ERROR_DETECT will activate or deactivate the detection of all development errors.
##### MCU
MCU Module is required to initialize all the clock to be used by different peripherals
##### OS
The Cdd_Ipc driver uses interrupts and therefore there is a dependency on the OS, which configures the interrupt sources.
##### SchM
If multiple AUTOSAR runnables have access to the same Data Store Memory block, the exported AUTOSAR specification enforces data consistency by using an AUTOSAR exclusive area. With this specification, the runnables have mutually exclusive access to the per-instance memory global data, which prevents data corruption. Beside the OS, the BSW Scheduler provides functions that Cdd_Ipc module calls at begin and end of critical sections. This implementation requires 1 level of exclusive access to guard critical sections.
The data consistency mechanism that has to be applied to an ExclusiveArea might be domain, ECU or even project specific. The decision which mechanism has to be applied by RTE / Basic Software Scheduler is taken during ECU integration by setting the Exclusive Area configuration parameter RteExclusiveAreaImplMechanism. This parameter is an input for RTE generator.
For Cdd_Ipc Module, data consistency and exclusive access to critical sections are required for the following sections as shown in the table below:
| Exclusive Area Functions used | Cdd_Ipc Function calling Exclusive Area | Need for Exclusive Area | Recommended Exclusive Area Mapping |
|-------|-------|-------|-------|
|CDD_IPC_EXCLUSIVE_AREA_0 | Cdd_Ipc_Transmit | To protect against multiple access for shared registers, *i.e. Ipc Command Registers*, which can lead to race condition | **OS_RESOURCE** : If the Cdd_Ipc_Transmit is only called from pre-emptible task context, its recommended to use this mechanism as it takes care of resource access protection and task priority management.
**None**: If Cdd_Ipc_Transmit is only called from non pre-emptible task context or during init, its recommended to use this mechanism as multiple access protection to shared resource is not needed. |
|CDD_IPC_EXCLUSIVE_AREA_1 |Cdd_Ipc_MainFunction_Read | To protect again multiple call of upper layer Rx indication API in the Cdd_Ipc_MainFunction_Read API|**OS_RESOURCE** : If the Cdd_Ipc_MainFunction_Read API is only called from pre-emptible task context, its recommended to use this mechanism as it takes care of task priority management.
**None**: If Cdd_Ipc_MainFunction_Read API is only called from non pre-emptible task context, its recommended to use this mechanism as multiple access protection to shared resource is not needed. |
#### Multi-core and Resource allocator
The IPC module is not managed by the Resource Allocator. The IPC (Inter-Processor Communication) module uses hardware mailbox and flag registers that are shared between CPU cores by design and do not require per-core resource allocation through the Resource Allocator. No Resource Allocator instance allocation is needed for the IPC module.
### Configuration
The Cdd Ipc Driver implementation supports single configuration variants, namely Pre-Compile config. The driver expects generated **Cdd_Ipc_Cfg.h** to be present as input file.
The associated Cdd Ipc driver configuration generated source file is **Cdd_Ipc_Cfg.c**.
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files.
```{Note}
Refer section [Getting Started with EB Tresos](./MCAL_Configuration_and_EB_Tresos.md#getting-started-with-eb-tresos) of Chapter **MCAL Configuration and EB Tresos** for more information on how to load plugin and generate the configuration files.
```
#### Configuration Parameters
##### CddIpcConfig
This container contains the configuration parameters and sub containers of the Cdd_Ipc module.
###### CddIpcRemoteCoreConfig
This container contains the configuration parameters of the remote cores.
###### CddIpcRemoteCore
| Item ||
|--------|---------------|
| **Name** | CddIpcRemoteCore |
| **Description** | Selects the Cdd Ipc remote cores. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_IPC_CPU1 |
| **Range** | CDD_IPC_CPU1
CDD_IPC_CPU2
CDD_IPC_CPU3 |
###### CddIpcTxInstanceConfig
This container contains the configuration parameters of the CddIpc Instances.
###### CddIpcTxInstance
| Item ||
|--------|---------------|
| **Name** | CddIpcTxInstance |
| **Description** | Selects CddIpc Instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_IPC_CPU1_L_CPU2_R_INST0 |
| **Range** | CDD_IPC_CPU1_L_CPU2_R_INST0
CDD_IPC_CPU1_L_CPU2_R_INST1
CDD_IPC_CPU1_L_CPU2_R_INST2
CDD_IPC_CPU1_L_CPU2_R_INST3
CDD_IPC_CPU1_L_CPU3_R_INST0
CDD_IPC_CPU1_L_CPU3_R_INST1
CDD_IPC_CPU1_L_CPU3_R_INST2
CDD_IPC_CPU1_L_CPU3_R_INST3
CDD_IPC_CPU2_L_CPU1_R_INST0
CDD_IPC_CPU2_L_CPU1_R_INST1
CDD_IPC_CPU2_L_CPU1_R_INST2
CDD_IPC_CPU2_L_CPU1_R_INST3
CDD_IPC_CPU2_L_CPU3_R_INST0
CDD_IPC_CPU2_L_CPU3_R_INST1
CDD_IPC_CPU2_L_CPU3_R_INST2
CDD_IPC_CPU2_L_CPU3_R_INST3
CDD_IPC_CPU3_L_CPU1_R_INST0
CDD_IPC_CPU3_L_CPU1_R_INST1
CDD_IPC_CPU3_L_CPU1_R_INST2
CDD_IPC_CPU3_L_CPU1_R_INST3
CDD_IPC_CPU3_L_CPU2_R_INST0
CDD_IPC_CPU3_L_CPU2_R_INST1
CDD_IPC_CPU3_L_CPU2_R_INST2
CDD_IPC_CPU3_L_CPU2_R_INST3 |
###### CddIpcTxChannelConfig
This container contains the configuration parameters of the CddIpc channels.
###### CddIpcTxChannelId
| Item ||
|--------|---------------|
| **Name** | CddIpcTxChannelId |
| **Description** | Channel ID specific to the selected instance, channels configured in the selected instance should have unique values. An instance can have 255 channels ranging from 1-255. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 255 |
| **Min-value** | 1 |
###### CddIpcTxProcessing
| Item ||
|--------|---------------|
| **Name** | CddIpcTxProcessing |
| **Description** | Selects the Tx processing type. If CddIpcTxProcessing is selected as CDD_IPC_INTERRUPT, the transmit request triggers an interrupt on the other core. If CddIpcTxProcessing is selected as CDD_IPC_POLLING, the transmit request doesn't trigger any interrupts on the other core. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_IPC_INTERRUPT |
| **Range** | CDD_IPC_INTERRUPT
CDD_IPC_POLLING |
###### CddIpcTxGlobalChannelId
| Item ||
|--------|---------------|
| **Name** | CddIpcTxGlobalChannelId |
| **Description** | This parameter will be used when CddIpcIntegrationWithAsrComStackEnable is disabled. This channel identifier will be used in transmit function to address the respective channel. |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 9223372036854775807 |
| **Min-value** | -9223372036854775808 |
###### CddIpcTxPduID
| Item ||
|--------|---------------|
| **Name** | CddIpcTxPduID |
| **Description** | Reference to PduId. This parameter will be used when CddIpcIntegrationWithAsrComStackEnable is enabled. This Pdu identifier will be used in transmit function to address the respective channel. |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddIpcRxInstanceConfig
This container contains the configuration parameters of the CddIpc Instances.
###### CddIpcRxInstance
| Item ||
|--------|---------------|
| **Name** | CddIpcRxInstance |
| **Description** | Selects CddIpc Instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_IPC_CPU1_L_CPU2_R_INST0 |
| **Range** | CDD_IPC_CPU1_L_CPU2_R_INST0
CDD_IPC_CPU1_L_CPU2_R_INST1
CDD_IPC_CPU1_L_CPU2_R_INST2
CDD_IPC_CPU1_L_CPU2_R_INST3
CDD_IPC_CPU1_L_CPU3_R_INST0
CDD_IPC_CPU1_L_CPU3_R_INST1
CDD_IPC_CPU1_L_CPU3_R_INST2
CDD_IPC_CPU1_L_CPU3_R_INST3
CDD_IPC_CPU2_L_CPU1_R_INST0
CDD_IPC_CPU2_L_CPU1_R_INST1
CDD_IPC_CPU2_L_CPU1_R_INST2
CDD_IPC_CPU2_L_CPU1_R_INST3
CDD_IPC_CPU2_L_CPU3_R_INST0
CDD_IPC_CPU2_L_CPU3_R_INST1
CDD_IPC_CPU2_L_CPU3_R_INST2
CDD_IPC_CPU2_L_CPU3_R_INST3
CDD_IPC_CPU3_L_CPU1_R_INST0
CDD_IPC_CPU3_L_CPU1_R_INST1
CDD_IPC_CPU3_L_CPU1_R_INST2
CDD_IPC_CPU3_L_CPU1_R_INST3
CDD_IPC_CPU3_L_CPU2_R_INST0
CDD_IPC_CPU3_L_CPU2_R_INST1
CDD_IPC_CPU3_L_CPU2_R_INST2
CDD_IPC_CPU3_L_CPU2_R_INST3 |
###### CddIpcInteruptType
| Item ||
|--------|---------------|
| **Name** | CddIpcInteruptType |
| **Description** | Defines the interrupt type for the specific instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ISR_CAT2_INT |
| **Range** | ISR_CAT1_RTINT
ISR_CAT1_INT
ISR_CAT2_INT |
###### CddIpcRxChannelConfig
This container contains the configuration parameters of the CddIpc channels.
###### CddIpcRxChannelId
| Item ||
|--------|---------------|
| **Name** | CddIpcRxChannelId |
| **Description** | Channel ID specific to the selected instance, channels configured in the selected instance should have unique values. An instance can have 255 channels ranging from 1-255. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 255 |
| **Min-value** | 1 |
###### CddIpcUserCallbackFunction
| Item ||
|--------|---------------|
| **Name** | CddIpcUserCallbackFunction |
| **Description** | Call back function for the data during reception |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddIpcRxGlobalChannelId
| Item ||
|--------|---------------|
| **Name** | CddIpcRxGlobalChannelId |
| **Description** | This parameter will be used when CddIpcIntegrationWithAsrComStackEnable is disabled. This channel object identifier will be used in configured receive callback function to address the received message from respective channel. |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 9223372036854775807 |
| **Min-value** | -9223372036854775808 |
###### CddIpcRxPduID
| Item ||
|--------|---------------|
| **Name** | CddIpcRxPduID |
| **Description** | Reference to Pduid. This parameter will be used when CddIpcIntegrationWithAsrComStackEnable is enabled. This Pdu identifier will be used in receive function callback to PduR to address the received Pdu from respective channel. |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
##### CddComStackContribution
Contribution of COM Stack modules.
###### CddPduRLowerLayerContribution
Parameters that are necessary for the configuration of a Complex Driver that serves as the LowerLayer of the Pdu Router module.
###### CddPduRLowerLayerRxPdu
This container specifies Rx PDUs that are exchanged between the CDD and the standardized BSW module.
###### CddPduRApiType
| Item ||
|--------|---------------|
| **Name** | CddPduRApiType |
| **Description** | This parameter configures the type of the CDD interface (IF/TP) |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Default-value** | IF |
| **Range** | IF |
###### CddPduRLowerLayerHandleId
| Item ||
|--------|---------------|
| **Name** | CddPduRLowerLayerHandleId |
| **Description** | ECU wide unique, symbolic handle for the Pdu. |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CddIpcPduRHandle
| Item ||
|--------|---------------|
| **Name** | CddIpcPduRHandle |
| **Description** | CddIpcPduRHandle is a symbolic name of the Pdu with which Cdd_Ipc module invokes the receive indication for upper layer. User can modify this parameter to match with the symbolic name used by upper layer. |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL |
###### CddPduRLowerLayerPduRef
| Item ||
|--------|---------------|
| **Name** | CddPduRLowerLayerPduRef |
| **Description** | Reference to the "global" Pdu structure to allow harmonization of handle IDs in the COM-Stack. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
###### CddPduRLowerLayerTxPdu
This container specifies Tx PDUs that are exchanged between the CDD and the standardized BSW module.
###### CddPduRApiType
| Item ||
|--------|---------------|
| **Name** | CddPduRApiType |
| **Description** | This parameter configures the type of the CDD interface (IF/TP) |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Default-value** | IF |
| **Range** | IF |
###### CddPduRLowerLayerHandleId
| Item ||
|--------|---------------|
| **Name** | CddPduRLowerLayerHandleId |
| **Description** | ECU wide unique, symbolic handle for the Pdu. |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CddPduRLowerLayerPduRef
| Item ||
|--------|---------------|
| **Name** | CddPduRLowerLayerPduRef |
| **Description** | Reference to the "global" Pdu structure to allow harmonization of handle IDs in the COM-Stack. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
##### CddIpcGeneral
Contains the general configuration parameters of the module.
###### CddIpcDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | CddIpcDevErrorDetect |
| **Description** | Switches the development error detection and notification on or off. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddIpcVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | CddIpcVersionInfoApi |
| **Description** | Adds / removes the service Cdd_Ipc_GetVersionInfo() from the code. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddIpcIntegrationWithAsrComStackEnable
| Item ||
|--------|---------------|
| **Name** | CddIpcIntegrationWithAsrComStackEnable |
| **Description** | This parameter is used to enable the integration of Cdd Ipc module with Autosar Com Stack. 0: Cdd Ipc module is not integrated with Autosar Com stack. Transmission and Reception will be handled by another BSW component (Ex: IoHwAb or CDD). 1: Cdd Ipc module is integrated as lower module to PduR in Autosar Com stack. Transmission and Reception will be handled via Com Stack i.e. to and from PduR. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddIpcReservedInstances
| Item ||
|--------|---------------|
| **Name** | CddIpcReservedInstances |
| **Description** | Number of reserved instances.The reserved instances won't be available as channels in CDD IPC |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 3 |
| **Min-value** | 0 |
###### CddIpcMainFunctionReadPeriod
| Item ||
|--------|---------------|
| **Name** | CddIpcMainFunctionReadPeriod |
| **Description** | This parameter describes the period for cyclic call to Cdd_Ipc_MainFunction_Read. Unit is seconds. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.01 |
| **Max-value** | INF |
| **Min-value** | 1.0E-6 |
###### CddIpcTimeoutDuration
| Item ||
|--------|---------------|
| **Name** | CddIpcTimeoutDuration |
| **Description** | Timeout value for synchronization of cores in seconds, if synchronization didn't happen within this time frame, Cdd_Ipc_Sync will abort and returns E_NOT_OK |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.1 |
| **Max-value** | INF |
| **Min-value** | 1.0E-6 |
###### CddIpcCounterClockRef
| Item ||
|--------|---------------|
| **Name** | CddIpcCounterClockRef |
| **Description** | This parameter contains a reference to the sysClock to calculate clock cycles for IPC free run counter, which is used by the CDD IPC driver. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
#### Steps To Configure Cdd Ipc Module
1. Open EB Tresos configurator tool, load Cdd_Ipc module. Select the Precompile Config Variant.
2. Configure the required parameters.
3. Save the configuration and generate the configuration.
### Examples
The example applications demonstrates usecases of the Cdd Ipc driver APIs. The examples are explained below in detailed.
#### Cdd_Ipc_Example_Interrupt_C29x1
##### Overview of Cdd_Ipc_Example_Interrupt_C29x1
* Cdd_Ipc_Example_Interrupt_C29x1
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init().
* Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
* Initializes Cdd_Ipc driver using Cdd_Ipc_Init()
* Cdd_Ipc_GetVersionInfo will get the software version info details.
* Cdd_Ipc_Sync will synchronize the two cores participating in the IPC communication.
* Cdd_Ipc_Transmit will transmit a PDU to the configured remote core.
#### Setup required to run Cdd_Ipc_Example_Interrupt_C29x1
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
#### How to run Cdd_Ipc_Example_Interrupt_C29x1
* Build Cdd_Ipc_Example_Interrupt_C29x1 using cmake
* Open CCS and connect to CPU1 target
* Load the Cdd_Ipc_Example_Interrupt_C29x1_merged.out
* After the program is loaded, run CPU1
##### Sample Log of Cdd_Ipc_Example_Interrupt_C29x1
```{literalinclude} Assets/text/Cdd_Ipc/F29H85x/Cdd_Ipc_Example_Interrupt_C29x1.txt
```
#### Cdd_Ipc_Example_Polling_C29x1
##### Overview of Cdd_Ipc_Example_Polling_C29x1
* Cdd_Ipc_Example_Polling_C29x1
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init().
* Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
* Initializes Cdd_Ipc driver using Cdd_Ipc_Init()
* Cdd_Ipc_GetVersionInfo will get the software version info details.
* Cdd_Ipc_Sync will synchronize the two cores participating in the IPC communication.
* Cdd_Ipc_Transmit will transmit a PDU to the configured remote core.
* Cdd_Ipc_MainFunction_Read polls for incoming messages in configured Rx instances.
#### Setup required to run Cdd_Ipc_Example_Polling_C29x1
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
#### How to run Cdd_Ipc_Example_Polling_C29x1
* Build Cdd_Ipc_Example_Polling_C29x1 using cmake
* Open CCS and connect to CPU1 target
* Load the Cdd_Ipc_Example_Polling_C29x1_merged.out
* After the program is loaded, run CPU1
##### Sample Log of Cdd_Ipc_Example_Polling_C29x1
```{literalinclude} Assets/text/Cdd_Ipc/F29H85x/Cdd_Ipc_Example_Polling_C29x1.txt
```
#### File Structure
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂Can\
┃ ┣ 📂Cdd_Adc\
┃ ┣ 📂Cdd_Ecap\
┃ ┣ 📂Cdd_Pwm\
┃ ┣ 📂Cdd_Uart\
┃ ┣ 📂Cdd_Xbar\
┃ ┣ 📂DeviceSupport\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂Lin\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┣ 📂Spi\
┃ ┣ 📂Wdg\
┃ ┣ 📂**Cdd Ipc**\
┃ ┃ ┣ 📂 **Cdd_Ipc_Example_Interrupt_C29x1**\
┃ ┃ ┗ 📂 **Cdd_Ipc_Example_Polling_C29x1**\
┃ ┃ ┃ ┣ 📂ccs\
┃ ┃ ┃ ┃ ┗ 📜**Cdd_Ipc_Example_Polling_C29x1.projectspec**\
┃ ┃ ┃ ┣ 📂Cdd_Ipc_Example_Polling_C29x1_Config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Port.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Cdd_Ipc.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Ipc_Cbk.h** : *Contains the exported function prototypes*\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Cdd_Ipc_Cfg.h** : *Contains the generated pre-compiler configuration header*\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Port_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Cdd_Ipc_Cfg.c** : *Contains the generated pre-compiler configuration source*\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┗ ┗ 📜**Cdd_Ipc_Example_Polling_C29x1.c**: *Example application for Cdd Ipc*\
┃ ┗ 📜CMakeLists.txt\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
## CDD PWM Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|CDD|Complex Device Driver|
|MCAL|Micro Controller Abstraction Layer|
|API|Application Programming Interface|
|DET|Default Error Tracer|
|HW |Hardware|
|SW |Software|
|LA | Logic Analyzer|
|EPWM|Enhanced Pulse Width Modulation|
|HRPWM|High resolution PWM|
|PWM Instance | Single EPWM hardware unit|
|Channel |Each PWM instance supports two output channels EPWMxA and EPWMxB. Each output is considered as a channel|
|PWM Output State |Defines the output state for a PWM signal. It could be: High or Low|
|PWM Idle State |The idle state represents the output state of the PWM channel after the call of Cdd_Pwm_SetOutputToIdle or Cdd_Pwm_DeInit|
|PWM Polarity |Defines the starting output state of each PWM channel|
|PWM Duty cycle | Defines a percentage of the polarity(level) related to the period for each PWM channel|
|PWM period | Defines the value corresponds to the period of the PWM instance (This value is written into the TBPRD register). This is parameter is only applicable to the EPWM instance (not applicable to channel)|
|TBPRD| Time-Base Period -Period value that is written into the register|
|SYSCLK|System clock|
|EPWMCLK|Clock to the EPWM module|
|EPWMCLKDIV|EPWM clock divider. This divides the SYSCLK and produces EPWMCLK to the EPWM instances|
|CLKDIV|Clock divider prescaler which divides the EPWMCLK that is fed to the EPWM instance|
|HSCLKDIV|High speed clock divider, it is multiplied with CLKDIV and divides the EPWMCLK that is fed to the EPWM instance |
|T_TBCLK|Time period of the time-base clock. This is calculated based on the clock to the EPWM module and the configured clock prescalers.|
|F_TBCLK|Frequency of the time-base clock.(1/T_TBCLK)|
|T_PWM| Time Period of the generated PWM waveform|
|F_PWM|Frequency of the time-base clock.(1/T_PWM)|
|GPIO|General Purpose Input Output|
|Edge|Change in the output level from HIGH to LOW or LOW to HIGH|
### Introduction
CDD PWM driver is a Complex Device Driver used to represent an analog signal with a digital approximation. It provides services to change the duty cycle and period of the PWM/EPWM channels. It provides service to set the PWM channels in the IDLE state. Furthermore, it provides services to enable and disable notification mechanism and routines to count the edges detected.
```{figure} Assets/images/Cdd_Pwm_Autosar_MCAL.png
:alt: CDD PWM MCAL AUTOSAR
:align: center
Cdd Pwm MCAL AUTOSAR
```
This document details AUTOSAR Cdd Pwm module implementation
|Supported AUTOSAR Release|**4.3.1**|
|------|-------------|
| **Supported Configuration Variants** | **Pre-Compile**|
| **Vendor ID** | **CDD_PWM_VENDOR_ID (44)**|
| **Module ID** | **CDD_PWM_MODULE_ID (255)**|
### Functional Overview
EPWM (Enhanced Pulse width modulation)/PWM is a general method for representing an analog signal with a digital approximation. A PWM signal consists of a sequence of variable width, constant amplitude pulses which contain the same total energy as the original analog signal. This property is valuable in digital motor control as sinusoidal current (energy) can be delivered to the motor using PWM signals applied to a power converter.
The EPWM module supports two operational modes:
1. **Simple Mode**: Provides basic PWM functionality with standard features like duty cycle and period control. This mode is suitable for applications requiring basic PWM generation without advanced features.
2. **Advanced Mode**: This mode supports additional features such as trip zone functionality, dead-band generation, chopper functionality, digital compare, event trigger,diode emulation and other advanced capabilities. Advanced mode configuration can be done using APIs only. This mode is ideal for complex motor control applications, power conversion systems, and scenarios requiring precise timing control or fault protection.
It's important to note that only one mode (either Simple or Advanced) can be used. The mode selection can be configured in the EB tresos configuration tool during the configuration phase. The selection determines which features will be available and affects the initialization parameters and available APIs.
Each EPWM instance supports 2 channels: Channel A & Channel B. Period and notification configuration is common for both the channels of the EPWM instance. Duty cycle can be configured independently.
#### Simple mode
##### APIs supported
1. Cdd_Pwm_Init -Start all PWM channels
2. Cdd_Pwm_DeInit -Stop all PWM channels
3. Cdd_Pwm_SetDutyCycle -Set the requested duty cycle for the PWM channel
4. Cdd_Pwm_SetPeriod -Set the requested period for the PWM instance
5. Cdd_Pwm_SetOutputToIdle -Set the output of the channel to the configured IDLE state
6. Cdd_Pwm_SetInterruptEventCount -Set the interrupt event prescale count for the instance, this should be called before enable notification API else a runtime error will be reported
7. Cdd_Pwm_EnableNotification -Enable interrupt for the channel. Notification function is common for both the channels of an EPWM instance
8. Cdd_Pwm_DisableNotification -Disable interrupt for the channel. Notification function is common for both the channels of an EPWM instance
9. Cdd_Pwm_GetVersionInfo -Retrieve software version information of the module
##### How the dutycycle is configured in the hardware in simple mode
In simple mode each EPWM uses 3 sub-modules that determines the output of the PWM channel, the sub-modules are:
###### Time Base counter
* This sub-module primarily consists of a 16-bit counter which partially determines the period & frequency of the PWM waveform.
* The mode of the time-base counter decides the symmetry of the waveform. For Asymmetric waveform the counter runs in Up-Count Mode and runs in Up-Down-Count Mode for symmetric waveforms.
**Up-count Mode**:
The counter starts counting from zero and increments until it reaches the time-base period register value, then the counter resets to zero and the count sequence starts again.
**Up-Down-Count Mode**:
The counter starts counting from zero and increments until it reaches the time-base period register value, then the counter decrements until it reaches zero and the count sequence repeats.
**Clocking**:
The clock used for the EPWM counter is originally sourced from a device’s system clock. A configurable clock divider divides down the system clock to generate the EPWM clock (EPWMCLK). EPWM clock pre-scaler values can then be used to further divide down the EPWM clock for the EPWM counter and a EPWM time-base period register. The counter and the time-base period value control the frequency and period of the generated EPWM waveforms.
* Time-Base Clock TBCLK = EPWMCLK / (HSPCLKDIV \* CLKDIV) \
* Clock Pre-scaler = HSPCLKDIV \* CLKDIV
* TBPRD = Period value from the configurator/with Cdd_Pwm_Period API
* DutyCycle = DutyCycle value from the configurator/with Cdd_Pwm_SetDutyCycle API
```{Note}
Shadow registers act like a buffer to allow register updates to be synchronized with the EPWM counter or a specific (configurable) event and avoid corruption or spurious operation from the register being modified asynchronously by software.
```
###### Counter Compare
When a match occurs (counter = CMPA / CMPB), this is known as a compare event. Compare events are used by the EPWM action-qualifier submodule to influence EPWM outputs.
An integral compare value is calculated based on the configured duty cycle of the channel and period of the instance. The output level can be decided based on the Action qualifier events. In scenarios where the calculated value is same for different configured duty cycles the output is going to be exactly same.
Note that for up-count modes, a counter-compare match (counter = CMPx) can occur only once per cycle which produces a Asymmetric waveform; however, for up-down-count mode, a counter match can occur twice per cycle since there can be a match on the up-count and another match on the down-count which generates a Symmetric output waveform.
###### Action qualifier(AQ)
The action-qualifier submodule is responsible for constructing the shape of PWM waveforms. This submodule utilizes compare events from the time-base and counter-compare submodules to performing actions on an EPWM modules two output channels (EPWMxA and EPWMxB). These first three submodules (time-base, counter-compare, and action-qualifier) are the key submodules needed to generate a basic PWM waveform. Based on the configuration these are the actions supported for each event:
* Set PWM output high
* Clear PWM output low
* Toggle PWM output (if high, toggle low; if low, toggle high)
* Do nothing to PWM output
Based on the symmetry and the polarity of the instance, compare value and AQ actions are set for each channel as per the desired duty cycle by the driver.
##### EPWM Waveform in simple mode
Two different waveform types are supported for each PWM instance:
###### Asymmetric scenario
The time-base counter runs in Up-Count mode and a period ends when the counter value equals to the zero again.
In this mode one of the edges will occur at counter equals to Zero event and the other edge occurs when the counter equals to the configured compare value.
For polarity HIGH: The falling edge occurs when counter is equal to the CMP value and the rising edge occurs when the counter is equal to Zero.
For polarity LOW: The falling edge occurs when counter is equal to zero and the rising edge occurs when the counter is equal to the CMP value.
The calculated Compare Value(CMP) based on the Period of the EPWM/PWM instance and the configured duty cycle is
* Time-Base Period (TBPRD) = (T{sub}`pwm` / T{sub}`TBCLK`) -1
* CMP(compare value) = (DutyCycle*(TBPRD +1)) / (0x8000)
Where, \
T{sub}`pwm` = Switching Period \
T{sub}`TBCLK` = Timer Period
###### Symmetric scenario
The counter runs in Up-Down-Count mode which affects the period of the generated PWM waveform. For the same configured period the frequency of the Symmetric waveform will be half of the frequency of the Asymmetric waveform.
In this mode one of the edges will occur at counter equals to compare value event during up-mode and the other edge occurs when the counter equals to the compare value event during down-mode.
For polarity HIGH: The falling edge occurs when counter is equal to the CMP value and the rising edge occurs when the counter is equal to Zero.
For polarity LOW: The falling edge occurs when counter is equal to zero and the rising edge occurs when the counter is equal to the CMP value.
The calculated Compare Value (CMP) based on the Period of the EPWM/PWM instance and the configured duty cycle is
* Time-Base Period (TBPRD) = (T{sub}`pwm` / (2 * T{sub}`TBCLK`))
* CMP(compare value) = (DutyCycle*TBPRD) / (0x8000)
Where, \
T{sub}`pwm` = Switching Period \
T{sub}`TBCLK` = Timer Period
```{figure} Assets/images/Cdd_Pwm_Block_Diagram.png
:width: 50%
:alt: Cdd Pwm module
:align: center
Cdd Pwm module architecture
```
```{Note}
All duty cycle values may not be valid for a particular configured period. The duty cycle is calculated based on the compare value which is an integer.
Period configured in EB tresos or set by calling Cdd_Pwm_SetPeriod() is written directly into the TBPRD register.
```
In case of asymmetric waveform, the notification at the counter = Zero event is common for both the channels of the PWM instance. The notification count in such scenarios will be only one instead of two.\
**For example**: For asymmetric waveform, if the notification is enabled on both edges for both the channels then the notification count when both the channels have HIGH polarity is (1 for falling of Channel A + 1 for falling of Channel B + 1 for rising edge of both Channels A & B)
This happens because counter=Zero event is common for both the channels and both the outputs have the rising edge at that particular event.
This scenario is not applicable to the Symmetric waveform because both the edges occur at counter=CMP and different events are supported for each output channel.
Cdd_Pwm_EnableNotification & Cdd_Pwm_DisableNotification APIs enable and disable the EPWM interrupt respectively.
##### Hardware Features supported in simple mode
* Dedicated 16-bit time-base counter with period and frequency control.
* Two PWM outputs (EPWMxA and EPWMxB) that can be used in the following configurations -
* Two independent PWM outputs with single-edge operation.
* Two independent PWM outputs with dual-edge symmetric operation.
* One independent PWM output with dual-edge asymmetric operation.
* Asynchronous override control of PWM signals through software.
* Hardware-locked (synchronized) phase relationship on a cycle-by-cycle basis.
* All events can trigger CPU interrupts
* Programmable event prescaling minimizes CPU overhead on interrupts.
##### Non compliance in simple mode with respect to AUTOSAR spec
* Cdd_Pwm_GetOutputState : This API is not supported.
* Cdd_Pwm_SetOutputToIdle : API is supported but the change in the output state will not happen immediately. The output will be set to the IDLE state at the end of the period of the wave.
```{Note}
Cdd_Pwm_SetOutputToIdle doesn't set the PWM output to IDLE state immediately. The API operates in shadow mode so the IDLE state will be effective from CTR=Zero event.
All the supported APIs work in shadow mode which means any update in the period, duty cycle, action qualifier actions and IDLE output will happen when the counter is equal to zero.
Simple mode implements AUTOSAR APIs whereas advanced focuses on supporting the hardware features through APIs.
Not all sub-modules are supported in simple mode. Advanced features are accessible through the Advanced Mode APIs.
```
#### Advanced mode
Advanced mode provides full access to all hardware capabilities, offering granular and precise control over hardware for sophisticated applications.
Description of some of the APIs in advanced mode:
1. Cdd_Pwm_Init - Only XLINK is enabled for PWM instances
2. Cdd_Pwm_SetInterruptEventCount - Set interrupt event prescale value (no runtime error will be reported in advanced mode)
3. Cdd_Pwm_EnableNotification - Enable notification for the PWM instance
4. Cdd_Pwm_DisableNotification - Disable notification for the PWM instance
5. Cdd_Pwm_GetVersionInfo - Retrieve software version information of the module
6. Cdd_Pwm_ConfigureTripZoneNotification should be used to enable/disable trip zone notifications.
##### Additional sub-modules thar are supported in Advanced mode
###### **Dead-Band submodule**
The dead-band submodule provides a means to delay the switching of a gate signal, thereby allowing time for gates to turn off and preventing a short circuit. This submodule supports independently programmable rising-edge and falling-edge delays with various options for generating the appropriate signal outputs on EPWMxA and EPWMxB.
The key functions of the dead-band module are:
* Generating appropriate signal pairs (EPWMxA and EPWMxB) with dead-band relationship from a single EPWMxA input
* Programming signal pairs for:
-Active high (AH)
-Active low (AL)
-Active high complementary (AHC)
-Active low complementary (ALC)
* Adding programmable delay to rising edges (RED)
* Adding programmable delay to falling edges (FED)
* Can be totally bypassed from the signal path
The dead-band submodule provides a way to delay the switching of the PWM (high to low or low to high). By delaying the transition of PWM signals, you can allow time for the PWM gates to turn off and prevent a short circuit.
The dead-band submodule supports independently programmable rising-edge and falling-edge delays with various options for generating the appropriate signal outputs on EPWMxA and EPWMxB.
**Why Dead-band**
Dead-band control provides a convenient means of combating current shoot-through problems in a power converter. Shoot-through occurs when both the upper and lower gates in the same phase of a power converter are open simultaneously (both gates “on”).This condition shorts the power supply and results in a large current draw. Shoot-through problems occur because transistors open faster than they close, and because high-side and low-side power converter gates are typically switched in a complimentary fashion. Although the duration of the shoot-through current path is finite during PWM cycling, (i.e. the closing gate will eventually shut), even brief periods of a short circuit condition can produce excessive heating and over stress the power converter and power supply.
###### **Chopper submodule**
The PWM chopper submodule is used with pulse transformer-based gate drives to control the power switching devices. This submodule uses a high-frequency carrier signal together with the PWM waveform that is generated by the previous submodules (time-base, counter-compare, action-qualifier, and dead-band).
The key functions of the PWM chopper submodule are:
* Programmable chopping (carrier) frequency
* Programmable pulse width of first pulse
* Programmable duty cycle of second and subsequent pulses
* Can be fully bypassed if not required
Additionally, this submodule provides an option to include a larger, one-shot (OSHT) pulse width before the sustaining pulses.
```{figure} Assets/images/Cdd_Pwm_Chopper.png
:alt: Cdd Pwm Chopper Submodule Action
:align: center
Cdd Pwm Chopper SUB-module Action
```
###### **Trip-Zone submodule**
The trip zone and digital compare submodules provide a protection mechanism to protect the output pins from abnormalities, such as over-voltage, over-current, and excessive temperature rise.
Using the trip-zone is the quickest way to change a PWM output. The trip-zone submodule utilizes a fast, clock-independent logic mechanism to quickly handle fault conditions by forcing the EPWMxA and EPWMxB outputs to a safe, configurable state (such as high, low, or high-impedance). Due to its speed and hardware connection, the trip-zone can be used when interrupts (ISR software) may not be quick enough to protect the hardware in response to over-current conditions or short-circuits.
The trip-zone supports two types of trips
One-shot (OSHT) trips for major short circuits or over current conditions
Cycle-by-cycle (CBC) trips for current limiting operation
Trip-zone signals (TZ1-TZ6) can come from several sources. The trip-zone signals are typically as follows:
TZ1-TZ3: Externally from any GPIO pin. A specific GPIO signal can be routed to the EPWM Trip Zone using the INPUT X-BAR Module
TZ4: Internally from an inverted eQEP error signal (TZ4)
TZ5: Internally from system clock failure (TZ5)
TZ6: Internally from an emulation stop output from the CPU (TZ6).
Additionally, numerous trip-zone source signals can be generated from the digital-compare subsystem.
The power drive protection is a safety feature that is provided for the safe operation of systems such as power converters and motor drives. It can be used to inform the monitoring program of motor drive abnormalities such as over-voltage, over-current, and excessive temperature rise. If the power drive protection interrupt is unmasked, the PWM output pins will be put in a safe state immediately after the pin is driven low. An interrupt will also be generated.
```{figure} Assets/images/Cdd_Pwm_TripZone.png
:alt: Cdd Pwm TripZone Block
:align: center
Cdd Pwm Trip Zone Block
```
###### **EPWM X-BAR**
The EPWM X-BAR is used to route various internal and external signals to the EPWM modules. Eight trip signals from the EPWM X-BAR are routed to all of the EPWM modules. The EPWM XBAR can select a single signal or logically OR up to 32 signals.
###### **Digital Compare (DC) submodule**
The digital-compare submodule, like the trip-zone, can also help protect the output pins from abnormalities, such as over-voltage, over-current, and excessive temperature rise. This submodule compares signals external to the EPWM module, such as a signal from the CMPSS analog comparators, to directly generate PWM digital-compare events or actions. These digital-compare events or actions can then used by the trip-zone, time-base, and event-trigger submodules to trip the EPWM which can:
Generate a trip interrupt
Sync the EPWM
Generate an ADC start of conversion
You can also use the digital-compare submodule ‘Blanking’ functionality to temporarily disable PWM actions for a period of time to eliminate noise effects and it is configurable.
A digital-compare event is generated when one or more of its selected inputs are either high or low. The inputs to the digital-compare submodule are sourced from INPUT X-BAR, EPWM X-BAR and trip-zone input pins.
To use the digital-compare events, the user selects the input for each signal (DCAH, DCAL, DCBH, DCBL) and the state of each signal that will trigger each compare.
###### **Event Trigger submodule**
The event-trigger submodule can use the events generated by the time-base, counter-compare, and digital-compare submodules to trigger two types of actions:
Generate an interrupt to the CPU
Generate a start-of-conversion (SOC) pulse to the ADC
The event-trigger submodule also incorporates pre-scaling logic to issue an interrupt request or ADC SOC on every event or up to every fifteenth event.
These event triggers can occur at a number of configurable time such as when the time-base counter equals zero, period, zero or period, or on the up-count or down-count match of a counter-compare value (CMPx). The digital-compare subsystem can also be used to generate an ADC SOC based on one or more compare events. Notice counter-up and counter-down triggers are independent and separate.
###### **XCMP mode**
Instead of generating a single pulse within a single PWM period, generation of up to a max of 4 pulses within a single PWM period is possible with XCMP mode.
CMPA and CMPB will have two options to allocate extended compare registers (XCMP1-8) one of two ways.
Allocate all XCMP1-8 to CMPA or allocate XCMP1-4 to CMPA and XCMP5-8 to CMPB.
When XCMP mode is enabled, the counter direction can only be in up-count mode. The above event waveform diagram shows extended counter compare matches which are fed into action qualifer.
At the end of every period, the shadow register set is loaded to the active registers to generate a new waveform.
Loading from shadow to active can be configured in two ways:
**Load Once**
Load once has three shadow register sets to load once from. The additional configurability is to select which shadow register set to load from first.Load multiple allows configurability to cycle through the shadow registers depending on how many shadow register sets are required.
**Load Multiple**
There are 4 configurations with load multiple in using the shadow register sets. The four possible load multiple schemes can be using only active register, shadow register 1, shadow register 1 and 2, or from all three shadow registers. If choosing all three shadow register, load multiple will start with shadow register 3 then load shadow register 2 then shadow register 1 on the next time-base counter equals to zero events. Once load multiple has cycled through all shadow register sets, load multiple will not cycle through the shadow register sets again until the load start bit is enabled again.
Note: There only are allowable repetition for shadow buffer set 2 and 3
Below is an example of XCMP mode
```{figure} Assets/images/Cdd_Pwm_XCmp_Example.png
:alt: Cdd Pwm XCMP Example
:align: center
Cdd Pwm XCMP example
```
###### **Diode Emulation submodule**
Diode emulation is used in conjunction with CMPSS module to drive the EPWM outputs to a certain state when the CMPSS sends out trip signal. The outputs from the trip zone will be sent to the Diode Emulation block.
Features of the diode emulation include:
Ability to send out a trip signal (DEMONTRIP) if the diode emulation mode is active for more than an allowable amount time.
Ability to force the PWM outputs to be same as trip signals, low or high.
Inputs to the diode emulation block come from the CMPSS and input x-bar. The trip zone submodule’s outputs are also routed through this block. Diode emulation can be disabled to carry through the trip zone module’s output. The below waveform is to demonstrate a common use case for this feature which is current detection. The red signal can represent current in a system. The CMPSS will configure the original DACVAL for high and low thresholds. Diode emulation support within CMPSS, will allow configurability for setting another pair of DACVAL thresholds if the ePWM module enters diode emulation.
Since the diode emulation module takes input signal from CMPSSnTRIPH and CMPSSnTRIPL, only when the current goes past the original CMPSS threshold the diode emulation sets the DACVAL_H2 and DACVAL_L2. During this new threshold region, the PWM outputs will change accordingly to the PWM’s diode emulation set outputs and diode emulation mode will be active until the current resumes normal operation. Once current is within normal operating regions, the CMPSS resumes its original DACVAL thresholds and PWM outputs will resume.
First the DEACTIVE flag is set to high because a TRIPH or TRIPL event has occurred. Once in diode emulation mode, EPWMxA_DE is configured to follow TRIPL, and EPWMxB_DE is configured to follow TRIPH. The outputs will continue to follow TRIPH/L until diode emulation mode has been exited. Diode emulation mode can be exited either cycle-by-cycle clear or by software. Cycle-by-cycle clear will evaluate on every PWMSYNCOUT event if the trip condition is not present.
###### **Minimum Dead Band (MINDB) & Illegal Combo Logic (ICL) submodule**
The EPWM Minimum Dead-Band submodule is similar to the dead-band submodule in applying a configurable amount of delay between PWM modules. The goal of this feature is to ensure gates are not on at the same time and prevent a short circuit. In the figure below, when a falling edge occurs on EPWMxA the minimum delay set will apply to EPWMxB’s output. When a falling edge occurs on EPWMxB, a minimum delay is applied to EPWMxA.
The Illegal Combo Logic (ICL) submodule monitors PWM outputs to detect and prevent illegal combinations of signals that could potentially damage power electronics hardware. It provides hardware-level protection against scenarios where multiple switches in a power converter might be turned on simultaneously due to software errors or other fault conditions. When an illegal combination is detected, the ICL can force the outputs to a safe state, helping to prevent catastrophic failures in the power stage.
##### **EPWM MINDB and ICL X-BARs**
The purpose of Minimum Dead-band (MINDB) and Illegal Combination Logic (ICL) XBARs is to expand functionality of the Minimum Dead-band and Illegal Combination Logic submodule of the EPWM by routing in signals from the diode emulation logic module, minimum dead-band module, and CLB. Their functionality is similar to the Input XBAR module, meaning only a single input to the XBARs can be routed to the output, unlike the Output XBAR for example, where multiple inputs can be combined as a logical OR and sent to the output.
###### **High-resolution PWM(HRPWM) submodule**
The EPWM module is capable of significantly increasing its time resolution capabilities over the standard conventionally derived digital PWM. This is accomplished by adding 8-bit extensions to the counter-compare register (CMPxHR), time-base period register (TBPRDHR), and time-base phase register (TBPHSHR) to provide a finer time granularity for edge positioning control. This is known as high-resolution PWM (HRPWM) and it is based on micro edge positioner (MEP) technology.
MEP logic is capable of positioning an edge very finely by sub-dividing one coarse system clock of the conventional PWM generator with time step accuracy on the order of 150 picoseconds (see your device documentation for specifications). A self-checking software diagnostic (SFO Library) is used to determine if the MEP logic is running optimally, and it can calibrate the MEP logic under all operating conditions to account for variations caused by temperature, voltage, and process. HRPWM is typically used when the PWM resolution falls below approximately 9 or 10 bits.
HRPWM significantly increases the resolution of conventionally derived digital PWM. Adds 8-bit extensions to counter-compare registers (CMPxHR), time-base period register (TBPRDHR) and time-base phase register (TBPHSHR) for micro edge positioning (MEP) control
The micro edge positioner (MEP) logic is capable of placing an edge in one of 255 discrete time steps. The MEP step size varies based on worst-case process parameters, operating temperature, and voltage. MEP step size increases with decreasing voltage and increasing temperature and decreases with increasing voltage and decreasing temperature. Applications that use the HRPWM feature can use the TI-supplied MEP scale factor optimization (**Cdd_Pwm_Sfo**) software function. The **Cdd_Pwm_Sfo** function helps to dynamically determine the number of MEP steps per EPWMCLK period while the HRPWM is in operation.
To utilize the MEP capabilities effectively, the correct value for the MEP scaling factor needs to be known by the software. To accomplish this, the HRPWM module has built in self-check and diagnostic capabilities that can be used to determine the optimum MEP scale factor value for any operating condition.
There are 3 HRPWM calibration units in the device. The calibration unit ID should be passed as a parameter to the **Cdd_Pwm_Sfo** API to select the respective calibration unit.
```{figure} Assets/images/Cdd_Pwm_Hrpwm.png
:alt: Cdd Pwm Hrpwm Operating Logic Using MEP
:align: center
Cdd Pwm Hrpwm operting logic
```
```{Note}
CDD_PWM_HRPWM_MEP_CTRL_RISING_AND_FALLING_EDGE(both rising & falling edges) MEP Edge select type is not supported for CMPAHR & CMPBHR. MEP control of both edges configuration is for TBPHSHR or TBPRDHR.
Only MEP control of rising edge and MEP control of falling edge controls CMPAHR/CMPBHR.
```
##### XLINK
XLINK feature, which allows synchronization between multiple EPWM instances, can only be enabled for each EPWM instance in the EB tresos configuration tool by adding the instance under the **CddPwmXlinkConfig/CddPwmLinkHwUnit** container.
It's important to note that despite the hardware supporting a XLINK region for each instance, the driver reserves a single XLINK region which is the respective XLINK region of the first EPWM instance that is added to the container **CddPwmXlinkConfig/CddPwmLinkHwUnit** .
Runtime configuration of XLINK is not supported. This configuration must be done during the initial setup phase, and cannot be modified during runtime. XLINK enabling for the EPWM instances is done in Cdd_Pwm_Init() API.
##### Hardware Features supported in advanced mode
Features Supported at a high level are:
(All hardware features) The following features in addition to simple mode feature:
* Programmable phase-control support for lag or lead operation relative to other EPWM modules.
* Hardware-locked (synchronized) phase relationship on a cycle-by-cycle basis.
* Dead-band generation with independent rising and falling edge delay control.
* Programmable trip zone allocation of both cycle-by-cycle trip and one-shot trip on fault conditions.
* A trip condition can force either high, low, or high-impedance state logic levels at PWM outputs.
* All events can trigger both CPU interrupts and ADC start of conversion (SOC)
* PWM chopping by high-frequency carrier signal, useful for pulse transformer gate drives.
```{Note}
Cdd_Pwm_DeInit API is not supported in advanced mode. Application needs to take care of setting the PWM outputs to the IDLE state.
```
### Source files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂Can\
┃ ┣ 📂Cdd_Adc\
┃ ┣ 📂Cdd_Ecap\
┃ ┣ 📂Cdd_Ipc\
┃ ┣ 📂**Cdd_Pwm**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Cdd_Pwm.h** : *Contains the API declarations of the Cdd_Pwm driver to be used by upper layers.*\
┃ ┃ ┃ ┣ 📜**Cdd_Pwm_Priv.h** : *Declaration of the private APIs.*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Cdd_Pwm.c** : *Implementation of the Cdd_Pwm public APIs.*\
┃ ┃ ┃ ┣ 📜**Cdd_Pwm_Irq.c** : *Implementation for Cdd_Pwm interrupts handlers.*\
┃ ┃ ┃ ┗ 📜**Cdd_Pwm_Priv.c** : *Implementation of the private APIs*\
┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Cdd_Sent\
┃ ┣ 📂Cdd_Uart\
┃ ┣ 📂Cdd_Xbar\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂hw_include\
┃ ┣ 📂Lin\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┣ 📂Spi\
┃ ┗ 📂Wdg\
┣ 📂examples\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{figure} Assets/images/Cdd_Pwm_Header_File_Structure.png
:alt: Cdd Pwm Header File Structure
:align: center
Cdd Pwm Header File Structure
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Scheduling
None
#### Error handling
##### Development Error Reporting
Development errors are reported to the DET using the service Det_ReportError(), when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
#### Error codes in simple mode
|Type of Error | Related Error code | Value (Hex)|
|----|-----|-------|
|API called when the driver is not initialized|CDD_PWM_E_UNINIT|0x0AU|
|Init API called when the driver is already initialized|CDD_PWM_E_ALREADY_INITIALIZED|0x0BU|
|Init API called with invalid pointer|CDD_PWM_E_PARAM_POINTER|0x0CU|
|API called with invalid ID(parameter)|CDD_PWM_E_INVALID_ID|0x0DU|
|API called for the PWM instance whose has no notification pointer available |CDD_PWM_E_NOTIF_CAPABILITY|0x0EU|
|API called for the PWM instance whose channel class is not variable period|CDD_PWM_E_CHANNEL_CLASS|0x0FU|
|API called when the channel configured for the notification is invalid|CDD_PWM_E_INVALID_EDGENOTIFICATION|0x11U|
|API called when the edge notification type is not valid |CDD_PWM_E_INVALID_NOTIFICATION|0x12U|
|API called when the event count is invalid/out-of-range |CDD_PWM_E_INVALID_EVENT_COUNT|0x13U|
|API called with invalid/out-of-range duty cycle value|CDD_PWM_E_INVALID_DUTY_CYCLE|0x18U|
##### Runtime Errors in simple mode
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|API called whose notification is already enabled or invalid channel notification is called for the instance|CDD_PWM_E_NOTIF_ALREADY_ENABLED|0x10U|
|Cdd_Pwm_SetInterruptEventCount API called for an instance whose notification is enabled|CDD_PWM_E_BUSY|0x15U|
|Cdd_Pwm_EnableNotification API called when the InterruptEventCount is zero|CDD_PWM_E_INVALID_INTEVTCOUNT|0x16U|
#### Error codes in advanced mode
|Type of Error | Related Error code | Value (Hex)|
|----|-----|-------|
|API called when the driver is not initialized|CDD_PWM_E_UNINIT|0x0AU|
|Init API called when the driver is already initialized|CDD_PWM_E_ALREADY_INITIALIZED|0x0BU|
|Init API called with invalid pointer|CDD_PWM_E_PARAM_POINTER|0x0CU|
|API called with invalid ID(parameter)|CDD_PWM_E_INVALID_ID|0x0DU|
|API called for the PWM instance whose has no notification pointer available|CDD_PWM_E_NOTIF_CAPABILITY|0x0EU|
|API called with invalid output channel|CDD_PWM_E_INVALID_OUTPUT_CHANNEL|0x0FU|
|API called when the event count is invalid/out-of-range|CDD_PWM_E_INVALID_VALUE|0x13U|
|API called with invalid prescale value|CDD_PWM_E_INVALID_PRESCALE|0x14U|
|API called with invalid counter compare value|CDD_PWM_E_INVALID_CTRCOMPARE|0x15U|
|API called with invalid event|CDD_PWM_E_INVALID_EVENT|0x16U|
|API called with invalid polarity|CDD_PWM_E_INVALID_POLARITY|0x17U|
|API called with invalid ADCSOC type|CDD_PWM_E_INVALID_ADCSOC_TYPE|0x18U|
|API called with invalid event source|CDD_PWM_E_INVALID_EVENT_SRC|0x19U|
|API called with invalid shadow set|CDD_PWM_E_INVALID_SHDSET|0x1AU|
### Silicon errata workarounds and recommendation
For detailed silicon errata, refer to the [F29H85x, F29P58x, and F29P32x Real-Time MCUs Silicon Errata](https://www.ti.com/lit/er/sprz569c/sprz569c.pdf).
| Advisory | Workaround in MCAL driver | Recommended actions for user |
|----------|--------------------------|-------------------------------|
| ePWM: An ePWM Glitch can Occur if a Trip Remains Active at the End of the Blanking Window | No workaround is implemented in the CDD PWM driver. | Extend or reduce the blanking window to avoid any undesired trip action. |
| ePWM: ePWM TZFRC and TZCLR Events may be Missed When PERCLKDIVSEL.EPWMCLKDIV = 1 | No workaround is implemented in the CDD PWM driver. | 1. Configure EPWMCLK = PLLSYSCLK (`PERCLKDIVSEL.EPWMCLKDIV = 0`), or
2. Use PWMXBAR → Digital Compare → Trip Zone path as an alternative:
a. Configure both trip zone actions for Digital Compare Output A Event 1/2 Action On EPWMxA and Digital Compare Output B Event 1/2 Action On EPWMxB.
• `EPWM_setTripZoneAction()`
b. Configure the input signals for TRIPIN1-15 or the ORed Combinational logic of TRIPIN1-15.
• `EPWM_selectDigitalCompareTripInput()`
c. Configure the Digital Compare condition for DCAEVT1/2 and DCBEVT1/2.
• `EPWM_setTripZoneDigitalCompareEventCondition()`
d. Configure the PWMXBAR Input to the Digital Compare Submodule to reserved.
• `XBAR_selectEpwmXbarInputSource()` |
| ePWM: ESM Source for Trip Zone is not Supported | No workaround is implemented in the CDD PWM driver. | Use the error source to generate an NMI interrupt from the respective ESM CPU instance. Within the NMI interrupt, issue a software write using `Cdd_Pwm_ForceTripZoneEvent()` to force a trip on the PWM output. |
| ePWM: ePWM One-Shot/CBC Trip Event DCxEVTy.force Does Not Set the Trip Condition | No workaround is implemented in the CDD PWM driver. | For devices with `DCxCTL.EVT1/2FRCSYNCSEL` and `DCxCTL.EVT1/2LATSEL`, use Async Path (`DCxCTL.EVT1/2FRCSYNCSEL = 1` and `DCxCTL.EVT1/2LATSEL = 1`) or Sync Path (`DCxCTL.EVT1/2FRCSYNCSEL = 0`). |
| ePWM: For ePWMs Using Global Load in One-Shot Load Mode, Global Load of Registers may get Delayed When a Write to the GLDCTL2.OSHTLD Register Occurs Within 3 TBCLKs of the Global Load Event | No workaround is implemented in the CDD PWM driver. | Any writes to the `GLDCTL2.OSHTLD` register bit must be a minimum of 3 TBCLK cycles before the configured global load event. |
| HRPWM: HRPWM High-Resolution Period Shadow to Active Loading Occurs Every ZERO Event, Even if Shadow to Active Load for Period is Set to Only Load on SYNC | No workaround is implemented in the CDD PWM driver. | When using high-resolution period, the sync event is ignored, and shadow-to-active loading occurs every ZERO event. If high-resolution period is disabled, the sync event is not ignored, and shadow-to-active loading occurs on a sync event. |
### Used resources
#### Interrupt Handling
Cdd_Pwm driver provides ISRs. The ISRs are implemented in the Cdd_Pwm_Irq.c file.
Interrupt and the category should be selected in the Cdd_Pwm plugin.The Interrupt ID associated with the PWM instance is mentioned in the TRM (also, please refer the Example application).
|Cdd_Pwm Instance| Interrupt Name | Interrupt handler|
|------------|----------------|-----------------|
|EPWM1| EPWM1_INT | Cdd_Pwm_Epwm1_IntIsr|
|EPWM2| EPWM2_INT | Cdd_Pwm_Epwm2_IntIsr|
|EPWM3| EPWM3_INT | Cdd_Pwm_Epwm3_IntIsr|
|EPWM4| EPWM4_INT | Cdd_Pwm_Epwm4_IntIsr|
|EPWM5| EPWM5_INT | Cdd_Pwm_Epwm5_IntIsr|
|EPWM6| EPWM6_INT | Cdd_Pwm_Epwm6_IntIsr|
|EPWM7| EPWM7_INT | Cdd_Pwm_Epwm7_IntIsr|
|EPWM8| EPWM8_INT | Cdd_Pwm_Epwm8_IntIsr|
|EPWM9| EPWM9_INT | Cdd_Pwm_Epwm9_IntIsr|
|EPWM10| EPWM10_INT | Cdd_Pwm_Epwm10_IntIsr|
|EPWM11| EPWM11_INT | Cdd_Pwm_Epwm11_IntIsr|
|EPWM12| EPWM12_INT | Cdd_Pwm_Epwm12_IntIsr|
|EPWM13| EPWM13_INT | Cdd_Pwm_Epwm13_IntIsr|
|EPWM14| EPWM14_INT | Cdd_Pwm_Epwm14_IntIsr|
|EPWM15| EPWM15_INT | Cdd_Pwm_Epwm15_IntIsr|
|EPWM16| EPWM16_INT | Cdd_Pwm_Epwm16_IntIsr|
|EPWM17| EPWM17_INT | Cdd_Pwm_Epwm17_IntIsr|
|EPWM18| EPWM18_INT | Cdd_Pwm_Epwm18_IntIsr|
The trip zone interrupts are only supported in advanced mode.
|Cdd_Pwm Instance| Interrupt Name | Interrupt handler|
|------------|----------------|-----------------|
|EPWM1| EPWM1_TZINT | Cdd_Pwm_Epwm1_TzIntIsr|
|EPWM2| EPWM2_TZINT | Cdd_Pwm_Epwm2_TzIntIsr|
|EPWM3| EPWM3_TZINT | Cdd_Pwm_Epwm3_TzIntIsr|
|EPWM4| EPWM4_TZINT | Cdd_Pwm_Epwm4_TzIntIsr|
|EPWM5| EPWM5_TZINT | Cdd_Pwm_Epwm5_TzIntIsr|
|EPWM6| EPWM6_TZINT | Cdd_Pwm_Epwm6_TzIntIsr|
|EPWM7| EPWM7_TZINT | Cdd_Pwm_Epwm7_TzIntIsr|
|EPWM8| EPWM8_TZINT | Cdd_Pwm_Epwm8_TzIntIsr|
|EPWM9| EPWM9_TZINT | Cdd_Pwm_Epwm9_TzIntIsr|
|EPWM10| EPWM10_TZINT | Cdd_Pwm_Epwm10_TzIntIsr|
|EPWM11| EPWM11_TZINT | Cdd_Pwm_Epwm11_TzIntIsr|
|EPWM12| EPWM12_TZINT | Cdd_Pwm_Epwm12_TzIntIsr|
|EPWM13| EPWM13_TZINT | Cdd_Pwm_Epwm13_TzIntIsr|
|EPWM14| EPWM14_TZINT | Cdd_Pwm_Epwm14_TzIntIsr|
|EPWM15| EPWM15_TZINT | Cdd_Pwm_Epwm15_TzIntIsr|
|EPWM16| EPWM16_TZINT | Cdd_Pwm_Epwm16_TzIntIsr|
|EPWM17| EPWM17_TZINT | Cdd_Pwm_Epwm17_TzIntIsr|
|EPWM18| EPWM18_TZINT | Cdd_Pwm_Epwm18_TzIntIsr|
```{Note}
Same Interrupt Category needs to be configured in both Cdd_Pwm and OS Module.
Both the channels under a EPWM/PWM instance share the same interrupt.
```
#### Instance support
|CPU instances|supported|
|-------|-------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
#### Hardware-Software Mapping
Below image shows Cdd_Pwm driver Hardware-Software mapping. For more information related to HW/SW mapping, refer the F29x Reference Manual.
```{figure} Assets/images/Cdd_Pwm_Hw_Sw_Mapping.png
:alt: Cdd_Pwm HW/SW Mapping
:align: center
Cdd_Pwm HW/SW Mapping
```
### Integration description
#### Dependent modules
##### DET
This driver depends on the DET in order to report development and runtime errors.
The detection of development errors is configurable ON/OFF. The switch CDD_PWM_DEV_ERROR_DETECT will activate or deactivate the detection of development errors. Runtime errors are reported even when CDD_PWM_DEV_ERROR_DETECT is OFF.
##### MCU
MCU Module is required for the PWM clock initialization.
##### OS
The Cdd_Pwm driver uses interrupts and therefore there is a dependency on the OS, which configures the interrupt sources.
##### PORT
The Port module configures the port pins used for the PWM driver in the EPWM mode. Hence, the Port driver has to be initialized prior to use PWM functions and to generate proper PWM output. Otherwise unpredictable output might be generated.
##### SchM
If multiple AUTOSAR runnables have access to the same Data Store Memory block, the exported AUTOSAR specification enforces data consistency by using an AUTOSAR exclusive area. With this specification, the runnables have mutually exclusive access to the per-instance memory global data, which prevents data corruption. Beside the OS, the BSW Scheduler provides functions that CDD PWM module calls at begin and end of critical sections. This implementation requires 1 level of exclusive access to guard critical sections.
The data consistency mechanism that has to be applied to an ExclusiveArea might be domain, ECU or even project specific. The decision which mechanism has to be applied by RTE / Basic Software Scheduler is taken during ECU integration by setting the Exclusive Area configuration parameter **RteExclusiveAreaImplMechanism**. This parameter is an input for RTE generator.
For CDD_PWM Module, data consistency and exclusive access to critical sections are required for the following sections as shown in the table below:
| Exclusive Area Functions used | CDD_PWM Function calling Exclusive Area | Need for Exclusive Area | Recommended Exclusive Area Mapping |
|-------|-------|-------|-------|
|CDD_PWM_EXCLUSIVE_AREA_0|Cdd_Pwm_SetDutyCycle
Cdd_Pwm_SetPeriod
Cdd_Pwm_SetOutputToIdle
Cdd_Pwm_EnableNotification
Cdd_Pwm_DisableNotification| To protect against multiple access for shared resources |**ALL_INTERRUPT_BLOCKING** : All interrupts should be blocked as this API's can be called in the interrupts. |
#### Resource Allocator
The PWM module uses the Resource Allocator to allocate PWM peripheral instances to CPU cores and configure their memory-mapped base addresses. Each allocation is placed inside a **Context** that maps to a CPU core (e.g. `CPU1`). The **CurrentContext** parameter in the Resource Allocator selects which Context is active for MCAL execution. See the [Resource Allocator Module User Guide](Module_User_Guide_ResourceAllocator.md) for details on configuring device-specific settings.
The PWM Context container supports two types of allocations:
- **`Cdd_PwmAllocatedInstance`**: Allocates an EPWM hardware instance (e.g. `EPWM1`). Each instance has both a **BaseAddr** and an **XlinkBaseAddr**, both auto-calculated based on the selected instance and frame.
- **`CddPwmHrpwmCalInstance`**: Allocates an HRPWM calibration instance (e.g. `HRPWMCAL1`). **BaseAddr** is auto-calculated based on the selected instance and frame.
Each allocation supports **Frame** (`FRAME0`–`FRAME3`), **DebugHaltEnabled**, and **StandbyModeEnabled** parameters.
##### Resource Allocator Usage Example
To allocate EPWM1 to CPU1 using FRAME0:
1. In the Resource Allocator configuration, create a new `Cdd_PwmAllocatedInstance` under the CPU1 Context
2. Set **InstanceName** to `EPWM1`
3. Set **Frame** to `FRAME0`
4. The **BaseAddr** will be automatically calculated as `EPWM1_BASE_FRAME(0U)`
5. The **XlinkBaseAddr** will be automatically calculated as `EPWM1XLINK_BASE_FRAME(0U)`
6. Optionally configure **DebugHaltEnabled** and **StandbyModeEnabled**
```text
Resource Allocator Configuration:
├── Context (Core: CPU1)
│ └── Cdd_Pwm
│ ├── Cdd_PwmAllocatedInstance
│ │ ├── InstanceName: EPWM1
│ │ ├── Frame: FRAME0
│ │ ├── BaseAddr: EPWM1_BASE_FRAME(0U) [auto-calculated]
│ │ ├── XlinkBaseAddr: EPWM1XLINK_BASE_FRAME(0U) [auto-calculated]
│ │ ├── DebugHaltEnabled: true
│ │ └── StandbyModeEnabled: true
│ └── CddPwmHrpwmCalInstance
│ ├── InstanceName: HRPWMCAL1
│ ├── Frame: FRAME0
│ └── BaseAddr: HRPWMCAL1_BASE_FRAME(0U) [auto-calculated]
```
### Configuration
The Cdd_Pwm Driver implementation supports one configuration variant Pre-Compile config. The driver expects generated Cdd_Pwm_Cfg.h to be present as input file.
The associated Cdd_Pwm driver configuration generated source files are Cdd_Pwm_Cfg.c
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files.
#### Configuration Parameters
##### CddPwmConfigSet
This container contains the configuration parameters and sub containers of the AUTOSAR Pwm instance.
###### CddPwmAdvancedMode
| Item ||
|--------|---------------|
| **Name** | CddPwmAdvancedMode |
| **Description** | Enables/disables the advanced mode for the PWM driver. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddPwmHwUnitConfig
Configuration of an individual PWM instance.
###### CddPwmInstance
| Item ||
|--------|---------------|
| **Name** | CddPwmInstance |
| **Description** | Pwm hardware instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
###### CddPwmHwId
| Item ||
|--------|---------------|
| **Name** | CddPwmHwId |
| **Description** | Symbolic ID of the PWM instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
###### CddPwmEmulationMode
| Item ||
|--------|---------------|
| **Name** | CddPwmEmulationMode |
| **Description** | Emulation mode for the EPWM instance. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_PWM_EMULATION_STOP_AFTER_NEXT_TB |
| **Range** | CDD_PWM_EMULATION_STOP_AFTER_NEXT_TB
CDD_PWM_EMULATION_STOP_AFTER_FULL_CYCLE
CDD_PWM_EMULATION_FREE_RUN |
###### CddPwmClockDivider
| Item ||
|--------|---------------|
| **Name** | CddPwmClockDivider |
| **Description** | Time base clock pre-scale value. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_PWM_CLOCK_DIVIDER_1 |
| **Range** | CDD_PWM_CLOCK_DIVIDER_1
CDD_PWM_CLOCK_DIVIDER_2
CDD_PWM_CLOCK_DIVIDER_4
CDD_PWM_CLOCK_DIVIDER_8
CDD_PWM_CLOCK_DIVIDER_16
CDD_PWM_CLOCK_DIVIDER_32
CDD_PWM_CLOCK_DIVIDER_64
CDD_PWM_CLOCK_DIVIDER_128 |
###### CddPwmHighSpeedClockDivider
| Item ||
|--------|---------------|
| **Name** | CddPwmHighSpeedClockDivider |
| **Description** | High speed clock divider for the PWM instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_PWM_HSCLOCK_DIVIDER_1 |
| **Range** | CDD_PWM_HSCLOCK_DIVIDER_1
CDD_PWM_HSCLOCK_DIVIDER_2
CDD_PWM_HSCLOCK_DIVIDER_4
CDD_PWM_HSCLOCK_DIVIDER_6
CDD_PWM_HSCLOCK_DIVIDER_8
CDD_PWM_HSCLOCK_DIVIDER_10
CDD_PWM_HSCLOCK_DIVIDER_12
CDD_PWM_HSCLOCK_DIVIDER_14 |
###### CddPwmFrequency
| Item ||
|--------|---------------|
| **Name** | CddPwmFrequency |
| **Description** | This parameter defines the frequency of the PWM instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1.0E8 |
| **Max-value** | 2.0E8 |
| **Min-value** | 55803.0 |
###### CddPwmInterruptEnable
| Item ||
|--------|---------------|
| **Name** | CddPwmInterruptEnable |
| **Description** | Enables/disables the interrupt for the PWM instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddPwmInterruptCategory
| Item ||
|--------|---------------|
| **Name** | CddPwmInterruptCategory |
| **Description** | This parameters defines the category of the interrupt. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ISR_CAT1_RTINT |
| **Range** | ISR_CAT1_INT
ISR_CAT1_RTINT
ISR_CAT2_INT |
###### CddPwmInterruptNotification
| Item ||
|--------|---------------|
| **Name** | CddPwmInterruptNotification |
| **Description** | Definition of the callback function. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddPwmTripZoneInterruptEnable
| Item ||
|--------|---------------|
| **Name** | CddPwmTripZoneInterruptEnable |
| **Description** | Enables/disables the trip zone interrupt for the PWM instance. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddPwmTripZoneInterruptCategory
| Item ||
|--------|---------------|
| **Name** | CddPwmTripZoneInterruptCategory |
| **Description** | This parameters defines the category of the interrupt. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | ISR_CAT1_RTINT |
| **Range** | ISR_CAT1_INT
ISR_CAT1_RTINT
ISR_CAT2_INT |
###### CddPwmTripZoneNotification
| Item ||
|--------|---------------|
| **Name** | CddPwmTripZoneNotification |
| **Description** | Definition of the trip zone's callback function. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddPwmOutputClass
| Item ||
|--------|---------------|
| **Name** | CddPwmOutputClass |
| **Description** | Class of PWM Channel. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_PWM_VARIABLE_PERIOD |
| **Range** | CDD_PWM_FIXED_PERIOD
CDD_PWM_VARIABLE_PERIOD |
###### CddPwmDefaultPeriod
| Item ||
|--------|---------------|
| **Name** | CddPwmDefaultPeriod |
| **Description** | Value of period used for Initialization. This value will be written into the TBPRD register |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CddPwmSymmetry
| Item ||
|--------|---------------|
| **Name** | CddPwmSymmetry |
| **Description** | This parameter defines the symmetry of the generated waveform. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_PWM_ASYMMETRIC_WAVEFORM |
| **Range** | CDD_PWM_ASYMMETRIC_WAVEFORM
CDD_PWM_SYMMETRIC_WAVEFORM |
###### CddPwmInstanceRef
| Item ||
|--------|---------------|
| **Name** | CddPwmInstanceRef |
| **Description** | Reference to the PWM instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddPwmMcuClockReferencePoint
| Item ||
|--------|---------------|
| **Name** | CddPwmMcuClockReferencePoint |
| **Description** | This parameter contains reference to the McuClockReferencePoint |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddPwmOutputChannel
Configuration of output channel A or B.
###### CddPwmChannel
| Item ||
|--------|---------------|
| **Name** | CddPwmChannel |
| **Description** | Defines the output channel for the PWM instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_PWM_OUTPUT_A |
| **Range** | CDD_PWM_OUTPUT_A
CDD_PWM_OUTPUT_B |
###### CddPwmPolarity
| Item ||
|--------|---------------|
| **Name** | CddPwmPolarity |
| **Description** | Defines the starting polarity of the PWM channel. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_PWM_LOW |
| **Range** | CDD_PWM_HIGH
CDD_PWM_LOW |
###### CddPwmIdleState
| Item ||
|--------|---------------|
| **Name** | CddPwmIdleState |
| **Description** | The parameter PWM_IDLE_STATE represents the output state of the channel after the signal is stopped (e.g.call of Pwm_SetOutputToIdle). |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_PWM_LOW |
| **Range** | CDD_PWM_HIGH
CDD_PWM_LOW |
###### CddPwmDefaultDutyCycle
| Item ||
|--------|---------------|
| **Name** | CddPwmDefaultDutyCycle |
| **Description** | Value of duty cycle used for Initialization |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 16384 |
| **Max-value** | 32768 |
| **Min-value** | 0 |
###### CddPwmDefaultDutyCycleInPercentage
| Item ||
|--------|---------------|
| **Name** | CddPwmDefaultDutyCycleInPercentage |
| **Description** | This parameter defines the configured duty cycle in percentage. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 50.0 |
| **Max-value** | 100.0 |
| **Min-value** | 0.0 |
###### CddPwmXlinkConfig
Xlink configuration for a frame.
###### CddPwmXlinkId
| Item ||
|--------|---------------|
| **Name** | CddPwmXlinkId |
| **Description** | Xlink symbolic ID. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
###### CddPwmXlinkInstanceRef
| Item ||
|--------|---------------|
| **Name** | CddPwmXlinkInstanceRef |
| **Description** | Reference to the xlink instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddPwmLinkHwUnit
Xlink configuration for a frame.
###### CddPwmHwUnit
| Item ||
|--------|---------------|
| **Name** | CddPwmHwUnit |
| **Description** | Link Pwm hardware instance to enable XLINK for the instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddPwmHrpwmCalibrationConfig
Hrpwm calibration instance configuration for a frame.
###### CddPwmHrpwmCalConfig
Hrpwm calibration instance configuration for a frame.
###### CddPwmHrpwmCalInstanceId
| Item ||
|--------|---------------|
| **Name** | CddPwmHrpwmCalInstanceId |
| **Description** | Hrpwm Calibration symbolic ID. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
###### CddPwmHrpwmCalInstanceRef
| Item ||
|--------|---------------|
| **Name** | CddPwmHrpwmCalInstanceRef |
| **Description** | Reference to the hrpwm calibration instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
##### CddPwmGeneral
General configuration (parameters) of the PWM Driver software module.
###### CddPwmDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | CddPwmDevErrorDetect |
| **Description** | Switches the development error detection on or off. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddPwmDeInitApi
| Item ||
|--------|---------------|
| **Name** | CddPwmDeInitApi |
| **Description** | Adds / removes the service Cdd_Pwm_DeInit() from the code. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddPwmNotificationSupported
| Item ||
|--------|---------------|
| **Name** | CddPwmNotificationSupported |
| **Description** | Switch to indicate that the notifications are supported |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddPwmVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | CddPwmVersionInfoApi |
| **Description** | Switch to indicate that the Pwm_ GetVersionInfo is supported |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddPwmSetDutyCycle
| Item ||
|--------|---------------|
| **Name** | CddPwmSetDutyCycle |
| **Description** | Adds / removes the service Cdd_Pwm_SetDutyCycle() from the code. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddPwmSetOutputToIdle
| Item ||
|--------|---------------|
| **Name** | CddPwmSetOutputToIdle |
| **Description** | Adds / removes the service Cdd_Pwm_SetOutputToIdle() from the code. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddPwmSetPeriod
| Item ||
|--------|---------------|
| **Name** | CddPwmSetPeriod |
| **Description** | Adds / removes the service Cdd_Pwm_SetPeriod() from the code. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
#### Steps To Configure Cdd_Pwm Module
1. Open EB Tresos configurator tool, load Cdd_Pwm module. Only Precompile Config Variant is supported.
2. Configure the required parameters.
3. By default the EPWMCLKDIV is set to 2 (this divides the SYSCLK by 2), to modify the value ASPath:/TI_F29H85x/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClkConfig/McuEpwmClkDiv parameter in the Mcu plugin should be modified.
4. Run the unattended wizard with calculated values enabled to show the updated calculated values.
5. Save the module and click on generate to generate the configuration files.
6. Click on generate_SWC-T to generate the BSWMD arxml file
### Examples
The example applications demonstrate the use of Cdd_Pwm module. The following examples are available:
#### Cdd_Pwm_Example_Chopper
##### Overview Of Cdd_Pwm_Example_Chopper
* Cdd_Pwm_Example_Chopper (Advanced mode)
* DeviceSupport_Init()
* EcuM_Init()
* -Initialize FLASH if the example is run in FLASH mode
* EcuM_Init()
* -Initialize clock to 100 MHz using Mcu_Init()
* -Initialize pins with Port_Init()
* -Initialize Cdd_Pwm driver using Cdd_Pwm_Init()
* Configure Cdd_Pwm hardware using Cdd_Pwm_ConfigureHw() as follows
* -EPWM1 with Chopper disabled (Reference)
* -EPWM2 with chopper enabled at 1/8 duty cycle and 3.12 MHz frequency at 100MHz TBCLK (divide by 4)
* -EPWM3 with chopper enabled at 6/8 duty cycle and 3.12 MHz frequency at 100MHz TBCLK (divide by 4)
* -EPWM4 with chopper enabled at 6/8 duty cycle, 3.12 MHz frequency at 100MHz TBCLK (divide by 4) with
* One-Shot Pulse enabled. Oneshot pulse width is 400 ns at 100MHz EPWMCLK.
* EPWM waveforms can be observed on the respective pins configured in EPWM mode
* -GPIO0 EPWM1A
* -GPIO1 EPWM1B
* -GPIO2 EPWM2A
* -GPIO3 EPWM2B
* -GPIO4 EPWM3A
* -GPIO5 EPWM3B
* -GPIO27 EPWM4A
* -GPIO28 EPWM4B
##### Setup required to run Cdd_Pwm_Example_Chopper example
* Connect the pins configured for EPWM as per the example description to the LA to observe generated waveform.
* Power the board and run the example
* Open serial console to observe print statements of the example
##### How to run Cdd_Pwm_Example_Chopper example
* Open CCS and import Cdd_Pwm_Example_Chopper Example
* Build project and start debug project
##### Sample Log of Cdd_Pwm_Example_Chopper example
```{literalinclude} Assets/text/Cdd_Pwm/F29H85x/Cdd_Pwm_Example_Chopper.txt
```
#### Cdd_Pwm_Example_Cmpss_Trip
##### Overview Of Cdd_Pwm_Example_Cmpss_Trip
* Cdd_Pwm_Example_Cmpss_Trip (Advanced mode)
* This example enables the CMPSS1 COMPH comparator and feeds the asynchronous signal CTRIPH to GPIO1/CDD_PWM1B. CMPSS is configured to trip the PWM signals.
* The positive pin of the CMPSS is used to give positive input and internal DAC in CMPSS is configured to feed the negative pin. The DAC is configured to provide a signal at VDD/2.
* When a low signal (VSS) is provided to positive pin of CMPSS1, PWM signal comes out on GPIO1.
* When a high signal (greater than VDD/2) is provided to positive pin of CMPSS1, the PWM signal at GPIO1 trips and goes high.
* Example is configured such that PWM coming at GPIO0 will remain unaffected.
* DeviceSupport_Init()
* Initialize FLASH if the example is run in FLASH mode
* EcuM_Init()
* Initialize clock to 100 MHz using Mcu_Init()
* Initialize pins in CDD_PWM mode with Port_Init()
* Initialize Cdd_Pwm driver using Cdd_Pwm_Init()
* Configure Cdd_Pwm hardware using Cdd_Pwm_ConfigureHw()
* Configure CMPSS module using Cmpss_Init()
* Feed pin B0 (pin 12 on HSEC) to VSS or to a signal greater than VDD/2 to observe the behaviour
* CDD_PWM waveform can be observed on the respective pins configured in CDD_PWM mode
* External Connections:
* GPIO0 CDD_PWM1A
* GPIO1 CDD_PWM1B
* Positive pin of CMPSS is at B0 pin (Pin 12 of HSEC board)
##### Setup required to run Cdd_Pwm_Example_Cmpss_Trip example
* Connect the pins configured for EPWM as per the example description to the LA to observe generated waveform.
* Power the board and run the example
* Open serial console to observe print statements of the example
##### How to run Cdd_Pwm_Example_Cmpss_Trip example
* Open CCS and import Cdd_Pwm_Example_Cmpss_Trip Example
* Build project and start debug project
##### Sample Log of Cdd_Pwm_Example_Cmpss_Trip example
```{literalinclude} Assets/text/Cdd_Pwm/F29H85x/Cdd_Pwm_Example_Cmpss_Trip.txt
```
#### Cdd_Pwm_Example_DC_EventFilter
##### Overview Of Cdd_Pwm_Example_DC_EventFilter
* Cdd_Pwm_Example_DC_EventFilter (Advanced mode)
* DeviceSupport_Init()
* -Initialize FLASH if the example is run in FLASH mode
* EcuM_Init()
* -Initialize clock to 100 MHz using Mcu_Init()
* -Initialize pins with Port_Init()
* -Initialize Cdd_Pwm driver using Cdd_Pwm_Init()
* Configure Cdd_Pwm hardware using Cdd_Pwm_ConfigureHw() to configure EPWM1 as follows
* -EPWM1 with DCAEVT1 forcing the EPWM output LOW
* -GPIO12 is used as the input to the INPUT XBAR INPUT2
* -INPUT2 (from INPUT XBAR) is used as the source for DCAEVT1
* -GPIO12's PULL-UP resistor is enabled, in order to test the trip, PULL this pin to GND using Dio_WriteChanel API
* -DCAEVT1 uses the filtered version of DCAEVT1
* -The DCFILT signal uses the blanking window to ignore the DCAEVT1 for the duration of DC Blanking window
*
* -EPWM1 with DCBEVT1 forcing the EPWM output LOW
* -GPIO12 is used as the input to the INPUT XBAR INPUT2
* -INPUT2 (from INPUT XBAR) is used as the source for DCBEVT1
* -GPIO12's PULL-UP resistor is enabled, in order to test the trip, PULL this pin to GND using Dio_WriteChanel API
*
* DCAEVT1 & DCBEVT1 events are configured to force to LOW when the trip occurs on the TRIP2 input.
* Trip input is pulled LOW which triggers LOW state on both the EPWM outputs and notifications are expected.
* Blanking window is increased to test event filtering.
* Trip input is pulled to LOW during the blanking window. Only EPWMB waveform should be affected by this and
* 0 notifications are expected.
* Disable blanking window.
* Trip input is pulled to LOW, both output waveforms should be affected by this and notifications are expected.
* Print notification counts in sequence to track the events.
* EPWM waveform can be observed on the respective pins configured in EPWM mode
* \b External \b Connections \n
* -GPIO0 EPWM1A
* -GPIO1 EPWM1B
* -GPIO12 --> TRIPIN2. This pin is pulled LOW using DIO to trip the EPWM.
##### Setup required to run Cdd_Pwm_Example_DC_EventFilter example
* Connect the pins configured for EPWM as per the example description to the LA to observe generated waveform.
* Power the board and run the example
* Open serial console to observe print statements of the example
##### How to run Cdd_Pwm_Example_DC_EventFilter example
* Open CCS and import Cdd_Pwm_Example_DC_EventFilter Example
* Build project and start debug project
##### Sample Log of Cdd_Pwm_Example_DC_EventFilter example
```{literalinclude} Assets/text/Cdd_Pwm/F29H85x/Cdd_Pwm_Example_DC_EventFilter.txt
```
#### Cdd_Pwm_Example_Deadband
##### Overview Of Cdd_Pwm_Example_Deadband
* Cdd_Pwm_Example_Deadband (Advanced mode)
* DeviceSupport_Init()
* -Initialize FLASH if the example is run in FLASH mode
* EcuM_Init()
* -Initialize clock to 100 MHz using Mcu_Init()
* -Initialize pins with Port_Init()
* -Initialize Cdd_Pwm driver using Cdd_Pwm_Init()
* Initialize EPWM instances using Cdd_Pwm_ConfigureHw()
* -EPWM1 with Deadband disabled (Reference)
* -EPWM2 with Deadband Active High
* -EPWM3 with Deadband Active Low
* -EPWM4 with Deadband Active High Complimentary
* -EPWM7 with Deadband Active Low Complimentary
* Track the output waveforms for 1 second and disable all notifications and interrupts.
* Print the notification counts to track the notification count for each EPWM instance.
* -GPIO0 EPWM1A
* -GPIO1 EPWM1B
* -GPIO2 EPWM2A
* -GPIO3 EPWM2B
* -GPIO4 EPWM3A
* -GPIO5 EPWM3B
* -GPIO27 EPWM4A
* -GPIO28 EPWM4B
* -GPIO12 EPWM7A
* -GPIO13 EPWM7B
##### Setup required to run Cdd_Pwm_Example_Deadband example
* Connect the pins configured for EPWM as per the example description to the LA to observe generated waveform.
* Power the board and run the example
* Open serial console to observe print statements of the example
##### How to run Cdd_Pwm_Example_Deadband example
* Open CCS and import Cdd_Pwm_Example_Deadband Example
* Build project and start debug project
##### Sample Log of Cdd_Pwm_Example_Deadband example
```{literalinclude} Assets/text/Cdd_Pwm/F29H85x/Cdd_Pwm_Example_Deadband.txt
```
#### Cdd_Pwm_Example_DiodeEmulation
##### Overview Of Cdd_Pwm_Example_DiodeEmulation
* Cdd_Pwm_Example_DiodeEmulation (Advanced mode)
* DeviceSupport_Init()
* -Initialize FLASH if the example is run in FLASH mode
* EcuM_Init()
* -Initialize clock to 100 MHz using Mcu_Init()
* -Initialize pins with Port_Init()
* -Initialize Cdd_Pwm driver using Cdd_Pwm_Init()
* -Configure Cdd_Pwm hardware using Cdd_Pwm_ConfigureHw() to configure EPWM instances as follows
* Diode Emulation configuration:
* -For EPWM1 A & B outputs the AQ actions are configured to HIGH & LOW respectively.
* And the diode emulation trip signals are set to opposite of the configured polarities respectively,
* EPWM1A is set to HIGH and EPWM1B set to LOW during DE
* -For EPWM2 A & B outputs the AQ actions are configured to LOW & HIGH respectively.
* And the diode emulation trip signals are set to opposite of the configured polarities respectively,
* EPWM2A is set to LOW and EPWM2B set to HIGH during DE
* -EPWM1 & EPWM2 are configured in one-shot diode emulation mode,
* Force diode emulation active flag to enter diode emulation mode
* -EPWM3 is configured same as EPWM1 but in CBC(cycle-by-cycle) DE mode
* Force diode emulation active flag to enter diode emulation mode
* In the Cycle-by-cycle clear mode, trip condition is evaluated on every EPWMxSYNCPER and if the
* trip condition is not present, then DEACTIVE flag is cleared (exiting of DE mode)
* Force diode emulation active flag for both EPWM1 & EPWM2 and wait until EPWM1 & EPWM2 outputs are changed to the
* configured state (EPWM1A to HIGH, EPWM1B to LOW, EPWM2A to LOW & EPWM2B to HIGH).
* Clear active diode emulation flags for both EPWM1 & EPWM2 instances to exit DE mode.
* Force diode emulation active flag for EPWM1
* Wait until EPWM1 enters the DE mode and check if the EPWM2 has entered the DE mode.
* The execution will stay in the loop if the expected condition is not achieved.
* Clear active diode emulation flags for both EPWM1 to exit DE mode.
* Force diode emulation active flag for EPWM3
* Wait until EPWM3 outputs are changed to the configured state (EPWM3A to HIGH & EPWM3B to LOW).
* Wait until the CBC clear the active flag and the EPWM instance exits the DE mode.
* EPWM waveform and DE intput trip signals can be monitored on the respective pins configured
* -GPIO0 EPWM1A
* -GPIO1 EPWM1B
* -GPIO2 EPWM2A
* -GPIO3 EPWM2B
* -GPIO4 EPWM3A
* -GPIO5 EPWM3B
##### Setup required to run Cdd_Pwm_Example_DiodeEmulation example
* Connect the pins configured for EPWM as per the example description to the LA to observe generated waveform.
* Power the board and run the example
* Open serial console to observe print statements of the example
##### How to run Cdd_Pwm_Example_DiodeEmulation example
* Open CCS and import Cdd_Pwm_Example_DiodeEmulation Example
* Build project and start debug project
##### Sample Log of Cdd_Pwm_Example_DiodeEmulation example
```{literalinclude} Assets/text/Cdd_Pwm/F29H85x/Cdd_Pwm_Example_DiodeEmulation.txt
```
#### Cdd_Pwm_Example_GlobalLoad_And_Link
##### Overview Of Cdd_Pwm_Example_GlobalLoad_And_Link
* Cdd_Pwm_Example_GlobalLoad_And_Link (Advanced mode)
* DeviceSupport_Init()
* -Initialize FLASH if the example is run in FLASH mode
* EcuM_Init()
* -Initialize clock to 100 MHz using Mcu_Init()
* -Initialize pins with Port_Init()
* -Initialize Cdd_Pwm driver using Cdd_Pwm_Init() to enable XLINK for the EPWM instances
* -Cdd_Pwm_ConfigureHw() as follows
* -For EPWM1 enable notification and linking
* -For EPWM2 enable global load and linking. TBCTR = Period is the configured global load trigger and the event
* prescale is configured to 7.
* -For EPWM3 enable linking
* -For EPWM7 enable linking
* -Configure prescaler, compare values and action qualifier actions using linking
* Laod a period value to all EPWM instances using XLINK. This period value results in 50% duty cycle for all the
* EPWM OUTPUT A channels.
* Counter compare values are updated at 3rd period event for EPWM 1 & 2 instances. The configured
* global load event prescale is 7. So, the update in the compare compare values(shadow to active at 3rd period event)
* can be observed in only EPWM1 instances.
* Update in the compare compare values(shadow to active at 7rd period event) can be observed in both EPWM1 & EPWM2 instances.
* As a result, the duty cycle of the EPWM1 instance will jump from 50% to 25% and then to 25%.
* But EPWM2 instance will jump from 50% to 20% while EPWM3 & EPWM7 instances maintain their duty cycles at 50%.
* Wait for 1 second and update the compare B value for all the EPWM instances using linking.
* With the latest compare B value, the duty cycle of EPWM3 & EPWM7's OUTPUT A will jump to 75%.
* Duty cycle of EPWM1 & EPWM2's channel A will jump to 75%.
* Print the notification count to of all EPWM instances.
* -GPIO0 EPWM1A
* -GPIO2 EPWM2A
* -GPIO4 EPWM3A
* -GPIO27 EPWM4A
##### Setup required to run Cdd_Pwm_Example_GlobalLoad_And_Link example
* Connect the pins configured for EPWM as per the example description to the LA to observe generated waveform.
* Power the board and run the example
* Open serial console to observe print statements of the example
##### How to run Cdd_Pwm_Example_GlobalLoad_And_Link example
* Open CCS and import Cdd_Pwm_Example_GlobalLoad_And_Link Example
* Build project and start debug project
##### Sample Log of Cdd_Pwm_Example_GlobalLoad_And_Link example
```{literalinclude} Assets/text/Cdd_Pwm/F29H85x/Cdd_Pwm_Example_GlobalLoad_And_Link.txt
```
#### Cdd_Pwm_Example_Hrpwm
##### Overview Of Cdd_Pwm_Example_Hrpwm
* Cdd_Pwm_Example_Hrpwm (Advanced mode)
* DeviceSupport_Init()
* Initialize FLASH if the example is run in FLASH mode
* EcuM_Init()
* Initialize clock to 100 MHz using Mcu_Init()
* Initialize pins with Port_Init()
* Initialize Cdd_Pwm driver using Cdd_Pwm_Init()
* Configure Cdd_Pwm hardware using Cdd_Pwm_ConfigureHw() as follows
* EPWM1 with HRPWM disabled(for reference)
* EPWM2 with HRPWM enabled (for both A & B channels MEP edge is configured as FALLING EDGE)
* Print the notification count of all EPWM instances.
* EPWM waveform can be observed on the respective pins configured in EPWM mode
* GPIO0 EPWM1A
* GPIO1 EPWM1B
* GPIO2 EPWM2A
* GPIO3 EPWM2B
##### Setup required to run Cdd_Pwm_Example_Hrpwm example
* Connect the pins configured for EPWM as per the example description to the LA to observe generated waveform.
* Power the board and run the example
* Open serial console to observe print statements of the example
##### How to run Cdd_Pwm_Example_Hrpwm example
* Open CCS and import Cdd_Pwm_Example_Hrpwm Example
* Build project and start debug project
##### Sample Log of Cdd_Pwm_Example_Hrpwm example
```{literalinclude} Assets/text/Cdd_Pwm/F29H85x/Cdd_Pwm_Example_Hrpwm.txt
```
#### Cdd_Pwm_Example_TripZone
##### Overview Of Cdd_Pwm_Example_TripZone
* Cdd_Pwm_Example_TripZone (Advanced mode)
* DeviceSupport_Init()
* -Initialize FLASH if the example is run in FLASH mode
* EcuM_Init()
* -Initialize clock to 100 MHz using Mcu_Init()
* -Initialize pins with Port_Init()
* -Initialize Cdd_Pwm driver using Cdd_Pwm_Init()
* Configure Cdd_Pwm hardware using Cdd_Pwm_ConfigureHw() to configure EPWM1 as follows
* -EPWM1 with no trip zone configuration (reference)
* -EPWM2 with trip zone enabled in one-shot mode
* -EPWM3 with trip zone enabled in CBC(cycle-by-cycle) mode
* Pull Dio channel(GPIO 12) to LOW to trip the EPWM2 & EPWM3 instances
* EPWM2 is configured in one-shot mode so the flags must be cleared manually but for EPWM3 which is in CBC the flags are automatically cleared at the end of the cycle if the trip condition doesn't apply anymore.
* Pull back the Dio channel(GPIO 12) to HIGH to resume the normal operation
* The change in the output waveforms can be tracked with a logic analyzer
* -EPWM1A is on GPIO0
* -EPWM2A is on GPIO2
* -EPWM3B is on GPIO5
* -TZ1 is on GPIO12 and is linked to Dio Channel 0
* This example also makes use of the Input X-BAR. GPIO12 (the external trigger) is routed to the input X-BAR, from which it is routed to TZ1.
* The TZ-Event is defined such that EPWM1 will undergo a One-Shot Trip and EPWM2 will undergo a Cycle-By-Cycle Trip.
``` text
_____________ __________________
| | | |
GPIO12 -----| I/P X-BAR |-----TZ1-----| EPWM TZ Module |-----TZ-Event
|___________| |________________|
```
##### Setup required to run Cdd_Pwm_Example_TripZone example
* Connect the pins configured for EPWM as per the example description to the LA to observe generated waveform.
* Connect a switch to the configured trip zone input pin.
* Power the board and run the example
* Open serial console to observe print statements of the example
##### How to run Cdd_Pwm_Example_TripZone example
* Open CCS and import Cdd_Pwm_Example_TripZone Example
* Build project and start debug project
##### Sample Log of Cdd_Pwm_Example_TripZone example
```{code-block}
Executing Cdd_Pwm_Example_TripZone example
Number of trip zone interrupts detected for EPWM2 before trip are 0
Number of trip zone interrupts detected for EPWM2 are 3
Waveforms can be observed on the configured EPWM pins
Cdd_Pwm_Example_TripZone example executed successfully
```
#### Cdd_Pwm_Example_UpCountMode
##### Overview Of Cdd_Pwm_Example_UpCountMode
* Cdd_Pwm_Example_UpCountMode (Simple mode)
* DeviceSupport_Init()
* -Initialize FLASH if the example is run in FLASH mode
* EcuM_Init()
* -Initialize clock to 100 MHz using Mcu_Init()
* -Initialize pins with Port_Init()
* -Initialize Cdd_Pwm driver using Cdd_Pwm_Init()
* Enable channel A rising edge notifications for both the PWM instances
* Set the all the outputs to IDLE with Cdd_Pwm_SetOutputToIdle API
* Activate the channels and change the duty cycle of the waveform with Cdd_Pwm_SetDutyCycle() API
* and observe the change in the generated PWM output waveform Set PWM1 outputs to IDLE with
* Cdd_Pwm_SetOutputToIdle API Activate the channels & period of the channels associated to PWM1
* instance with Cdd_Pwm_SetPeriod() API and observe the change in the frequency of the generated output waveforms
* EPWM waveform can be observed on the respective pins configured in EPWM mode
* -GPIO0 EPWM1A
* -GPIO1 EPWM1B
* -GPIO2 EPWM2A
* -GPIO3 EPWM2B
##### Setup required to run Cdd_Pwm_Example_UpCountMode example
* Connect the pins configured for EPWM as per the example description to the LA to observe generated waveform.
* Power the board and run the example
* Open serial console to observe print statements of the example
##### How to run Cdd_Pwm_Example_UpCountMode example
* Open CCS and import Cdd_Pwm_standard Example
* Build project and start debug project
##### Sample Log of Cdd_Pwm_Example_UpCountMode example
```{code-block}
Executing Cdd_Pwm_Example_UpCountMode example
The duty cycles of the EPWM1 & EPWM2 channels have been modified
The notification count for EPWM1 instance after calling Cdd_Pwm_SetDutyCycle API is 120
The notification count for EPWM2 instance after calling Cdd_Pwm_SetDutyCycle API is 2428
All the EPWM1 & EPWM2 channels in IDLE state
The notification count for EPWM1 instance after calling Cdd_Pwm_SetDutyCycle API is 122
The notification count for EPWM2 instance after calling Cdd_Pwm_SetDutyCycle API is 2444
The frequency of EPWM1 has been doubled(period halved)
The duty cycle of the EPWM2 channels have been modified
Time elapsed in US(microsecond) from when the notification is enabled until Deinit is 3452090
Number of rising edges detected for EPWM1 are 322
Number of edges detected for EPWM2 are 4465
Waveforms can be observed on the configured EPWM pins
Cdd_Pwm_Example_UpCountMode executed successfully
```
#### Cdd_Pwm_Example_XCmp_MultipleEdges
##### Overview Of Cdd_Pwm_Example_XCmp_MultipleEdges
* Cdd_Pwm_Example_XCmp_MultipleEdges (Advanced mode)
* DeviceSupport_Init()
* -Initialize FLASH if the example is run in FLASH mode
* EcuM_Init()
* -Initialize clock to 100 MHz using Mcu_Init()
* -Initialize pins with Port_Init()
* -Initialize Cdd_Pwm driver using Cdd_Pwm_Init()
* Configure Cdd_Pwm hardware using Cdd_Pwm_ConfigureHw() as follows
* -EPWM1A is allocated all XCMP1-8 registers. EPWM1B has no output.
* -No Shadow registers used
* -EPWM2A is allocated XCMP1-4 and EPWM2B is allocated XCMP5-8 registers.
* -Configured in LOAD ONCE mode and the XCMP values are updated every period with a new shadow buffer set
* -Shadow level is set to 3
* -EPWM3A is allocated XCMP1-4 and EPWM2B is allocated XCMP5-8 registers.
* -Configured in LOAD MULTIPLE mode. Repeat count is configured for SHD buffer set 3 & 2.
* The SHDBUF ptr is set to 3 again after 16 periods.
* -Shadow level is set to 3
* EnableXLoad trigger the XCMP mode
* Print the notification count for each EPWM instance
* Track the changes in the waveforn with a logic analyzer
* EPWM waveform can be observed on the respective pins configured in EPWM mode
* -GPIO0 EPWM1A
* -GPIO1 EPWM1B
* -GPIO2 EPWM2A
* -GPIO3 EPWM2B
* -GPIO4 EPWM3A
* -GPIO5 EPWM3B
##### Setup required to run Cdd_Pwm_Example_XCmp_MultipleEdges example
* Connect the pins configured for EPWM as per the example description to the LA to observe generated waveform.
* Power the board and run the example
* Open serial console to observe print statements of the example
##### How to run Cdd_Pwm_Example_XCmp_MultipleEdges example
* Open CCS and import Cdd_Pwm_Example_XCmp_MultipleEdges Example
* Build project and start debug project
##### Sample Log of Cdd_Pwm_Example_XCmp_MultipleEdges example
```{code-block}
Executing Cdd_Pwm_Example_XCmp_MultipleEdges example
EPWM1 has split XCMP disabled
EPWM2 is set to LOAD ONCE XCMP mode
EPWM3 is set to LOAD MULTIPLE XCMP mode
Enable XCMP load for all EPWM instances
Number of interrupts detected for EPWM2 are 2000
Number of interrupts detected for EPWM3 are 2000
Waveforms can be observed on the configured EPWM pins
Cdd_Pwm_Example_XCmp_MultipleEdges example executed successfully
```
#### File Structure
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂Can\
┃ ┣ 📂Cdd_Adc\
┃ ┣ 📂Cdd_Ecap\
┃ ┣ 📂Cdd_Ipc\
┃ ┣ 📂**Cdd_Pwm**\
┃ ┃ ┣ 📂**Cdd_Pwm_Example_UpCountMode**\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜**Cdd_Pwm_Example_UpCountMode.projectspec**\
┃ ┃ ┃ ┣ Cdd_Pwm_Example_UpCountMode_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Pwm.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port.xdm\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Pwm_Cfg.h** : *Contains the generated pre-compiler build variant configuration header file*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Pwm_Cfg.c** : *Contains the Pre-compile build variant configuration parameters.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBcfg.c\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜**Cdd_Pwm_Example_UpCountMode.c** : *Example application for Cdd_Pwm.*\
┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Cdd_Sent\
┃ ┣ 📂Cdd_Uart\
┃ ┣ 📂Cdd_Xbar\
┃ ┣ 📂DeviceSupport\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂Lin\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┣ 📂Spi\
┃ ┣ 📂Wdg\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
## CDD SENT Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|SENT|Single Edge Nibble Transmission|
|API|Application Programming Interface|
|BSW|Basic Software|
|ECU|Electronic Control Unit|
|DET|Default Error Tracer|
|HW |Hardware|
|SW |Software|
|I/O|Input/Output|
|MCAL|Micro Controller Abstraction Layer|
|RTE|Runtime Environment|
|CDD|Complex Device Driver|
|MTP|Master Pulse Trigger|
|GPIO|General Purpose Input Output|
### Introduction
SENT stands for Single Edge Nibble Transmission. The SENT protocol is unidirectional and uses single wire between two or more points to transmit signals from one or more sensors to a controller. This protocol can transmit high resolution data at a low cost to the system. The SENT module utilizes a Master Trigger Pulse Generator to control and receive data from one or more sensors, using a configurable pulse signal. The received data can be stored directly into memory or a FIFO and read by the CPU or RTDMA.
SENT driver is part of complex device drivers which receive the data from the sensors and send the RX indication, support both fast channel and slow channel.
```{figure} Assets/images/Cdd_Sent_Autosar_MCAL.png
:alt: CDD_SENT MCAL AUTOSAR
:align: center
CDD_SENT MCAL AUTOSAR
```
This document details AUTOSAR BSW CDD_SENT module implementation
|Supported AUTOSAR Release|**4.3.1**|
|------|-------------|
| **Supported Configuration Variants** | **Pre-Compile**|
| **Vendor ID** | **CDD_SENT_VENDOR_ID (44)**|
| **Module ID** | **CDD_SENT_MODULE_ID (255)**|
### Functional Overview
F29X supports two modes of the SENT :
**Standard SENT**:
* This supports only one sensor per the instance.
* Sensors will be automatically sends the data, no triggering required from the ECU/coordinator.
**MTP** ( Master Trigger Pulse ):
* This supports up to 4 sensors + broadcast.
* Sensors sends the data only after master triggers the corresponding pulse of the sensor.
* For triggering the pulse, there are 10 comparators which can be configured to different pulse widths.
**Sent Integration with AUTOSAR Communication stack**
Sent is communication protocol implemented in the Cdd Sent driver. Similar to other communication protocols such as Can/Lin/Flexray, Sent can also be integrated with AUTOSAR communication stack.
Cdd Sent is a driver. This driver can directly act as a lower layer module for PduR without needing an interface layer in between. Integration of Cdd Sent driver with AUTOSAR com stack is optional and can be enabled by configuration parameter CddSentIntegrationWithAsrComStackEnable. When it is enabled, Cdd Sent driver is responsible to call the receive indication to PduR and PduR is responsible to call transmit function to Cdd Sent. In order to achieve this, correct handle Ids should be configured in both Cdd Sent and PduR. Please refer to the explanation of Cdd_Sent_Transmit() and PduR_Cdd_Sent_RxIndication() in Cdd Sent driver.
### Hardware Features
#### Hardware Features supported
The SENT module includes the following features:
* Based on SAE J2716 (J2716 January 2010 and J2716 April 2016)
* Supports 2007 and 2010 CRC checksum calculation
* Fast channel receiver
* Slow channel receiver
1. Short serial message (8-bit data and 4-bit message ID)
2. Enhanced serial 12-bit message (12-bit data and 8-bit message ID)
3. Enhanced serial 12-bit message (12-bit data and 8-bit message ID)
* Master Trigger Pulse Generator (MTPG) enables multiple sensors for the same SENT bus
* Receiver and Interrupt Features
1. Programmable glitch filter on input (with bypass mode available)
2. Automatic detection of CRC error and framing error on Fast Channel Data
3. Automatic detection of CRC error and format error on Slow Channel Data
4. Option to save data received with error
5. Configurable number of data nibbles to receive (1 - 8)
6. FIFO support for received data frames
* Error Detection Supported:
1. Timeout
2. Calibration
3. FIFO Overflow/Underflow
4. Frequency Drift
5. Overflow Trigger Request
6. Time stamp captures for received
* Configurable memory depth
* Time stamp captures for received data frames
* 5 SENT channels that can each be set to be triggered by one of 63 trigger sources
* Nibble sorting to minimize CPU intervention
```{figure} Assets/images/Cdd_Sent_Block_Diagram.png
:alt: Cdd_Sent Block diagram
:align: center
Cdd_Sent Block Diagram
```
#### Not supported Features
* DMA
#### Non compliance
None
### Source files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂Can\
┃ ┣ 📂**Cdd_Sent**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Cdd_Sent.h** : *Contains the API declarations of the Cdd_Sent driver to be used by upper layers.*\
┃ ┃ ┃ ┣ 📜**Cdd_Sent_Priv.h** : *Contains data structures and Internal function declarations.*\
┃ ┃ ┃ ┗ 📜**Cdd_Sent_Reg_Access.h** : *Contains the MACROs for Cdd_Sent register access.*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Cdd_Sent.c** : *Contains the implementation of the API for Cdd_Sent driver.*\
┃ ┃ ┃ ┣ 📜**Cdd_Sent_Irq.c** : *Contains the implementation for Cdd_Sent interrupts handlers.*\
┃ ┃ ┃ ┗ 📜**Cdd_Sent_Priv.c** : *Contains Functions that support the API for Cdd_Sent driver*\
┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂hw_include\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Mcu\
┃ ┗ 📂Port\
┣ 📂examples\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{figure} Assets/images/Cdd_Sent_Header_File_Structure.png
:alt: Cdd_Sent Header File Structure
:align: center
Cdd_Sent Header File Structure
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Scheduling
None
#### Error handling
##### Development Error Reporting
Development errors are reported to the DET using the service Det_ReportError(), when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
##### Extended Production Error Reporting
Extended production errors are reported to the DEM using the service Dem_SetEventStatus(),
when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
#### Error codes
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|API called with a NULL_PTR|CDD_SENT_E_PARAM_POINTER|0x20U|
|API service invoked with invalid channel|CDD_SENT_E_PARAM_CHANNEL|0x21U|
|API service for initialization called when already initialized|CDD_SENT_E_ALREADY_INITIALIZED|0x22U|
|API invoked without performing module initialization|CDD_SENT_E_UNINIT|0x23U|
### Safety Mechanism
|TI Diagnostic Unique Identifier| Summary | Description |
|------------|-----------------|----------------|
|SENT4|FIFO Data Overflow Detection| Error detection are notified to user and Reported to DEM |
|SENT5|FIFO Data Underflow Detection| Error detection are notified to user and Reported to DEM |
|SENT6|SENT CRC Framing Checks|Error detection are notified to user and Reported to DEM |
|SENT7|SENT Fast Channel Framing Checks|Error detection are notified to user and Reported to DEM |
|SENT8|SENT Slow Channel Framing Checks|Error detection are notified to user and Reported to DEM |
|SENT9|SENT Standard Frame Watchdog|Error detection are notified to user and Reported to DEM |
|SENT10|SENT Synchronous Frame Watchdog|Error detection are notified to user and Reported to DEM |
|SENT11|SENT Synchronization Pulse Length Error Detection|Error detection are notified to user and Reported to DEM |
|SENT12|SENT Frequency Drift Error Detection|Error detection are notified to user and Reported to DEM |
|SENT13|SENT Synchronous Channel Overflow Trigger Detection|Error detection are notified to user and Reported to DEM |
|SENT15|SENT Frame Glitch Filter|Error detection are notified to user and Reported to DEM |
```{NOTE}
More details of Safety Mechanisms can be found in Safety Manual.
```
### Used resources
#### Interrupt Handling
Cdd_Sent driver provides ISR. The interrupt vector lines to be used is configurable in Cdd_Sent driver.
The ISR functionality is implemented in the file Cdd_Sent_Irq.c.
|Cdd_Sent Instance| Interrupt Name | Interrupt handler|
|------------|----------------|-----------------|
|SENT1| SENT1_INT | Cdd_Sent_1_ISR|
|SENT2| SENT2_INT | Cdd_Sent_2_ISR|
|SENT3| SENT3_INT | Cdd_Sent_3_ISR|
|SENT4| SENT4_INT | Cdd_Sent_4_ISR|
|SENT5| SENT5_INT | Cdd_Sent_5_ISR|
|SENT6| SENT6_INT | Cdd_Sent_6_ISR|
```{Note}
Same Interrupt Category needs to be configured in both Cdd_Sent and OS Modules.
```
#### Instance support
|CPU instances|supported|
|-------|-------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
#### Hardware-Software Mapping
Below image shows Cdd_Sent driver Hardware-Software mapping. For more information related to HW/SW mapping, refer the F29x Reference Manual.
```{figure} Assets/images/Cdd_Sent_Hw_Sw_Mapping.png
:alt: Cdd_Sent HW/SW Mapping
:align: center
Cdd_Sent HW/SW Mapping
```
### Integration description
#### Dependent modules
##### PduR
The PDU Router module provides services for routing of routing Protocol Data Units(I-PDUs) between various communication modules, ensuring seamless data transfer across different communication protocols.When the Cdd_Sent module receives sensor data, it encapsulates the data into PDUs and sends them to the PduR with PDU id's. The PduR then routes these PDUs to the appropriate higher-layer modules. User need to configure configure PDUs in ECUC. Cdd_Sent will generate symbolic names for those PDUs in Cdd_Sent module.
```{Note}
* Symbolic names are used to call PduR receive indication.
* Symbolic name template follows : "PduRConf_PduRSrcPdu_PduRSrcPdu_{PduName}"
* PduName is the symbolic name configured in EcuC->Pdu Container.
* PduRSrcPdu_PduName must be the name of source PDU configuration container in PduR routing table.[As a result PduR will generate symbolic name “PduRConf_PduRSrcPdu_PduRSrcPdu_PduName”]
```
##### DET
This implementation depends on the DET in order to report development errors.
The detection of development errors is configurable (ON / OFF), The switch CDD_SENT_CFG_DEV_ERROR_DETECT will activate or deactivate the detection of all development errors.
##### DEM
This implementation depends on the DEM in order to report Extended production errors and can be turned OFF. The switch CDD_SENT_CFG_DEM_ENABLE will activate or deactivate the detection of all extended production errors. If hardware failure notification is enabled in the configuration set and a hardware source failure error occurs, the error code CDD_E_HARDWARE_ERROR shall be reported.
##### MCU
MCU Module is required to initialize all the clock to be used by different peripherals.
##### Port
The Port module configures the port pins used for the SENT driver as input. Hence, the Port driver has to be initialized prior to the use of SENT functions. Otherwise
Cdd_Sent driver functions will exhibit undefined behavior.
##### OS
The Cdd_Sent driver uses interrupts and therefore there is a dependency on the OS, which configures the interrupt sources.
#### Resource Allocator
The SENT module uses the Resource Allocator to allocate SENT peripheral instances to CPU cores and configure their memory-mapped base addresses. Each allocation is placed inside a **Context** that maps to a CPU core (e.g. `CPU1`). The **CurrentContext** parameter in the Resource Allocator selects which Context is active for MCAL execution. See the [Resource Allocator Module User Guide](Module_User_Guide_ResourceAllocator.md) for details on configuring device-specific settings.
The **Frame** parameter (`FRAME0`–`FRAME3`) selects the memory-mapped frame for the instance, enabling simultaneous access from different initiators without arbitration stalls. The **BaseAddr** is auto-calculated based on the selected instance and frame. The **DebugHaltEnabled** and **StandbyModeEnabled** parameters control peripheral behaviour during CPU debug halt and standby low-power modes respectively.
##### Resource Allocator Usage Example
To allocate SENT1 to CPU1 using FRAME0:
1. In the Resource Allocator configuration, create a new Sent instance allocation under the CPU1 Context
2. Set **InstanceName** to `SENT1`
3. Set **Frame** to `FRAME0`
4. The **BaseAddr** will be automatically calculated as `SENT1_BASE_FRAME(0U)`
5. Optionally configure **DebugHaltEnabled** and **StandbyModeEnabled**
```text
Resource Allocator Configuration:
├── Context (Core: CPU1)
│ └── Cdd_SentAllocatedInstance
│ ├── InstanceName: SENT1
│ ├── Frame: FRAME0
│ ├── BaseAddr: SENT1_BASE_FRAME(0U) [auto-calculated]
│ ├── DebugHaltEnabled: true
│ └── StandbyModeEnabled: true
```
### Configuration
The Cdd_Sent Driver implementation supports one configuration variant Pre-Compile config. The driver expects generated Cdd_Sent_Cfg.h to be present as input file.
The associated Cdd_Sent driver configuration generated source files are Cdd_Sent_Cfg.c
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files.
#### Configuration Parameters
##### CddSentConfig
This container contains the configuration parameters and sub containers of the CddSent module.
###### CddSentController
This container contains the configuration parameters of the CddSent HW units.
###### CddSentBaseAddress
| Item ||
|--------|---------------|
| **Name** | CddSentBaseAddress |
| **Description** | Specifies the CddSent HW unit base address. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | SENT1_BASE_FRAME(0) |
###### CddSentHWUnitId
| Item ||
|--------|---------------|
| **Name** | CddSentHWUnitId |
| **Description** | This parameter provides the HW unit ID which is unique in a given CddSent Driver. The value for this parameter starts with 0 and continue without any gaps. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 5 |
| **Min-value** | 0 |
###### CddSentClockTick
| Item ||
|--------|---------------|
| **Name** | CddSentClockTick |
| **Description** | This parameter is for setting the clock tick for the CddSent in Use |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 600 |
| **Min-value** | 0 |
###### CddSentInterruptType
| Item ||
|--------|---------------|
| **Name** | CddSentInterruptType |
| **Description** | Defines the interrupt type. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_SENT_ISR_CAT2 |
| **Range** | CDD_SENT_ISR_CAT1_RTINT
CDD_SENT_ISR_CAT1_INT
CDD_SENT_ISR_CAT2 |
###### CddSentCRCType
| Item ||
|--------|---------------|
| **Name** | CddSentCRCType |
| **Description** | CddSent CRC type selection. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_SENT_CRC_RECOMENDED_2010 |
| **Range** | CDD_SENT_CRC_LEGACY_2007
CDD_SENT_CRC_RECOMENDED_2010
CDD_SENT_CRC_NONE |
###### CddSentCRCWidth
| Item ||
|--------|---------------|
| **Name** | CddSentCRCWidth |
| **Description** | CddSent CRC Width selection. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_SENT_CRC_4_BIT |
| **Range** | CDD_SENT_CRC_4_BIT
CDD_SENT_CRC_6_BIT
CDD_SENT_CRC_8_BIT |
###### CddSentCRCWithStatus
| Item ||
|--------|---------------|
| **Name** | CddSentCRCWithStatus |
| **Description** | Enable/Disable CRC with status.. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_SENT_CRC_WITH_STATUS |
| **Range** | CDD_SENT_CRC_WITH_STATUS
CDD_SENT_CRC_WITHOUT_STATUS |
###### CddSentDataNibblesCount
| Item ||
|--------|---------------|
| **Name** | CddSentDataNibblesCount |
| **Description** | number of data nibbles expected |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_SENT_6_DATA_NIBBLES |
| **Range** | CDD_SENT_1_DATA_NIBBLES
CDD_SENT_2_DATA_NIBBLES
CDD_SENT_3_DATA_NIBBLES
CDD_SENT_4_DATA_NIBBLES
CDD_SENT_5_DATA_NIBBLES
CDD_SENT_6_DATA_NIBBLES
CDD_SENT_7_DATA_NIBBLES
CDD_SENT_8_DATA_NIBBLES |
###### CddSentFIFOTriggerLevel
| Item ||
|--------|---------------|
| **Name** | CddSentFIFOTriggerLevel |
| **Description** | FIFO trigger level expected |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_SENT_TRIGLEV6 |
| **Range** | CDD_SENT_TRIGDISABLE
CDD_SENT_TRIGLEV3
CDD_SENT_TRIGLEV4
CDD_SENT_TRIGLEV5
CDD_SENT_TRIGLEV6
CDD_SENT_TRIGLEV7
CDD_SENT_TRIGLEV8
CDD_SENT_TRIGLEV9
CDD_SENT_TRIGLEV10
CDD_SENT_TRIGLEV11
CDD_SENT_TRIGLEV12
CDD_SENT_TRIGLEV13
CDD_SENT_TRIGLEV14
CDD_SENT_TRIGLEV15
CDD_SENT_TRIGLEV16 |
###### CddSentUserCallbackFunction
| Item ||
|--------|---------------|
| **Name** | CddSentUserCallbackFunction |
| **Description** | Call back function for the data |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddSentUserErrorCallbackFunction
| Item ||
|--------|---------------|
| **Name** | CddSentUserErrorCallbackFunction |
| **Description** | Call back function for the error |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddSentSyncTimeout
| Item ||
|--------|---------------|
| **Name** | CddSentSyncTimeout |
| **Description** | This parameter is for setting Timeout for receiving the synchronization pulse |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### CddSentGlitchFilter
| Item ||
|--------|---------------|
| **Name** | CddSentGlitchFilter |
| **Description** | This parameter is for number of SYSCLKS that the received serial data input is filtered by |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 5 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### CddSentMTP
| Item ||
|--------|---------------|
| **Name** | CddSentMTP |
| **Description** | Enable/disable MTP functionality. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddSentGlobalWaitTime
| Item ||
|--------|---------------|
| **Name** | CddSentGlobalWaitTime |
| **Description** | This parameter is for delay time between the last frame received to the new master trigger pulse to be generated |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 256 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CddSentAcceptErrorData
| Item ||
|--------|---------------|
| **Name** | CddSentAcceptErrorData |
| **Description** | Accept error data or not. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddSentEnableTimeStamp
| Item ||
|--------|---------------|
| **Name** | CddSentEnableTimeStamp |
| **Description** | Enable/disable Time stamping. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddSentInstanceRef
| Item ||
|--------|---------------|
| **Name** | CddSentInstanceRef |
| **Description** | Selects CddSent HW unit Instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddSentCpuClockRef
| Item ||
|--------|---------------|
| **Name** | CddSentCpuClockRef |
| **Description** | Reference to the CPU clock configuration, which is set in the MCU driver configuration |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddSentChannelObject
This container contains the configuration parameters of the CddSent channel object
###### CddSentSensorType
| Item ||
|--------|---------------|
| **Name** | CddSentSensorType |
| **Description** | selection of sensor types |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_SENT_CHANNEL_STANDARD_SENSOR |
| **Range** | CDD_SENT_CHANNEL_STANDARD_SENSOR
CDD_SENT_CHANNEL_SENSOR_1
CDD_SENT_CHANNEL_SENSOR_2
CDD_SENT_CHANNEL_SENSOR_3
CDD_SENT_CHANNEL_SENSOR_4 |
###### CddSentChannelType
| Item ||
|--------|---------------|
| **Name** | CddSentChannelType |
| **Description** | selection of channel types |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_SENT_CHANNEL_STANDARD_SENSOR_FAST_CHANNEL |
| **Range** | CDD_SENT_CHANNEL_STANDARD_SENSOR_FAST_CHANNEL
CDD_SENT_CHANNEL_SENSOR_1_FAST_CHANNEL
CDD_SENT_CHANNEL_SENSOR_2_FAST_CHANNEL
CDD_SENT_CHANNEL_SENSOR_3_FAST_CHANNEL
CDD_SENT_CHANNEL_SENSOR_4_FAST_CHANNEL
SHORT_SERIAL_ENHANCED_SERIAL_12BIT_SLOW_CHANNEL
ENHANCED_SERIAL_16BIT_SLOW_CHANNEL |
###### CddSentChannelObjectID
| Item ||
|--------|---------------|
| **Name** | CddSentChannelObjectID |
| **Description** | This parameter will be used when CddSentIntegrationWithAsrComStackEnable is disabled. This channel object identifier will be used in configured receive callback function to address the received object from respective sensor. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CddSentMessageID
| Item ||
|--------|---------------|
| **Name** | CddSentMessageID |
| **Description** | This parameter is the message id |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 1 |
| **Max-value** | 255 |
| **Min-value** | 1 |
###### CddSentPduID
| Item ||
|--------|---------------|
| **Name** | CddSentPduID |
| **Description** | This parameter will be used when CddSentIntegrationWithAsrComStackEnable is enabled. This Pdu identifier will be used in receive function callback to PduR to address the received Pdu from respective sensor. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddSentExternalDeviceConfig
This container contains the configuration parameters of the CddSent MTP triggers.
###### CddSentMTPSensorType
| Item ||
|--------|---------------|
| **Name** | CddSentMTPSensorType |
| **Description** | selection of MTP sensor type |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_SENT_CHANNEL_SENSOR_1 |
| **Range** | CDD_SENT_CHANNEL_BROADCAST
CDD_SENT_CHANNEL_SENSOR_1
CDD_SENT_CHANNEL_SENSOR_2
CDD_SENT_CHANNEL_SENSOR_3
CDD_SENT_CHANNEL_SENSOR_4 |
###### CddSentSensorTriggerSource
| Item ||
|--------|---------------|
| **Name** | CddSentSensorTriggerSource |
| **Description** | selection of channel types |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | DISABLE |
| **Range** | DISABLE
BROADCAST_DONE
SENSOR_1_DONE
SENSOR_2_DONE
SENSOR_3_DONE
SENSOR_4_DONE
CPU1_TINT0
CPU1_TINT1
CPU1_TINT2
CPU2_TINT0
CPU2_TINT1
CPU2_TINT2
CPU3_TINT0
CPU3_TINT1
CPU3_TINT2
INPUTXBAR5
INPUTXBAR11
INPUTXBAR12
INPUTXBAR13
INPUTXBAR14
INPUTXBAR15
INPUTXBAR16
EPWM1_ADCSOCA
EPWM1_ADCSOCB
EPWM2_ADCSOCA
EPWM2_ADCSOCB
EPWM3_ADCSOCA
EPWM3_ADCSOCB
EPWM4_ADCSOCA
EPWM4_ADCSOCB
EPWM5_ADCSOCA
EPWM5_ADCSOCB
EPWM6_ADCSOCA
EPWM6_ADCSOCB
EPWM7_ADCSOCA
EPWM7_ADCSOCB
EPWM8_ADCSOCA
EPWM8_ADCSOCB
EPWM9_ADCSOCA
EPWM9_ADCSOCB
EPWM10_ADCSOCA
EPWM10_ADCSOCB
EPWM11_ADCSOCA
EPWM11_ADCSOCB
EPWM12_ADCSOCA
EPWM12_ADCSOCB
EPWM13_ADCSOCA
EPWM13_ADCSOCB
EPWM14_ADCSOCA
EPWM14_ADCSOCB
EPWM15_ADCSOCA
EPWM15_ADCSOCB
EPWM16_ADCSOCA
EPWM16_ADCSOCB
EPWM17_ADCSOCA
EPWM17_ADCSOCB
EPWM18_ADCSOCA
EPWM18_ADCSOCB
ECAP1_SOC
ECAP2_SOC
ECAP3_SOC
ECAP4_SOC
ECAP5_SOC
ECAP6_SOC |
###### CddSentMTPSensorEnable
| Item ||
|--------|---------------|
| **Name** | CddSentMTPSensorEnable |
| **Description** | Accept PArticular MTP channel. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddSentMTPSensorCompare1
| Item ||
|--------|---------------|
| **Name** | CddSentMTPSensorCompare1 |
| **Description** | The time (inclock tick unit) of the Channel's Master Trigger Pulse Generator output to be toggled. No toggle if TOGGLETIME = 0. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1023 |
| **Min-value** | 0 |
###### CddSentMTPSensorCompare2
| Item ||
|--------|---------------|
| **Name** | CddSentMTPSensorCompare2 |
| **Description** | the time (inclock tick unit) of the Channel's Master Trigger Pulse Generator output to be toggled.For non-zero TOGGLETIME, it has to be larger than CddSentMTPSensorCompare1, No toggle if TOGGLETIME = 0. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1023 |
| **Min-value** | 0 |
###### CddSentMTPSensorCompare3
| Item ||
|--------|---------------|
| **Name** | CddSentMTPSensorCompare3 |
| **Description** | the time (inclock tick unit) of the Channel's Master Trigger Pulse Generator output to be toggled.For non-zero TOGGLETIME, it has to be larger than CddSentMTPSensorCompare2, No toggle if TOGGLETIME = 0. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1023 |
| **Min-value** | 0 |
###### CddSentMTPSensorCompare4
| Item ||
|--------|---------------|
| **Name** | CddSentMTPSensorCompare4 |
| **Description** | the time (inclock tick unit) of the Channel's Master Trigger Pulse Generator output to be toggled.For non-zero TOGGLETIME, it has to be larger than CddSentMTPSensorCompare3, No toggle if TOGGLETIME = 0. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1023 |
| **Min-value** | 0 |
###### CddSentMTPSensorCompare5
| Item ||
|--------|---------------|
| **Name** | CddSentMTPSensorCompare5 |
| **Description** | the time (inclock tick unit) of the Channel's Master Trigger Pulse Generator output to be toggled.For non-zero TOGGLETIME, it has to be larger than CddSentMTPSensorCompare4, No toggle if TOGGLETIME = 0. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1023 |
| **Min-value** | 0 |
###### CddSentMTPSensorCompare6
| Item ||
|--------|---------------|
| **Name** | CddSentMTPSensorCompare6 |
| **Description** | the time (inclock tick unit) of the Channel's Master Trigger Pulse Generator output to be toggled.For non-zero TOGGLETIME, it has to be larger than CddSentMTPSensorCompare5, No toggle if TOGGLETIME = 0. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1023 |
| **Min-value** | 0 |
###### CddSentMTPSensorCompare7
| Item ||
|--------|---------------|
| **Name** | CddSentMTPSensorCompare7 |
| **Description** | the time (inclock tick unit) of the Channel's Master Trigger Pulse Generator output to be toggled.For non-zero TOGGLETIME, it has to be larger than CddSentMTPSensorCompare6, No toggle if TOGGLETIME = 0. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1023 |
| **Min-value** | 0 |
###### CddSentMTPSensorCompare8
| Item ||
|--------|---------------|
| **Name** | CddSentMTPSensorCompare8 |
| **Description** | the time (inclock tick unit) of the Channel's Master Trigger Pulse Generator output to be toggled.For non-zero TOGGLETIME, it has to be larger than CddSentMTPSensorCompare7, No toggle if TOGGLETIME = 0. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1023 |
| **Min-value** | 0 |
###### CddSentMTPSensorCompare9
| Item ||
|--------|---------------|
| **Name** | CddSentMTPSensorCompare9 |
| **Description** | the time (inclock tick unit) of the Channel's Master Trigger Pulse Generator output to be toggled.For non-zero TOGGLETIME, it has to be larger than CddSentMTPSensorCompare8, No toggle if TOGGLETIME = 0. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1023 |
| **Min-value** | 0 |
###### CddSentMTPSensorCompare10
| Item ||
|--------|---------------|
| **Name** | CddSentMTPSensorCompare10 |
| **Description** | the time (inclock tick unit) of the Channel's Master Trigger Pulse Generator output to be toggled.For non-zero TOGGLETIME, it has to be larger than CddSentMTPSensorCompare9, No toggle if TOGGLETIME = 0. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1023 |
| **Min-value** | 0 |
###### CddSentMTPSensorPeriod
| Item ||
|--------|---------------|
| **Name** | CddSentMTPSensorPeriod |
| **Description** | the total time (inclock tick unit) mater trigger pulse output waveform is active. The CddSentMTPSensorPeriod must be larger than all Channel CddSentMTPSensorCompare10 value. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 1023 |
| **Min-value** | 0 |
###### CddSentMTPSensorTimeout
| Item ||
|--------|---------------|
| **Name** | CddSentMTPSensorTimeout |
| **Description** | The parameter CddSentMTPSensorTimeout indicates a time to initiate an interrupt if the sent receiver has not received responce |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 4294967295 |
| **Min-value** | 0 |
###### CddSentExternalDeviceID
| Item ||
|--------|---------------|
| **Name** | CddSentExternalDeviceID |
| **Description** | This parameter will be used when CddSentIntegrationWithAsrComStackEnable is disabled. This device identifier will be used in transmit function to address the respective sensor. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CddSentMTPSensorPduID
| Item ||
|--------|---------------|
| **Name** | CddSentMTPSensorPduID |
| **Description** | This parameter will be used when CddSentIntegrationWithAsrComStackEnable is enabled. This Pdu identifier will be used in transmit function to address the respective sensor. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddSentFIFOInterrupts
| Item ||
|--------|---------------|
| **Name** | CddSentFIFOInterrupts |
| **Description** | Valid data interrupts |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddSentSlowChannelInterrupts
| Item ||
|--------|---------------|
| **Name** | CddSentSlowChannelInterrupts |
| **Description** | Valid data interrupts |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddSentFastChannelCRCErrorInterrupts
| Item ||
|--------|---------------|
| **Name** | CddSentFastChannelCRCErrorInterrupts |
| **Description** | Valid data interrupts |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddSentFastChannelFrameErrorInterrupts
| Item ||
|--------|---------------|
| **Name** | CddSentFastChannelFrameErrorInterrupts |
| **Description** | Valid data interrupts |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddSentTimeoutErrorInterrupts
| Item ||
|--------|---------------|
| **Name** | CddSentTimeoutErrorInterrupts |
| **Description** | Valid data interrupts |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddSentOverflowErrorInterrupts
| Item ||
|--------|---------------|
| **Name** | CddSentOverflowErrorInterrupts |
| **Description** | Valid data interrupts |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddSentSyncErrorInterrupts
| Item ||
|--------|---------------|
| **Name** | CddSentSyncErrorInterrupts |
| **Description** | Valid data interrupts |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
##### CddComStackContribution
Contribution of COM Stack modules.
###### CddPduRLowerLayerContribution
Parameters that are necessary for the configuration of a Complex Driver that serves as the LowerLayer of the Pdu Router module.
###### CddPduRLowerLayerRxPdu
This container specifies Rx PDUs that are exchanged between the CDD and the standardized BSW module.
###### CddPduRApiType
| Item ||
|--------|---------------|
| **Name** | CddPduRApiType |
| **Description** | This parameter configures the type of the CDD interface (IF/TP) |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | IF |
| **Range** | IF |
###### CddPduRLowerLayerHandleId
| Item ||
|--------|---------------|
| **Name** | CddPduRLowerLayerHandleId |
| **Description** | ECU wide unique, symbolic handle for the Pdu. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CddSentPduRHandle
| Item ||
|--------|---------------|
| **Name** | CddSentPduRHandle |
| **Description** | CddSentPduRHandle is a symbolic name of the Pdu with which Cdd_Sent module invokes the receive indication for upper layer. User can modify this parameter to match with the symbolic name used by upper layer. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL |
###### CddPduRLowerLayerPduRef
| Item ||
|--------|---------------|
| **Name** | CddPduRLowerLayerPduRef |
| **Description** | Reference to the "global" Pdu structure to allow harmonization of handle IDs in the COM-Stack. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddPduRLowerLayerTxPdu
This container specifies Tx PDUs that are exchanged between the CDD and the standardized BSW module.
###### CddPduRApiType
| Item ||
|--------|---------------|
| **Name** | CddPduRApiType |
| **Description** | This parameter configures the type of the CDD interface (IF/TP) |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | IF |
| **Range** | IF |
###### CddPduRLowerLayerHandleId
| Item ||
|--------|---------------|
| **Name** | CddPduRLowerLayerHandleId |
| **Description** | ECU wide unique, symbolic handle for the Pdu. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | AUTOSAR_ECUC |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 65535 |
| **Min-value** | 0 |
###### CddPduRLowerLayerPduRef
| Item ||
|--------|---------------|
| **Name** | CddPduRLowerLayerPduRef |
| **Description** | Reference to the "global" Pdu structure to allow harmonization of handle IDs in the COM-Stack. |
| **Origin** | AUTOSAR_ECUC |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
##### CddSentGeneral
Contains the general configuration parameters of the module.
###### CddInstanceId
| Item ||
|--------|---------------|
| **Name** | CddInstanceId |
| **Description** | Specifies the InstanceId of this module instance. If only one instance is present it shall have the Id 0. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 255 |
| **Min-value** | 0 |
###### CddSentDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | CddSentDevErrorDetect |
| **Description** | Switches the development error detection and notification on or off. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddSentVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | CddSentVersionInfoApi |
| **Description** | Adds / removes the service CddSent_GetVersionInfo() from the code. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddSentIntegrationWithAsrComStackEnable
| Item ||
|--------|---------------|
| **Name** | CddSentIntegrationWithAsrComStackEnable |
| **Description** | This parameter is used to enable the integration of Cdd Sent module with Autosar Com Stack. 0: Cdd Sent module is not integrated with Autosar Com stack. Transmission and Reception will be handled via Application Cdd or wrapper. 1: Cdd Sent module is integrated as lower module to PduR in Autosar Com stack. Transmission and Reception will be handled via Com Stack i.e. to and from PduR. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
##### CddSentDemEventParameterRefs
| Item ||
|--------|---------------|
| **Name** | CddSentDemEventParameterRefs |
| **Description** | Container for the references to DemEventParameter elements which shall be invoked using the API Dem_SetEventStatus in case the corresponding error occurs. The EventId is taken from the referenced DemEventParameter's DemEventId symbolic value. The standardized errors are provided in this container and can be extended by vendor-specific error references. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Post-build-variant-multiplicity** | false |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
```{Note}
For non-zero TOGGLETIME, it has to be larger than previous compare register.
```
#### Steps To Configure Cdd_Sent Module
1. Open EB Tresos configurator tool, load Cdd_Sent module. Select the Precompile Config Variant.
2. Configure the required parameters.
3. Save the configuration and generate the configuration.
### Examples
The example application demonstrates use of Cdd_Sent module, the list below identifies key steps performed in the example.
#### Cdd_Sent_standard
##### Overview Of Cdd_Sent_standard
* Cdd_Sent_standard
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init()
* Initializes pins as GPIO Outputs and GPIO Inputs using Port_Init()
* Initializes Cdd_Sent driver using Cdd_Sent_Init()
* Verification of Cdd_Sent standard mode feature functionality
##### Setup required to run Cdd_Sent_standard
* Connect the hardware, sensors and power up
* Connect the uart set up to check the log on serial console
Below image shows the hardware connections that needs to be done to run the example.
```{figure} Assets/images/Sent_Hardware_Setup.png
:alt: Cdd_Sent HW Setup
:align: center
Cdd_Sent HW Setup
```
##### How to run Cdd_Sent_standard
* Open CCS and import Cdd_Sent_standard Example
* Build project and start debug project
##### Sample Log of Cdd_Sent_standard
```{literalinclude} Assets/text/Cdd_Sent/F29H85x/Cdd_Sent_standard_Log.txt
```
##### How to run Cdd_Sent_MtpMode
* Open CCS and import Cdd_Sent_MtpMode Example
* Build project and start debug project
##### Sample Log of Cdd_Sent_MtpMode
```{literalinclude} Assets/text/Cdd_Sent/F29H85x/Cdd_Sent_MTP_Log.txt
```
#### Cdd_Sent_Mtp_ExternalTrigger_Source
##### Overview of Cdd_Sent_Mtp_ExternalTrigger_Source
* Cdd_Sent_Mtp_ExternalTrigger_Source
* This example reads data from an MTP sensor with external trigger source using SENT communication protocol
* Sensor details:
* Product Type: TLE5014C16D
* Marking: 014CD
* Sensor Type: SPC Interface
* The sensor sends out a signal made up of a string of pulses with data encoded as falling to falling edge periods
* The modulated signal with constant amplitude voltage evaluates the time interval between two falling edges (a single edge) delivered in units of 4 bits (1 nibble), representing values from 0 to 15
* This example configures SENT module to receive 4 Data-nibble per frame for fast channel
* DeviceSupport_Init()
* EcuM_Init()
* Initialize clock using Mcu_Init()
* Initialize pins with Port_Init()
* Initialize Cdd_Sent driver using Cdd_Sent_Init()
* Trigger sensor with Sent Handle ID using Cdd_Sent_Transmit()
* Enable GPT notifications and start timer with 1s timeout
* Wait for data reception and verify external trigger behavior
* Stop timer and trigger sensor again
* Receive and display data from fast and slow channels via callback
* Deinitialize GPT and Cdd_Sent drivers
* External Connections:
* Connect GPIO18 to sensor's SENT channel 4 pin
##### Setup required to run Cdd_Sent_Mtp_ExternalTrigger_Source
* Connect the hardware and power up
* Connect the UART setup to check the log on serial console
* Connect GPIO18 to the sensor's SENT channel 4 pin
##### How to run Cdd_Sent_Mtp_ExternalTrigger_Source
* Open CCS and import Cdd_Sent_Mtp_ExternalTrigger_Source
* Build project and start debug project
##### Sample Log of Cdd_Sent_Mtp_ExternalTrigger_Source
```{literalinclude} Assets/text/Cdd_Sent/F29H85x/Cdd_Sent_Mtp_ExternalTrigger_Source_Log.txt
```
#### File Structure
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂Can\
┃ ┣ 📂Cdd_Adc\
┃ ┣ 📂**Cdd_Sent**\
┃ ┃ ┣ 📂**Cdd_Sent_MtpMode**\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜**Cdd_Sent_MtpMode.projectspec**\
┃ ┃ ┃ ┣ 📂Cdd_Sent_MtpMode_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Sent.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port.xdm\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Sent_Cbk.h** : *Contains the exported function prototypes*\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Sent_Cfg.h** : *Contains the generated pre-compiler configuration header*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Sent_Cfg.c** : *Contains the Pre-compile build configuration parameters.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBcfg.c\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜**Cdd_Sent_MtpMode.c** : * MTP Mode Example application for Cdd_Sent.*\
┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┗ 📂**Cdd_Sent_standard**\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜**Cdd_Sent_Standard.projectspec**\
┃ ┃ ┃ ┣ 📂Cdd_Sent_Standard_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Sent.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port.xdm\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Sent_Cbk.h** : *Contains the exported function prototypes*\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Sent_Cfg.h** : *Contains the generated pre-compiler configuration header*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Sent_Cfg.c** : *Contains the Pre-compile build configuration parameters.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBcfg.c\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜**Cdd_Sent_Standard.c** : * Standard Mode Example application for Cdd_Sent.*\
┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Cdd_Xbar\
┃ ┣ 📂DeviceSupport\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂Lin\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┣ 📂Spi\
┃ ┣ 📂Wdg\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
## CDD XBAR Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|CDD|Complex Device Driver|
|XBAR|Crossbar|
|MCAL|Micro Controller Abstraction Layer|
|CLB|Configurable Logic Block|
|ePWM|Enhanced Pulse Width Modulation|
|MINDB|Minimum Dead-band|
|ICL|Illegal Combo Logic|
|API|Application Programming Interface|
|DET|Default Error Tracer|
|HW|Hardware|
|SW|Software|
|AUXSIG|Auxiliary Input|
### Introduction
The CDD Xbar driver is a Complex Device Driver that provides services to connect device inputs, outputs, and internal resources in a variety of configurations.
```{figure} Assets/images/CDD_XBAR_AUTOSAR_MCAL.png
:alt: CDD XBAR MCAL AUTOSAR
:align: center
Cdd Xbar MCAL AUTOSAR
```
This document details AUTOSAR Cdd Xbar module implementation
| Supported AUTOSAR Release | **4.3.1** |
|--------------------------------------|------------------------------|
| **Supported Configuration Variants** | **Pre-Compile** |
| **Vendor ID** | **CDD_DMA_VENDOR_ID (44)** |
| **Module ID** | **CDD_DMA_MODULE_ID (255)** |
### Functional Overview
The CDD Xbar driver is part of the Complex Device Driver layer(CDD). CDD Xbar is a logical connection circuitry that is used to route signals from a set of inputs to several outputs. Crossbars are named based on their outputs, according to where the Xbar takes signals.
CDD Xbar, for this device, supports six categories of Crossbars:
|Crossbar Type |Description |
|--------------|----------------------------------------------------------------------------------------------------------------|
| Input X-Bar | Routes signals from a GPIO/AIO to many different IP blocks such as the ADC, eCAP, ePWM, and external interrupts|
| Output X-Bar | Routes signals from inside the device to a GPIO |
| CLB X-Bar | Routes signals to the CLB modules |
| ePWM X-Bar | Routes signals to the ePWM modules |
| MINDB X-Bar | Routes various EPWM signals and CLB outputs to the Minimum Dead-band sub-module of the ePWM |
| ICL X-Bar | Routes various EPWM signals and CLB outputs to the Illegal Combination Logic sub-module of the ePWM |
### Hardware Features
#### Hardware Features supported
Features Supported at a high level are:
* Routing signals from a set of inputs or logic HIGH or logic LOW to several outputs or IP blocks.
* Inversion of the output signal in case of Output Xbar, CLB Xbar, ePWM Xbar, MINDB Xbar and ICL Xbar.
* Locking of the input-output configurations of all Xbars.
* Routing a latched event as the output of an Output Xbar output line.
* Inversion of the output signal before latching an event in an Output Xbar output line.
* Forcing the latch of an Output Xbar output line.
* Stretching the output of an Output Xbar output line to 16 SYSCLK or 32 SYSCLK.
##### Input Xbar
Input Xbar is used to route signals from a GPIO or AIO or logic HIGH or logic LOW to many different IP blocks such as the ADC, eCAP, ePWM, and external interrupts. The input of each Input Xbar instance (INPUTx) can be any GPIO or AIO, while the output of each instance connects to various IP blocks in the device. The logic level HIGH and logic level LOW are also available as inputs to the Input Xbar. The GPIO/AIO selected by the Input Xbar can be configured as either an input or an output. The Input Xbar simply connects the signal on the input buffer to the output of the selected Input Xbar instance. The Input Xbar contains sixteen output lines denoted as INPUTx where x = 1 to 64.
```{figure} Assets/images/Cdd_Xbar_Input_XBAR.png
:width: 65%
:alt: Input Xbar architecture
:align: center
Input Xbar architecture
```
The Input Xbar provides the following features:
* **Selection of an input** : Any GPIO or AIO configured with the PORT configuration can be selected as input to the INPUTx. It also provides a feature to select LOGIC HIGH or LOGIC low as input to the INPUTx.
* **Locking of each Input Xbar instances** : The input output configurations of the each Input Xbar instance (INPUTx) can be locked. Once locked, it can be cleared only through a system reset.
###### External Interrupts (XINT) via Input Xbar
The Input Xbar provides connectivity to External Interrupts (XINT), allowing GPIO signals to trigger CPU interrupts. Specific Input Xbar output lines are hardwired to XINT interrupt sources.
**XINT Connection Mapping:**
The following Input Xbar outputs connect to external interrupt sources:
|Input Xbar Line|External Interrupt|
|---------------|------------------|
|INPUT_XBAR4|XINT1|
|INPUT_XBAR5|XINT2|
|INPUT_XBAR6|XINT3|
|INPUT_XBAR13|XINT4|
|INPUT_XBAR14|XINT5|
**XINT Configuration Features:**
When configuring an Input Xbar instance that connects to XINT, the following interrupt edge detection modes are available:
* **CDD_XBAR_INT_TYPE_DISABLED** : External interrupt is disabled (default for non-XINT Input Xbar lines)
* **CDD_XBAR_INT_TYPE_NEGATIVE_EDGE** : Interrupt triggered on falling edge
* **CDD_XBAR_INT_TYPE_POSITIVE_EDGE** : Interrupt triggered on rising edge
* **CDD_XBAR_INT_TYPE_BOTH_EDGE** : Interrupt triggered on both rising and falling edges
##### Output Xbar
The GPIO Output Xbar takes signals from inside the device and brings them out to a GPIO. The Xbar allows the selection of a single input or a logical-OR of many inputs. The Xbar contains sixteen outputs and each contains at least one position on the GPIO mux, denoted as OUTPUTXBARx. The final output is only recognized on the GPIO if the proper OUTPUTXBARx muxing options are selected using the PORT configurations.
```{figure} Assets/images/Cdd_Xbar_Output_XBAR.png
:width: 75%
:alt: Output Xbar architecture
:align: center
Output Xbar architecture
```
The Output Xbar provides the following features:
* **Selection of multiple inputs** : Multiple inputs can be configured as input to an individual OUTPUTXBARx.
* **Output stretching** : The output of the OUTPUTXBARx can be stretched to stretch length of 16 SYSCLK or 32 SYSCLK.
* **Latching of output** : The ORed output of the OUTPUTXBARx can be latched and the latched event can be used to drive the final OUTPUTXBARx. It also provides a feature the force the latched event to '1' and clear the latched event.
* **Inversion before latching** : The ORed output of the OUTPUTXBARx can be inverted before latching.
* **Inversion at the final output stage** : The output of the OUTPUTXBARx at the final output stage can be inverted.
* **Status of the ORed output** : It can indicate the status of the ORed output of OUTPUTXBARx.
* **Locking of Output Xbar** : The input output configurations of the entire Output Xbar can be locked. Once locked, it can be cleared only through a system reset.
```{Note}
For more details regarding the inputs for each OUTPUTXBARx, refer the device's TRM.
```
##### ePWM Xbar
The ePWM Xbar brings signals to the ePWM modules. Specifically, the ePWM Xbar is connected to the Digital Compare (DC) submodule of each ePWM module for actions such as tripzones and syncing. The ePWM Xbar has 16 outputs that are routed to each ePWM module. The output lines of ePWM Xbar are denoted as TRIPx where x = 1 to 16. The outputs of ePWM X-BAR from TRIP1 to TRIP 8 are connected to trips inputs 1-8 of each ePWM instance, while TRIP9-TRIP12 and TRIP14-TRIP15 are connected to trips 9-12 and trips 14-15 of each ePWM instance, respectively. Note that TRIP5 and TRIP8 are not connected to any ePWM trip source.
```{figure} Assets/images/Cdd_Xbar_ePWM_XBAR.png
:width: 75%
:alt: ePWM Xbar architecture
:align: center
ePWM Xbar architecture
```
The ePWM Xbar provides the following features:
* **Selection of multiple inputs** : Multiple inputs can be configured as input to an individual TRIPx.
* **Inversion at the final output stage** : The output of the TRIPx at the final output stage can be inverted.
* **Locking of ePWM Xbar** : The input output configurations of the entire ePWM Xbar can be locked. Once locked, it can be cleared only through a system reset.
```{Note}
* For more details regarding the inputs for each TRIPx, refer the device's TRM.
```
##### CLB Xbar
The CLB X-BAR brings signals to the CLB modules. The CLB X-BAR has eight outputs that are routed to each CLB module denoted as AUXSIGx where x = 1 to 8. There is one instance of CLB-Xbar per AUXSIG input.
```{figure} Assets/images/Cdd_Xbar_CLB_XBAR.png
:width: 75%
:alt: CLB Xbar architecture
:align: center
CLB Xbar architecture
```
The CLB Xbar provides the following features:
* **Selection of multiple inputs** : Multiple inputs can be configured as input to an individual AUXSIGx.
* **Inversion at the final output stage** : The output of the AUXSIGx at the final output stage can be inverted.
* **Locking of CLB Xbar** : The input output configurations of the entire CLB Xbar can be locked. Once locked, it can be cleared only through a system reset.
```{Note}
* For more details regarding the inputs for each AUXSIGx refer the device's TRM.
```
##### MINDB and ICL Xbar
The Illegal Combo Logic (ICL) X-BAR and Minimum Dead-band (MINDB) X-BAR are used to route various EPWM signals and CLB outputs to the Minimum Dead-band and Illegal Combination Logic sub-module of the EPWM. The MINDB Xbar has 16 outputs denoted as MINDBXBARx where x = 1 to 16. The ICL Xbar has 16 outputs denoted as ICLXBARx where x = 1 to 16.
```{figure} Assets/images/Cdd_Xbar_MINDB_ICL_XBAR.png
:width: 75%
:alt: MINDB and ICL Xbar architecture
:align: center
MINDB and ICL Xbar
```
The MINDB and ICL Xbars provides the following features:
* **Selection of multiple inputs** : Multiple inputs can be configured as input to an individual output lines.
* **Inversion at the final output stage** : The output of the MINDBXBARx and ICLXBARx at the final output stage can be inverted.
* **Locking of MINDB and ICL Xbars** : The input output configurations of the entire MINDB Xbar/ICL Xbar can be locked. Once locked, it can be cleared only through a system reset.
```{Note}
* For more details regarding the inputs for each MINDBXBARx / ICLXBARx, refer the device's TRM.
```
##### Xbar Input Flags
With the exception of the CMPSS signals, the ePWM Xbar and the Output Xbar have all of the same input signals. Due to the inputs being similar between the ePWM Xbar, CLB Xbar, and Output Xbar, all Xbar modules leverage a single set of input flags to indicate which input signals have been triggered. This allows software to check the input flags when an event occurs. There is a bit allocated for each input signal in one of the XBARFLGx registers. The flag remains set until cleared through the appropriate XBARCLRx register.
```{figure} Assets/images/Cdd_Xbar_Input_Flags.png
:width: 75%
:alt: Xbar Input Sources
:align: center
Xbar Input Sources
```
#### Not supported Features
* The output stretching, output inversion before locking, selection of latched event as output of the Output Xbar is affected by the locking of the Output Xbar, i.e., once locked these configurations cannot be changed.
#### Non compliance
None
### Source files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂Adc\
┃ ┣ 📂Can\
┃ ┗ 📂**Cdd_Xbar**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Cdd_Xbar.h** : *Contains the API declarations of the Cdd Xbar driver to be used by upper layers.*\
┃ ┃ ┃ ┗ 📜**Cdd_Xbar_Priv.h** : *Contains data structures and Internal function declarations.*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Cdd_Xbar.c** : *Contains the implementation of the API for Cdd Xbar driver.*\
┃ ┃ ┃ ┗ 📜**Cdd_Xbar_Priv.c** : *Contains Functions that support the API for Cdd Xbar driver*\
┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂hw_include\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┣ 📂Spi\
┃ ┗ 📂Wdg\
┣ 📂examples\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{figure} Assets/images/Cdd_Xbar_Header_File_Structure.png
:alt: Cdd Xbar Header File Structure
:align: center
Cdd Xbar Header File Structure
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Scheduling
None
#### Error handling
##### Development Error Reporting
Development errors are reported to the DET using the service Det_ReportError(), when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
#### Error codes
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|API called for reinitialization of already initialized crossbars.|CDD_XBAR_E_INIT_ALREADY|0x01|
|API called with invalid parameter.|CDD_XBAR_E_PARAM_VALUE|0x02|
|API called with invalid parameter pointer.|CDD_XBAR_E_PARAM_POINTER|0x03|
|API called with invalid operations on a locked crossbar.|CDD_XBAR_E_LOCK|0x04|
|API called with uninitialized driver.|CDD_XBAR_E_UNINIT|0x05|
### Used resources
#### Interrupt Handling
There are no Interrupts in Cdd Xbar
#### Instance support
|CPU instances| supported |
|-------------|-----------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
#### Hardware-Software Mapping
Below image shows Cdd Xbar driver Hardware-Software mapping. For more information related to HW/SW mapping, refer the F29x Reference Manual.
```{figure} Assets/images/Cdd_Xbar_Hw_Sw_Maping.png
:width: 75%
:alt: Cdd Xbar HW/SW Mapping
:align: center
Cdd Xbar HW/SW Mapping
```
### Integration description
#### Dependent modules
##### DET
This implementation depends on the DET in order to report development errors. The detection of development errors is configurable (ON / OFF), The switch CDD_XBAR_DEV_ERROR_DETECT will activate or deactivate the detection of all development errors.
##### PORT
PORT Module is required to initialize Pin configurations for Input Xbar inputs(GPIOs, AIOs) and OUTPUTXBARx.
##### MCU
MCU Module is required to initialize all the clock to be used by different peripherals
#### Resource Allocator
The XBAR module uses the Resource Allocator to configure crossbar resource access. The XBAR is a system-level resource that is only writable from CPU1. Because of this, the `Cdd_Xbar` container is placed at the top level of the Resource Allocator configuration — outside any CPU Context — and supports two types of allocations. See the [Resource Allocator Module User Guide](Module_User_Guide_ResourceAllocator.md) for details on configuring device-specific settings.
The **Frame** parameter (`FRAME0`–`FRAME3`) selects the memory-mapped frame, enabling simultaneous access from different initiators without arbitration stalls. The **BaseAddr** is auto-calculated based on the selected frame.
- **`CddXbarOutputXbarFlag`**: Allocates the Output XBAR flag registers.
- **`CddXbarInputFlag`**: Allocates the Input XBAR flag registers. **InstanceName** is fixed as `INPUTXBARFlags`.
##### Resource Allocator Usage Example
To configure XBAR using FRAME0:
1. In the Resource Allocator configuration, add a `Cdd_Xbar` container at the top level (outside any Context)
2. Add a `CddXbarOutputXbarFlag` entry and set **Frame** to `FRAME0`
3. Add a `CddXbarInputFlag` entry and set **Frame** to `FRAME0`
4. The **BaseAddr** values will be automatically calculated
```text
Resource Allocator Configuration:
└── Cdd_Xbar [top-level, outside Context — CPU1 only]
├── CddXbarOutputXbarFlag
│ ├── Frame: FRAME0
│ └── BaseAddr: OUTPUTXBAR1_FLAGS_BASE_FRAME(0U) [auto-calculated]
└── CddXbarInputFlag
├── InstanceName: INPUTXBARFlags [fixed]
├── Frame: FRAME0
└── BaseAddr: XBAR_BASE_FRAME(0U) [auto-calculated]
```
### Configuration
The Cdd Xbar Driver implementation supports single configuration variants, namely Pre-Compile config. The driver expects generated **Cdd_Xbar_Cfg.h** to be present as input file.
The associated Cdd Xbar driver configuration generated source file is **Cdd_Xbar_Cfg.c**.
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files.
```{Note}
Refer section [Getting Started with EB Tresos](./MCAL_Configuration_and_EB_Tresos.md#getting-started-with-eb-tresos) of Chapter **MCAL Configuration and EB Tresos** for more information on how to load plugin and generate the configuration files.
```
#### Configuration Parameters
##### CddXbarConfiguration
This container contains the configuration parameters and sub containers of the CDD XBar module.
###### CddXbarInputXbarConfig
Configuration for Input Crossbar
###### CddXbarInputXbarInstanceConfig
Configuration for Input Crossbar instance, one per output line available
###### CddXbarInputXbarInputSourceSelection
| Item ||
|--------|---------------|
| **Name** | CddXbarInputXbarInputSourceSelection |
| **Description** | Selects GPIO/AIO or LOGIC HIGH or LOGIC LOW as input to the input xbar. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_GPIO_AIO |
| **Range** | CDD_XBAR_GPIO_AIO
CDD_XBAR_LOGIC_HIGH
CDD_XBAR_LOGIC_LOW |
###### CddXbarInputXbarInput
| Item ||
|--------|---------------|
| **Name** | CddXbarInputXbarInput |
| **Description** | Input number of input crossbar. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_INPUT1 |
| **Range** | CDD_XBAR_INPUT1
CDD_XBAR_INPUT2
CDD_XBAR_INPUT3
CDD_XBAR_INPUT4
CDD_XBAR_INPUT5
CDD_XBAR_INPUT6
CDD_XBAR_INPUT7
CDD_XBAR_INPUT8
CDD_XBAR_INPUT9
CDD_XBAR_INPUT10
CDD_XBAR_INPUT11
CDD_XBAR_INPUT12
CDD_XBAR_INPUT13
CDD_XBAR_INPUT14
CDD_XBAR_INPUT15
CDD_XBAR_INPUT16
CDD_XBAR_INPUT17
CDD_XBAR_INPUT18
CDD_XBAR_INPUT19
CDD_XBAR_INPUT20
CDD_XBAR_INPUT21
CDD_XBAR_INPUT22
CDD_XBAR_INPUT23
CDD_XBAR_INPUT24
CDD_XBAR_INPUT25
CDD_XBAR_INPUT26
CDD_XBAR_INPUT27
CDD_XBAR_INPUT28
CDD_XBAR_INPUT29
CDD_XBAR_INPUT30
CDD_XBAR_INPUT31
CDD_XBAR_INPUT32
CDD_XBAR_INPUT33
CDD_XBAR_INPUT34
CDD_XBAR_INPUT35
CDD_XBAR_INPUT36
CDD_XBAR_INPUT37
CDD_XBAR_INPUT38
CDD_XBAR_INPUT39
CDD_XBAR_INPUT40
CDD_XBAR_INPUT41
CDD_XBAR_INPUT42
CDD_XBAR_INPUT43
CDD_XBAR_INPUT44
CDD_XBAR_INPUT45
CDD_XBAR_INPUT46
CDD_XBAR_INPUT47
CDD_XBAR_INPUT48
CDD_XBAR_INPUT49
CDD_XBAR_INPUT50
CDD_XBAR_INPUT51
CDD_XBAR_INPUT52
CDD_XBAR_INPUT53
CDD_XBAR_INPUT54
CDD_XBAR_INPUT55
CDD_XBAR_INPUT56
CDD_XBAR_INPUT57
CDD_XBAR_INPUT58
CDD_XBAR_INPUT59
CDD_XBAR_INPUT60
CDD_XBAR_INPUT61
CDD_XBAR_INPUT62
CDD_XBAR_INPUT63
CDD_XBAR_INPUT64 |
###### CddXbarExternalInterruptEdge
| Item ||
|--------|---------------|
| **Name** | CddXbarExternalInterruptEdge |
| **Description** |
External Interrupt Edge configuration.
INPUT_XBAR to XINT Connections:
- INPUT_XBAR4 connects to XINT1
- INPUT_XBAR5 connects to XINT2
- INPUT_XBAR6 connects to XINT3
- INPUT_XBAR13 connects to XINT4
- INPUT_XBAR14 connects to XINT5
Note: For input crossbars that are not connected to XINT, this configuration will be disabled: CDD_XBAR_INT_TYPE_DISABLED.
|
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_INT_TYPE_DISABLED |
| **Range** | CDD_XBAR_INT_TYPE_DISABLED
CDD_XBAR_INT_TYPE_NEGATIVE_EDGE
CDD_XBAR_INT_TYPE_POSITIVE_EDGE
CDD_XBAR_INT_TYPE_BOTH_EDGE |
###### CddXbarInputXbarInputSelectConfigurationLock
| Item ||
|--------|---------------|
| **Name** | CddXbarInputXbarInputSelectConfigurationLock |
| **Description** | Option to lock the current Input Group for any further configuration on Input Crossbar until System Reset. Once locked, cannot be unlocked without reset. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddXbarInputXbarInputSource
| Item ||
|--------|---------------|
| **Name** | CddXbarInputXbarInputSource |
| **Description** | Reference to GPIO/AIO Pin, obtained from the configuration of PORT plugin. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddXbarOutputXbarConfig
Configuration for Output Crossbar
###### CddXbarOutputXbarConfigurationLock
| Item ||
|--------|---------------|
| **Name** | CddXbarOutputXbarConfigurationLock |
| **Description** | Option to lock the Output crossbar instance for any further input and output inversion configuration until System Reset. Cannot be unlocked once locked unless reset. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddXbarOutputXbarInstanceConfig
Configuration for Output Crossbar Instance, one per output line available
###### CddXbarOutputXbarOutputLine
| Item ||
|--------|---------------|
| **Name** | CddXbarOutputXbarOutputLine |
| **Description** | Number of Output Line instance to be set for Output Crossbar. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_OUTPUT1 |
| **Range** | CDD_XBAR_OUTPUT1
CDD_XBAR_OUTPUT2
CDD_XBAR_OUTPUT3
CDD_XBAR_OUTPUT4
CDD_XBAR_OUTPUT5
CDD_XBAR_OUTPUT6
CDD_XBAR_OUTPUT7
CDD_XBAR_OUTPUT8
CDD_XBAR_OUTPUT9
CDD_XBAR_OUTPUT10
CDD_XBAR_OUTPUT11
CDD_XBAR_OUTPUT12
CDD_XBAR_OUTPUT13
CDD_XBAR_OUTPUT14
CDD_XBAR_OUTPUT15
CDD_XBAR_OUTPUT16 |
###### CddXbarOutputXbarOutputPulseStretch
| Item ||
|--------|---------------|
| **Name** | CddXbarOutputXbarOutputPulseStretch |
| **Description** | Output Line pulse stretch in Sys Clock ticks for Output Crossbar. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_SYSTICKS_STRETCH_OFF |
| **Range** | CDD_XBAR_SYSTICKS_STRETCH_OFF
CDD_XBAR_SYSTICKS_16
CDD_XBAR_SYSTICKS_32 |
###### CddXbarOutputXbarOutputInversion
| Item ||
|--------|---------------|
| **Name** | CddXbarOutputXbarOutputInversion |
| **Description** | Option to invert the output signal for the selected output line of the Output Crossbar instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddXbarOutputXbarOutputLatch
| Item ||
|--------|---------------|
| **Name** | CddXbarOutputXbarOutputLatch |
| **Description** | Option to select latch as output of selected output line for Output Crossbar instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddXbarOutputXbarInput
Configuration for Output Crossbar Instance inputs
###### CddXbarOutputXbarInputGroup
| Item ||
|--------|---------------|
| **Name** | CddXbarOutputXbarInputGroup |
| **Description** | Number of Input Group to be chosen for Output Crossbar. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_INPUT_GROUP_0 |
| **Range** | CDD_XBAR_INPUT_GROUP_0
CDD_XBAR_INPUT_GROUP_1
CDD_XBAR_INPUT_GROUP_2
CDD_XBAR_INPUT_GROUP_3
CDD_XBAR_INPUT_GROUP_4
CDD_XBAR_INPUT_GROUP_5
CDD_XBAR_INPUT_GROUP_6
CDD_XBAR_INPUT_GROUP_7
CDD_XBAR_INPUT_GROUP_8
CDD_XBAR_INPUT_GROUP_9 |
###### CddXbarOutputXbarInputLine
| Item ||
|--------|---------------|
| **Name** | CddXbarOutputXbarInputLine |
| **Description** | Number of Input Line from the Group selected to be chosen for Output Crossbar. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_OUT_ADCAEVT1 |
| **Range** | CDD_XBAR_OUT_ADCAEVT1
CDD_XBAR_OUT_ADCAEVT2
CDD_XBAR_OUT_ADCAEVT3
CDD_XBAR_OUT_ADCAEVT4
CDD_XBAR_OUT_ADCA_EXTMUXSEL0
CDD_XBAR_OUT_ADCA_EXTMUXSEL1
CDD_XBAR_OUT_ADCA_EXTMUXSEL2
CDD_XBAR_OUT_ADCA_EXTMUXSEL3
CDD_XBAR_OUT_ADCBEVT1
CDD_XBAR_OUT_ADCBEVT2
CDD_XBAR_OUT_ADCBEVT3
CDD_XBAR_OUT_ADCBEVT4
CDD_XBAR_OUT_ADCB_EXTMUXSEL0
CDD_XBAR_OUT_ADCB_EXTMUXSEL1
CDD_XBAR_OUT_ADCB_EXTMUXSEL2
CDD_XBAR_OUT_ADCB_EXTMUXSEL3
CDD_XBAR_OUT_ADCCEVT1
CDD_XBAR_OUT_ADCCEVT2
CDD_XBAR_OUT_ADCCEVT3
CDD_XBAR_OUT_ADCCEVT4
CDD_XBAR_OUT_ADCC_EXTMUXSEL0
CDD_XBAR_OUT_ADCC_EXTMUXSEL1
CDD_XBAR_OUT_ADCC_EXTMUXSEL2
CDD_XBAR_OUT_ADCC_EXTMUXSEL3
CDD_XBAR_OUT_ADCDEVT1
CDD_XBAR_OUT_ADCDEVT2
CDD_XBAR_OUT_ADCDEVT3
CDD_XBAR_OUT_ADCDEVT4
CDD_XBAR_OUT_ADCD_EXTMUXSEL0
CDD_XBAR_OUT_ADCD_EXTMUXSEL1
CDD_XBAR_OUT_ADCD_EXTMUXSEL2
CDD_XBAR_OUT_ADCD_EXTMUXSEL3
CDD_XBAR_OUT_ADCEEVT1
CDD_XBAR_OUT_ADCEEVT2
CDD_XBAR_OUT_ADCEEVT3
CDD_XBAR_OUT_ADCEEVT4
CDD_XBAR_OUT_ADCE_EXTMUXSEL0
CDD_XBAR_OUT_ADCE_EXTMUXSEL1
CDD_XBAR_OUT_ADCE_EXTMUXSEL2
CDD_XBAR_OUT_ADCE_EXTMUXSEL3
CDD_XBAR_OUT_ADCSOCA
CDD_XBAR_OUT_ADCSOCB
CDD_XBAR_OUT_CLB1_OUT0
CDD_XBAR_OUT_CLB1_OUT1
CDD_XBAR_OUT_CLB1_OUT2
CDD_XBAR_OUT_CLB1_OUT3
CDD_XBAR_OUT_CLB1_OUT4
CDD_XBAR_OUT_CLB1_OUT5
CDD_XBAR_OUT_CLB1_OUT6
CDD_XBAR_OUT_CLB1_OUT7
CDD_XBAR_OUT_CLB2_OUT0
CDD_XBAR_OUT_CLB2_OUT1
CDD_XBAR_OUT_CLB2_OUT2
CDD_XBAR_OUT_CLB2_OUT3
CDD_XBAR_OUT_CLB2_OUT4
CDD_XBAR_OUT_CLB2_OUT5
CDD_XBAR_OUT_CLB2_OUT6
CDD_XBAR_OUT_CLB2_OUT7
CDD_XBAR_OUT_CLB3_OUT0
CDD_XBAR_OUT_CLB3_OUT1
CDD_XBAR_OUT_CLB3_OUT2
CDD_XBAR_OUT_CLB3_OUT3
CDD_XBAR_OUT_CLB3_OUT4
CDD_XBAR_OUT_CLB3_OUT5
CDD_XBAR_OUT_CLB3_OUT6
CDD_XBAR_OUT_CLB3_OUT7
CDD_XBAR_OUT_CLB4_OUT0
CDD_XBAR_OUT_CLB4_OUT1
CDD_XBAR_OUT_CLB4_OUT2
CDD_XBAR_OUT_CLB4_OUT3
CDD_XBAR_OUT_CLB4_OUT4
CDD_XBAR_OUT_CLB4_OUT5
CDD_XBAR_OUT_CLB4_OUT6
CDD_XBAR_OUT_CLB4_OUT7
CDD_XBAR_OUT_CLB5_OUT0
CDD_XBAR_OUT_CLB5_OUT1
CDD_XBAR_OUT_CLB5_OUT2
CDD_XBAR_OUT_CLB5_OUT3
CDD_XBAR_OUT_CLB5_OUT4
CDD_XBAR_OUT_CLB5_OUT5
CDD_XBAR_OUT_CLB5_OUT6
CDD_XBAR_OUT_CLB5_OUT7
CDD_XBAR_OUT_CLB6_OUT0
CDD_XBAR_OUT_CLB6_OUT1
CDD_XBAR_OUT_CLB6_OUT2
CDD_XBAR_OUT_CLB6_OUT3
CDD_XBAR_OUT_CLB6_OUT4
CDD_XBAR_OUT_CLB6_OUT5
CDD_XBAR_OUT_CLB6_OUT6
CDD_XBAR_OUT_CLB6_OUT7
CDD_XBAR_OUT_CLBXBAR1
CDD_XBAR_OUT_CLBXBAR2
CDD_XBAR_OUT_CLBXBAR3
CDD_XBAR_OUT_CLBXBAR4
CDD_XBAR_OUT_CLBXBAR5
CDD_XBAR_OUT_CLBXBAR6
CDD_XBAR_OUT_CLBXBAR7
CDD_XBAR_OUT_CLBXBAR8
CDD_XBAR_OUT_CMPSS10_CTRIPOUTH
CDD_XBAR_OUT_CMPSS10_CTRIPOUTL
CDD_XBAR_OUT_CMPSS11_CTRIPOUTH
CDD_XBAR_OUT_CMPSS11_CTRIPOUTL
CDD_XBAR_OUT_CMPSS12_CTRIPOUTH
CDD_XBAR_OUT_CMPSS12_CTRIPOUTL
CDD_XBAR_OUT_CMPSS1_CTRIPOUTH
CDD_XBAR_OUT_CMPSS1_CTRIPOUTL
CDD_XBAR_OUT_CMPSS2_CTRIPOUTH
CDD_XBAR_OUT_CMPSS2_CTRIPOUTL
CDD_XBAR_OUT_CMPSS3_CTRIPOUTH
CDD_XBAR_OUT_CMPSS3_CTRIPOUTL
CDD_XBAR_OUT_CMPSS4_CTRIPOUTH
CDD_XBAR_OUT_CMPSS4_CTRIPOUTL
CDD_XBAR_OUT_CMPSS5_CTRIPOUTH
CDD_XBAR_OUT_CMPSS5_CTRIPOUTL
CDD_XBAR_OUT_CMPSS6_CTRIPOUTH
CDD_XBAR_OUT_CMPSS6_CTRIPOUTL
CDD_XBAR_OUT_CMPSS7_CTRIPOUTH
CDD_XBAR_OUT_CMPSS7_CTRIPOUTL
CDD_XBAR_OUT_CMPSS8_CTRIPOUTH
CDD_XBAR_OUT_CMPSS8_CTRIPOUTL
CDD_XBAR_OUT_CMPSS9_CTRIPOUTH
CDD_XBAR_OUT_CMPSS9_CTRIPOUTL
CDD_XBAR_OUT_CPU1_ADCCHECKEVT1
CDD_XBAR_OUT_CPU1_ADCCHECKEVT2
CDD_XBAR_OUT_CPU1_ADCCHECKEVT3
CDD_XBAR_OUT_CPU1_ADCCHECKEVT4
CDD_XBAR_OUT_CPU2_ADCCHECKEVT1
CDD_XBAR_OUT_CPU2_ADCCHECKEVT2
CDD_XBAR_OUT_CPU2_ADCCHECKEVT3
CDD_XBAR_OUT_CPU2_ADCCHECKEVT4
CDD_XBAR_OUT_CPU3_ADCCHECKEVT1
CDD_XBAR_OUT_CPU3_ADCCHECKEVT2
CDD_XBAR_OUT_CPU3_ADCCHECKEVT3
CDD_XBAR_OUT_CPU3_ADCCHECKEVT4
CDD_XBAR_OUT_ECAP1_OUT
CDD_XBAR_OUT_ECAP1_TRIPOUT
CDD_XBAR_OUT_ECAP2_OUT
CDD_XBAR_OUT_ECAP2_TRIPOUT
CDD_XBAR_OUT_ECAP3_OUT
CDD_XBAR_OUT_ECAP3_TRIPOUT
CDD_XBAR_OUT_ECAP4_OUT
CDD_XBAR_OUT_ECAP4_TRIPOUT
CDD_XBAR_OUT_ECAP5_OUT
CDD_XBAR_OUT_ECAP5_TRIPOUT
CDD_XBAR_OUT_ECAP6_OUT
CDD_XBAR_OUT_ECAP6_TRIPOUT
CDD_XBAR_OUT_ECAT_SYNC0
CDD_XBAR_OUT_ECAT_SYNC1
CDD_XBAR_OUT_EPG1OUT0
CDD_XBAR_OUT_EPG1OUT1
CDD_XBAR_OUT_EPG1OUT2
CDD_XBAR_OUT_EPG1OUT3
CDD_XBAR_OUT_EQEP1_INDEX_SYNCOUT
CDD_XBAR_OUT_EQEP1_STROBE_SYNCOUT
CDD_XBAR_OUT_EQEP2_INDEX_SYNCOUT
CDD_XBAR_OUT_EQEP2_STROBE_SYNCOUT
CDD_XBAR_OUT_EQEP3_INDEX_SYNCOUT
CDD_XBAR_OUT_EQEP3_STROBE_SYNCOUT
CDD_XBAR_OUT_EQEP4_INDEX_SYNCOUT
CDD_XBAR_OUT_EQEP4_STROBE_SYNCOUT
CDD_XBAR_OUT_EQEP5_INDEX_SYNCOUT
CDD_XBAR_OUT_EQEP5_STROBE_SYNCOUT
CDD_XBAR_OUT_EQEP6_INDEX_SYNCOUT
CDD_XBAR_OUT_EQEP6_STROBE_SYNCOUT
CDD_XBAR_OUT_ESM_GEN_EVENT
CDD_XBAR_OUT_EXTSYNCOUT
CDD_XBAR_OUT_FSIRXA_TRIG1
CDD_XBAR_OUT_FSIRXA_TRIG2
CDD_XBAR_OUT_FSIRXA_TRIG3
CDD_XBAR_OUT_FSIRXB_TRIG1
CDD_XBAR_OUT_FSIRXB_TRIG2
CDD_XBAR_OUT_FSIRXB_TRIG3
CDD_XBAR_OUT_FSIRXC_TRIG1
CDD_XBAR_OUT_FSIRXC_TRIG2
CDD_XBAR_OUT_FSIRXC_TRIG3
CDD_XBAR_OUT_FSIRXD_TRIG1
CDD_XBAR_OUT_FSIRXD_TRIG2
CDD_XBAR_OUT_FSIRXD_TRIG3
CDD_XBAR_OUT_INPUTXBAR1
CDD_XBAR_OUT_INPUTXBAR2
CDD_XBAR_OUT_INPUTXBAR3
CDD_XBAR_OUT_INPUTXBAR4
CDD_XBAR_OUT_INPUTXBAR5
CDD_XBAR_OUT_INPUTXBAR6
CDD_XBAR_OUT_INPUTXBAR7
CDD_XBAR_OUT_INPUTXBAR8
CDD_XBAR_OUT_MCANA_FEVT0
CDD_XBAR_OUT_MCANA_FEVT1
CDD_XBAR_OUT_MCANA_FEVT2
CDD_XBAR_OUT_MCANB_FEVT0
CDD_XBAR_OUT_MCANB_FEVT1
CDD_XBAR_OUT_MCANB_FEVT2
CDD_XBAR_OUT_MCANC_FEVT0
CDD_XBAR_OUT_MCANC_FEVT1
CDD_XBAR_OUT_MCANC_FEVT2
CDD_XBAR_OUT_MCAND_FEVT0
CDD_XBAR_OUT_MCAND_FEVT1
CDD_XBAR_OUT_MCAND_FEVT2
CDD_XBAR_OUT_MCANE_FEVT0
CDD_XBAR_OUT_MCANE_FEVT1
CDD_XBAR_OUT_MCANE_FEVT2
CDD_XBAR_OUT_MCANF_FEVT0
CDD_XBAR_OUT_MCANF_FEVT1
CDD_XBAR_OUT_MCANF_FEVT2
CDD_XBAR_OUT_SD1FLT1_COMPH
CDD_XBAR_OUT_SD1FLT1_COMPL
CDD_XBAR_OUT_SD1FLT2_COMPH
CDD_XBAR_OUT_SD1FLT2_COMPL
CDD_XBAR_OUT_SD1FLT3_COMPH
CDD_XBAR_OUT_SD1FLT3_COMPL
CDD_XBAR_OUT_SD1FLT4_COMPH
CDD_XBAR_OUT_SD1FLT4_COMPL
CDD_XBAR_OUT_SD2FLT1_COMPH
CDD_XBAR_OUT_SD2FLT1_COMPL
CDD_XBAR_OUT_SD2FLT2_COMPH
CDD_XBAR_OUT_SD2FLT2_COMPL
CDD_XBAR_OUT_SD2FLT3_COMPH
CDD_XBAR_OUT_SD2FLT3_COMPL
CDD_XBAR_OUT_SD2FLT4_COMPH
CDD_XBAR_OUT_SD2FLT4_COMPL
CDD_XBAR_OUT_SD3FLT1_COMPH
CDD_XBAR_OUT_SD3FLT1_COMPL
CDD_XBAR_OUT_SD3FLT2_COMPH
CDD_XBAR_OUT_SD3FLT2_COMPL
CDD_XBAR_OUT_SD3FLT3_COMPH
CDD_XBAR_OUT_SD3FLT3_COMPL
CDD_XBAR_OUT_SD3FLT4_COMPH
CDD_XBAR_OUT_SD3FLT4_COMPL
CDD_XBAR_OUT_SD4FLT1_COMPH
CDD_XBAR_OUT_SD4FLT1_COMPL
CDD_XBAR_OUT_SD4FLT2_COMPH
CDD_XBAR_OUT_SD4FLT2_COMPL
CDD_XBAR_OUT_SD4FLT3_COMPH
CDD_XBAR_OUT_SD4FLT3_COMPL
CDD_XBAR_OUT_SD4FLT4_COMPH
CDD_XBAR_OUT_SD4FLT4_COMPL
CDD_XBAR_OUT_WADI1OUT0
CDD_XBAR_OUT_WADI1OUT1
CDD_XBAR_OUT_WADI1OUT2
CDD_XBAR_OUT_WADI1OUT3
CDD_XBAR_OUT_WADI1OUT4
CDD_XBAR_OUT_WADI1OUT5
CDD_XBAR_OUT_WADI1OUT6
CDD_XBAR_OUT_WADI1OUT7
CDD_XBAR_OUT_WADI2OUT0
CDD_XBAR_OUT_WADI2OUT1
CDD_XBAR_OUT_WADI2OUT2
CDD_XBAR_OUT_WADI2OUT3
CDD_XBAR_OUT_WADI2OUT4
CDD_XBAR_OUT_WADI2OUT5
CDD_XBAR_OUT_WADI2OUT6
CDD_XBAR_OUT_WADI2OUT7
CDD_XBAR_OUT_XCLKOUT |
###### CddXbarOutputXbarOutputFlagConfig
Configuration for output crossbar output latch
###### CddXbarOutputXbarInversionBeforeLatch
| Item ||
|--------|---------------|
| **Name** | CddXbarOutputXbarInversionBeforeLatch |
| **Description** | Option to invert the signal before latching for the selected output line for Output Crossbar instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddXbarOutputXbarOutputLatchInitSts
| Item ||
|--------|---------------|
| **Name** | CddXbarOutputXbarOutputLatchInitSts |
| **Description** | Force or clear the output latch of individual output line for Output Crossbar during initialization |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_OUTPUTDEFAULT |
| **Range** | CDD_XBAR_OUTPUTDEFAULT
CDD_XBAR_OUTPUTCLEARFLAG
CDD_XBAR_OUTPUTFORCEFLAG |
###### CddXbarEpwmXbarConfig
Configuration for EPWM Crossbar
###### CddXbarEpwmXbarConfigurationLock
| Item ||
|--------|---------------|
| **Name** | CddXbarEpwmXbarConfigurationLock |
| **Description** | Option to lock the EPWM crossbar instance for any further configuration until System Reset. Cannot be unlocked once locked unless reset. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddXbarEpwmXbarInstanceConfig
Configuration for EPWM Crossbar Instance, one per output line available
###### CddXbarEpwmXbarOutputLine
| Item ||
|--------|---------------|
| **Name** | CddXbarEpwmXbarOutputLine |
| **Description** | Number of Output Line instance to be set for EPWM Crossbar. TRIP1 is reserved. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_TRIP1 |
| **Range** | CDD_XBAR_TRIP1
CDD_XBAR_TRIP2
CDD_XBAR_TRIP3
CDD_XBAR_TRIP4
CDD_XBAR_TRIP5
CDD_XBAR_TRIP6
CDD_XBAR_TRIP7
CDD_XBAR_TRIP8
CDD_XBAR_TRIP9
CDD_XBAR_TRIP10
CDD_XBAR_TRIP11
CDD_XBAR_TRIP12
CDD_XBAR_TRIP13
CDD_XBAR_TRIP14
CDD_XBAR_TRIP15
CDD_XBAR_TRIP16 |
###### CddXbarEpwmXbarOutputInversion
| Item ||
|--------|---------------|
| **Name** | CddXbarEpwmXbarOutputInversion |
| **Description** | Option to invert the output signal for the selected output line of the EPWM Crossbar instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddXbarEpwmXbarInput
Configuration for EPWM Crossbar Instance inputs
###### CddXbarEpwmXbarInputGroup
| Item ||
|--------|---------------|
| **Name** | CddXbarEpwmXbarInputGroup |
| **Description** | Number of Input Group to be chosen for EPWM Crossbar. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_INPUT_GROUP_0 |
| **Range** | CDD_XBAR_INPUT_GROUP_0
CDD_XBAR_INPUT_GROUP_1
CDD_XBAR_INPUT_GROUP_2
CDD_XBAR_INPUT_GROUP_3
CDD_XBAR_INPUT_GROUP_4
CDD_XBAR_INPUT_GROUP_5
CDD_XBAR_INPUT_GROUP_6
CDD_XBAR_INPUT_GROUP_7
CDD_XBAR_INPUT_GROUP_8
CDD_XBAR_INPUT_GROUP_9 |
###### CddXbarEpwmXbarInputLine
| Item ||
|--------|---------------|
| **Name** | CddXbarEpwmXbarInputLine |
| **Description** | Number of Input Line from the Group selected to be chosen for EPWM Crossbar. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_EPWM_ADCAEVT1 |
| **Range** | CDD_XBAR_EPWM_ADCAEVT1
CDD_XBAR_EPWM_ADCAEVT2
CDD_XBAR_EPWM_ADCAEVT3
CDD_XBAR_EPWM_ADCAEVT4
CDD_XBAR_EPWM_ADCBEVT1
CDD_XBAR_EPWM_ADCBEVT2
CDD_XBAR_EPWM_ADCBEVT3
CDD_XBAR_EPWM_ADCBEVT4
CDD_XBAR_EPWM_ADCCEVT1
CDD_XBAR_EPWM_ADCCEVT2
CDD_XBAR_EPWM_ADCCEVT3
CDD_XBAR_EPWM_ADCCEVT4
CDD_XBAR_EPWM_ADCDEVT1
CDD_XBAR_EPWM_ADCDEVT2
CDD_XBAR_EPWM_ADCDEVT3
CDD_XBAR_EPWM_ADCDEVT4
CDD_XBAR_EPWM_ADCEEVT1
CDD_XBAR_EPWM_ADCEEVT2
CDD_XBAR_EPWM_ADCEEVT3
CDD_XBAR_EPWM_ADCEEVT4
CDD_XBAR_EPWM_ADCSOCA
CDD_XBAR_EPWM_ADCSOCB
CDD_XBAR_EPWM_CLB1_OUT4
CDD_XBAR_EPWM_CLB1_OUT5
CDD_XBAR_EPWM_CLB2_OUT4
CDD_XBAR_EPWM_CLB2_OUT5
CDD_XBAR_EPWM_CLB3_OUT4
CDD_XBAR_EPWM_CLB3_OUT5
CDD_XBAR_EPWM_CLB4_OUT4
CDD_XBAR_EPWM_CLB4_OUT5
CDD_XBAR_EPWM_CLB5_OUT4
CDD_XBAR_EPWM_CLB5_OUT5
CDD_XBAR_EPWM_CLB6_OUT4
CDD_XBAR_EPWM_CLB6_OUT5
CDD_XBAR_EPWM_CMPSS10_CTRIPH
CDD_XBAR_EPWM_CMPSS10_CTRIPL
CDD_XBAR_EPWM_CMPSS11_CTRIPH
CDD_XBAR_EPWM_CMPSS11_CTRIPL
CDD_XBAR_EPWM_CMPSS12_CTRIPH
CDD_XBAR_EPWM_CMPSS12_CTRIPL
CDD_XBAR_EPWM_CMPSS1_CTRIPH
CDD_XBAR_EPWM_CMPSS1_CTRIPL
CDD_XBAR_EPWM_CMPSS2_CTRIPH
CDD_XBAR_EPWM_CMPSS2_CTRIPL
CDD_XBAR_EPWM_CMPSS3_CTRIPH
CDD_XBAR_EPWM_CMPSS3_CTRIPL
CDD_XBAR_EPWM_CMPSS4_CTRIPH
CDD_XBAR_EPWM_CMPSS4_CTRIPL
CDD_XBAR_EPWM_CMPSS5_CTRIPH
CDD_XBAR_EPWM_CMPSS5_CTRIPL
CDD_XBAR_EPWM_CMPSS6_CTRIPH
CDD_XBAR_EPWM_CMPSS6_CTRIPL
CDD_XBAR_EPWM_CMPSS7_CTRIPH
CDD_XBAR_EPWM_CMPSS7_CTRIPL
CDD_XBAR_EPWM_CMPSS8_CTRIPH
CDD_XBAR_EPWM_CMPSS8_CTRIPL
CDD_XBAR_EPWM_CMPSS9_CTRIPH
CDD_XBAR_EPWM_CMPSS9_CTRIPL
CDD_XBAR_EPWM_CPU1_ADCCHECKEVT1
CDD_XBAR_EPWM_CPU1_ADCCHECKEVT2
CDD_XBAR_EPWM_CPU1_ADCCHECKEVT3
CDD_XBAR_EPWM_CPU1_ADCCHECKEVT4
CDD_XBAR_EPWM_CPU2_ADCCHECKEVT1
CDD_XBAR_EPWM_CPU2_ADCCHECKEVT2
CDD_XBAR_EPWM_CPU2_ADCCHECKEVT3
CDD_XBAR_EPWM_CPU2_ADCCHECKEVT4
CDD_XBAR_EPWM_CPU3_ADCCHECKEVT1
CDD_XBAR_EPWM_CPU3_ADCCHECKEVT2
CDD_XBAR_EPWM_CPU3_ADCCHECKEVT3
CDD_XBAR_EPWM_CPU3_ADCCHECKEVT4
CDD_XBAR_EPWM_ECAP1_OUT
CDD_XBAR_EPWM_ECAP1_TRIPOUT
CDD_XBAR_EPWM_ECAP2_OUT
CDD_XBAR_EPWM_ECAP2_TRIPOUT
CDD_XBAR_EPWM_ECAP3_OUT
CDD_XBAR_EPWM_ECAP3_TRIPOUT
CDD_XBAR_EPWM_ECAP4_OUT
CDD_XBAR_EPWM_ECAP4_TRIPOUT
CDD_XBAR_EPWM_ECAP5_OUT
CDD_XBAR_EPWM_ECAP5_TRIPOUT
CDD_XBAR_EPWM_ECAP6_OUT
CDD_XBAR_EPWM_ECAP6_TRIPOUT
CDD_XBAR_EPWM_ECAT_SYNC0
CDD_XBAR_EPWM_ECAT_SYNC1
CDD_XBAR_EPWM_EPWM10_DE_ACTIVE
CDD_XBAR_EPWM_EPWM10_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM10_TRIPOUT
CDD_XBAR_EPWM_EPWM11_DE_ACTIVE
CDD_XBAR_EPWM_EPWM11_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM11_TRIPOUT
CDD_XBAR_EPWM_EPWM12_DE_ACTIVE
CDD_XBAR_EPWM_EPWM12_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM12_TRIPOUT
CDD_XBAR_EPWM_EPWM13_DE_ACTIVE
CDD_XBAR_EPWM_EPWM13_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM13_TRIPOUT
CDD_XBAR_EPWM_EPWM14_DE_ACTIVE
CDD_XBAR_EPWM_EPWM14_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM14_TRIPOUT
CDD_XBAR_EPWM_EPWM15_DE_ACTIVE
CDD_XBAR_EPWM_EPWM15_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM15_TRIPOUT
CDD_XBAR_EPWM_EPWM16_DE_ACTIVE
CDD_XBAR_EPWM_EPWM16_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM16_TRIPOUT
CDD_XBAR_EPWM_EPWM17_DE_ACTIVE
CDD_XBAR_EPWM_EPWM17_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM17_TRIPOUT
CDD_XBAR_EPWM_EPWM18_DE_ACTIVE
CDD_XBAR_EPWM_EPWM18_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM18_TRIPOUT
CDD_XBAR_EPWM_EPWM1_DE_ACTIVE
CDD_XBAR_EPWM_EPWM1_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM1_TRIPOUT
CDD_XBAR_EPWM_EPWM2_DE_ACTIVE
CDD_XBAR_EPWM_EPWM2_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM2_TRIPOUT
CDD_XBAR_EPWM_EPWM3_DE_ACTIVE
CDD_XBAR_EPWM_EPWM3_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM3_TRIPOUT
CDD_XBAR_EPWM_EPWM4_DE_ACTIVE
CDD_XBAR_EPWM_EPWM4_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM4_TRIPOUT
CDD_XBAR_EPWM_EPWM5_DE_ACTIVE
CDD_XBAR_EPWM_EPWM5_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM5_TRIPOUT
CDD_XBAR_EPWM_EPWM6_DE_ACTIVE
CDD_XBAR_EPWM_EPWM6_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM6_TRIPOUT
CDD_XBAR_EPWM_EPWM7_DE_ACTIVE
CDD_XBAR_EPWM_EPWM7_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM7_TRIPOUT
CDD_XBAR_EPWM_EPWM8_DE_ACTIVE
CDD_XBAR_EPWM_EPWM8_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM8_TRIPOUT
CDD_XBAR_EPWM_EPWM9_DE_ACTIVE
CDD_XBAR_EPWM_EPWM9_DE_DEMONTRIP
CDD_XBAR_EPWM_EPWM9_TRIPOUT
CDD_XBAR_EPWM_ESM_GEN_EVENT
CDD_XBAR_EPWM_EXTSYNCOUT
CDD_XBAR_EPWM_FSIRXA_TRIG1
CDD_XBAR_EPWM_FSIRXB_TRIG1
CDD_XBAR_EPWM_FSIRXC_TRIG1
CDD_XBAR_EPWM_FSIRXD_TRIG1
CDD_XBAR_EPWM_INPUTXBAR1
CDD_XBAR_EPWM_INPUTXBAR10
CDD_XBAR_EPWM_INPUTXBAR11
CDD_XBAR_EPWM_INPUTXBAR12
CDD_XBAR_EPWM_INPUTXBAR13
CDD_XBAR_EPWM_INPUTXBAR14
CDD_XBAR_EPWM_INPUTXBAR15
CDD_XBAR_EPWM_INPUTXBAR16
CDD_XBAR_EPWM_INPUTXBAR17
CDD_XBAR_EPWM_INPUTXBAR18
CDD_XBAR_EPWM_INPUTXBAR19
CDD_XBAR_EPWM_INPUTXBAR2
CDD_XBAR_EPWM_INPUTXBAR20
CDD_XBAR_EPWM_INPUTXBAR21
CDD_XBAR_EPWM_INPUTXBAR22
CDD_XBAR_EPWM_INPUTXBAR23
CDD_XBAR_EPWM_INPUTXBAR24
CDD_XBAR_EPWM_INPUTXBAR25
CDD_XBAR_EPWM_INPUTXBAR26
CDD_XBAR_EPWM_INPUTXBAR27
CDD_XBAR_EPWM_INPUTXBAR28
CDD_XBAR_EPWM_INPUTXBAR29
CDD_XBAR_EPWM_INPUTXBAR3
CDD_XBAR_EPWM_INPUTXBAR30
CDD_XBAR_EPWM_INPUTXBAR31
CDD_XBAR_EPWM_INPUTXBAR32
CDD_XBAR_EPWM_INPUTXBAR4
CDD_XBAR_EPWM_INPUTXBAR5
CDD_XBAR_EPWM_INPUTXBAR6
CDD_XBAR_EPWM_INPUTXBAR7
CDD_XBAR_EPWM_INPUTXBAR8
CDD_XBAR_EPWM_INPUTXBAR9
CDD_XBAR_EPWM_MCANA_FEVT0
CDD_XBAR_EPWM_MCANA_FEVT1
CDD_XBAR_EPWM_MCANA_FEVT2
CDD_XBAR_EPWM_MCANB_FEVT0
CDD_XBAR_EPWM_MCANB_FEVT1
CDD_XBAR_EPWM_MCANB_FEVT2
CDD_XBAR_EPWM_MCANC_FEVT0
CDD_XBAR_EPWM_MCANC_FEVT1
CDD_XBAR_EPWM_MCANC_FEVT2
CDD_XBAR_EPWM_MCAND_FEVT0
CDD_XBAR_EPWM_MCAND_FEVT1
CDD_XBAR_EPWM_MCAND_FEVT2
CDD_XBAR_EPWM_MCANE_FEVT0
CDD_XBAR_EPWM_MCANE_FEVT1
CDD_XBAR_EPWM_MCANE_FEVT2
CDD_XBAR_EPWM_MCANF_FEVT0
CDD_XBAR_EPWM_MCANF_FEVT1
CDD_XBAR_EPWM_MCANF_FEVT2
CDD_XBAR_EPWM_SD1FLT1_COMPH
CDD_XBAR_EPWM_SD1FLT1_COMPL
CDD_XBAR_EPWM_SD1FLT2_COMPH
CDD_XBAR_EPWM_SD1FLT2_COMPL
CDD_XBAR_EPWM_SD1FLT3_COMPH
CDD_XBAR_EPWM_SD1FLT3_COMPL
CDD_XBAR_EPWM_SD1FLT4_COMPH
CDD_XBAR_EPWM_SD1FLT4_COMPL
CDD_XBAR_EPWM_SD2FLT1_COMPH
CDD_XBAR_EPWM_SD2FLT1_COMPL
CDD_XBAR_EPWM_SD2FLT2_COMPH
CDD_XBAR_EPWM_SD2FLT2_COMPL
CDD_XBAR_EPWM_SD2FLT3_COMPH
CDD_XBAR_EPWM_SD2FLT3_COMPL
CDD_XBAR_EPWM_SD2FLT4_COMPH
CDD_XBAR_EPWM_SD2FLT4_COMPL
CDD_XBAR_EPWM_SD3FLT1_COMPH
CDD_XBAR_EPWM_SD3FLT1_COMPL
CDD_XBAR_EPWM_SD3FLT2_COMPH
CDD_XBAR_EPWM_SD3FLT2_COMPL
CDD_XBAR_EPWM_SD3FLT3_COMPH
CDD_XBAR_EPWM_SD3FLT3_COMPL
CDD_XBAR_EPWM_SD3FLT4_COMPH
CDD_XBAR_EPWM_SD3FLT4_COMPL
CDD_XBAR_EPWM_SD4FLT1_COMPH
CDD_XBAR_EPWM_SD4FLT1_COMPL
CDD_XBAR_EPWM_SD4FLT2_COMPH
CDD_XBAR_EPWM_SD4FLT2_COMPL
CDD_XBAR_EPWM_SD4FLT3_COMPH
CDD_XBAR_EPWM_SD4FLT3_COMPL
CDD_XBAR_EPWM_SD4FLT4_COMPH
CDD_XBAR_EPWM_SD4FLT4_COMPL
CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_0
CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_1
CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_10
CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_11
CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_2
CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_3
CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_4
CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_5
CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_6
CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_7
CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_8
CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_9
CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_0
CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_1
CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_10
CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_11
CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_2
CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_3
CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_4
CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_5
CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_6
CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_7
CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_8
CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_9 |
###### CddXbarClbXbarConfig
Configuration for CLB Crossbar
###### CddXbarClbXbarConfigurationLock
| Item ||
|--------|---------------|
| **Name** | CddXbarClbXbarConfigurationLock |
| **Description** | Option to lock the CLB crossbar instance for any further configuration until System Reset. Cannot be unlocked once locked unless reset. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddXbarClbXbarInstanceConfig
Configuration for CLB Crossbar Instance, one per output line available
###### CddXbarClbXbarOutputLine
| Item ||
|--------|---------------|
| **Name** | CddXbarClbXbarOutputLine |
| **Description** | Number of Output Line instance to be set for CLB Crossbar. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_AUXSIG1 |
| **Range** | CDD_XBAR_AUXSIG1
CDD_XBAR_AUXSIG2
CDD_XBAR_AUXSIG3
CDD_XBAR_AUXSIG4
CDD_XBAR_AUXSIG5
CDD_XBAR_AUXSIG6
CDD_XBAR_AUXSIG7
CDD_XBAR_AUXSIG8 |
###### CddXbarClbXbarOutputInversion
| Item ||
|--------|---------------|
| **Name** | CddXbarClbXbarOutputInversion |
| **Description** | Option to invert the output signal for the selected output line of the CLB Crossbar instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddXbarClbXbarInput
Configuration for CLB Crossbar Instance inputs
###### CddXbarClbXbarInputGroup
| Item ||
|--------|---------------|
| **Name** | CddXbarClbXbarInputGroup |
| **Description** | Number of Input Group to be chosen for CLB Crossbar. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_INPUT_GROUP_0 |
| **Range** | CDD_XBAR_INPUT_GROUP_0
CDD_XBAR_INPUT_GROUP_1
CDD_XBAR_INPUT_GROUP_2
CDD_XBAR_INPUT_GROUP_3
CDD_XBAR_INPUT_GROUP_4
CDD_XBAR_INPUT_GROUP_5
CDD_XBAR_INPUT_GROUP_6
CDD_XBAR_INPUT_GROUP_7 |
###### CddXbarClbXbarInputLine
| Item ||
|--------|---------------|
| **Name** | CddXbarClbXbarInputLine |
| **Description** | Number of Input Line from the Group selected to be chosen for CLB Crossbar. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_CLB_ADCAEVT1 |
| **Range** | CDD_XBAR_CLB_ADCAEVT1
CDD_XBAR_CLB_ADCAEVT2
CDD_XBAR_CLB_ADCAEVT3
CDD_XBAR_CLB_ADCAEVT4
CDD_XBAR_CLB_ADCBEVT1
CDD_XBAR_CLB_ADCBEVT2
CDD_XBAR_CLB_ADCBEVT3
CDD_XBAR_CLB_ADCBEVT4
CDD_XBAR_CLB_ADCCEVT1
CDD_XBAR_CLB_ADCCEVT2
CDD_XBAR_CLB_ADCCEVT3
CDD_XBAR_CLB_ADCCEVT4
CDD_XBAR_CLB_ADCDEVT1
CDD_XBAR_CLB_ADCDEVT2
CDD_XBAR_CLB_ADCDEVT3
CDD_XBAR_CLB_ADCDEVT4
CDD_XBAR_CLB_ADCEEVT1
CDD_XBAR_CLB_ADCEEVT2
CDD_XBAR_CLB_ADCEEVT3
CDD_XBAR_CLB_ADCEEVT4
CDD_XBAR_CLB_ADCSOCA
CDD_XBAR_CLB_ADCSOCB
CDD_XBAR_CLB_CLB1_OUT12
CDD_XBAR_CLB_CLB1_OUT13
CDD_XBAR_CLB_CLB2_OUT12
CDD_XBAR_CLB_CLB2_OUT13
CDD_XBAR_CLB_CLB3_OUT12
CDD_XBAR_CLB_CLB3_OUT13
CDD_XBAR_CLB_CLB4_OUT12
CDD_XBAR_CLB_CLB4_OUT13
CDD_XBAR_CLB_CLB5_OUT12
CDD_XBAR_CLB_CLB5_OUT13
CDD_XBAR_CLB_CLB6_OUT12
CDD_XBAR_CLB_CLB6_OUT13
CDD_XBAR_CLB_CMPSS10_CTRIPH
CDD_XBAR_CLB_CMPSS10_CTRIPL
CDD_XBAR_CLB_CMPSS11_CTRIPH
CDD_XBAR_CLB_CMPSS11_CTRIPL
CDD_XBAR_CLB_CMPSS12_CTRIPH
CDD_XBAR_CLB_CMPSS12_CTRIPL
CDD_XBAR_CLB_CMPSS1_CTRIPH
CDD_XBAR_CLB_CMPSS1_CTRIPL
CDD_XBAR_CLB_CMPSS2_CTRIPH
CDD_XBAR_CLB_CMPSS2_CTRIPL
CDD_XBAR_CLB_CMPSS3_CTRIPH
CDD_XBAR_CLB_CMPSS3_CTRIPL
CDD_XBAR_CLB_CMPSS4_CTRIPH
CDD_XBAR_CLB_CMPSS4_CTRIPL
CDD_XBAR_CLB_CMPSS5_CTRIPH
CDD_XBAR_CLB_CMPSS5_CTRIPL
CDD_XBAR_CLB_CMPSS6_CTRIPH
CDD_XBAR_CLB_CMPSS6_CTRIPL
CDD_XBAR_CLB_CMPSS7_CTRIPH
CDD_XBAR_CLB_CMPSS7_CTRIPL
CDD_XBAR_CLB_CMPSS8_CTRIPH
CDD_XBAR_CLB_CMPSS8_CTRIPL
CDD_XBAR_CLB_CMPSS9_CTRIPH
CDD_XBAR_CLB_CMPSS9_CTRIPL
CDD_XBAR_CLB_CPU1_ADCCHECKEVT1
CDD_XBAR_CLB_CPU1_ADCCHECKEVT2
CDD_XBAR_CLB_CPU1_ADCCHECKEVT3
CDD_XBAR_CLB_CPU1_ADCCHECKEVT4
CDD_XBAR_CLB_CPU1_ERAD_EVT10
CDD_XBAR_CLB_CPU1_ERAD_EVT11
CDD_XBAR_CLB_CPU1_ERAD_EVT8
CDD_XBAR_CLB_CPU1_ERAD_EVT9
CDD_XBAR_CLB_CPU2_ADCCHECKEVT1
CDD_XBAR_CLB_CPU2_ADCCHECKEVT2
CDD_XBAR_CLB_CPU2_ADCCHECKEVT3
CDD_XBAR_CLB_CPU2_ADCCHECKEVT4
CDD_XBAR_CLB_CPU2_ERAD_EVT10
CDD_XBAR_CLB_CPU2_ERAD_EVT11
CDD_XBAR_CLB_CPU2_ERAD_EVT8
CDD_XBAR_CLB_CPU2_ERAD_EVT9
CDD_XBAR_CLB_CPU3_ADCCHECKEVT1
CDD_XBAR_CLB_CPU3_ADCCHECKEVT2
CDD_XBAR_CLB_CPU3_ADCCHECKEVT3
CDD_XBAR_CLB_CPU3_ADCCHECKEVT4
CDD_XBAR_CLB_CPU3_ERAD_EVT10
CDD_XBAR_CLB_CPU3_ERAD_EVT11
CDD_XBAR_CLB_CPU3_ERAD_EVT8
CDD_XBAR_CLB_CPU3_ERAD_EVT9
CDD_XBAR_CLB_ECAP1_OUT
CDD_XBAR_CLB_ECAP1_TRIPOUT
CDD_XBAR_CLB_ECAP2_OUT
CDD_XBAR_CLB_ECAP2_TRIPOUT
CDD_XBAR_CLB_ECAP3_OUT
CDD_XBAR_CLB_ECAP3_TRIPOUT
CDD_XBAR_CLB_ECAP4_OUT
CDD_XBAR_CLB_ECAP4_TRIPOUT
CDD_XBAR_CLB_ECAP5_OUT
CDD_XBAR_CLB_ECAP5_TRIPOUT
CDD_XBAR_CLB_ECAP6_OUT
CDD_XBAR_CLB_ECAP6_TRIPOUT
CDD_XBAR_CLB_ECAT_SYNC0
CDD_XBAR_CLB_ECAT_SYNC1
CDD_XBAR_CLB_ESM_GEN_EVENT
CDD_XBAR_CLB_EXTSYNCOUT
CDD_XBAR_CLB_FSIRXA_TRIG1
CDD_XBAR_CLB_FSIRXA_TRIG2
CDD_XBAR_CLB_FSIRXA_TRIG3
CDD_XBAR_CLB_FSIRXB_TRIG1
CDD_XBAR_CLB_FSIRXB_TRIG2
CDD_XBAR_CLB_FSIRXB_TRIG3
CDD_XBAR_CLB_FSIRXC_TRIG1
CDD_XBAR_CLB_FSIRXC_TRIG2
CDD_XBAR_CLB_FSIRXC_TRIG3
CDD_XBAR_CLB_FSIRXD_TRIG1
CDD_XBAR_CLB_FSIRXD_TRIG2
CDD_XBAR_CLB_FSIRXD_TRIG3
CDD_XBAR_CLB_INPUTXBAR1
CDD_XBAR_CLB_INPUTXBAR10
CDD_XBAR_CLB_INPUTXBAR11
CDD_XBAR_CLB_INPUTXBAR12
CDD_XBAR_CLB_INPUTXBAR13
CDD_XBAR_CLB_INPUTXBAR14
CDD_XBAR_CLB_INPUTXBAR15
CDD_XBAR_CLB_INPUTXBAR16
CDD_XBAR_CLB_INPUTXBAR17
CDD_XBAR_CLB_INPUTXBAR18
CDD_XBAR_CLB_INPUTXBAR19
CDD_XBAR_CLB_INPUTXBAR2
CDD_XBAR_CLB_INPUTXBAR20
CDD_XBAR_CLB_INPUTXBAR21
CDD_XBAR_CLB_INPUTXBAR22
CDD_XBAR_CLB_INPUTXBAR23
CDD_XBAR_CLB_INPUTXBAR24
CDD_XBAR_CLB_INPUTXBAR25
CDD_XBAR_CLB_INPUTXBAR26
CDD_XBAR_CLB_INPUTXBAR27
CDD_XBAR_CLB_INPUTXBAR28
CDD_XBAR_CLB_INPUTXBAR29
CDD_XBAR_CLB_INPUTXBAR3
CDD_XBAR_CLB_INPUTXBAR30
CDD_XBAR_CLB_INPUTXBAR31
CDD_XBAR_CLB_INPUTXBAR32
CDD_XBAR_CLB_INPUTXBAR4
CDD_XBAR_CLB_INPUTXBAR5
CDD_XBAR_CLB_INPUTXBAR6
CDD_XBAR_CLB_INPUTXBAR7
CDD_XBAR_CLB_INPUTXBAR8
CDD_XBAR_CLB_INPUTXBAR9
CDD_XBAR_CLB_MCANA_FEVT0
CDD_XBAR_CLB_MCANA_FEVT1
CDD_XBAR_CLB_MCANA_FEVT2
CDD_XBAR_CLB_MCANB_FEVT0
CDD_XBAR_CLB_MCANB_FEVT1
CDD_XBAR_CLB_MCANB_FEVT2
CDD_XBAR_CLB_MCANC_FEVT0
CDD_XBAR_CLB_MCANC_FEVT1
CDD_XBAR_CLB_MCANC_FEVT2
CDD_XBAR_CLB_MCAND_FEVT0
CDD_XBAR_CLB_MCAND_FEVT1
CDD_XBAR_CLB_MCAND_FEVT2
CDD_XBAR_CLB_MCANE_FEVT0
CDD_XBAR_CLB_MCANE_FEVT1
CDD_XBAR_CLB_MCANE_FEVT2
CDD_XBAR_CLB_MCANF_FEVT0
CDD_XBAR_CLB_MCANF_FEVT1
CDD_XBAR_CLB_MCANF_FEVT2
CDD_XBAR_CLB_SD1FLT1_COMPH
CDD_XBAR_CLB_SD1FLT1_COMPL
CDD_XBAR_CLB_SD1FLT2_COMPH
CDD_XBAR_CLB_SD1FLT2_COMPL
CDD_XBAR_CLB_SD1FLT3_COMPH
CDD_XBAR_CLB_SD1FLT3_COMPL
CDD_XBAR_CLB_SD1FLT4_COMPH
CDD_XBAR_CLB_SD1FLT4_COMPL
CDD_XBAR_CLB_SD2FLT1_COMPH
CDD_XBAR_CLB_SD2FLT1_COMPL
CDD_XBAR_CLB_SD2FLT2_COMPH
CDD_XBAR_CLB_SD2FLT2_COMPL
CDD_XBAR_CLB_SD2FLT3_COMPH
CDD_XBAR_CLB_SD2FLT3_COMPL
CDD_XBAR_CLB_SD2FLT4_COMPH
CDD_XBAR_CLB_SD2FLT4_COMPL
CDD_XBAR_CLB_SD3FLT1_COMPH
CDD_XBAR_CLB_SD3FLT1_COMPL
CDD_XBAR_CLB_SD3FLT2_COMPH
CDD_XBAR_CLB_SD3FLT2_COMPL
CDD_XBAR_CLB_SD3FLT3_COMPH
CDD_XBAR_CLB_SD3FLT3_COMPL
CDD_XBAR_CLB_SD3FLT4_COMPH
CDD_XBAR_CLB_SD3FLT4_COMPL
CDD_XBAR_CLB_SD4FLT1_COMPH
CDD_XBAR_CLB_SD4FLT1_COMPL
CDD_XBAR_CLB_SD4FLT2_COMPH
CDD_XBAR_CLB_SD4FLT2_COMPL
CDD_XBAR_CLB_SD4FLT3_COMPH
CDD_XBAR_CLB_SD4FLT3_COMPL
CDD_XBAR_CLB_SD4FLT4_COMPH
CDD_XBAR_CLB_SD4FLT4_COMPL
CDD_XBAR_CLB_WADI1OUT0
CDD_XBAR_CLB_WADI1OUT1
CDD_XBAR_CLB_WADI1OUT2
CDD_XBAR_CLB_WADI1OUT3
CDD_XBAR_CLB_WADI1OUT4
CDD_XBAR_CLB_WADI1OUT5
CDD_XBAR_CLB_WADI1OUT6
CDD_XBAR_CLB_WADI1OUT7
CDD_XBAR_CLB_WADI2OUT0
CDD_XBAR_CLB_WADI2OUT1
CDD_XBAR_CLB_WADI2OUT2
CDD_XBAR_CLB_WADI2OUT3
CDD_XBAR_CLB_WADI2OUT4
CDD_XBAR_CLB_WADI2OUT5
CDD_XBAR_CLB_WADI2OUT6
CDD_XBAR_CLB_WADI2OUT7 |
###### CddXbarMindbXbarConfig
Configuration for MINDB Crossbar
###### CddXbarMindbXbarConfigurationLock
| Item ||
|--------|---------------|
| **Name** | CddXbarMindbXbarConfigurationLock |
| **Description** | Option to lock the MINDB crossbar instance for any further configuration until System Reset. Cannot be unlocked once locked unless reset. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddXbarMindbXbarInstanceConfig
Configuration for MINDB Crossbar Instance, one per output line available
###### CddXbarMindbXbarOutputLine
| Item ||
|--------|---------------|
| **Name** | CddXbarMindbXbarOutputLine |
| **Description** | Number of Output Line instance to be set for MINDB Crossbar. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_MINDBXBAR1 |
| **Range** | CDD_XBAR_MINDBXBAR1
CDD_XBAR_MINDBXBAR2
CDD_XBAR_MINDBXBAR3
CDD_XBAR_MINDBXBAR4
CDD_XBAR_MINDBXBAR5
CDD_XBAR_MINDBXBAR6
CDD_XBAR_MINDBXBAR7
CDD_XBAR_MINDBXBAR8
CDD_XBAR_MINDBXBAR9
CDD_XBAR_MINDBXBAR10
CDD_XBAR_MINDBXBAR11
CDD_XBAR_MINDBXBAR12
CDD_XBAR_MINDBXBAR13
CDD_XBAR_MINDBXBAR14
CDD_XBAR_MINDBXBAR15
CDD_XBAR_MINDBXBAR16 |
###### CddXbarMindbXbarOutputInversion
| Item ||
|--------|---------------|
| **Name** | CddXbarMindbXbarOutputInversion |
| **Description** | Option to invert the output signal for the selected output line of the MINDB Crossbar instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddXbarMindbXbarInput
Configuration for MINDB Crossbar Instance inputs
###### CddXbarMindbXbarInputGroup
| Item ||
|--------|---------------|
| **Name** | CddXbarMindbXbarInputGroup |
| **Description** | Number of Input Group to be chosen for MINDB Crossbar. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_INPUT_GROUP_0 |
| **Range** | CDD_XBAR_INPUT_GROUP_0
CDD_XBAR_INPUT_GROUP_1
CDD_XBAR_INPUT_GROUP_2 |
###### CddXbarMindbXbarInputLine
| Item ||
|--------|---------------|
| **Name** | CddXbarMindbXbarInputLine |
| **Description** | Number of Input Line from the Group selected to be chosen for MINDB Crossbar. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_MINDB_CLB1_OUT12 |
| **Range** | CDD_XBAR_MINDB_CLB1_OUT12
CDD_XBAR_MINDB_CLB1_OUT13
CDD_XBAR_MINDB_CLB2_OUT12
CDD_XBAR_MINDB_CLB2_OUT13
CDD_XBAR_MINDB_CLB3_OUT12
CDD_XBAR_MINDB_CLB3_OUT13
CDD_XBAR_MINDB_CLB4_OUT12
CDD_XBAR_MINDB_CLB4_OUT13
CDD_XBAR_MINDB_CLB5_OUT12
CDD_XBAR_MINDB_CLB5_OUT13
CDD_XBAR_MINDB_CLB6_OUT12
CDD_XBAR_MINDB_CLB6_OUT13
CDD_XBAR_MINDB_EPWM10A_DB_NO_HR
CDD_XBAR_MINDB_EPWM10B_DB_NO_HR
CDD_XBAR_MINDB_EPWM11A_DB_NO_HR
CDD_XBAR_MINDB_EPWM11B_DB_NO_HR
CDD_XBAR_MINDB_EPWM12A_DB_NO_HR
CDD_XBAR_MINDB_EPWM12B_DB_NO_HR
CDD_XBAR_MINDB_EPWM13A_DB_NO_HR
CDD_XBAR_MINDB_EPWM13B_DB_NO_HR
CDD_XBAR_MINDB_EPWM14A_DB_NO_HR
CDD_XBAR_MINDB_EPWM14B_DB_NO_HR
CDD_XBAR_MINDB_EPWM15A_DB_NO_HR
CDD_XBAR_MINDB_EPWM15B_DB_NO_HR
CDD_XBAR_MINDB_EPWM16A_DB_NO_HR
CDD_XBAR_MINDB_EPWM16B_DB_NO_HR
CDD_XBAR_MINDB_EPWM17A_DB_NO_HR
CDD_XBAR_MINDB_EPWM17B_DB_NO_HR
CDD_XBAR_MINDB_EPWM18A_DB_NO_HR
CDD_XBAR_MINDB_EPWM18B_DB_NO_HR
CDD_XBAR_MINDB_EPWM1A_DB_NO_HR
CDD_XBAR_MINDB_EPWM1B_DB_NO_HR
CDD_XBAR_MINDB_EPWM2A_DB_NO_HR
CDD_XBAR_MINDB_EPWM2B_DB_NO_HR
CDD_XBAR_MINDB_EPWM3A_DB_NO_HR
CDD_XBAR_MINDB_EPWM3B_DB_NO_HR
CDD_XBAR_MINDB_EPWM4A_DB_NO_HR
CDD_XBAR_MINDB_EPWM4B_DB_NO_HR
CDD_XBAR_MINDB_EPWM5A_DB_NO_HR
CDD_XBAR_MINDB_EPWM5B_DB_NO_HR
CDD_XBAR_MINDB_EPWM6A_DB_NO_HR
CDD_XBAR_MINDB_EPWM6B_DB_NO_HR
CDD_XBAR_MINDB_EPWM7A_DB_NO_HR
CDD_XBAR_MINDB_EPWM7B_DB_NO_HR
CDD_XBAR_MINDB_EPWM8A_DB_NO_HR
CDD_XBAR_MINDB_EPWM8B_DB_NO_HR
CDD_XBAR_MINDB_EPWM9A_DB_NO_HR
CDD_XBAR_MINDB_EPWM9B_DB_NO_HR |
###### CddXbarIclXbarConfig
Configuration for ICL Crossbar
###### CddXbarIclXbarConfigurationLock
| Item ||
|--------|---------------|
| **Name** | CddXbarIclXbarConfigurationLock |
| **Description** | Option to lock the ICL crossbar instance for any further configuration until System Reset. Cannot be unlocked once locked unless reset. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddXbarIclXbarInstanceConfig
Configuration for ICL Crossbar Instance, one per output line available
###### CddXbarIclXbarOutputLine
| Item ||
|--------|---------------|
| **Name** | CddXbarIclXbarOutputLine |
| **Description** | Number of Output Line instance to be set for ICL Crossbar. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_ICLXBAR1 |
| **Range** | CDD_XBAR_ICLXBAR1
CDD_XBAR_ICLXBAR2
CDD_XBAR_ICLXBAR3
CDD_XBAR_ICLXBAR4
CDD_XBAR_ICLXBAR5
CDD_XBAR_ICLXBAR6
CDD_XBAR_ICLXBAR7
CDD_XBAR_ICLXBAR8
CDD_XBAR_ICLXBAR9
CDD_XBAR_ICLXBAR10
CDD_XBAR_ICLXBAR11
CDD_XBAR_ICLXBAR12
CDD_XBAR_ICLXBAR13
CDD_XBAR_ICLXBAR14
CDD_XBAR_ICLXBAR15
CDD_XBAR_ICLXBAR16 |
###### CddXbarIclXbarOutputInversion
| Item ||
|--------|---------------|
| **Name** | CddXbarIclXbarOutputInversion |
| **Description** | Option to invert the output signal for the selected output line of the ICL Crossbar instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddXbarIclXbarInput
Configuration for ICL Crossbar Instance inputs
###### CddXbarIclXbarInputGroup
| Item ||
|--------|---------------|
| **Name** | CddXbarIclXbarInputGroup |
| **Description** | Number of Input Group to be chosen for ICL Crossbar. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_INPUT_GROUP_0 |
| **Range** | CDD_XBAR_INPUT_GROUP_0
CDD_XBAR_INPUT_GROUP_1
CDD_XBAR_INPUT_GROUP_2 |
###### CddXbarIclXbarInputLine
| Item ||
|--------|---------------|
| **Name** | CddXbarIclXbarInputLine |
| **Description** | Number of Input Line from the Group selected to be chosen for ICL Crossbar. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_XBAR_ICL_CLB1_OUT12 |
| **Range** | CDD_XBAR_ICL_CLB1_OUT12
CDD_XBAR_ICL_CLB1_OUT13
CDD_XBAR_ICL_CLB2_OUT12
CDD_XBAR_ICL_CLB2_OUT13
CDD_XBAR_ICL_CLB3_OUT12
CDD_XBAR_ICL_CLB3_OUT13
CDD_XBAR_ICL_CLB4_OUT12
CDD_XBAR_ICL_CLB4_OUT13
CDD_XBAR_ICL_CLB5_OUT12
CDD_XBAR_ICL_CLB5_OUT13
CDD_XBAR_ICL_CLB6_OUT12
CDD_XBAR_ICL_CLB6_OUT13
CDD_XBAR_ICL_EPWM10A_MINDB
CDD_XBAR_ICL_EPWM10B_MINDB
CDD_XBAR_ICL_EPWM11A_MINDB
CDD_XBAR_ICL_EPWM11B_MINDB
CDD_XBAR_ICL_EPWM12A_MINDB
CDD_XBAR_ICL_EPWM12B_MINDB
CDD_XBAR_ICL_EPWM13A_MINDB
CDD_XBAR_ICL_EPWM13B_MINDB
CDD_XBAR_ICL_EPWM14A_MINDB
CDD_XBAR_ICL_EPWM14B_MINDB
CDD_XBAR_ICL_EPWM15A_MINDB
CDD_XBAR_ICL_EPWM15B_MINDB
CDD_XBAR_ICL_EPWM16A_MINDB
CDD_XBAR_ICL_EPWM16B_MINDB
CDD_XBAR_ICL_EPWM17A_MINDB
CDD_XBAR_ICL_EPWM17B_MINDB
CDD_XBAR_ICL_EPWM18A_MINDB
CDD_XBAR_ICL_EPWM18B_MINDB
CDD_XBAR_ICL_EPWM1A_MINDB
CDD_XBAR_ICL_EPWM1B_MINDB
CDD_XBAR_ICL_EPWM2A_MINDB
CDD_XBAR_ICL_EPWM2B_MINDB
CDD_XBAR_ICL_EPWM3A_MINDB
CDD_XBAR_ICL_EPWM3B_MINDB
CDD_XBAR_ICL_EPWM4A_MINDB
CDD_XBAR_ICL_EPWM4B_MINDB
CDD_XBAR_ICL_EPWM5A_MINDB
CDD_XBAR_ICL_EPWM5B_MINDB
CDD_XBAR_ICL_EPWM6A_MINDB
CDD_XBAR_ICL_EPWM6B_MINDB
CDD_XBAR_ICL_EPWM7A_MINDB
CDD_XBAR_ICL_EPWM7B_MINDB
CDD_XBAR_ICL_EPWM8A_MINDB
CDD_XBAR_ICL_EPWM8B_MINDB
CDD_XBAR_ICL_EPWM9A_MINDB
CDD_XBAR_ICL_EPWM9B_MINDB |
##### CddXbarGeneral
Contains the general configuration parameters of the module.
###### CddXbarDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | CddXbarDevErrorDetect |
| **Description** | Switches the Development Error Detection and Reporting ON or OFF for this module. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddXbarVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | CddXbarVersionInfoApi |
| **Description** | Switches the Cdd_Xbar_GetVersionInfo function ON or OFF. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddXbarInputFlagApi
| Item ||
|--------|---------------|
| **Name** | CddXbarInputFlagApi |
| **Description** | Switches Cdd_Xbar_InputFlagStatus() and Cdd_Xbar_InputFlagClear() ON or OFF. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddXbarInputFlag
| Item ||
|--------|---------------|
| **Name** | CddXbarInputFlag |
| **Description** | Reference to the Cdd Xbar input flag. This flag is used to flag the inputs of the X-Bars to provide software knowledge of the input sources which got triggered |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddXbarOutputXbarFlag
| Item ||
|--------|---------------|
| **Name** | CddXbarOutputXbarFlag |
| **Description** | Reference to the Cdd Xbar output xbar flag. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
#### Steps To Configure Cdd Xbar Module
1. Open EB Tresos configurator tool.
2. Go to Cdd Xbar Container tab and the specific Xbar which needs to be configured.
3. For Input Xbar, create a new container, select the Input Xbar source to be selected as input which is configured in the PORT configurator, INPUTx to be configured and select the lock configuration if required.
4. For Output Xbar, create a new container, select the Output XBAR configurations as required. For configuring the inputs, open the created container and go to CddXbarOutputXbarInput and create containers for the input group that needs to be selected. Open the created container for a group, go to the CddXbarOutputXbarInputLine and select the inputs that needs to be configured.
5. For ePWM Xbar, create a new container, select the ePWM XBAR configurations as required. For configuring the inputs, open the created container and go to CddXbarEpwmXbarInput and create containers for the input group that needs to be selected. Open the created container for a group, go to the CddXbarEpwmXbarInputLine and select the inputs that needs to be configured.
6. For CLB Xbar, create a new container, select the CLB XBAR configurations as required. For configuring the inputs, open the created container and go to CddXbarClbXbarInput and create containers for the input group that needs to be selected. Open the created container for a group, go to the CddXbarClbXbarInputLine and select the inputs that needs to be configured.
7. For MINDB Xbar, create a new container, select the MINDB XBAR configurations as required. For configuring the inputs, open the created container and go to CddXbarMindbXbarInput and create containers for the input group that needs to be selected. Open the created container for a group, go to the CddXbarMindbXbarInputLine and select the inputs that needs to be configured.
8. For ICL Xbar, create a new container, select the ICL XBAR configurations as required. For configuring the inputs, open the created container and go to CddXbarIclXbarInput and create containers for the input group that needs to be selected. Open the created container for a group, go to the CddXbarIclXbarInputLine and select the inputs that needs to be configured.
9. Save the configuration and generate the configuration.
### Examples
The example application demonstrates use of Cdd Xbar module. The examples are explained below in detail.
#### Cdd_Xbar_GpioToGpio
##### Overview of Cdd_Xbar_GpioToGpio
* Cdd_Xbar_GpioToGpio
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init().
* Initializes the input pins for Input Xbar and the OUTPUTXBARx using Port_Init().
* Initializes the Xbar configurations according to the configurations selected in the configurator.
* Cdd_Xbar_GetVersionInfo will get the software version info details.
* Cdd_Xbar_SelectInput will select/deselect the inputs for the specific Xbar.
* Cdd_Xbar_LockStatus will return the lock status of the specific Xbar.
* Cdd_Xbar_Lock will lock the specific Xbar.
#### Setup required to run Cdd_Xbar_GpioToGpio
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
#### How to run Cdd_Xbar_GpioToGpio
* Open CCS and import Cdd_Xbar_GpioToGpio Example
* Build project and start debug project
##### Sample Log of Cdd_Xbar_GpioToGpio
```{literalinclude} Assets/text/Cdd_Xbar/F29H85x/Cdd_Xbar_GpioToGpio.txt
```
#### Cdd_Xbar_Gpio_interrupt
##### Overview of Cdd_Xbar_Gpio_interrupt
* Cdd_Xbar_Gpio_interrupt
* EcuM_Init()
* Initializes clock to 200 MHz using Mcu_Init().
* Initializes the input pins for Input Xbar and the OUTPUTXBARx using Port_Init().
* Initializes the Xbar configurations and external interrupt (XINT1) with positive edge trigger.
* Cdd_Xbar_GetVersionInfo will get the software version info details.
* Cdd_Xbar_GetExternalInterruptCounter will read the hardware counter value for external interrupts.
* Cdd_Xbar_SetExternalInterruptType will change the interrupt edge type (e.g., BOTH_EDGES).
* Cdd_Xbar_SetExternalInterruptState will enable/disable the external interrupt.
* Demonstrates GPIO toggling connected to Input XBAR triggering external interrupt (XINT1).
* Routes input signal from Input XBAR to Output XBAR for observation on separate pin.
#### Setup required to run Cdd_Xbar_Gpio_interrupt
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
#### How to run Cdd_Xbar_Gpio_interrupt
* Open CCS and import Cdd_Xbar_Gpio_interrupt Example
* Build project and start debug project
##### Sample Log of Cdd_Xbar_Gpio_interrupt
```{literalinclude} Assets/text/Cdd_Xbar/F29H85x/Cdd_Xbar_Gpio_interrupt.txt
```
#### File Structure
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂Adc\
┃ ┣ 📂Can\
┃ ┣ 📂DeviceSupport\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂Lin\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┣ 📂Spi\
┃ ┣ 📂Wdg\
┃ ┣ 📂**Cdd Xbar**\
┃ ┃ ┣ 📂 **Cdd_Xbar_GpioToGpio**\
┃ ┃ ┃ ┣ 📂ccs\
┃ ┃ ┃ ┃ ┗ 📜**Cdd_Xbar_GpioToGpio.projectspec**\
┃ ┃ ┃ ┣ 📂Cdd_Xbar_GpioToGpio_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dio.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Port.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Cdd_Xbar.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dio_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Cdd_Xbar_Cfg.h** : *Contains the generated pre-compiler configuration header*\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dio_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Port_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜**Cdd_Xbar_Cfg.c** : *Contains the generated pre-compiler configuration source*\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜**Cdd_Xbar_GpioToGpio.h** : *Contains data structures and Internal function declarations*\
┃ ┃ ┃ ┗ 📜**Cdd_Xbar_GpioToGpio.c**: *Example application for Cdd Xbar*\
┃ ┃ ┗ 📂 **Cdd_Xbar_Gpio_interrupt**\
┃ ┗ 📜CMakeLists.txt\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
## CDD UART Module
### Acronyms and Definitions
|Abbreviation/Term|Explanation|
|------|------|
|AUTOSAR|Automotive Open System Architecture|
|UART|Universal Asynchronous Receiver/Transmitter|
|ISR |Interrupt Service Routine|
|INT |Interrupt|
|API|Application Programming Interface|
|BSW|Basic Software|
|ECU|Electronic Control Unit|
|DET|Development Error Tracer|
|HW |Hardware|
|SW |Software|
|I/O|Input Output|
|RTDMA|Real-Time Direct Memory Access Controller|
|FIFO|First In First Out|
|SIR-Encoder|Serial Infrared Encoder|
|MCAL|Microcontroller Abstraction Layer|
|RTE|Runtime Environmental|
|EOT|End Of Transmission|
|CDD|Complex Device Driver|
|SYSCLK|System Clock|
|IrDA|Infrared Data Association|
### Introduction
The UART driver is a part of complex device drivers (CDD) which provides data read and write transfer using the module unit channels in the device board.
```{figure} Assets/images/Cdd_Uart_Autosar_CDD.png
:alt: CDD_UART MCAL AUTOSAR
:align: center
CDD_UART MCAL AUTOSAR
```
This document details AUTOSAR BSW CDD_UART module implementation
|Supported AUTOSAR Release|**4.3.1**|
|------|-------------|
| **Supported Configuration Variants** | **Pre-Compile**|
| **Vendor ID** | **CDD_UART_VENDOR_ID (44)**|
| **Module ID** | **CDD_UART_MODULE_ID (255)**|
### Functional Overview
The UART module performs the functions of parallel-to-serial and serial-to-parallel conversions. The transmit logic performs parallel-to-serial conversion on the data read from the transmit FIFO. The control logic outputs the serial bit stream beginning with a start bit and followed by the data bits (LSB first), parity bit, and the stop bits according to the programmed configuration in the control registers. The receive logic performs serial-to-parallel conversion on the received bit stream after a valid start pulse has been detected. Overrun, parity, frame error checking, and line-break detection are also performed, and the status accompanies the data that is written to the receive FIFO.
### Hardware Features
#### Hardware Features supported
The Universal Asynchronous Receiver/Transmitter (UART) module in this device contains the following features:
* Programmable baud-rate generator allowing speeds up to 12.5Mbps for regular speed (divide by 16) and
25Mbps for high speed (divide by 8)
* Separate 16-deep and 8-bit wide transmit (TX) and receive (RX) FIFOs to reduce CPU interrupt service
loading
* Programmable FIFO length providing conventional double-buffered interface
* FIFO trigger levels of ⅛, ¼, ½, ¾, and ⅞
* Standard asynchronous communication bits for start, stop, and parity
* Line-break generation and detection
* Fully programmable serial interface characteristics
* 5, 6, 7, or 8 data bits
* Even, odd, stick, or no parity bit generation and detection
* 1 or 2 stop bit generation
* IrDA serial-IR (SIR) encoder and decoder providing
* Programmable use of IrDA SIR or UART input/output
* Support of IrDA SIR encoder and decoder functions for data rates up to 115.2kbps half-duplex
* Support of normal 3/16 and low-power (1.41 to 2.23μs) bit durations
* Programmable internal clock generator enabling division of reference clock by 1 to 256 for low-power mode bit duration
* EIA-485 9-bit support
* Standard FIFO-level and End-of-Transmission (EOT) interrupts
* Efficient transfers using Real-Time Direct Memory Access Controller (RTDMA)
* Separate channels for transmit and receive
* Receive single request asserted when data is in the FIFO; burst request asserted at programmed FIFO level
* Transmit single request asserted when there is space in the FIFO; burst request asserted at programmed FIFO level
* SYSCLK is used to generate the baud clock.
```{figure} Assets/images/Cdd_Uart_Block_Diagram.png
:alt: Cdd_Uart Block diagram
:align: center
Cdd_Uart Block Diagram
```
#### Features not supported by Hardware
None
#### Features Not supported by the driver
* DMA
* 9-bit mode data transfer
* IrDA
* Polling mode read
#### Non compliance
None
### Source files
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┃ ┣ 📂BSW_Stubs\
┃ ┣ 📂Can\
┃ ┣ 📂**Cdd_Uart**\
┃ ┃ ┣ 📂**include**\
┃ ┃ ┃ ┣ 📜**Cdd_Uart.h** : *Contains the API declarations of the Cdd_Uart driver to be used by upper layers.*\
┃ ┃ ┃ ┣ 📜**Cdd_Uart_Priv.h** : *Contains data structures and Internal function declarations.*\
┃ ┃ ┣ 📂**src**\
┃ ┃ ┃ ┣ 📜**Cdd_Uart.c** : *Contains the implementation of the API for Cdd_Uart driver.*\
┃ ┃ ┃ ┣ 📜**Cdd_Uart_Irq.c** : *Contains the implementation for Cdd_Uart interrupts handlers.*\
┃ ┃ ┃ ┗ 📜**Cdd_Uart_Priv.c** : *Contains Functions that support the API for Cdd_Uart driver*\
┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂hw_include\
┃ ┣ 📂Mcal_Lib\
┃ ┣ 📂Mcu\
┃ ┗ 📂Port\
┣ 📂examples\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
```{figure} Assets/images/Cdd_Uart_Header_File_Structure.png
:alt: Cdd_Uart Header File Structure
:align: center
Cdd_Uart Header File Structure
```
### Module requirements
#### Memory Mapping
The driver follows the AUTOSAR memory mapping strategy. All memory sections should be stored in memory as per AUTOSAR specifications, considering initialization policy, alignment requirements, safety classification, and core scope where applicable.
Reference memory map files can be found at:
```text
{MCAL_INSTALL_PATH}\drivers\BSW_Stubs\MemMap\include
```
The memory sections are organized according to AUTOSAR specifications to ensure proper placement of code and data in different memory regions based on their usage and access patterns.
#### Scheduling
None
#### Error handling
Development errors are reported to the DET using the service Det_ReportError(), when enabled. The driver interface contains the MACRO declaration of the error codes to be returned.
#### Error codes
##### Development Errors
|Type of Error|Related Error code|Value (Hex)|
|----|-----|-------|
|API service used without module initialization|CDD_UART_E_UNINIT|0x01U|
|API Cdd_Uart_Init service called while the UART driver has already been initialized|CDD_UART_E_ALREADY_INITIALIZED|0x02U|
|API service called with invalid parameter value|CDD_UART_E_PARAM_VALUE|0x03U|
|API service called with invalid data buffer pointer|CDD_UART_E_PARAM_POINTER|0x04U|
|API service called with invalid hardware index|CDD_UART_E_PARAM_HWINDEX|0x05U|
|API Service called without initialization|CDD_UART_E_NOT_INITIALIZED|0x06U|
|API service called when UART is busy|CDD_UART_E_BUSY|0x07U|
##### Runtime Errors
None
### Safety Mechanism
None
### Silicon errata workarounds and recommendation
For detailed silicon errata, refer to the [F29H85x, F29P58x, and F29P32x Real-Time MCUs Silicon Errata](https://www.ti.com/lit/er/sprz569c/sprz569c.pdf).
| Advisory | Workaround in MCAL driver | Recommended actions for user |
|----------|--------------------------|-------------------------------|
| UART FIFO Gets Cleared on Continuous Debugger Reads | No workaround is implemented in the UART driver. The FIFO drain is triggered by debugger memory access and cannot be intercepted or prevented at the driver level. | Do not keep the memory browser open during UART data transfers, as continuous debugger reads of UART registers will drain the receive FIFO and cause data loss. |
### Used resources
#### Interrupt Handling
Cdd_Uart driver provides ISRs. The ISRs are implemented in the Cdd_Uart_Irq.c file.
Interrupt and the category should be selected in the Cdd_Uart plugin.The Interrupt ID associated with the UART instance is mentioned in the TRM (also, please refer the Example application).
|Cdd_Uart Instance| Interrupt Name | Interrupt handler|
|------------|----------------|-----------------|
|UARTA| UARTA_INT | Cdd_Uart_A_ISR|
|UARTB| UARTB_INT | Cdd_Uart_B_ISR|
|UARTC| UARTC_INT | Cdd_Uart_C_ISR|
|UARTD| UARTD_INT | Cdd_Uart_D_ISR|
|UARTE| UARTE_INT | Cdd_Uart_E_ISR|
|UARTF| UARTF_INT | Cdd_Uart_F_ISR|
#### Instance support
|CPU instances|supported|
|-------|-------|
|CPU 1 | YES |
|CPU 2 | NO |
|CPU 3 | NO |
#### Hardware-Software Mapping
Below image shows Cdd_Uart driver Hardware-Software mapping. For more information related to HW/SW mapping, refer the F29x Technical Reference Manual.
```{figure} Assets/images/Cdd_Uart_Hw_Sw_Mapping.png
:alt: Cdd_Uart HW/SW Mapping
:align: center
Cdd_Uart HW/SW Mapping
```
### Integration description
#### Dependent modules
##### DET
This driver depends on the DET in order to report development and runtime errors.
The detection of development errors is configurable ON/OFF. The switch UART_CFG_DEV_ERROR_DETECT will activate or deactivate the detection of development errors. Runtime errors are reported even when UART_CFG_DEV_ERROR_DETECT is OFF.
##### SchM
If multiple AUTOSAR runnables have access to the same Data Store Memory block, the exported AUTOSAR specification enforces data consistency by using an AUTOSAR exclusive area. With this specification, the runnables have mutually exclusive access to the per-instance memory global data, which prevents data corruption. Beside the OS, the BSW Scheduler provides functions that CDD_UART module calls at begin and end of critical sections. This implementation requires 1 level of exclusive access to guard critical sections.
The data consistency mechanism that has to be applied to an ExclusiveArea might be domain, ECU or even project specific. The decision which mechanism has to be applied by RTE / Basic Software Scheduler is taken during ECU integration by setting the Exclusive Area configuration parameter RteExclusiveAreaImplMechanism. This parameter is an input for RTE generator.
For CDD_UART Module, data consistency and exclusive access to critical sections are required for the following sections as shown in the table below:
| Exclusive Area Functions used | CDD_UART Function calling Exclusive Area | Need for Exclusive Area | Recommended Exclusive Area Mapping |
|-------|-------|-------|-------|
|CDD_UART_EXCLUSIVE_AREA_0 | Cdd_Uart_Write
Cdd_Uart_CancelWrite
Cdd_Uart_GetWriteStatus| To protect against multiple access for shared resources which can lead to race condition |**ALL_INTERRUPT_BLOCKING** : All interrupts should be blocked if these API's are called in the interrupts.
**OS_RESOURCE** : If the CDD UART APIs are only called from pre-emptible task context, its recommended to use this mechanism as it takes care of resource access protection and task priority management.|
|CDD_UART_EXCLUSIVE_AREA_1 | Cdd_Uart_Read
Cdd_Uart_CancelRead
Cdd_Uart_GetReadStatus| To protect against multiple access for shared resources which can lead to race condition |**ALL_INTERRUPT_BLOCKING** : All interrupts should be blocked if these API's are called in the interrupts.
**OS_RESOURCE** : If the CDD UART APIs are only called from pre-emptible task context, its recommended to use this mechanism as it takes care of resource access protection and task priority management. |
##### MCU
MCU Module is required for the Uart Baudrate initialization.
##### Port
The Port module configures the analog port pins used for the UART driver. Hence, the Port driver has to be initialized prior to use UART functions and to observe proper conversion results. Otherwise incorrect conversion results will be observed.
##### OS
The Cdd_Uart driver uses interrupts and therefore depends on OS, which configures the interrupts.
#### Resource Allocator
The UART module uses the Resource Allocator to allocate UART peripheral instances to CPU cores and configure their memory-mapped base addresses. Each allocation is placed inside a **Context** that maps to a CPU core (e.g. `CPU1`). The **CurrentContext** parameter in the Resource Allocator selects which Context is active for MCAL execution. See the [Resource Allocator Module User Guide](Module_User_Guide_ResourceAllocator.md) for details on configuring device-specific settings.
The **Frame** parameter (`FRAME0`–`FRAME3`) selects the memory-mapped frame for the instance, enabling simultaneous access from different initiators without arbitration stalls. The **BaseAddr** is auto-calculated based on the selected instance and frame. The **DebugHaltEnabled** and **StandbyModeEnabled** parameters control peripheral behaviour during CPU debug halt and standby low-power modes respectively.
##### Resource Allocator Usage Example
To allocate UARTA to CPU1 using FRAME0:
1. In the Resource Allocator configuration, create a new Uart instance allocation under the CPU1 Context
2. Set **InstanceName** to `UARTA`
3. Set **Frame** to `FRAME0`
4. The **BaseAddr** will be automatically calculated as `UARTA_BASE_FRAME(0U)`
5. Optionally configure **DebugHaltEnabled** and **StandbyModeEnabled**
```text
Resource Allocator Configuration:
├── Context (Core: CPU1)
│ └── Cdd_UartAllocatedInstance
│ ├── InstanceName: UARTA
│ ├── Frame: FRAME0
│ ├── BaseAddr: UARTA_BASE_FRAME(0U) [auto-calculated]
│ ├── DebugHaltEnabled: true
│ └── StandbyModeEnabled: true
```
### Configuration
The Cdd Uart Driver implementation supports single configuration variants, namely Pre-Compile config. The driver expects generated **Cdd_Uart_Cfg.h** to be present as input file.
The associated Cdd Uart driver configuration generated source file is **Cdd_Uart_Cfg.c**.
The generated configuration files should not be modified manually. The config tool [Elektrobit Tresos](https://www.elektrobit.com/products/ecu/eb-tresos/studio/) should be used to modify the configuration files.
```{Note}
Refer section [Getting Started with EB Tresos](./MCAL_Configuration_and_EB_Tresos.md#getting-started-with-eb-tresos) of Chapter **MCAL Configuration and EB Tresos** for more information on how to load plugin and generate the configuration files.
```
#### Configuration Parameters
##### CddUartConfigSet
This container contains the configuration parameters and sub containers of the CddUart module.
###### CddUartConfig
This container contains the configuration parameters of the CddUart HW units.
###### CddUartBaseAddress
| Item ||
|--------|---------------|
| **Name** | CddUartBaseAddress |
| **Description** | Specifies the CddUart HW unit base address. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | UARTA_BASE_FRAME(0) |
###### CddUartHWUnitId
| Item ||
|--------|---------------|
| **Name** | CddUartHWUnitId |
| **Description** | This parameter provides the HW unit ID which is unique in a given CddUart Driver. The value for this parameter starts with 0 and continue without any gaps. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0 |
| **Max-value** | 5 |
| **Min-value** | 0 |
###### CddUartBaudRate
| Item ||
|--------|---------------|
| **Name** | CddUartBaudRate |
| **Description** | This parameter takes the input value of Baud Rate for both the channel (Write/Read) |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 115200 |
| **Max-value** | 25000000 |
| **Min-value** | 300 |
###### CddUartProcessingMode
| Item ||
|--------|---------------|
| **Name** | CddUartProcessingMode |
| **Description** | Defines the Uart Processing mode. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_UART_MODE_INTERRUPT |
| **Range** | CDD_UART_MODE_POLLING
CDD_UART_MODE_INTERRUPT |
###### CddUartFIFOModeEnable
| Item ||
|--------|---------------|
| **Name** | CddUartFIFOModeEnable |
| **Description** | Enable/Disable FIFO Mode. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddUartInteruptType
| Item ||
|--------|---------------|
| **Name** | CddUartInteruptType |
| **Description** | This parameter specifies the category of Interrupt Request for callbacks. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_UART_ISR_CAT1_INT |
| **Range** | CDD_UART_ISR_CAT1_RTINT
CDD_UART_ISR_CAT1_INT
CDD_UART_ISR_CAT2 |
###### CddUartParityModeEnable
| Item ||
|--------|---------------|
| **Name** | CddUartParityModeEnable |
| **Description** | Enable/Disable Parity mode. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddUartParityBit
| Item ||
|--------|---------------|
| **Name** | CddUartParityBit |
| **Description** | type of parity bit in the frame |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_UART_PARITY_EVEN |
| **Range** | CDD_UART_PARITY_EVEN
CDD_UART_PARITY_ODD |
###### CddUartStopBit
| Item ||
|--------|---------------|
| **Name** | CddUartStopBit |
| **Description** | number of stop bits in the frame |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_UART_STOP_BITS_1 |
| **Range** | CDD_UART_STOP_BITS_1
CDD_UART_STOP_BITS_2 |
###### CddUartWordLength
| Item ||
|--------|---------------|
| **Name** | CddUartWordLength |
| **Description** | word length of a frame |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_UART_WORD_LENGTH_8 |
| **Range** | CDD_UART_WORD_LENGTH_8
CDD_UART_WORD_LENGTH_7
CDD_UART_WORD_LENGTH_6
CDD_UART_WORD_LENGTH_5 |
###### CddUartEnableWrite
| Item ||
|--------|---------------|
| **Name** | CddUartEnableWrite |
| **Description** | Enable/Disable Write Mode. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddUartEnableRead
| Item ||
|--------|---------------|
| **Name** | CddUartEnableRead |
| **Description** | Enable/Disable Read Mode. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddUartLoopBackModeEnable
| Item ||
|--------|---------------|
| **Name** | CddUartLoopBackModeEnable |
| **Description** | Enable/Disable Loop Back Mode. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | false |
###### CddUartInstance
| Item ||
|--------|---------------|
| **Name** | CddUartInstance |
| **Description** | Reference to the Cdd_Uart Instance. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddUartClockFreq
| Item ||
|--------|---------------|
| **Name** | CddUartClockFreq |
| **Description** | This parameter takes the input value of clock frequency |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
###### CddUartWriteConfig
This container contains the configuration parameters of the CddUart Write
###### CddUartWriteNotificationHandler
| Item ||
|--------|---------------|
| **Name** | CddUartWriteNotificationHandler |
| **Description** | This parameter is a write notification handler function. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddUartTriggerLevelWriteFIFO
| Item ||
|--------|---------------|
| **Name** | CddUartTriggerLevelWriteFIFO |
| **Description** | set interrupt trigger level of Write FIFO |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_UART_FIFO_LEVEL_1_2 |
| **Range** | CDD_UART_FIFO_LEVEL_1_8
CDD_UART_FIFO_LEVEL_1_4
CDD_UART_FIFO_LEVEL_1_2
CDD_UART_FIFO_LEVEL_3_4
CDD_UART_FIFO_LEVEL_7_8 |
###### CddUartReadConfig
This container contains the configuration parameters of the CddUart Read
###### CddUartReadNotificationHandler
| Item ||
|--------|---------------|
| **Name** | CddUartReadNotificationHandler |
| **Description** | This parameter is a read notification handler function. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddUartErrorNotificationHandler
| Item ||
|--------|---------------|
| **Name** | CddUartErrorNotificationHandler |
| **Description** | This parameter is a error notification handler function. |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | NULL_PTR |
###### CddUartTriggerLevelReadFIFO
| Item ||
|--------|---------------|
| **Name** | CddUartTriggerLevelReadFIFO |
| **Description** | set interrupt trigger level of Read FIFO |
| **Multiplicity-Configuration-Class** | -- |
| Pre-Compile Time | VARIANT-PRE-COMPILE |
| **Origin** | Texas Instruments |
| **Post-build-variant-multiplicity** | false |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | CDD_UART_FIFO_LEVEL_1_2 |
| **Range** | CDD_UART_FIFO_LEVEL_1_8
CDD_UART_FIFO_LEVEL_1_4
CDD_UART_FIFO_LEVEL_1_2
CDD_UART_FIFO_LEVEL_3_4
CDD_UART_FIFO_LEVEL_7_8 |
##### CddUartGeneral
General CddUart` module configuration parameters.
###### CddUartMainFunctionWritePeriod
| Item ||
|--------|---------------|
| **Name** | CddUartMainFunctionWritePeriod |
| **Description** | This parameter describes the period for cyclic call to Cdd_Uart_MainFunction_Write. Unit is seconds. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | 0.01 |
| **Max-value** | INF |
| **Min-value** | 1.0E-6 |
###### CddUartDevErrorDetect
| Item ||
|--------|---------------|
| **Name** | CddUartDevErrorDetect |
| **Description** | Switches the development error detection and notification on or off. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
###### CddUartVersionInfoApi
| Item ||
|--------|---------------|
| **Name** | CddUartVersionInfoApi |
| **Description** | Adds / removes the service CddUart_ GetVersionInfo() from the code. |
| **Origin** | Texas Instruments |
| **Post-Build-Variant-Value** | false |
| **Value-Configuration-Class** | -- |
| Pre-Compile-Time | VARIANT-PRE-COMPILE |
| **Default-value** | true |
#### Steps To Configure Cdd Uart Module
1. Open EB Tresos configurator tool, load Cdd_Uart module. Select the Precompile Config Variant.
2. Configure the required parameters.
3. Save the configuration and generate the configuration.
### Examples
The example applications demonstrates usecases of the Cdd_Uart driver APIs. The examples are explained below in detailed .
#### Cdd_Uart_Example_Loopback
##### Overview of Cdd_Uart_Example_Loopback
* Cdd_Uart_Example_Loopback
* EcuM_Init()
* Initialize clock to 200 MHz using Mcu_Init()
* Initialize pins in analog mode with Port_Init()
* Initialize Cdd_Uart driver using Cdd_Uart_Init()
* Loopback test executed on UART instance D
* Transmit sample string data of varying lengths through the WRITE module
* Read the data back through the READ module of the same instance
* The received data is then meticulously verified against the original transmit data to ensure accuracy and correctness.
* This process enables the detection of any errors or discrepancies, ensuring the reliability and functionality of the UART interface.
##### Setup required to run Cdd_Uart_Example_Loopback
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
##### How to run Cdd_Uart_Example_Loopback
* Open CCS and Import Cdd_Uart_Example_Loopback
* Build project and start debug project
##### Sample Log of Cdd_Uart_Example_Loopback
```{code-block}
Cdd_Uart_Example_Loopback: Sample Application - Starts!!!
Cdd_Uart MCAL Version Info
---------------------
Vendor ID : 44
Module ID : 255
SW Major Version : 2
SW Minor Version : 0
SW Patch Version : 0
Cdd_Uart_Example_Loopback: Sample Application - Completes successfully !!!
```
#### Cdd_Uart_Example_Read_Interrupt
##### Overview of Cdd_Uart_Example_Read_Interrupt
* Cdd_Uart_Example_Read_Interrupt
* EcuM_Init()
* Initialize clock to 200 MHz using Mcu_Init()
* Initialize pins in analog mode with Port_Init()
* Initialize Cdd_Uart driver using Cdd_Uart_Init()
* Read data to the transmit buffer using the Cdd_Uart_Read function
* Wait for the reception to complete
* Use the CddUartReadDoneCallback function to verify Cdd_Uart read interrupt functionality
* The program reads data to the receive buffer and verifies that the reception is complete,
demonstrating the reliability and functionality of the Cdd_Uart driver in interrupt mode.
##### Setup required to run Cdd_Uart_Example_Read_Interrupt
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
* Connect GPIO86 (Tx pin) to the target's Rx pin, and connect GPIO77 (Rx pin) to the target's Tx pin
##### How to run Cdd_Uart_Example_Read_Interrupt
* Open CCS and Import Cdd_Uart_Example_Read_Interrupt
* Build project and start debug project
##### Sample Log of Cdd_Uart_Example_Read_Interrupt
```{code-block}
Cdd_Uart_Example_Read_Interrupt: Sample Application - Starts!!!
Cdd_Uart MCAL Version Info
---------------------
Vendor ID : 44
Module ID : 255
SW Major Version : 2
SW Minor Version : 0
SW Patch Version : 0
T
ex
asI
nstr
uments
T
ex
asI
nstr
uments
Cdd_Uart_Example_Read_Interrupt: Sample Application - Completes successfully !!!
```
#### Cdd_Uart_Example_Write_Interrupt
##### Overview of Cdd_Uart_Example_Write_Interrupt
* Cdd_Uart_Example_Write_Interrupt
* EcuM_Init()
* Initialize clock to 200 MHz using Mcu_Init()
* Initialize pins in analog mode with Port_Init()
* Initialize Cdd_Uart driver using Cdd_Uart_Init()
* Write data to the transmit buffer using the Cdd_Uart_Write function
* Wait for the transmission to complete
* Use the CddUartWriteDoneCallback function to verify Cdd_Uart write interrupt functionality
* The program writes data to the transmit buffer and verifies that the transmission is complete,
demonstrating the reliability and functionality of the Cdd_Uart driver in interrupt mode.
##### Setup required to run Cdd_Uart_Example_Write_Interrupt
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
* Connect GPIO86 (Tx pin) to the target's Rx pin, and connect GPIO77 (Rx pin) to the target's Tx pin
##### How to run Cdd_Uart_Example_Write_Interrupt
* Open CCS and Import Cdd_Uart_Example_Write_Interrupt
* Build project and start debug project
##### Sample Log of Cdd_Uart_Example_Write_Interrupt
```{literalinclude} Assets/text/Cdd_Uart/F29H85x/Cdd_Uart_Example_Write_Interrupt.txt
```
#### Cdd_Uart_Example_Write_Polling
##### Overview of Cdd_Uart_Example_Write_Polling
* Cdd_Uart_Example_Write_Polling
* EcuM_Init()
* Initialize clock to 200 MHz using Mcu_Init()
* Initialize pins in analog mode with Port_Init()
* Initialize Cdd_Uart driver using Cdd_Uart_Init()
* Write data to the transmit buffer using the Cdd_Uart_Write function, and polled using the Cdd_Uart_MainFunction_Write
* Wait for the transmission to complete
* Use the CddUartWriteDoneCallback function to verify Cdd_Uart write polling functionality
* The program writes data to the transmit buffer and verifies that the transmission is complete,
demonstrating the reliability and functionality of the Cdd_Uart driver in polling mode.
##### Setup required to run Cdd_Uart_Example_Write_Polling
* Connect the hardware and power up
* Connect the uart set up to check the log on serial console
* Connect GPIO86 (Tx pin) to the target's Rx pin, and connect GPIO77 (Rx pin) to the target's Tx pin
##### How to run Cdd_Uart_Example_Write_Polling
* Open CCS and Import Cdd_Uart_Example_Write_Polling
* Build project and start debug project
##### Sample Log of Cdd_Uart_Example_Write_Polling
```{code-block}
Cdd_Uart_Example_Write_Polling: Sample Application - Starts!!!
Cdd_Uart MCAL Version Info
---------------------
Vendor ID : 44
Module ID : 255
SW Major Version : 2
SW Minor Version : 0
SW Patch Version : 0
Cdd_Uart_Example_Write_Polling: Sample Application - Completes successfully !!!
```
```{code-block}
HHeHelHellHelloWHelloWorHelloWorld Texas Instruments
HelloWorld Texas InsHelloWorld Texas Instruments
HelloWorld Texas Instruments
HelloWorld Texas Instruments
```
#### Example File Structure
📦f29h85x_mcal\
┣ 📂build\
┣ 📂docs\
┣ 📂drivers\
┣ 📂examples\
┃ ┣ 📂AppUtils\
┃ ┣ 📂Can\
┃ ┣ 📂**Cdd_Uart**\
┃ ┃ ┗ 📂**Cdd_Uart_Example_Loopback**\
┃ ┃ ┃ ┣ 📂CCS\
┃ ┃ ┃ ┃ ┗ 📜**Cdd_Uart_Example_Loopback.projectspec**\
┃ ┃ ┃ ┣ 📂Cdd_Uart_Example_Loopback_Config\
┃ ┃ ┃ ┃ ┣ 📂config\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Uart.xdm** : *Generated EB Tresos config file in .xdm format*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu.xdm\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os.xdm\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port.xdm\
┃ ┃ ┃ ┃ ┣ 📂include\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Uart_Cfg.h** : *Contains the generated pre-compiler configuration header.**\
┃ ┃ ┃ ┃ ┃ ┣ 📜Cdd_Uart_Cbk.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.h\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_Cfg.h\
┃ ┃ ┃ ┃ ┣ 📂src\
┃ ┃ ┃ ┃ ┃ ┣ 📜**Cdd_Uart_Cfg.c** : *Contains the Pre-compile build configuration parameters.*\
┃ ┃ ┃ ┃ ┃ ┣ 📜Dem_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜EcuM_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Mcu_PBcfg.c\
┃ ┃ ┃ ┃ ┃ ┣ 📜Os_Cfg.c\
┃ ┃ ┃ ┃ ┃ ┗ 📜Port_PBcfg.c\
┃ ┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┃ ┃ ┣ 📜**Cdd_Uart_Example_Loopback.c** : *Example application for Cdd_Uart.*\
┃ ┃ ┃ ┗ 📜CMakeLists.txt\
┃ ┣ 📂Cdd_Sent\
┃ ┣ 📂Cdd_Xbar\
┃ ┣ 📂Device_Support\
┃ ┣ 📂Dio\
┃ ┣ 📂Gpt\
┃ ┣ 📂Lin\
┃ ┣ 📂Mcu\
┃ ┣ 📂Port\
┃ ┣ 📂Spi\
┃ ┣ 📂Wdg\
┣ 📂plugins\
┣ 📜CMakeLists.txt\
┗ 📜CMakePresets.json
## RTDMA Module
### Introduction
The F29H85-SDK RTDMA can be integrated with F29H85-MCAL for any RTDMA transfers according to the system requirements. This integration allows to initialize and use RTDMA channels based on the specific application.
CDD DMA driver will be provided in a future release. If customers have a need to use DMA in the meantime, they can use SDK RTDMA as described in this guide. However, please be aware that F29H85-SDK RTDMA is non-AUTOSAR and a Basic Quality driver. This integration is intended as a temporary solution to enable DMA use cases in the absence of CDD DMA. It is recommended to use AUTOSAR drivers on AUTOSAR core whenever possible.
The following example demonstrates a memory to memory data transfer in MCAL using the F29H85X-SDK RTDMA.
#### RTDMA Memory Transfer Example
##### Overview
Rtdma_Example_Mem_Transfer example demonstrates how to use the F29H85X-SDK RTDMA (Real-Time Direct Memory Access) module with the F29H85X-MCAL. The example performs a memory-to-memory transfer operation using one RTDMA channel.
The example demonstrates:
- How to configure and initialize the RTDMA module.
- How to set up a memory-to-memory transfer
- How to trigger DMA transfers in software
- How to use DMA interrupts to signal transfer completion
##### Software Version Used
- F29H85X-SDK : 1.02.00.00
##### RTDMA Configuration
The example configures RTDMA1 Channel 1 with the following parameters:
| Parameter | Value | Description |
|-----------|-------|-------------|
| Burst Size | 4 | Number of words per burst |
| Transfer Size | 16 | Number of bursts in the transfer |
| Source/Destination Width | 32-bit | Data width for read/write operations |
| Trigger Mode | Software | DMA transfers are triggered by software |
| Interrupt Mode | At End | Interrupt generated at the end of the transfer |
##### Example logs
```{code-block}
RTDMA Sample Application - Starts!!!
---------------------------------------------------------------
Data at source before transfer:
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Data at destination before transfer:
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Data at source after transfer:
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Data at destination after transfer:
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
===============================================
Transfer successful
```
### References
- [F29H85X-SDK](https://software-dl.ti.com/C2000/docs/f29h85x-sdk/latest/docs/html/index.html) RTDMA documentation
- RTDMA example '[rtdma_ex1_mem_transfer](https://www.ti.com/tool/download/F29H85X-SDK/1.01.00.00)' in F29H85X-SDK
---
title: Can API GUIDE Header file
---
# CAN
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Can_ProcessingType](../Modules/group__CAN.md#enum-can_processingtype)** | Can Tx/Rx Processing. |
|enum| **[Can_ReturnType](../Modules/group__CAN.md#enum-can_returntype)** | Values that can be returned by CAN Driver APIs. |
|enum| **[Can_HandleType](../Modules/group__CAN.md#enum-can_handletype)** | Can Handle Type FULL/BASIC. |
|enum| **[Can_ControllerInstance](../Modules/group__CAN.md#enum-can_controllerinstance)** | Can Controller Instance ID. |
|enum| **[Can_MailboxDirectionType](../Modules/group__CAN.md#enum-can_mailboxdirectiontype)** | Can Mailbox direction enum. |
|enum| **[Can_Icom_signal_operation_type](../Modules/group__CAN.md#enum-can_icom_signal_operation_type)** | Icom signal operation type. |
|enum| **[Can_DrvState](../Modules/group__CAN.md#enum-can_drvstate)** | Can Driver state. |
|enum| **[Can_EventPin](../Modules/group__CAN.md#enum-can_eventpin)** | Enum for the event pin. |
|enum| **[Can_StandardFilterType](../Modules/group__CAN.md#enum-can_standardfiltertype)** | Enum for the Can standard filter selection. |
### enum Can_ProcessingType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CAN_INTERRUPT | 0x0U| Interrupt. |
| CAN_MIXED | 0x1U| Mixed |
| CAN_POLLING | 0x2U| Polling. |
**Brief**:
Can Tx/Rx Processing.
### enum Can_ReturnType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CAN_BUSY | 2U| Transmit request could not be processed because no transmit object was available. |
**Brief**:
Values that can be returned by CAN Driver APIs.
### enum Can_HandleType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CAN_FULL | 0x0U| Full |
| CAN_BASIC | | Basic |
**Brief**:
Can Handle Type FULL/BASIC.
### enum Can_ControllerInstance
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CAN_CONTROLLER_INSTANCE_MCANA | 0x0U| MCANA Controller Instance. |
| CAN_CONTROLLER_INSTANCE_MCANB | 0x1U| MCANB Controller Instance. |
| CAN_CONTROLLER_INSTANCE_MCANC | 0x2U| MCANC Controller Instance. |
| CAN_CONTROLLER_INSTANCE_MCAND | 0x3U| MCAND Controller Instance. |
| CAN_CONTROLLER_INSTANCE_MCANE | 0x4U| MCANE Controller Instance. |
| CAN_CONTROLLER_INSTANCE_MCANF | 0x5U| MCANF Controller Instance. |
**Brief**:
Can Controller Instance ID.
### enum Can_MailboxDirectionType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CAN_RECEIVE | 0x0U| Mailbox is for receive. |
| CAN_TRANSMIT | | Mailbox is for transmit. |
**Brief**:
Can Mailbox direction enum.
### enum Can_Icom_signal_operation_type
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| AND | 0U| AND. |
| EQUAL | 1U| EQUAL. |
| GREATER | 2U| GREATER. |
| SMALLER | 3U| SMALLER. |
| XOR | 4U| XOR. |
**Brief**:
Icom signal operation type.
### enum Can_DrvState
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CAN_UNINIT | 0U| Can module state when reset/power-up. |
| CAN_READY | 1U| Can module state after initialization. |
**Brief**:
Can Driver state.
### enum Can_EventPin
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CAN_EVENT_PIN_0 | 0x0U| EVENT PIN0. |
| CAN_EVENT_PIN_1 | 0x1U| EVENT PIN1. |
| CAN_EVENT_PIN_NONE | 0x2U| EVENT NONE. |
**Brief**:
Enum for the event pin.
### enum Can_StandardFilterType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CAN_RANGE_FILTER | 0x0U| Range filter from SFID1 to SFID2 (SFID2 ≥ SFID1) |
| CAN_DUAL_ID_FILTER | 0x1U| Dual ID filter for SFID1 or SFID2. |
| CAN_CLASSIC_FILTER | 0x2U| Classic filter: SFID1 = filter; SFID2 = mask. |
| CAN_SFT_FILTER_DISABLED_EFT_RANGE_NO_XIDAM | 0x03| Filter element disabled. |
**Brief**:
Enum for the Can standard filter selection.
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Can_MainFunctionRWPeriodRefType](../Classes/structCan__MainFunctionRWPeriodRefType.md)** | Can Main Function RW Period Ref Type Identifier. |
| **[Can_MaskType](../Classes/structCan__MaskType.md)** | Structure defining the filter mask to be used. |
| **[Can_CanConfigType](../Classes/structCan__CanConfigType.md)** | MCan Controller Specific Configuration. |
| **[Can_FdBaudConfigType](../Classes/structCan__FdBaudConfigType.md)** | Structure defining the CAN FD data phase baud rate configuration. |
| **[Can_BaudConfigType](../Classes/structCan__BaudConfigType.md)** | Can Controller Baud Rate Configuration definition. |
| **[Can_ControllerType](../Classes/structCan__ControllerType.md)** | Can Controller Configuration definition. |
| **[Can_HwFilterType](../Classes/structCan__HwFilterType.md)** | Structure defining the HW filter to be used. |
| **[Can_MailboxType](../Classes/structCan__MailboxType.md)** | Can mailbox configuration definition. |
| **[Can_IcomSignalConfigType](../Classes/structCan__IcomSignalConfigType.md)** | Icom signal config data structure. |
| **[Can_IcomRxMessageType](../Classes/structCan__IcomRxMessageType.md)** | Icom Rx message data structure. |
| **[Can_IcomConfigType](../Classes/structCan__IcomConfigType.md)** | Icom data structure containing the overall ICOM configuration data. |
| **[Can_ConfigType](../Classes/structCan__ConfigType.md)** | External data structure containing the overall initialization data for the CAN driver and SFR settings affecting all controllers. |
| **[Can_PeriodicReadBackDataType](../Classes/structCan__PeriodicReadBackDataType.md)** | Can periodic readback register definition. |
## Defines
| Name | Brief |
| -------------- | ---------- |
| CAN_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| CAN_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| CAN_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| CAN_AR_RELEASE_MAJOR_VERSION | AUTOSAR Major version specification implemented by CAN Driver. |
| CAN_AR_RELEASE_MINOR_VERSION | AUTOSAR Minor version specification implemented by CAN Driver. |
| CAN_AR_RELEASE_REVISION_VERSION | AUTOSAR Patch version specification implemented by CAN Driver. |
| CAN_VENDOR_ID | CAN Driver ID Info. |
| CAN_MODULE_ID | CAN Driver Module ID. |
| CAN_INSTANCE_ID | CAN Instance ID. |
| CAN_SID_INIT | The Service Id is one of the argument to Det_ReportError function and is used to identify the source of the error. |
| CAN_SID_MAINFUNC_WRITE | Service ID - Can_MainFunction_Write(). |
| CAN_SID_SETCTR | Service ID - Can_SetControllerMode(). |
| CAN_SID_DIINT | Service ID - Can_DisableControllerInterrupts(). |
| CAN_SID_ENINT | Service ID - Can_EnableControllerInterrupts(). |
| CAN_SID_WRITE | Service ID - Can_Write(). |
| CAN_SID_GET_VERSION_INFO | Service ID - Can_GetVersionInfo(). |
| CAN_SID_MAINFUNC_READ | Service ID - Can_MainFunction_Read(). |
| CAN_SID_MAINFUNC_BO | Service ID - Can_MainFunction_BusOff(). |
| CAN_SID_MAINFUNC_WU | Service ID - Can_MainFunction_Wakeup(). |
| CAN_SID_CKWAKEUP | Service ID - Can_CheckWakeup(). |
| CAN_SID_MAINFUNC_MODE | Service ID - Can_MainFunction_Mode(). |
| CAN_SID_CHNGBAUDRATE | Service ID - Can_ChangeBaudrate(). |
| CAN_SID_CHKBAUDRATE | Service ID - Can_CheckBaudrate(). |
| CAN_SID_SETBAUDRATE | Service ID - Can_SetBaudRate(). |
| CAN_SID_DEINIT | Service ID - Can_DeInit(). |
| CAN_SID_GETCNTRERRSTATE | Service ID - Can_GetControllerErrorState(). |
| CAN_SID_GETCNTRMODE | Service ID - Can_GetControllerMode(). |
| CAN_SID_PROCESSISR | Service ID - Can_ProcessISR(). |
| CAN_SID_ICOMCONFIG | Service ID - Can_SetIcomConfiguration(). |
| CAN_SID_READBACK | Service ID - Can_PeriodicReadback(). |
| CAN_E_PARAM_POINTER | Error codes returned by Can functions - Development Errors. |
| CAN_E_PARAM_HANDLE | Invalid Controller Handle. |
| CAN_E_PARAM_DATA_LENGTH | Invalid length of msg. |
| CAN_E_PARAM_CONTROLLER | Invalid controller id. |
| CAN_E_UNINIT | Error due to API invoked without performing Can_Init(). |
| CAN_E_TRANSITION | Error during Controller state transition. |
| CAN_E_PARAM_BAUDRATE | Invalid Baudrate configuration. |
| CAN_E_ICOM_CONFIG_INVALID | Invalid ICOM configuration Id. |
| CAN_E_DATALOST | Error codes returned by Can functions - Run Time Errors. |
| CAN_ICOM_CONFIG_DISABLE | Icom config disable. |
| CAN_EXTENDED_ID | Extended id. |
| CAN_STANDARD_ID | Standard id. |
| CAN_MIXED_ID | Mixed id. |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Can_GetVersionInfo](../Modules/group__CAN.md#function-can_getversioninfo)**(Std_VersionInfoType * versioninfo)| Function returns the version information of this module. |
| void | **[Can_Init](../Modules/group__CAN.md#function-can_init)**(const [Can_ConfigType](../Classes/structCan__ConfigType.md) * Config_Ptr)| This function initializes the configuration. |
| void | **[Can_DeInit](../Modules/group__CAN.md#function-can_deinit)**(void )| This function deinitializes the module. |
| Std_ReturnType | **[Can_SetBaudrate](../Modules/group__CAN.md#function-can_setbaudrate)**(uint8 Controller, const uint16 BaudRateConfigID)| This service shall set the baud rate configuration of the CAN Controller. |
| Std_ReturnType | **[Can_SetControllerMode](../Modules/group__CAN.md#function-can_setcontrollermode)**(uint8 Controller, Can_ControllerStateType Transition)| This service performs software triggered state transitions of the CAN controller State machine. |
| void | **[Can_DisableControllerInterrupts](../Modules/group__CAN.md#function-can_disablecontrollerinterrupts)**(uint8 Controller)| This service disables all interrupts. |
| void | **[Can_EnableControllerInterrupts](../Modules/group__CAN.md#function-can_enablecontrollerinterrupts)**(uint8 Controller)| This service enables all allowed interrupts. |
| Std_ReturnType | **[Can_CheckWakeup](../Modules/group__CAN.md#function-can_checkwakeup)**(uint8 Controller)| This service checks if a wakeup has occurred for the given controller. |
| Std_ReturnType | **[Can_GetControllerErrorState](../Modules/group__CAN.md#function-can_getcontrollererrorstate)**(uint8 Controller, Can_ErrorStateType * ErrorStatePtr)| This service obtains the error state of the CAN controller. |
| Std_ReturnType | **[Can_GetControllerMode](../Modules/group__CAN.md#function-can_getcontrollermode)**(uint8 Controller, Can_ControllerStateType * ControllerModePtr)| This service reports about the current status of the requested CAN controller. |
| Std_ReturnType | **[Can_Write](../Modules/group__CAN.md#function-can_write)**(Can_HwHandleType Hth, const Can_PduType * PduInfo)| This service is called by CanIf to pass a CAN message to CanDrv for transmission. |
| void | **[Can_MainFunction_Write](../Modules/group__CAN.md#function-can_mainfunction_write)**(uint16 RWFuncID)| This service performs the polling of TX confirmation when CAN_TX_PROCESSING is set to POLLING. |
| void | **[Can_MainFunction_Read](../Modules/group__CAN.md#function-can_mainfunction_read)**(uint16 RWFuncID)| This service performs the polling of RX indications when CAN_RX_PROCESSING is set to POLLING. |
| void | **[Can_MainFunction_BusOff](../Modules/group__CAN.md#function-can_mainfunction_busoff)**(void )| This service performs the polling of bus-off events that are configured statically as 'to be polled'. |
| void | **[Can_MainFunction_Wakeup](../Modules/group__CAN.md#function-can_mainfunction_wakeup)**(void )| This function performs the polling of wake-up events that are configured statically as 'to be polled'. |
| void | **[Can_MainFunction_Mode](../Modules/group__CAN.md#function-can_mainfunction_mode)**(void )| This function performs the polling of CAN controller mode transitions. |
| Std_ReturnType | **[Can_SetIcomConfiguration](../Modules/group__CAN.md#function-can_seticomconfiguration)**(uint8 Controller, IcomConfigIdType ConfigurationId)| This service shall change the Icom Configuration of a CAN controller to the requested one. |
| void | **[Can_PeriodicReadback](../Modules/group__CAN.md#function-can_periodicreadback)**(uint8 Controller, [Can_PeriodicReadBackDataType](../Classes/structCan__PeriodicReadBackDataType.md) * ReadBackRegisterdata)| This service shall read all the statically configured registers. |
### function Can_GetVersionInfo
```
void Can_GetVersionInfo(
Std_VersionInfoType * versioninfo
)
```
**Brief**:
Function returns the version information of this module.
This service writes the version information of this module into the data structure referenced by the parameter. If this parameter references NULL_PTR, a development error is reported.
**Parameters**:
* **versioninfo** Pointer to where to store the version information of this module.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Can_Init
```
void Can_Init(
const Can_ConfigType * Config_Ptr
)
```
**Brief**:
This function initializes the configuration.
This function initializes the message RAM, which also clears all the message objects, and places the CAN controller in an init state. Write access to the configuration registers is available as a result, allowing the bit timing and message objects to be setup.
**Parameters**:
* **Config_Ptr** Pointer to post-build configuration data.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Can_DeInit
```
void Can_DeInit(
void
)
```
**Brief**:
This function deinitializes the module.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Can_SetBaudrate
```
Std_ReturnType Can_SetBaudrate(
uint8 Controller,
const uint16 BaudRateConfigID
)
```
**Brief**:
This service shall set the baud rate configuration of the CAN Controller.
This function sets the baud rate configuration of the CAN controller. Depending on necessary baud rate modifications the controller might have to reset.
**Parameters**:
* **Controller** CAN controller, whose baud rate shall be set.
* **BaudRateConfigID** references a baud rate configuration by ID.
**Returns**:
* **E_OK** - Service request accepted, setting of (new) baud rate started.
* **E_NOT_OK** - Service request not accepted.
**Return**: Setting the Baudrate successful or failure.
**Precondition**: None
**Postcondition**: None
### function Can_SetControllerMode
```
Std_ReturnType Can_SetControllerMode(
uint8 Controller,
Can_ControllerStateType Transition
)
```
**Brief**:
This service performs software triggered state transitions of the CAN controller State machine.
The function perfroms the transition of the CAN controller state machine which is software triggered.
**Parameters**:
* **Controller** CAN controller for which the status shall be changed.
* **Transition** Transition value to request new CAN controller state.
**Returns**:
* **E_OK** Request accepted.
* **E_NOT_OK** Request not accepted i.e. an error occured while requesting an incorrect from one state to other or an incorrect transition.
**Return**: Setting the controller mode successful/failure.
**Precondition**: None
**Postcondition**: None
### function Can_DisableControllerInterrupts
```
void Can_DisableControllerInterrupts(
uint8 Controller
)
```
**Brief**:
This service disables all interrupts.
This function checks if there is a DET Error and then disables all the interrupts for the controller.
**Parameters**:
* **Controller** CAN controller for which interrupts shall be re-enabled.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Can_EnableControllerInterrupts
```
void Can_EnableControllerInterrupts(
uint8 Controller
)
```
**Brief**:
This service enables all allowed interrupts.
This function checks the total number of interrupts and enables all the interrupts allowed for the controller.
**Parameters**:
* **Controller** CAN controller for which interrupts shall be re-enabled.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Can_CheckWakeup
```
Std_ReturnType Can_CheckWakeup(
uint8 Controller
)
```
**Brief**:
This service checks if a wakeup has occurred for the given controller.
This function checks if the Init is done and checks if wakeup has occured and returns value accordingly for the given controller.
**Parameters**:
* **Controller** to be checked for a wakeup.
**Returns**:
* **E_OK** API call has been accepted.
* **E_NOT_OK** API call has not been accepted.
**Return**: Wakeup occurred or not for a controller
**Precondition**: None
**Postcondition**: None
### function Can_GetControllerErrorState
```
Std_ReturnType Can_GetControllerErrorState(
uint8 Controller,
Can_ErrorStateType * ErrorStatePtr
)
```
**Brief**:
This service obtains the error state of the CAN controller.
This function gets the error state of the CAN controller.
**Parameters**:
* **Controller** CAN controller, which is requested for ErrorState.
* **ErrorStatePtr** Pointer to a memory location, where the error state of the CAN controller will be stored.
**Returns**:
* **E_OK** - Error state request has been accepted.
* **E_NOT_OK** - Error state request has not been accepted..
**Return**: Error state obtained successfully/failed to obtain error state.
**Precondition**: None
**Postcondition**: None
### function Can_GetControllerMode
```
Std_ReturnType Can_GetControllerMode(
uint8 Controller,
Can_ControllerStateType * ControllerModePtr
)
```
**Brief**:
This service reports about the current status of the requested CAN controller.
This function gets the current status of the CAN controller.
**Parameters**:
* **Controller** CAN controller, which is requested for ErrorState.
* **ControllerModePtr** Pointer to a memory location, where the current mode of the CAN controller will be stored.
**Returns**:
* **E_OK** - Controller mode request has been accepted.
* **E_NOT_OK** - Controller mode request has not been accepted.
**Return**: Able/unable to fetch current status of the controller.
**Precondition**: None
**Postcondition**: None
### function Can_Write
```
Std_ReturnType Can_Write(
Can_HwHandleType Hth,
const Can_PduType * PduInfo
)
```
**Brief**:
This service is called by CanIf to pass a CAN message to CanDrv for transmission.
The function Can_Write first checks if the hardware transmit object is identified and is free. It passes the CAN message to CanDrv for transmission.
**Parameters**:
* **Hth** information which HW-transmit handle shall be used for transmit. Implicitly this is also the information about the controller to use because the Hth numbers are unique inside one hardware unit.
* **PduInfo** Pointer to SDU user memory, DLC and Identifier.
**Returns**:
* **E_OK** Write command has been accepted.
* **E_NOT_OK** Development error occurred.
* **CAN_BUSY** No TX hardware buffer available or pre-emptive call of Can_Write that can't be implemented re-entrant
**Return**: Can write command is accepted (or) resulted in an error (or) Controller is busy
**Precondition**: None
**Postcondition**: None
### function Can_MainFunction_Write
```
void Can_MainFunction_Write(
uint16 RWFuncID
)
```
**Brief**:
This service performs the polling of TX confirmation when CAN_TX_PROCESSING is set to POLLING.
This function checks if Can Initialisation is done to check for error if DET error detect is enabled. For a TX Mailbox if the controller is active polling of TX confirmation is done.
**Parameters**:
* **RWFuncID** Read/Write period ID
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Can_MainFunction_Read
```
void Can_MainFunction_Read(
uint16 RWFuncID
)
```
**Brief**:
This service performs the polling of RX indications when CAN_RX_PROCESSING is set to POLLING.
This function checks if Can Initialisation is done to check for error if DET error detect is enabled. For a Rx Mailbox if the controller is active polling of Rx indications is done.
**Parameters**:
* **RWFuncID** Read/Write period ID
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Can_MainFunction_BusOff
```
void Can_MainFunction_BusOff(
void
)
```
**Brief**:
This service performs the polling of bus-off events that are configured statically as 'to be polled'.
This function checks if Can Initialisation is done to check for error if DET error detect is enabled. If the controller is active the polling of bus-off events that are configured statically as 'to be polled'.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Can_MainFunction_Wakeup
```
void Can_MainFunction_Wakeup(
void
)
```
**Brief**:
This function performs the polling of wake-up events that are configured statically as 'to be polled'.
This function checks if Can Initialisation is done to check for error if DET error detect is enabled. The polling of wake-up events is done.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Can_MainFunction_Mode
```
void Can_MainFunction_Mode(
void
)
```
**Brief**:
This function performs the polling of CAN controller mode transitions.
This function checks if Can Initialisation is done to check for error if DET error detect is enabled. The polling of CAN controller mode transitions is done.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Can_SetIcomConfiguration
```
Std_ReturnType Can_SetIcomConfiguration(
uint8 Controller,
IcomConfigIdType ConfigurationId
)
```
**Brief**:
This service shall change the Icom Configuration of a CAN controller to the requested one.
**Parameters**:
* **Controller** CAN controller for which the status shall be changed
* **ConfigurationId** Requested Configuration
**Returns**:
* **E_OK** CAN driver succeeded in setting a configuration with a valid Configuration id.
* **E_NOT_OK** CAN driver failed to set a configuration with a valid Configuration id.
**Return**: Std_ReturnType
**Precondition**: None
**Postcondition**: None
### function Can_PeriodicReadback
```
void Can_PeriodicReadback(
uint8 Controller,
Can_PeriodicReadBackDataType * ReadBackRegisterdata
)
```
**Brief**:
This service shall read all the statically configured registers.
**Parameters**:
* **Controller** CAN controller for which the configured registers shall be read
* **ReadBackRegisterdata** pointer for the read back registers
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
---
title: Cdd_Adc API GUIDE Header file
---
# CDD_ADC
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Cdd_Adc_StatusType](../Modules/group__CDD__ADC.md#enum-cdd_adc_statustype)** | Status type. |
|enum| **[Cdd_Adc_TriggerSrcType](../Modules/group__CDD__ADC.md#enum-cdd_adc_triggersrctype)** | Trigger source type. |
|enum| **[Cdd_Adc_StreamBufferModeType](../Modules/group__CDD__ADC.md#enum-cdd_adc_streambuffermodetype)** | Stream buffer mode type. |
|enum| **[Cdd_Adc_GroupAccessModeType](../Modules/group__CDD__ADC.md#enum-cdd_adc_groupaccessmodetype)** | Group access mode type. |
|enum| **[Cdd_Adc_GroupConvModeType](../Modules/group__CDD__ADC.md#enum-cdd_adc_groupconvmodetype)** | Group conversion mode type. |
|enum| **[Cdd_Adc_HwUnitType](../Modules/group__CDD__ADC.md#enum-cdd_adc_hwunittype)** | Specifies the identification (ID) for ADC Hardware instances. |
|enum| **[Cdd_Adc_PrescaleType](../Modules/group__CDD__ADC.md#enum-cdd_adc_prescaletype)** | Defines supported prescaler values. |
|enum| **[Cdd_Adc_RefModeType](../Modules/group__CDD__ADC.md#enum-cdd_adc_refmodetype)** | Defines supported reference voltage modes. |
|enum| **[Cdd_Adc_RefVoltType](../Modules/group__CDD__ADC.md#enum-cdd_adc_refvolttype)** | Defines supported reference voltage types. |
|enum| **[Cdd_Adc_SignalModeType](../Modules/group__CDD__ADC.md#enum-cdd_adc_signalmodetype)** | Defines supported signal modes types. |
|enum| **[Cdd_Adc_SocPriorityType](../Modules/group__CDD__ADC.md#enum-cdd_adc_socprioritytype)** | Defines supported SOC priority types. |
|enum| **[Cdd_Adc_ResolutionType](../Modules/group__CDD__ADC.md#enum-cdd_adc_resolutiontype)** | Defines supported resolution modes. |
|enum| **[Cdd_Adc_IntNumType](../Modules/group__CDD__ADC.md#enum-cdd_adc_intnumtype)** | Defines interrupts supported per ADC instance. |
|enum| **[Cdd_Adc_CheckerInputType](../Modules/group__CDD__ADC.md#enum-cdd_adc_checkerinputtype)** | Defines possible input types to a safety checker unit. |
|enum| **[Cdd_Adc_TriggerType](../Modules/group__CDD__ADC.md#enum-cdd_adc_triggertype)** | Defines supported ADC triggers. |
|enum| **[Cdd_Adc_RepeaterModeType](../Modules/group__CDD__ADC.md#enum-cdd_adc_repeatermodetype)** | Defines modes supported by a trigger repeater. |
|enum| **[Cdd_Adc_RepeaterType](../Modules/group__CDD__ADC.md#enum-cdd_adc_repeatertype)** | Defines repeater instances supported per ADC instance. |
|enum| **[Cdd_Adc_PpbIdType](../Modules/group__CDD__ADC.md#enum-cdd_adc_ppbidtype)** | Defines PPB instances supported per ADC instance. |
|enum| **[Cdd_Adc_CompSelType](../Modules/group__CDD__ADC.md#enum-cdd_adc_compseltype)** | Defines PPB result compare types. |
|enum| **[Cdd_Adc_SafetyCheckFlagType](../Modules/group__CDD__ADC.md#enum-cdd_adc_safetycheckflagtype)** | Defines safety checker flag types. |
|enum| **[Cdd_Adc_SafetyCheckEvtSrcType](../Modules/group__CDD__ADC.md#enum-cdd_adc_safetycheckevtsrctype)** | Defines safety checker event sources for interrupt or event generation. |
|enum| **[Cdd_Adc_CheckFlagStatusType](../Modules/group__CDD__ADC.md#enum-cdd_adc_checkflagstatustype)** | Defines possible states of a flag of an event generated from a safety checker. |
|enum| **[Cdd_Adc_CheckerEventType](../Modules/group__CDD__ADC.md#enum-cdd_adc_checkereventtype)** | Defines supported events that can be generated from an interrupt event instance. |
|enum| **[Cdd_Adc_IntSocTriggerType](../Modules/group__CDD__ADC.md#enum-cdd_adc_intsoctriggertype)** | Defines interrupt trigger sources to SOCs. |
|enum| **[Cdd_Adc_EocPulseType](../Modules/group__CDD__ADC.md#enum-cdd_adc_eocpulsetype)** | Defines End-Of-Conversion interrupt pulse modes. |
|enum| **[Cdd_Adc_InternalTestNodeType](../Modules/group__CDD__ADC.md#enum-cdd_adc_internaltestnodetype)** | Defines supported internal nodes that can be connected to ADC. |
|enum| **[Cdd_Adc_OsDetectModeType](../Modules/group__CDD__ADC.md#enum-cdd_adc_osdetectmodetype)** | Specifies open/short circuit modes. |
|typedef uint8 | **[Cdd_Adc_GroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_grouptype)** | Numeric ID of an ADC channel group. |
|typedef uint8 | **[Cdd_Adc_PpbType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_ppbtype)** | Numeric ID of the PPB unit. |
|typedef uint16 | **[Cdd_Adc_ValueGroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_valuegrouptype)** | Type for reading the converted values of a channel group. |
|typedef uint8 | **[Cdd_Adc_StreamNumSampleType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_streamnumsampletype)** | Type for configuring the number of channel conversions results in streaming access mode (in single access mode, parameter is 1) |
|typedef uint8 | **[Cdd_Adc_CheckEvtType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_checkevttype)** | Specifies the checker event id. |
|typedef uint8 | **[Cdd_Adc_GlbTrigType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_glbtrigtype)** | Specifies ID of the global software trigger |
|typedef uint8 | **[Cdd_Adc_CheckerType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_checkertype)** | Numeric ID of an ADC safety result checker. |
|typedef uint8 | **[Cdd_Adc_CheckerIntEvtType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_checkerintevttype)** | Numeric ID of a safety checker interrupt event instance. |
|typedef uint8 | **[Cdd_Adc_HwUnitInstanceType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_hwunitinstancetype)** | Hardware unit instance type. |
|typedef void(*)(void) | **[Cdd_Adc_GroupEndNotifyType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_groupendnotifytype)** | Group end notification function pointer. |
|typedef void(*)(void) | **[Cdd_Adc_PpbNotifyType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_ppbnotifytype)** | Ppb notification function pointer. |
### enum Cdd_Adc_StatusType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_IDLE | | The conversion of the specified group has not been started. |
| CDD_ADC_BUSY | | The conversion of the specified group has been started and is still going on. |
| CDD_ADC_COMPLETED | | A conversion round (not the final one) of the group has been finished. |
| CDD_ADC_STREAM_COMPLETED | | The result buffer is completely filled. |
**Brief**:
Status type.
### enum Cdd_Adc_TriggerSrcType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_TRIGG_SRC_SW | | Group is triggered by a software API call. |
| CDD_ADC_TRIGG_SRC_HW | | Group is triggered by a hardware event. |
**Brief**:
Trigger source type.
### enum Cdd_Adc_StreamBufferModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_STREAM_BUFFER_LINEAR | | The ADC Driver stops the conversion as soon as the stream buffer is full (number of samples reached) |
| CDD_ADC_STREAM_BUFFER_CIRCULAR | | The ADC Driver continues the conversion even if the stream buffer is full (number of samples reached) by wrapping around the stream buffer itself. |
**Brief**:
Stream buffer mode type.
### enum Cdd_Adc_GroupAccessModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_ACCESS_MODE_SINGLE | | Single value access mode. |
| CDD_ADC_ACCESS_MODE_STREAMING | | Streaming access mode. |
**Brief**:
Group access mode type.
### enum Cdd_Adc_GroupConvModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_CONV_MODE_ONESHOT | | Exactly one conversion of each channel in an ADC channel group is performed after the trigger event. |
| CDD_ADC_CONV_MODE_CONTINUOUS | | Repeated conversions of each ADC channel in an ADC channel group are performed. |
**Brief**:
Group conversion mode type.
### enum Cdd_Adc_HwUnitType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADCA | 0U| |
| CDD_ADCB | 1U| |
| CDD_ADCC | 2U| |
| CDD_ADCD | 3U| |
| CDD_ADCE | 4U| |
**Brief**:
Specifies the identification (ID) for ADC Hardware instances.
### enum Cdd_Adc_PrescaleType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_CLK_DIV_1_0 | 0U| |
| CDD_ADC_CLK_DIV_2_0 | 2U| |
| CDD_ADC_CLK_DIV_2_5 | 3U| |
| CDD_ADC_CLK_DIV_3_0 | 4U| |
| CDD_ADC_CLK_DIV_3_5 | 5U| |
| CDD_ADC_CLK_DIV_4_0 | 6U| |
| CDD_ADC_CLK_DIV_4_5 | 7U| |
| CDD_ADC_CLK_DIV_5_0 | 8U| |
| CDD_ADC_CLK_DIV_5_5 | 9U| |
| CDD_ADC_CLK_DIV_6_0 | 10U| |
| CDD_ADC_CLK_DIV_6_5 | 11U| |
| CDD_ADC_CLK_DIV_7_0 | 12U| |
| CDD_ADC_CLK_DIV_7_5 | 13U| |
| CDD_ADC_CLK_DIV_8_0 | 14U| |
| CDD_ADC_CLK_DIV_8_5 | 15U| |
**Brief**:
Defines supported prescaler values.
### enum Cdd_Adc_RefModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_REFERENCE_INTERNAL | 0U| |
| CDD_ADC_REFERENCE_EXTERNAL | 1U| |
**Brief**:
Defines supported reference voltage modes.
### enum Cdd_Adc_RefVoltType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_REFERENCE_3_3V | 0U| |
| CDD_ADC_REFERENCE_2_5V | 1U| |
**Brief**:
Defines supported reference voltage types.
### enum Cdd_Adc_SignalModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_MODE_SINGLE_ENDED | 0x00U| |
| CDD_ADC_MODE_DIFFERENTIAL | 0x80U| |
**Brief**:
Defines supported signal modes types.
### enum Cdd_Adc_SocPriorityType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_PRI_ALL_ROUND_ROBIN | 0U| |
| CDD_ADC_PRI_SOC0_HIPRI | 1U| |
| CDD_ADC_PRIHRU_SOC1_HIPRI | 2U| |
| CDD_ADC_PRIHRU_SOC2_HIPRI | 3U| |
| CDD_ADC_PRIHRU_SOC3_HIPRI | 4U| |
| CDD_ADC_PRIHRU_SOC4_HIPRI | 5U| |
| CDD_ADC_PRIHRU_SOC5_HIPRI | 6U| |
| CDD_ADC_PRIHRU_SOC6_HIPRI | 7U| |
| CDD_ADC_PRIHRU_SOC7_HIPRI | 8U| |
| CDD_ADC_PRIHRU_SOC8_HIPRI | 9U| |
| CDD_ADC_PRIHRU_SOC9_HIPRI | 10U| |
| CDD_ADC_PRIHRU_SOC10_HIPRI | 11U| |
| CDD_ADC_PRIHRU_SOC11_HIPRI | 12U| |
| CDD_ADC_PRIHRU_SOC12_HIPRI | 13U| |
| CDD_ADC_PRIHRU_SOC13_HIPRI | 14U| |
| CDD_ADC_PRIHRU_SOC14_HIPRI | 15U| |
| CDD_ADC_PRIHRU_SOC15_HIPRI | 16U| |
| CDD_ADC_PRIHRU_SOC16_HIPRI | 17U| |
| CDD_ADC_PRIHRU_SOC17_HIPRI | 18U| |
| CDD_ADC_PRIHRU_SOC18_HIPRI | 19U| |
| CDD_ADC_PRIHRU_SOC19_HIPRI | 20U| |
| CDD_ADC_PRIHRU_SOC20_HIPRI | 21U| |
| CDD_ADC_PRIHRU_SOC21_HIPRI | 22U| |
| CDD_ADC_PRIHRU_SOC22_HIPRI | 23U| |
| CDD_ADC_PRIHRU_SOC23_HIPRI | 24U| |
| CDD_ADC_PRIHRU_SOC24_HIPRI | 25U| |
| CDD_ADC_PRIHRU_SOC25_HIPRI | 26U| |
| CDD_ADC_PRIHRU_SOC26_HIPRI | 27U| |
| CDD_ADC_PRIHRU_SOC27_HIPRI | 28U| |
| CDD_ADC_PRIHRU_SOC28_HIPRI | 29U| |
| CDD_ADC_PRIHRU_SOC29_HIPRI | 30U| |
| CDD_ADC_PRIHRU_SOC30_HIPRI | 31U| |
| CDD_ADC_PRI_ALL_HIPRI | 32U| |
**Brief**:
Defines supported SOC priority types.
### enum Cdd_Adc_ResolutionType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_RESOLUTION_12BIT | 0x00U| |
| CDD_ADC_RESOLUTION_16BIT | 0x01U| |
| CDD_ADC_RESOLUTION_NONE | | |
**Brief**:
Defines supported resolution modes.
### enum Cdd_Adc_IntNumType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_INT1 | 0U| |
| CDD_ADC_INT2 | 1U| |
| CDD_ADC_INT3 | 2U| |
| CDD_ADC_INT4 | 3U| |
**Brief**:
Defines interrupts supported per ADC instance.
### enum Cdd_Adc_CheckerInputType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_SAFETY_CHECKER_INPUT_DISABLE | 0x0U| |
| CDD_ADC_SAFETY_CHECKER_INPUT_SOC | 0x1U| |
| CDD_ADC_SAFETY_CHECKER_INPUT_PPB | 0x2U| |
| CDD_ADC_SAFETY_CHECKER_INPUT_PPBSUM | 0x3U| |
**Brief**:
Defines possible input types to a safety checker unit.
### enum Cdd_Adc_TriggerType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_TRIGGER_SW_ONLY | 0x00U| |
| CDD_ADC_TRIGGER_CPU1INT0 | 0x01U| |
| CDD_ADC_TRIGGER_CPU1INT1 | 0x02U| |
| CDD_ADC_TRIGGER_CPU1INT2 | 0x03U| |
| CDD_ADC_TRIGGER_GPIO | 0x04U| |
| CDD_ADC_TRIGGER_EPWM1_SOCA | 0x05U| |
| CDD_ADC_TRIGGER_EPWM1_SOCB | 0x06U| |
| CDD_ADC_TRIGGER_EPWM2_SOCA | 0x07U| |
| CDD_ADC_TRIGGER_EPWM2_SOCB | 0x08U| |
| CDD_ADC_TRIGGER_EPWM3_SOCA | 0x09U| |
| CDD_ADC_TRIGGER_EPWM3_SOCB | 0x0AU| |
| CDD_ADC_TRIGGER_EPWM4_SOCA | 0x0BU| |
| CDD_ADC_TRIGGER_EPWM4_SOCB | 0x0CU| |
| CDD_ADC_TRIGGER_EPWM5_SOCA | 0x0DU| |
| CDD_ADC_TRIGGER_EPWM5_SOCB | 0x0EU| |
| CDD_ADC_TRIGGER_EPWM6_SOCA | 0x0FU| |
| CDD_ADC_TRIGGER_EPWM6_SOCB | 0x10U| |
| CDD_ADC_TRIGGER_EPWM7_SOCA | 0x11U| |
| CDD_ADC_TRIGGER_EPWM7_SOCB | 0x12U| |
| CDD_ADC_TRIGGER_EPWM8_SOCA | 0x13U| |
| CDD_ADC_TRIGGER_EPWM8_SOCB | 0x14U| |
| CDD_ADC_TRIGGER_EPWM9_SOCA | 0x15U| |
| CDD_ADC_TRIGGER_EPWM9_SOCB | 0x16U| |
| CDD_ADC_TRIGGER_EPWM10_SOCA | 0x17U| |
| CDD_ADC_TRIGGER_EPWM10_SOCB | 0x18U| |
| CDD_ADC_TRIGGER_EPWM11_SOCA | 0x19U| |
| CDD_ADC_TRIGGER_EPWM11_SOCB | 0x1AU| |
| CDD_ADC_TRIGGER_EPWM12_SOCA | 0x1BU| |
| CDD_ADC_TRIGGER_EPWM12_SOCB | 0x1CU| |
| CDD_ADC_TRIGGER_REPEATER1 | 0x28U| |
| CDD_ADC_TRIGGER_REPEATER2 | 0x29U| |
| CDD_ADC_TRIGGER_CLB1_OUT27 | 0x48U| |
| CDD_ADC_TRIGGER_CLB2_OUT27 | 0x49U| |
| CDD_ADC_TRIGGER_CLB3_OUT27 | 0x4AU| |
| CDD_ADC_TRIGGER_CLB4_OUT27 | 0x4BU| |
| CDD_ADC_TRIGGER_CLB5_OUT27 | 0x4CU| |
| CDD_ADC_TRIGGER_CLB6_OUT27 | 0x4DU| |
| CDD_ADC_TRIGGER_ECAP1 | 0x50U| |
| CDD_ADC_TRIGGER_ECAP2 | 0x51U| |
| CDD_ADC_TRIGGER_ECAP3 | 0x52U| |
| CDD_ADC_TRIGGER_ECAP4 | 0x53U| |
| CDD_ADC_TRIGGER_ECAP5 | 0x54U| |
| CDD_ADC_TRIGGER_ECAP6 | 0x55U| |
| CDD_ADC_TRIGGER_EPWM13_SOCA | 0x58U| |
| CDD_ADC_TRIGGER_EPWM13_SOCB | 0x59U| |
| CDD_ADC_TRIGGER_EPWM14_SOCA | 0x5AU| |
| CDD_ADC_TRIGGER_EPWM14_SOCB | 0x5BU| |
| CDD_ADC_TRIGGER_EPWM15_SOCA | 0x5CU| |
| CDD_ADC_TRIGGER_EPWM15_SOCB | 0x5DU| |
| CDD_ADC_TRIGGER_EPWM16_SOCA | 0x5EU| |
| CDD_ADC_TRIGGER_EPWM16_SOCB | 0x5FU| |
| CDD_ADC_TRIGGER_EPWM17_SOCA | 0x60U| |
| CDD_ADC_TRIGGER_EPWM17_SOCB | 0x61U| |
| CDD_ADC_TRIGGER_EPWM18_SOCA | 0x62U| |
| CDD_ADC_TRIGGER_EPWM18_SOCB | 0x63U| |
| CDD_ADC_TRIGGER_CPU2INT0 | 0x64U| |
| CDD_ADC_TRIGGER_CPU2INT1 | 0x65U| |
| CDD_ADC_TRIGGER_CPU2INT2 | 0x66U| |
| CDD_ADC_TRIGGER_CPU3INT0 | 0x67U| |
| CDD_ADC_TRIGGER_CPU3INT1 | 0x68U| |
| CDD_ADC_TRIGGER_CPU3INT2 | 0x69U| |
**Brief**:
Defines supported ADC triggers.
### enum Cdd_Adc_RepeaterModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_REPMODE_OVERSAMPLING | 0x0U| |
| CDD_ADC_REPMODE_UNDERSAMPLING | 0x1U| |
**Brief**:
Defines modes supported by a trigger repeater.
### enum Cdd_Adc_RepeaterType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_REPINST1 | 0x0U| |
| CDD_ADC_REPINST2 | 0x1U| |
**Brief**:
Defines repeater instances supported per ADC instance.
### enum Cdd_Adc_PpbIdType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_PPB_NUMBER1 | 0| |
| CDD_ADC_PPB_NUMBER2 | 1| |
| CDD_ADC_PPB_NUMBER3 | 2| |
| CDD_ADC_PPB_NUMBER4 | 3| |
**Brief**:
Defines PPB instances supported per ADC instance.
### enum Cdd_Adc_CompSelType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_COMPARE_PPBRESULT | 0x0U| |
| CDD_ADC_COMPARE_PPBPSUM | 0x1U| |
| CDD_ADC_COMPARE_PPBSUM | 0x2U| |
**Brief**:
Defines PPB result compare types.
### enum Cdd_Adc_SafetyCheckFlagType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_SAFETY_CHECK_OOT_FLG | 0U| |
| CDD_ADC_SAFETY_CHECK_RES1OVF_FLG | 8U| |
| CDD_ADC_SAFETY_CHECK_RES2OVF_FLG | 16U| |
**Brief**:
Defines safety checker flag types.
### enum Cdd_Adc_SafetyCheckEvtSrcType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_SAFETY_CHECK_RES1OVF | 0U| |
| CDD_ADC_SAFETY_CHECK_RES2OVF | 4U| |
| CDD_ADC_SAFETY_CHECK_OOT | 8U| |
**Brief**:
Defines safety checker event sources for interrupt or event generation.
### enum Cdd_Adc_CheckFlagStatusType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_SAFETY_CHECKER_FLG_NONE | | |
| CDD_ADC_SAFETY_CHECKER_RES1OVF_FLG | | |
| CDD_ADC_SAFETY_CHECKER_RES2OVF_FLG | | |
| CDD_ADC_SAFETY_CHECKER_OOT_FLG | | |
**Brief**:
Defines possible states of a flag of an event generated from a safety checker.
### enum Cdd_Adc_CheckerEventType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_CHECKER_EVT_1 | | |
| CDD_ADC_CHECKER_EVT_2 | | |
| CDD_ADC_CHECKER_EVT_3 | | |
| CDD_ADC_CHECKER_EVT_4 | | |
**Brief**:
Defines supported events that can be generated from an interrupt event instance.
### enum Cdd_Adc_IntSocTriggerType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_INT_SOC_TRIGGER_NONE | 0U| |
| CDD_ADC_INT_SOC_TRIGGER_ADCINT1 | 1U| |
| CDD_ADC_INT_SOC_TRIGGER_ADCINT2 | 2U| |
**Brief**:
Defines interrupt trigger sources to SOCs.
### enum Cdd_Adc_EocPulseType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_PULSE_END_OF_ACQ_WIN | 0x00U| |
| CDD_ADC_PULSE_END_OF_CONV | 0x04U| |
**Brief**:
Defines End-Of-Conversion interrupt pulse modes.
### enum Cdd_Adc_InternalTestNodeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_TEST_NODE_NO_CONN | 0U| |
| CDD_ADC_TEST_NODE_VDDCORE | 1U| |
| CDD_ADC_TEST_NODE_VDDA | 2U| |
| CDD_ADC_TEST_NODE_VSSA | 3U| |
| CDD_ADC_TEST_NODE_VREFLOA | 4U| |
| CDD_ADC_TEST_NODE_VREFLOB | 5U| |
| CDD_ADC_TEST_NODE_CDAC1H | 7U| |
| CDD_ADC_TEST_NODE_CDAC1L | 8U| |
| CDD_ADC_TEST_NODE_CDAC2H | 9U| |
| CDD_ADC_TEST_NODE_CDAC2L | 10U| |
| CDD_ADC_TEST_NODE_CDAC3H | 11U| |
| CDD_ADC_TEST_NODE_CDAC3L | 12U| |
| CDD_ADC_TEST_NODE_CDAC4H | 13U| |
| CDD_ADC_TEST_NODE_CDAC4L | 14U| |
| CDD_ADC_TEST_NODE_CDAC5H | 15U| |
| CDD_ADC_TEST_NODE_CDAC5L | 16U| |
| CDD_ADC_TEST_NODE_CDAC6H | 17U| |
| CDD_ADC_TEST_NODE_CDAC6L | 18U| |
| CDD_ADC_TEST_NODE_CDAC7H | 19U| |
| CDD_ADC_TEST_NODE_CDAC7L | 20U| |
| CDD_ADC_TEST_NODE_CDAC8H | 21U| |
| CDD_ADC_TEST_NODE_CDAC8L | 22U| |
| CDD_ADC_TEST_NODE_CDAC9H | 23U| |
| CDD_ADC_TEST_NODE_CDAC9L | 24U| |
| CDD_ADC_TEST_NODE_CDAC10H | 25U| |
| CDD_ADC_TEST_NODE_CDAC10L | 26U| |
| CDD_ADC_TEST_NODE_CDAC11H | 27U| |
| CDD_ADC_TEST_NODE_CDAC11L | 28U| |
| CDD_ADC_TEST_NODE_ENZ_CALIB_GAIN_3P3 | 29U| |
| CDD_ADC_TEST_NODE_MAX | | |
**Brief**:
Defines supported internal nodes that can be connected to ADC.
### enum Cdd_Adc_OsDetectModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ADC_OSDETECT_MODE_DISABLED | 0x0U| |
| CDD_ADC_OSDETECT_MODE_VSSA | 0x1U| |
| CDD_ADC_OSDETECT_MODE_VDDA | 0x2U| |
| CDD_ADC_OSDETECT_MODE_5BY12_VDDA | 0x3U| |
| CDD_ADC_OSDETECT_MODE_7BY12_VDDA | 0x4U| |
| CDD_ADC_OSDETECT_MODE_5K_PULLDOWN_TO_VSSA | 0x5U| |
| CDD_ADC_OSDETECT_MODE_5K_PULLUP_TO_VDDA | 0x6U| |
| CDD_ADC_OSDETECT_MODE_7K_PULLDOWN_TO_VSSA | 0x7U| |
**Brief**:
Specifies open/short circuit modes.
### typedef Cdd_Adc_GroupType
```
typedef uint8 Cdd_Adc_GroupType;
```
**Brief**:
Numeric ID of an ADC channel group.
### typedef Cdd_Adc_PpbType
```
typedef uint8 Cdd_Adc_PpbType;
```
**Brief**:
Numeric ID of the PPB unit.
### typedef Cdd_Adc_ValueGroupType
```
typedef uint16 Cdd_Adc_ValueGroupType;
```
**Brief**:
Type for reading the converted values of a channel group.
### typedef Cdd_Adc_StreamNumSampleType
```
typedef uint8 Cdd_Adc_StreamNumSampleType;
```
**Brief**:
Type for configuring the number of channel conversions results in streaming access mode (in single access mode, parameter is 1)
### typedef Cdd_Adc_CheckEvtType
```
typedef uint8 Cdd_Adc_CheckEvtType;
```
**Brief**:
Specifies the checker event id.
### typedef Cdd_Adc_GlbTrigType
```
typedef uint8 Cdd_Adc_GlbTrigType;
```
**Brief**:
Specifies ID of the global software trigger
### typedef Cdd_Adc_CheckerType
```
typedef uint8 Cdd_Adc_CheckerType;
```
**Brief**:
Numeric ID of an ADC safety result checker.
### typedef Cdd_Adc_CheckerIntEvtType
```
typedef uint8 Cdd_Adc_CheckerIntEvtType;
```
**Brief**:
Numeric ID of a safety checker interrupt event instance.
### typedef Cdd_Adc_HwUnitInstanceType
```
typedef uint8 Cdd_Adc_HwUnitInstanceType;
```
**Brief**:
Hardware unit instance type.
### typedef Cdd_Adc_GroupEndNotifyType
```
typedef void(* Cdd_Adc_GroupEndNotifyType) (void);
```
**Brief**:
Group end notification function pointer.
### typedef Cdd_Adc_PpbNotifyType
```
typedef void(* Cdd_Adc_PpbNotifyType) (void);
```
**Brief**:
Ppb notification function pointer.
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Cdd_Adc_PpbValType](../Classes/structCdd__Adc__PpbValType.md)** | PPB value type. |
| **[Cdd_Adc_PpbUnitCfgType](../Classes/structCdd__Adc__PpbUnitCfgType.md)** | PPB unit config type. |
| **[Cdd_Adc_ChannelCfgType](../Classes/structCdd__Adc__ChannelCfgType.md)** | Channel config type. |
| **[Cdd_Adc_TrigRepCfgType](../Classes/structCdd__Adc__TrigRepCfgType.md)** | Trigger repeater config type. |
| **[Cdd_Adc_GroupCfgType](../Classes/structCdd__Adc__GroupCfgType.md)** | Group config type. |
| **[Cdd_Adc_HwUnitCfgType](../Classes/structCdd__Adc__HwUnitCfgType.md)** | Hardware unit config type. |
| **[Cdd_Adc_SelResCfgType](../Classes/structCdd__Adc__SelResCfgType.md)** | Select result config type. |
| **[Cdd_Adc_IntSrcType](../Classes/structCdd__Adc__IntSrcType.md)** | Interrupt source type. |
| **[Cdd_Adc_CheckerResCfgType](../Classes/structCdd__Adc__CheckerResCfgType.md)** | Checker response config type. |
| **[Cdd_Adc_CheckerIntEvtCfgType](../Classes/structCdd__Adc__CheckerIntEvtCfgType.md)** | Checker interrupt event config type. |
| **[Cdd_Adc_CheckerCfgType](../Classes/structCdd__Adc__CheckerCfgType.md)** | Checker config type. |
| **[Cdd_Adc_GlbSwCfgType](../Classes/structCdd__Adc__GlbSwCfgType.md)** | Global software config type. |
| **[Cdd_Adc_ConfigType](../Classes/structCdd__Adc__ConfigType.md)** | ADC config type. |
## Defines
| Name | Brief |
| -------------- | ---------- |
| CDD_ADC_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| CDD_ADC_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| CDD_ADC_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| CDD_ADC_AR_RELEASE_MAJOR_VERSION | AUTOSAR Major version specification implemented by CDD_ADC Driver. |
| CDD_ADC_AR_RELEASE_MINOR_VERSION | AUTOSAR Minor version specification implemented by CDD_ADC Driver. |
| CDD_ADC_AR_RELEASE_REVISION_VERSION | AUTOSAR Patch version specification implemented by CDD_ADC Driver. |
| CDD_ADC_VENDOR_ID | Texas Instruments Vendor ID. |
| CDD_ADC_MODULE_ID | CDD ADC Driver Module ID. |
| CDD_ADC_INSTANCE_ID | CDD ADC Instance ID. |
| CDD_ADC_E_UNINIT | API service used without module initialization. |
| CDD_ADC_E_BUSY | API service called during ongoing process/conversion. |
| CDD_ADC_E_IDLE | API service called while no conversion is ongoing. |
| CDD_ADC_E_ALREADY_INITIALIZED | API Cdd_Adc_Init service called while the ADC driver has already been initialized. |
| CDD_ADC_E_PARAM_EVENT | API service called with incorrect configuration parameter. |
| CDD_ADC_E_PARAM_POINTER | API service called with invalid data buffer pointer. |
| CDD_ADC_E_PARAM_GROUP | API service called with invalid group ID. |
| CDD_ADC_E_WRONG_RESOLUTION_MODE | API service called with invalid hardware unit ID. |
| CDD_ADC_E_WRONG_CONV_MODE | API service called on a group with conversion mode configured as continuous. |
| CDD_ADC_E_WRONG_TRIGG_SRC | API service called for group with wrong trigger source. |
| CDD_ADC_E_NOTIF_CAPABILITY | Enable/disable notification function for a group whose configuration set has no notification available. |
| CDD_ADC_E_BUFFER_UNINIT | Conversion started and result buffer pointer is not initialized. |
| CDD_ADC_E_CHECKER_IDLE | One or more ADC safety checker are IDLE. |
| CDD_ADC_E_CHECKER_BUSY | One or more ADC safety checker are BUSY. |
| CDD_ADC_E_ALREADY_SET | API service called when the resolution is already set to the requested resolution for the ADC instance. |
| CDD_ADC_E_INVALID_ID | API service called with invalid hardware unit ID. |
| CDD_ADC_E_INVALID_RESOLUTION | API service called with invalid resolution. |
| CDD_ADC_E_WRONG_PROCESSING_MODE | API service called for groups configured in DMA mode. |
| CDD_ADC_E_WRONG_TRIGG_TYPE | API service called for group with wrong trigger source type. |
| CDD_ADC_SID_INIT | Cdd_Adc_Init() API Service ID. |
| CDD_ADC_SID_DEINIT | Cdd_Adc_DeInit() API Service ID. |
| CDD_ADC_SID_START_GROUP_CONVERSION | Cdd_Adc_StartGroupConversion() API Service ID. |
| CDD_ADC_SID_STOP_GROUP_CONVERSION | Cdd_Adc_StopGroupConversion() API Service ID. |
| CDD_ADC_SID_READ_GROUP | Cdd_Adc_ReadGroup() API Service ID. |
| CDD_ADC_SID_ENABLE_HARDWARE_TRIGGER | Cdd_Adc_EnableHardwareTrigger() API Service ID. |
| CDD_ADC_SID_DISABLE_HARDWARE_TRIGGER | Cdd_Adc_DisableHardwareTrigger() API Service ID. |
| CDD_ADC_SID_ENABLE_GROUP_NOTIFICATION | Cdd_Adc_EnableGroupNotification() API Service ID. |
| CDD_ADC_SID_DISABLE_GROUP_NOTIFICATION | Cdd_Adc_DisableGroupNotification() API Service ID. |
| CDD_ADC_SID_GET_GRP_STATUS | Cdd_Adc_GetGroupStatus() API Service ID. |
| CDD_ADC_SID_GET_VERSION_INFO | Cdd_Adc_GetVersionInfo() API Service ID. |
| CDD_ADC_SID_GET_STREAM_LAST_POINTER | Cdd_Adc_GetStreamLastPointer() API Service ID. |
| CDD_ADC_SID_SETUP_RESULT_BUFFER | Cdd_Adc_SetupResultBuffer() API Service ID. |
| CDD_ADC_SID_START_RESULT_CHECKER | Cdd_Adc_StartResultChecker service ID. |
| CDD_ADC_SID_STOP_RESULT_CHECKER | Cdd_Adc_StopResultChecker API service ID. |
| CDD_ADC_SID_READ_RESULT_CHECKER | Cdd_Adc_ReadCheckerStatus API service ID. |
| CDD_ADC_SID_CLEAR_CHECKER_EVT | Cdd_Adc_ClearCheckerEvt API service ID. |
| CDD_ADC_SID_START_GLBSW_TRIG | Cdd_Adc_StartGlobalSwTrig service ID. |
| CDD_ADC_SID_STOP_GLBSW_TRIG | Cdd_Adc_StopGlobalSwTrig service ID. |
| CDD_ADC_SID_SET_RESOLUTION | Cdd_Adc_SetResolution() service ID. |
| CDD_ADC_SID_READ_PARTIAL_PPB_VALUE | Cdd_Adc_ReadPpbValue() service ID. |
| CDD_ADC_SID_READ_PPB_VALUE | Cdd_Adc_ReadPartialPpbValue() service ID. |
| CDD_ADC_SID_READ_PPB | Cdd_Adc_ReadPpb() service ID. |
| CDD_ADC_SID_CLEAR_PPB_EVT | Cdd_Adc_ClearPpbEvt() service ID. |
| CDD_ADC_SID_GET_DELAY_STAMP | Cdd_Adc_GetDelayStamp() service ID. |
| CDD_ADC_SID_GET_TEMPERATURE_C | Cdd_Adc_GetTemperatureC() service ID. |
| CDD_ADC_SID_GET_TEMPERATURE_K | Cdd_Adc_GetTemperatureK() service ID. |
| CDD_ADC_SID_INTERNAL_TEST_NODE | Cdd_Adc_SetInternalTestNode() service ID. |
| CDD_ADC_SID_UPDATE_STATUS_THROUGH_DMA | Cdd_Adc_UpdateStatus() service ID. |
| CDD_ADC_SID_CONFIGURE_PPB_NOTIFICATION | Cdd_Adc_ConfigurePpbNotification() API Service ID. |
| CDD_ADC_CFG_MAJOR_VERSION | |
| CDD_ADC_CFG_MINOR_VERSION | |
| CDD_ADC_CFG_PATCH_VERSION | |
| CDD_ADC_PRE_COMPILE_VARIANT | |
| CDD_ADC_CONFIG_PC | |
| CDD_ADC_CHN_COUNT | |
| CDD_ADC_MAX_HW_UNIT_COUNT | |
| CDD_ADC_MAX_INT_COUNT | |
| CDD_ADC_DEV_ERROR_DETECT | |
| CDD_ADC_DEINIT_API | |
| CDD_ADC_ENABLE_START_STOP_GROUP_API | |
| CDD_ADC_GLBSW_TRIG_API | |
| CDD_ADC_GLBSW_TRIG_CNT | |
| CDD_ADC_GROUP_CNT | |
| CDD_ADC_GRP_NOTIF_CAPABILITY_API | |
| CDD_ADC_HW_CNT | |
| CDD_ADC_HW_TRIGGER_API | |
| CDD_ADC_ENABLE_PPB_API | |
| CDD_ADC_LOCK_TEMPERATURE_SENSOR | |
| CDD_ADC_OPEN_SHORT_DETECTION | |
| CDD_ADC_PPB_CNT | |
| CDD_ADC_READ_GROUP_API | |
| CDD_ADC_SAFETY_CHECK_API | |
| CDD_ADC_CHECKER_CNT | |
| CDD_ADC_CHECKER_EVT_CNT | |
| CDD_ADC_CHECKER_INTEVT_CNT | |
| CDD_ADC_SET_RESOLUTION_API | |
| CDD_ADC_TEMPERATURE_SENSOR_ENABLE | |
| CDD_ADC_TRIG_REP_ENABLE | |
| CDD_ADC_TRIG_REP_CNT | |
| CDD_ADC_PPB_NOTIF_CAPABILITY_API | |
| CDD_ADC_VERSION_INFO_API | |
| CddAdcConf_CddAdcHwUnit_CddAdcHwUnit_0 | |
| CddAdcConf_CddAdcGroup_CddAdcGroup_0 | |
| CddAdcConf_CddAdcGroup_CddAdcGroup_1 | |
| CddAdcConf_CddAdcGroup_CddAdcGroup_2 | |
| CddAdcConf_CddAdcGroup_CddAdcGroup_3 | |
| CddAdcConf_CddAdcPpbConfig_CddAdcPpbConfig_0 | |
| CddAdcConf_CddAdcPpbConfig_CddAdcPpbConfig_1 | |
| CddAdcConf_CddAdcPpbConfig_CddAdcPpbConfig_2 | |
| CddAdcConf_CddAdcHwUnit_CddAdcHwUnit_1 | |
| CddAdcConf_CddAdcGroup_CddAdcGroup_4 | |
| CddAdcConf_CddAdcGroup_CddAdcGroup_5 | |
| CDD_ADC_EXTCHSEL_CAPABILITY | |
| CDD_ADCA_INT1_ENABLE | |
| CDD_ADCA_INT1_ISR_CAT1_RTINT | |
| CDD_ADCA_INT2_ENABLE | |
| CDD_ADCA_INT2_ISR_CAT1_INT | |
| CDD_ADCA_INT3_ENABLE | |
| CDD_ADCA_INT3_ISR_CAT2_INT | |
| CDD_ADCA_INT4_ENABLE | |
| CDD_ADCA_INT4_ISR_CAT1_INT | |
| CDD_ADCA_EVTINT_ENABLE | |
| CDD_ADCA_EVTINT_ISR_CAT1_INT | |
| CDD_ADCD_INT1_ENABLE | |
| CDD_ADCD_INT1_ISR_CAT1_INT | |
| CDD_ADCD_INT2_ENABLE | |
| CDD_ADCD_INT2_ISR_CAT1_INT | |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Cdd_Adc_Init](../Modules/group__CDD__ADC.md#function-cdd_adc_init)**(const [Cdd_Adc_ConfigType](../Classes/structCdd__Adc__ConfigType.md) * CfgPtr)| Service to initialize Cdd Adc driver. |
| Std_ReturnType | **[Cdd_Adc_SetupResultBuffer](../Modules/group__CDD__ADC.md#function-cdd_adc_setupresultbuffer)**([Cdd_Adc_GroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_grouptype) Group, const [Cdd_Adc_ValueGroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_valuegrouptype) * DataBufferPtr)| This service initializes ADC driver with the group specific result buffer start address where the conversion results will be stored. |
| void | **[Cdd_Adc_DeInit](../Modules/group__CDD__ADC.md#function-cdd_adc_deinit)**(void )| Service to deinitialize Cdd Adc driver. |
| void | **[Cdd_Adc_StartGroupConversion](../Modules/group__CDD__ADC.md#function-cdd_adc_startgroupconversion)**([Cdd_Adc_GroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_grouptype) Group)| Service to start a group conversion. |
| void | **[Cdd_Adc_StopGroupConversion](../Modules/group__CDD__ADC.md#function-cdd_adc_stopgroupconversion)**([Cdd_Adc_GroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_grouptype) Group)| Service to stop a group conversion. |
| Std_ReturnType | **[Cdd_Adc_StartGlobalSwTrig](../Modules/group__CDD__ADC.md#function-cdd_adc_startglobalswtrig)**([Cdd_Adc_GlbTrigType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_glbtrigtype) GlbSwTrig)| Service to start the global software trigger. |
| void | **[Cdd_Adc_StopGlobalSwTrig](../Modules/group__CDD__ADC.md#function-cdd_adc_stopglobalswtrig)**([Cdd_Adc_GlbTrigType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_glbtrigtype) GlbSwTrig)| Service to stop the global software trigger. |
| void | **[Cdd_Adc_EnableHardwareTrigger](../Modules/group__CDD__ADC.md#function-cdd_adc_enablehardwaretrigger)**([Cdd_Adc_GroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_grouptype) Group)| Service to enables the HW trigger for a group. |
| void | **[Cdd_Adc_DisableHardwareTrigger](../Modules/group__CDD__ADC.md#function-cdd_adc_disablehardwaretrigger)**([Cdd_Adc_GroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_grouptype) Group)| Service to disable the HW trigger for a group. |
| void | **[Cdd_Adc_EnableGroupNotification](../Modules/group__CDD__ADC.md#function-cdd_adc_enablegroupnotification)**([Cdd_Adc_GroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_grouptype) Group)| Service to enable the notification for a group. |
| void | **[Cdd_Adc_DisableGroupNotification](../Modules/group__CDD__ADC.md#function-cdd_adc_disablegroupnotification)**([Cdd_Adc_GroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_grouptype) Group)| Service to disable the notification for a group. |
| [Cdd_Adc_StatusType](../Modules/group__CDD__ADC.md#enum-cdd_adc_statustype) | **[Cdd_Adc_GetGroupStatus](../Modules/group__CDD__ADC.md#function-cdd_adc_getgroupstatus)**([Cdd_Adc_GroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_grouptype) Group)| Service to get the conversion status of the group. |
| Std_ReturnType | **[Cdd_Adc_ReadGroup](../Modules/group__CDD__ADC.md#function-cdd_adc_readgroup)**([Cdd_Adc_GroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_grouptype) Group, [Cdd_Adc_ValueGroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_valuegrouptype) * DataBufferPtr)| service that reads the group conversion result of the last completed conversion round |
| [Cdd_Adc_StreamNumSampleType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_streamnumsampletype) | **[Cdd_Adc_GetStreamLastPointer](../Modules/group__CDD__ADC.md#function-cdd_adc_getstreamlastpointer)**([Cdd_Adc_GroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_grouptype) Group, [Cdd_Adc_ValueGroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_valuegrouptype) ** PtrToSamplePtr)| service that returns the number of valid samples per channel, stored in the result buffer. |
| void | **[Cdd_Adc_GetVersionInfo](../Modules/group__CDD__ADC.md#function-cdd_adc_getversioninfo)**(Std_VersionInfoType * VersionInfo)| service that returns the version information of the module. |
| void | **[Cdd_Adc_StartResultChecker](../Modules/group__CDD__ADC.md#function-cdd_adc_startresultchecker)**([Cdd_Adc_CheckerType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_checkertype) CheckerId)| service to start the safety result checker. |
| void | **[Cdd_Adc_StopResultChecker](../Modules/group__CDD__ADC.md#function-cdd_adc_stopresultchecker)**([Cdd_Adc_CheckerType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_checkertype) CheckerId)| service to stop the safety result checker. |
| void | **[Cdd_Adc_ReadCheckerStatus](../Modules/group__CDD__ADC.md#function-cdd_adc_readcheckerstatus)**([Cdd_Adc_CheckerIntEvtType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_checkerintevttype) IntEvt, [Cdd_Adc_CheckFlagStatusType](../Modules/group__CDD__ADC.md#enum-cdd_adc_checkflagstatustype) * CheckerFlag)| service to get the safety checker status |
| void | **[Cdd_Adc_ClearCheckerEvt](../Modules/group__CDD__ADC.md#function-cdd_adc_clearcheckerevt)**([Cdd_Adc_CheckerIntEvtType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_checkerintevttype) IntEvt, [Cdd_Adc_CheckerEventType](../Modules/group__CDD__ADC.md#enum-cdd_adc_checkereventtype) Event_Id)| service to clears the status flags for the specified event |
| [Cdd_Adc_PpbValType](../Classes/structCdd__Adc__PpbValType.md) | **[Cdd_Adc_ReadPpbValue](../Modules/group__CDD__ADC.md#function-cdd_adc_readppbvalue)**([Cdd_Adc_PpbType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_ppbtype) PpbId)| service to get the PPB results |
| [Cdd_Adc_PpbValType](../Classes/structCdd__Adc__PpbValType.md) | **[Cdd_Adc_ReadPartialPpbValue](../Modules/group__CDD__ADC.md#function-cdd_adc_readpartialppbvalue)**([Cdd_Adc_PpbType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_ppbtype) PpbId)| service to get the partial PPB results |
| sint32 | **[Cdd_Adc_ReadPpb](../Modules/group__CDD__ADC.md#function-cdd_adc_readppb)**([Cdd_Adc_PpbType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_ppbtype) PpbId)| service to get the PPB result of the specified PPB |
| void | **[Cdd_Adc_ClearPpbEvt](../Modules/group__CDD__ADC.md#function-cdd_adc_clearppbevt)**([Cdd_Adc_PpbType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_ppbtype) PpbId)| service to clear the PPB event flags |
| uint16 | **[Cdd_Adc_GetDelayStamp](../Modules/group__CDD__ADC.md#function-cdd_adc_getdelaystamp)**([Cdd_Adc_PpbType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_ppbtype) PpbId)| service to get the delay between the the SOC trigger and the actual start of the SOC acquisition |
| void | **[Cdd_Adc_ConfigurePpbNotification](../Modules/group__CDD__ADC.md#function-cdd_adc_configureppbnotification)**([Cdd_Adc_PpbType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_ppbtype) PpbId, boolean Mode)| Enable or disable PPB notification. |
| Std_ReturnType | **[Cdd_Adc_SetResolution](../Modules/group__CDD__ADC.md#function-cdd_adc_setresolution)**([Cdd_Adc_HwUnitInstanceType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_hwunitinstancetype) HwUnit, [Cdd_Adc_ResolutionType](../Modules/group__CDD__ADC.md#enum-cdd_adc_resolutiontype) Resolution)| service to set the resolution of the ADC hardware unit. |
| sint16 | **[Cdd_Adc_GetTemperatureC](../Modules/group__CDD__ADC.md#function-cdd_adc_gettemperaturec)**([Cdd_Adc_HwUnitInstanceType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_hwunitinstancetype) HwUnit, [Cdd_Adc_ValueGroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_valuegrouptype) TempResult, float32 VoltRef)| service to convert the ADC conversion value to Celsius. |
| sint16 | **[Cdd_Adc_GetTemperatureK](../Modules/group__CDD__ADC.md#function-cdd_adc_gettemperaturek)**([Cdd_Adc_HwUnitInstanceType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_hwunitinstancetype) HwUnit, [Cdd_Adc_ValueGroupType](../Modules/group__CDD__ADC.md#typedef-cdd_adc_valuegrouptype) TempResult, float32 VoltRef)| service to convert the ADC conversion value to Kelvin. |
| void | **[Cdd_Adc_SetInternalTestNode](../Modules/group__CDD__ADC.md#function-cdd_adc_setinternaltestnode)**([Cdd_Adc_InternalTestNodeType](../Modules/group__CDD__ADC.md#enum-cdd_adc_internaltestnodetype) TestNode)| service to set the internal test node |
| void | **[Cdd_Adc_UpdateStatusThroughDma](../Modules/group__CDD__ADC.md#function-cdd_adc_updatestatusthroughdma)**([Cdd_Adc_HwUnitType](../Modules/group__CDD__ADC.md#enum-cdd_adc_hwunittype) HwUnitId, [Cdd_Adc_IntNumType](../Modules/group__CDD__ADC.md#enum-cdd_adc_intnumtype) IntNum)| service to update the group status in DMA mode for the specified group |
### function Cdd_Adc_Init
```
void Cdd_Adc_Init(
const Cdd_Adc_ConfigType * CfgPtr
)
```
**Brief**:
Service to initialize Cdd Adc driver.
This service initializes all the ADC HW units and safety checker units (Cdd_Adc driver).
**Parameters**:
* **CfgPtr** Pointer to configuration set (Varaint PC requires a NULL_PTR)
**Returns**:
* **None**
**Return**: None
**Postcondition**: None
### function Cdd_Adc_SetupResultBuffer
```
Std_ReturnType Cdd_Adc_SetupResultBuffer(
Cdd_Adc_GroupType Group,
const Cdd_Adc_ValueGroupType * DataBufferPtr
)
```
**Brief**:
This service initializes ADC driver with the group specific result buffer start address where the conversion results will be stored.
This function initializes the group specific result buffer start address with the passed DataBufferPtr parameter where the conversion results will be stored. Note: The application has to ensure that the application buffer, where DataBufferPtr points to, can hold all the conversion results of the specified group. The initialization with Cdd_Adc_SetupResultBuffer is required after reset, before a group conversion can be started.
**Parameters**:
* **Group** Numeric ID of requested ADC Channel group.
* **DataBufferPtr** Pointer to result data buffer
**Returns**:
* **E_OK** result buffer pointer initialized correctly
* **E_NOT_OK** operation failed or development error occured
**Return**: Returns if the result buffer setup is successful.
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_DeInit
```
void Cdd_Adc_DeInit(
void
)
```
**Brief**:
Service to deinitialize Cdd Adc driver.
This service returns all ADC HW Units to a state comparable to their power on reset state.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_StartGroupConversion
```
void Cdd_Adc_StartGroupConversion(
Cdd_Adc_GroupType Group
)
```
**Brief**:
Service to start a group conversion.
This service starts the conversion of all channels of the requested ADC Channel group.
**Parameters**:
* **Group** Numeric ID of requested ADC Channel group.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_StopGroupConversion
```
void Cdd_Adc_StopGroupConversion(
Cdd_Adc_GroupType Group
)
```
**Brief**:
Service to stop a group conversion.
This service Stops the conversion of the requested ADC Channel group
**Parameters**:
* **Group** Numeric ID of requested ADC Channel group.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_StartGlobalSwTrig
```
Std_ReturnType Cdd_Adc_StartGlobalSwTrig(
Cdd_Adc_GlbTrigType GlbSwTrig
)
```
**Brief**:
Service to start the global software trigger.
This service starts global software trigger and returns E_OK if it is successful.
**Parameters**:
* **GlbSwTrig** Numeric ID of global software trigger configuration.
**Returns**:
* **E_OK** - If the global software trigger is configured successfully E_NOT_OK - If the global software trigger is not configured
**Return**: Return whether the global software trigger is configured or not
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_StopGlobalSwTrig
```
void Cdd_Adc_StopGlobalSwTrig(
Cdd_Adc_GlbTrigType GlbSwTrig
)
```
**Brief**:
Service to stop the global software trigger.
This service stops global software trigger.
**Parameters**:
* **GlbSwTrig** Numeric ID of global software trigger configuration.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_EnableHardwareTrigger
```
void Cdd_Adc_EnableHardwareTrigger(
Cdd_Adc_GroupType Group
)
```
**Brief**:
Service to enables the HW trigger for a group.
This service enableS the HW trigger source for the requested ADC channel group.
**Parameters**:
* **Group** Numeric ID of requested ADC Channel group.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_DisableHardwareTrigger
```
void Cdd_Adc_DisableHardwareTrigger(
Cdd_Adc_GroupType Group
)
```
**Brief**:
Service to disable the HW trigger for a group.
This service disables the hardware trigger for the requested ADC Channel group.
**Parameters**:
* **Group** Numeric ID of requested ADC Channel group.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_EnableGroupNotification
```
void Cdd_Adc_EnableGroupNotification(
Cdd_Adc_GroupType Group
)
```
**Brief**:
Service to enable the notification for a group.
This service enables the notification mechanism for the requested ADC Channel group.
**Parameters**:
* **Group** Numeric ID of requested ADC Channel group.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_DisableGroupNotification
```
void Cdd_Adc_DisableGroupNotification(
Cdd_Adc_GroupType Group
)
```
**Brief**:
Service to disable the notification for a group.
This service disables the notification mechanism for the requested ADC Channel group.
**Parameters**:
* **Group** Numeric ID of requested ADC Channel group.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_GetGroupStatus
```
Cdd_Adc_StatusType Cdd_Adc_GetGroupStatus(
Cdd_Adc_GroupType Group
)
```
**Brief**:
Service to get the conversion status of the group.
This service returns the conversion status of the requested ADC Channel group.
**Parameters**:
* **Group** Numeric ID of requested ADC Channel group.
**Returns**:
* **Cdd_Adc_StatusType** CDD_ADC_IDLE: The conversion of the specified group has not been started CDD_ADC_BUSY: The conversion of the specified group has been started and is still going on CDD_ADC_COMPLETED: A conversion round of the specified group has been finished. CDD_ADC_STREAM_COMPLETED: The result buffer is completely filled.
**Return**: Returns the conversion status of the group
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_ReadGroup
```
Std_ReturnType Cdd_Adc_ReadGroup(
Cdd_Adc_GroupType Group,
Cdd_Adc_ValueGroupType * DataBufferPtr
)
```
**Brief**:
service that reads the group conversion result of the last completed conversion round
This service reads the group conversion result of the last completed conversion round of the requested group and stores the channel values starting at the DataBufferPtr address. The group channel values are stored in ascending channel number order (in contrast to the storage layout of the result buffer ifstreaming access is configured).
**Parameters**:
* **Group** Numeric ID of requested ADC Channel group.
* **DataBufferPtr** Results of all channels of the group are stored where this pointer points to.
**Returns**:
* **E_OK** Results are available and written to the data buffer
* **E_NOT_OK** No results are available or development error occured
**Return**: Returns if the results are available or not.
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_GetStreamLastPointer
```
Cdd_Adc_StreamNumSampleType Cdd_Adc_GetStreamLastPointer(
Cdd_Adc_GroupType Group,
Cdd_Adc_ValueGroupType ** PtrToSamplePtr
)
```
**Brief**:
service that returns the number of valid samples per channel, stored in the result buffer.
This service returns the number of valid samples per channel, stored in the result buffer. Reads a pointer, pointing to a position in the group result buffer. With the pointer position, the results of all groupchannels of the last completed conversion round can be accessed .With the pointer and the return value, all valid group conversion results can be accessed (the user has to take the layout of the result buffer into account).
**Parameters**:
* **Group** Numeric ID of requested ADC Channel group.
* **PtrToSamplePtr** Pointer to result buffer pointer.
**Returns**:
* **Returns** the number of valid samples available for the group
**Return**: Returns the number of valid samples per channel
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_GetVersionInfo
```
void Cdd_Adc_GetVersionInfo(
Std_VersionInfoType * VersionInfo
)
```
**Brief**:
service that returns the version information of the module.
This service returns the version information of the Adc module.
**Parameters**:
* **VersionInfo** Pointer to where to store the version information of this module
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_StartResultChecker
```
void Cdd_Adc_StartResultChecker(
Cdd_Adc_CheckerType CheckerId
)
```
**Brief**:
service to start the safety result checker.
This service starts the requested safety result checker unit.
**Parameters**:
* **CheckerId** Numeric ID of the result safety checker unit
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_StopResultChecker
```
void Cdd_Adc_StopResultChecker(
Cdd_Adc_CheckerType CheckerId
)
```
**Brief**:
service to stop the safety result checker.
This service stops the requested safety result checker unit.
**Parameters**:
* **CheckerId** Numeric ID of the result safety checker unit
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_ReadCheckerStatus
```
void Cdd_Adc_ReadCheckerStatus(
Cdd_Adc_CheckerIntEvtType IntEvt,
Cdd_Adc_CheckFlagStatusType * CheckerFlag
)
```
**Brief**:
service to get the safety checker status
This service returns the safety checker status and clears the interrupt flags. This API needs to be called inside ESM ISR. This shouldn't be called directly.
**Parameters**:
* **IntEvt** is the numeric ID of the interrupt event instance ID
* **CheckerFlag** Pointer to the array of the status flag
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_ClearCheckerEvt
```
void Cdd_Adc_ClearCheckerEvt(
Cdd_Adc_CheckerIntEvtType IntEvt,
Cdd_Adc_CheckerEventType Event_Id
)
```
**Brief**:
service to clears the status flags for the specified event
This service clears the safety checker status flags that generated the specified event from the specified interrupt event instance
**Parameters**:
* **IntEvt** is the numeric ID of the interrupt event instance ID
* **Event_Id** is the numeric ID of the event
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_ReadPpbValue
```
Cdd_Adc_PpbValType Cdd_Adc_ReadPpbValue(
Cdd_Adc_PpbType PpbId
)
```
**Brief**:
service to get the PPB results
This service returns the PPB results among multiple conversion results of the specified PPB
**Parameters**:
* **PpbId** Numeric ID of the PPB unit
**Returns**:
* **Cdd_Adc_PpbValType** structure
**Return**: Returns a structure with final PPB min,max,sum,min index,max index and count values
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_ReadPartialPpbValue
```
Cdd_Adc_PpbValType Cdd_Adc_ReadPartialPpbValue(
Cdd_Adc_PpbType PpbId
)
```
**Brief**:
service to get the partial PPB results
This service returns the partial PPB results among multiple conversion results of the specified PPB
**Parameters**:
* **PpbId** Numeric ID of the PPB unit
**Returns**:
* **Cdd_Adc_PpbValType** structure
**Return**: Returns a structure with partial PPB min,max,sum,min index,max index and count values
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_ReadPpb
```
sint32 Cdd_Adc_ReadPpb(
Cdd_Adc_PpbType PpbId
)
```
**Brief**:
service to get the PPB result of the specified PPB
This service returns the the PPB result of the specified PPB
**Parameters**:
* **PpbId** Numeric ID of the PPB unit
**Returns**:
* **sint32** signed 32bit value
**Return**: Returns the ppb result register value
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_ClearPpbEvt
```
void Cdd_Adc_ClearPpbEvt(
Cdd_Adc_PpbType PpbId
)
```
**Brief**:
service to clear the PPB event flags
This service clears the event flags of the specified PPB results
**Parameters**:
* **PpbId** Numeric ID of the PPB unit
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_GetDelayStamp
```
uint16 Cdd_Adc_GetDelayStamp(
Cdd_Adc_PpbType PpbId
)
```
**Brief**:
service to get the delay between the the SOC trigger and the actual start of the SOC acquisition
This service returns the delay between the the SOC trigger and the actual start of the SOC acquisition of the specified PPB in SYSCLK cycles.
**Parameters**:
* **PpbId** Numeric ID of the PPB unit
**Returns**:
* **uint16** - Max value is 4095, if the delay exceeds 4096 SYSCLK cycles it overflows
**Return**: Number of SYSCLK cycles between the trigger and the actual sampling of the SOC linked to the specified PPB.
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_ConfigurePpbNotification
```
void Cdd_Adc_ConfigurePpbNotification(
Cdd_Adc_PpbType PpbId,
boolean Mode
)
```
**Brief**:
Enable or disable PPB notification.
This service enables or disables PPB notification for the specified PPB
**Parameters**:
* **PpbId** Numeric ID of the PPB unit
* **Mode** Enable/disable select
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_SetResolution
```
Std_ReturnType Cdd_Adc_SetResolution(
Cdd_Adc_HwUnitInstanceType HwUnit,
Cdd_Adc_ResolutionType Resolution
)
```
**Brief**:
service to set the resolution of the ADC hardware unit.
This service to set the resolution of the specified ADC hardware unit.
**Parameters**:
* **HwUnit** Instance ID of the specified ADC Hw Unit
* **Resolution** Resolution to be set for the ADC Hw Unit
**Returns**:
* **E_OK** Resolution update successfully E_NOT_OK: Resolution update failed
**Return**: Returns if the resolution update is successful.
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_GetTemperatureC
```
sint16 Cdd_Adc_GetTemperatureC(
Cdd_Adc_HwUnitInstanceType HwUnit,
Cdd_Adc_ValueGroupType TempResult,
float32 VoltRef
)
```
**Brief**:
service to convert the ADC conversion value to Celsius.
This service converts the ADC conversion value to Celsius.
**Parameters**:
* **HwUnit** ADC hardware unit
* **TempResult** ADC conversion result
* **VoltRef** ADC voltage reference value (float32) provided to the corresponding ganged reference.
* Internal voltage reference mode: Use 2.5F for 2.5V VREF or 3.3F for 3.3V VREF
* External voltage reference mode: Provide the actual external voltage value as float
**Returns**:
* **sint16** - Value after the result is converted to Celsius
**Return**: Returns the values converted to Celsius
**Note**:
* Temperature sensor values in production test are derived with 2.5V reference. The VoltRef argument is used to scale the temperature sensor reading accordingly if the temperature sensor value is read at a different VREF setting.
* The VoltRef value must exactly match the actual voltage reference being used. Any deviation will result in incorrect temperature calculations.
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_GetTemperatureK
```
sint16 Cdd_Adc_GetTemperatureK(
Cdd_Adc_HwUnitInstanceType HwUnit,
Cdd_Adc_ValueGroupType TempResult,
float32 VoltRef
)
```
**Brief**:
service to convert the ADC conversion value to Kelvin.
This service converts the ADC conversion value to Kelvin.
**Parameters**:
* **HwUnit** ADC hardware unit
* **TempResult** ADC conversion result
* **VoltRef** ADC voltage reference value (float32) provided to the corresponding ganged reference.
* Internal voltage reference mode: Use 2.5F for 2.5V VREF or 3.3F for 3.3V VREF
* External voltage reference mode: Provide the actual external voltage value as float
**Returns**:
* **sint16** - Value after the result is converted to Kelvin
**Return**: Returns the values converted to Kelvin
**Note**:
* Temperature sensor values in production test are derived with 2.5V reference. The VoltRef argument is used to scale the temperature sensor reading accordingly if the temperature sensor value is read at a different VREF setting.
* The VoltRef value must exactly match the actual voltage reference being used. Any deviation will result in incorrect temperature calculations.
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_SetInternalTestNode
```
void Cdd_Adc_SetInternalTestNode(
Cdd_Adc_InternalTestNodeType TestNode
)
```
**Brief**:
service to set the internal test node
This service to set the internal test node for all the hardware units
**Parameters**:
* **TestNode** Internal test node
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Adc_UpdateStatusThroughDma
```
void Cdd_Adc_UpdateStatusThroughDma(
Cdd_Adc_HwUnitType HwUnitId,
Cdd_Adc_IntNumType IntNum
)
```
**Brief**:
service to update the group status in DMA mode for the specified group
This service to update the group status in DMA mode for the specified group
**Parameters**:
* **IntNum** Interrupt ID of the ADC instance
* **HwUnitId** ADC instance ID
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
---
title: Cdd_Dma API GUIDE Header file
---
# CDD_DMA
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Cdd_Dma_EmulationModeType](../Modules/group__CDD__DMA.md#enum-cdd_dma_emulationmodetype)** | Emulation control type. |
|enum| **[Cdd_Dma_PriorityType](../Modules/group__CDD__DMA.md#enum-cdd_dma_prioritytype)** | Channel priority selection type. |
|enum| **[Cdd_Dma_InstanceType](../Modules/group__CDD__DMA.md#enum-cdd_dma_instancetype)** | DMA instance type. |
|enum| **[Cdd_Dma_ChannelType](../Modules/group__CDD__DMA.md#enum-cdd_dma_channeltype)** | DMA Channel type. |
|enum| **[Cdd_Dma_MpuRegionType](../Modules/group__CDD__DMA.md#enum-cdd_dma_mpuregiontype)** | DMA MPU Region type. |
|enum| **[Cdd_Dma_ChannelWrDataSizeType](../Modules/group__CDD__DMA.md#enum-cdd_dma_channelwrdatasizetype)** | Write data size mode bit type. |
|enum| **[Cdd_Dma_ChannelDataSizeType](../Modules/group__CDD__DMA.md#enum-cdd_dma_channeldatasizetype)** | Data size mode bit type. |
|enum| **[Cdd_Dma_ContinuousModeEnableType](../Modules/group__CDD__DMA.md#enum-cdd_dma_continuousmodeenabletype)** | Continuous mode type. |
|enum| **[Cdd_Dma_OneshotModeEnableType](../Modules/group__CDD__DMA.md#enum-cdd_dma_oneshotmodeenabletype)** | Oneshot mode type. |
|enum| **[Cdd_Dma_ChIntEnableType](../Modules/group__CDD__DMA.md#enum-cdd_dma_chintenabletype)** | Channel interrupt generation enable type. |
|enum| **[Cdd_Dma_ChIntModeType](../Modules/group__CDD__DMA.md#enum-cdd_dma_chintmodetype)** | Channel interrupt generation mode type. |
|enum| **[Cdd_Dma_OvrflowIntEnableType](../Modules/group__CDD__DMA.md#enum-cdd_dma_ovrflowintenabletype)** | Overflow interrupt type. |
|enum| **[Cdd_Dma_PeriEvtTrigEnableType](../Modules/group__CDD__DMA.md#enum-cdd_dma_perievttrigenabletype)** | Peripheral event trigger enable type. |
|enum| **[Cdd_Dma_OverflowStatusType](../Modules/group__CDD__DMA.md#enum-cdd_dma_overflowstatustype)** | Overflow status type. |
|enum| **[Cdd_Dma_RunStatusType](../Modules/group__CDD__DMA.md#enum-cdd_dma_runstatustype)** | Run status type. |
|enum| **[Cdd_Dma_BurstStatusType](../Modules/group__CDD__DMA.md#enum-cdd_dma_burststatustype)** | Burst status type. |
|enum| **[Cdd_Dma_TransferStatusType](../Modules/group__CDD__DMA.md#enum-cdd_dma_transferstatustype)** | Transfer status type. |
|enum| **[Cdd_Dma_PeriEvtTrigStatusType](../Modules/group__CDD__DMA.md#enum-cdd_dma_perievttrigstatustype)** | Peripheral event trigger status type. |
|enum| **[Cdd_Dma_MpuRegionAccessType](../Modules/group__CDD__DMA.md#enum-cdd_dma_mpuregionaccesstype)** | MPU region access type. |
|enum| **[Cdd_Dma_ChannelPriority](../Modules/group__CDD__DMA.md#enum-cdd_dma_channelpriority)**
|enum| **[Cdd_Dma_PeriEvtTriggerSrcType](../Modules/group__CDD__DMA.md#enum-cdd_dma_perievttriggersrctype)** | Peripheral event trigger source select type. |
|typedef void(*)(uint8 Channel_Index) | **[Cdd_Dma_NotifyType](../Modules/group__CDD__DMA.md#typedef-cdd_dma_notifytype)** | Channel notification callback function pointer. |
|typedef uint16 | **[Cdd_Dma_MpuChmaskType](../Modules/group__CDD__DMA.md#typedef-cdd_dma_mpuchmasktype)** | MPU Region channel mask parameter. |
### enum Cdd_Dma_EmulationModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_EMULATION_STOP | | The DMA completes the current read-write operation, then halts. |
| CDD_DMA_EMULATION_FREE_RUN | | The DMA continues running during an emulation halt. |
**Brief**:
Emulation control type.
### enum Cdd_Dma_PriorityType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_PRIORITY_ROUND_ROBIN | | The round-robin priority scheme. |
| CDD_DMA_PRIORITY_SOFTWARE_CONFIG | | Software configurable priority for channels. |
**Brief**:
Channel priority selection type.
### enum Cdd_Dma_InstanceType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA1 | 0| |
| CDD_DMA2 | 1| |
**Brief**:
DMA instance type.
### enum Cdd_Dma_ChannelType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_CH1 | 0| |
| CDD_DMA_CH2 | 1| |
| CDD_DMA_CH3 | 2| |
| CDD_DMA_CH4 | 3| |
| CDD_DMA_CH5 | 4| |
| CDD_DMA_CH6 | 5| |
| CDD_DMA_CH7 | 6| |
| CDD_DMA_CH8 | 7| |
| CDD_DMA_CH9 | 8| |
| CDD_DMA_CH10 | 9| |
**Brief**:
DMA Channel type.
### enum Cdd_Dma_MpuRegionType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_MPUR1 | 0| RTDMA MPU Region 1. |
| CDD_DMA_MPUR2 | 1| RTDMA MPU Region 2. |
| CDD_DMA_MPUR3 | 2| RTDMA MPU Region 3. |
| CDD_DMA_MPUR4 | 3| RTDMA MPU Region 4. |
| CDD_DMA_MPUR5 | 4| RTDMA MPU Region 5. |
| CDD_DMA_MPUR6 | 5| RTDMA MPU Region 6. |
| CDD_DMA_MPUR7 | 6| RTDMA MPU Region 7. |
| CDD_DMA_MPUR8 | 7| RTDMA MPU Region 8. |
| CDD_DMA_MPUR9 | 8| RTDMA MPU Region 9. |
| CDD_DMA_MPUR10 | 9| RTDMA MPU Region 10. |
| CDD_DMA_MPUR11 | 10| RTDMA MPU Region 11. |
| CDD_DMA_MPUR12 | 11| RTDMA MPU Region 12. |
| CDD_DMA_MPUR13 | 12| RTDMA MPU Region 13. |
| CDD_DMA_MPUR14 | 13| RTDMA MPU Region 14. |
| CDD_DMA_MPUR15 | 14| RTDMA MPU Region 15. |
| CDD_DMA_MPUR16 | 15| RTDMA MPU Region 16. |
**Brief**:
DMA MPU Region type.
### enum Cdd_Dma_ChannelWrDataSizeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_CHANNEL_WR_DATASIZE_MODE_8 | =
0x0U| DMA channel transfers 8 bits of data on write port per read/write operation. |
| CDD_DMA_CHANNEL_WR_DATASIZE_MODE_16 | =
0x100000U| DMA channel transfers 16 bits of data on write port per read/write operation. |
| CDD_DMA_CHANNEL_WR_DATASIZE_MODE_32 | =
0x200000U| DMA channel transfers 32 bits of data on write port per read/write operation. |
| CDD_DMA_CHANNEL_WR_DATASIZE_MODE_64 | =
0x300000U| DMA channel transfers 64 bits of data on write port per read/write operation. |
**Brief**:
Write data size mode bit type.
### enum Cdd_Dma_ChannelDataSizeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_CHANNEL_DATASIZE_MODE_8 | =
0x0U| DMA channel transfers 8 bits of data per read/write operation. |
| CDD_DMA_CHANNEL_DATASIZE_MODE_16 | =
0x20000U| DMA channel transfers 16 bits of data per read/write operation. |
| CDD_DMA_CHANNEL_DATASIZE_MODE_32 | =
0x40000U| DMA channel transfers 32 bits of data per read/write operation. |
| CDD_DMA_CHANNEL_DATASIZE_MODE_64 | =
0x60000U| DMA channel transfers 64 bits of data per read/write operation. |
**Brief**:
Data size mode bit type.
### enum Cdd_Dma_ContinuousModeEnableType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_CONTINUOUS_MODE_DISABLED | | Continuous mode disabled. |
| CDD_DMA_CONTINUOUS_MODE_ENABLED | | Continuous mode enabled. |
**Brief**:
Continuous mode type.
### enum Cdd_Dma_OneshotModeEnableType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_ONESHOT_MODE_DISABLED | | Oneshot mode disabled. |
| CDD_DMA_ONESHOT_MODE_ENABLED | | Oneshot mode enabled. |
**Brief**:
Oneshot mode type.
### enum Cdd_Dma_ChIntEnableType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_CHANNEL_INTERRUPT_DISABLED | | Channel interrupt generation mode disabled. |
| CDD_DMA_CHANNEL_INTERRUPT_ENABLED | | Channel interrupt generation mode enabled. |
**Brief**:
Channel interrupt generation enable type.
### enum Cdd_Dma_ChIntModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_INT_BEG_OF_TRANSFER | | Generate interrupt at beginning of new transfer. |
| CDD_DMA_INT_END_OF_TRANSFER | | Generate interrupt at end of transfer. |
**Brief**:
Channel interrupt generation mode type.
### enum Cdd_Dma_OvrflowIntEnableType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_OVERFLOW_INTERRUPT_DISABLED | | Overflow interrupt disabled. |
| CDD_DMA_OVERFLOW_INTERRUPT_ENABLED | | Overflow interrupt enabled. |
**Brief**:
Overflow interrupt type.
### enum Cdd_Dma_PeriEvtTrigEnableType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_PERI_EVT_TRIG_DISABLED | | Peripheral event trigger disabled. |
| CDD_DMA_PERI_EVT_TRIG_ENABLED | | Peripheral event trigger enabled. |
**Brief**:
Peripheral event trigger enable type.
### enum Cdd_Dma_OverflowStatusType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_OVERFLOW_NOT_DETECTED | | No overflow detected. |
| CDD_DMA_OVERFLOW_DETECTED | | Overflow detected i.e. peripheral event trigger was received while PERINTFLG was already set. |
**Brief**:
Overflow status type.
### enum Cdd_Dma_RunStatusType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_CHANNEL_NOT_RUNNING | | DMA channel is ready to respond to peripheral event triggers - no ongoing transfer. |
| CDD_DMA_CHANNEL_RUNNING | | DMA channel is busy. |
**Brief**:
Run status type.
### enum Cdd_Dma_BurstStatusType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_NO_BURST_ACTIVITY_ONGOING | | Burst is completed i.e. BURST_COUNT has reached zero. |
| CDD_DMA_BURST_ACTIVITY_ONGOING | | Burst is in progress. |
**Brief**:
Burst status type.
### enum Cdd_Dma_TransferStatusType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_NO_TRANSFER_ACTIVITY_ONGOING | | Transfer is completed i.e. TRANSFER_COUNT has reached zero. |
| CDD_DMA_TRANSFER_ACTIVITY_ONGOING | | Transfer is in progress. |
**Brief**:
Transfer status type.
### enum Cdd_Dma_PeriEvtTrigStatusType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_WAITING_FOR_EVT_TRIG | | Wating for peripheral event trigger. |
| CDD_DMA_PENDING_EVT_TRIG | | Peripheral event trigger has arrived. |
**Brief**:
Peripheral event trigger status type.
### enum Cdd_Dma_MpuRegionAccessType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_NO_ACCESS | | No access to the region. |
| CDD_DMA_READ_ACCESS | | Only read access. |
| CDD_DMA_READ_WRITE_ACCESS | | Both read and write access. |
**Brief**:
MPU region access type.
### enum Cdd_Dma_ChannelPriority
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_CHPRIORITY0 | | Priority 0. |
| CDD_DMA_CHPRIORITY1 | | Priority 1. |
| CDD_DMA_CHPRIORITY2 | | Priority 2. |
| CDD_DMA_CHPRIORITY3 | | Priority 3. |
### enum Cdd_Dma_PeriEvtTriggerSrcType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_DMA_TRIGGER_SOFTWARE | 0| TRIGGER SOFTWARE. |
| CDD_DMA_TRIGGER_ADCA1 | 1| TRIGGER ADCA1. |
| CDD_DMA_TRIGGER_ADCA2 | 2| TRIGGER ADCA2. |
| CDD_DMA_TRIGGER_ADCA3 | 3| TRIGGER ADCA3. |
| CDD_DMA_TRIGGER_ADCA4 | 4| TRIGGER ADCA4. |
| CDD_DMA_TRIGGER_ADCAEVT | 5| TRIGGER ADCAEVT. |
| CDD_DMA_TRIGGER_ADCB1 | 6| TRIGGER ADCB1. |
| CDD_DMA_TRIGGER_ADCB2 | 7| TRIGGER ADCB2. |
| CDD_DMA_TRIGGER_ADCB3 | 8| TRIGGER ADCB3. |
| CDD_DMA_TRIGGER_ADCB4 | 9| TRIGGER ADCB4. |
| CDD_DMA_TRIGGER_ADCBEVT | 10| TRIGGER ADCBEVT. |
| CDD_DMA_TRIGGER_ADCC1 | 11| TRIGGER ADCC1. |
| CDD_DMA_TRIGGER_ADCC2 | 12| TRIGGER ADCC2. |
| CDD_DMA_TRIGGER_ADCC3 | 13| TRIGGER ADCC3. |
| CDD_DMA_TRIGGER_ADCC4 | 14| TRIGGER ADCC4. |
| CDD_DMA_TRIGGER_ADCCEVT | 15| TRIGGER ADCCEVT. |
| CDD_DMA_TRIGGER_ADCD1 | 16| TRIGGER ADCD1. |
| CDD_DMA_TRIGGER_ADCD2 | 17| TRIGGER ADCD2. |
| CDD_DMA_TRIGGER_ADCD3 | 18| TRIGGER ADCD3. |
| CDD_DMA_TRIGGER_ADCD4 | 19| TRIGGER ADCD4. |
| CDD_DMA_TRIGGER_ADCDEVT | 20| TRIGGER ADCDEVT. |
| CDD_DMA_TRIGGER_ADCE1 | 21| TRIGGER ADCE1. |
| CDD_DMA_TRIGGER_ADCE2 | 22| TRIGGER ADCE2. |
| CDD_DMA_TRIGGER_ADCE3 | 23| TRIGGER ADCE3. |
| CDD_DMA_TRIGGER_ADCE4 | 24| TRIGGER ADCE4. |
| CDD_DMA_TRIGGER_ADCEEVT | 25| TRIGGER ADCEEVT. |
| CDD_DMA_TRIGGER_CPU1_XINT1 | 31| TRIGGER CPU1 XINT1. |
| CDD_DMA_TRIGGER_CPU1_XINT2 | 32| TRIGGER CPU1 XINT2. |
| CDD_DMA_TRIGGER_CPU1_XINT3 | 33| TRIGGER CPU1 XINT3. |
| CDD_DMA_TRIGGER_CPU1_XINT4 | 34| TRIGGER CPU1 XINT4. |
| CDD_DMA_TRIGGER_CPU1_XINT5 | 35| TRIGGER CPU1 XINT5. |
| CDD_DMA_TRIGGER_CPU2_XINT1 | 36| TRIGGER CPU2 XINT1. |
| CDD_DMA_TRIGGER_CPU2_XINT2 | 37| TRIGGER CPU2 XINT2. |
| CDD_DMA_TRIGGER_CPU2_XINT3 | 38| TRIGGER CPU2 XINT3. |
| CDD_DMA_TRIGGER_CPU2_XINT4 | 39| TRIGGER CPU2 XINT4. |
| CDD_DMA_TRIGGER_CPU2_XINT5 | 40| TRIGGER CPU2 XINT5. |
| CDD_DMA_TRIGGER_CPU3_XINT1 | 41| TRIGGER CPU3 XINT1. |
| CDD_DMA_TRIGGER_CPU3_XINT2 | 42| TRIGGER CPU3 XINT2. |
| CDD_DMA_TRIGGER_CPU3_XINT3 | 43| TRIGGER CPU3 XINT3. |
| CDD_DMA_TRIGGER_CPU3_XINT4 | 44| TRIGGER CPU3 XINT4. |
| CDD_DMA_TRIGGER_CPU3_XINT5 | 45| TRIGGER CPU3 XINT5. |
| CDD_DMA_TRIGGER_EPWM1SOCA | 46| TRIGGER EPWM1SOCA. |
| CDD_DMA_TRIGGER_EPWM1SOCB | 47| TRIGGER EPWM1SOCB. |
| CDD_DMA_TRIGGER_EPWM2SOCA | 48| TRIGGER EPWM2SOCA. |
| CDD_DMA_TRIGGER_EPWM2SOCB | 49| TRIGGER EPWM2SOCB. |
| CDD_DMA_TRIGGER_EPWM3SOCA | 50| TRIGGER EPWM3SOCA. |
| CDD_DMA_TRIGGER_EPWM3SOCB | 51| TRIGGER EPWM3SOCB. |
| CDD_DMA_TRIGGER_EPWM4SOCA | 52| TRIGGER EPWM4SOCA. |
| CDD_DMA_TRIGGER_EPWM4SOCB | 53| TRIGGER EPWM4SOCB. |
| CDD_DMA_TRIGGER_EPWM5SOCA | 54| TRIGGER EPWM5SOCA. |
| CDD_DMA_TRIGGER_EPWM5SOCB | 55| TRIGGER EPWM5SOCB. |
| CDD_DMA_TRIGGER_EPWM6SOCA | 56| TRIGGER EPWM6SOCA. |
| CDD_DMA_TRIGGER_EPWM6SOCB | 57| TRIGGER EPWM6SOCB. |
| CDD_DMA_TRIGGER_EPWM7SOCA | 58| TRIGGER EPWM7SOCA. |
| CDD_DMA_TRIGGER_EPWM7SOCB | 59| TRIGGER EPWM7SOCB. |
| CDD_DMA_TRIGGER_EPWM8SOCA | 60| TRIGGER EPWM8SOCA. |
| CDD_DMA_TRIGGER_EPWM8SOCB | 61| TRIGGER EPWM8SOCB. |
| CDD_DMA_TRIGGER_EPWM9SOCA | 62| TRIGGER EPWM9SOCA. |
| CDD_DMA_TRIGGER_EPWM9SOCB | 63| TRIGGER EPWM9SOCB. |
| CDD_DMA_TRIGGER_EPWM10SOCA | 64| TRIGGER EPWM10SOCA. |
| CDD_DMA_TRIGGER_EPWM10SOCB | 65| TRIGGER EPWM10SOCB. |
| CDD_DMA_TRIGGER_EPWM11SOCA | 66| TRIGGER EPWM11SOCA. |
| CDD_DMA_TRIGGER_EPWM11SOCB | 67| TRIGGER EPWM11SOCB. |
| CDD_DMA_TRIGGER_EPWM12SOCA | 68| TRIGGER EPWM12SOCA. |
| CDD_DMA_TRIGGER_EPWM12SOCB | 69| TRIGGER EPWM12SOCB. |
| CDD_DMA_TRIGGER_EPWM13SOCA | 70| TRIGGER EPWM13SOCA. |
| CDD_DMA_TRIGGER_EPWM13SOCB | 71| TRIGGER EPWM13SOCB. |
| CDD_DMA_TRIGGER_EPWM14SOCA | 72| TRIGGER EPWM14SOCA. |
| CDD_DMA_TRIGGER_EPWM14SOCB | 73| TRIGGER EPWM14SOCB. |
| CDD_DMA_TRIGGER_EPWM15SOCA | 74| TRIGGER EPWM15SOCA. |
| CDD_DMA_TRIGGER_EPWM15SOCB | 75| TRIGGER EPWM15SOCB. |
| CDD_DMA_TRIGGER_EPWM16SOCA | 76| TRIGGER EPWM16SOCA. |
| CDD_DMA_TRIGGER_EPWM16SOCB | 77| TRIGGER EPWM16SOCB. |
| CDD_DMA_TRIGGER_EPWM17SOCA | 78| TRIGGER EPWM17SOCA. |
| CDD_DMA_TRIGGER_EPWM17SOCB | 79| TRIGGER EPWM17SOCB. |
| CDD_DMA_TRIGGER_EPWM18SOCA | 80| TRIGGER EPWM18SOCA. |
| CDD_DMA_TRIGGER_EPWM18SOCB | 81| TRIGGER EPWM18SOCB. |
| CDD_DMA_TRIGGER_TINT0 | 94| TRIGGER CPU1 TINT0. |
| CDD_DMA_TRIGGER_TINT1 | 95| TRIGGER CPU1 TINT1. |
| CDD_DMA_TRIGGER_TINT2 | 96| TRIGGER CPU1 TINT2. |
| CDD_DMA_TRIGGER_CPU2_TINT0 | 97| TRIGGER CPU2 TINT0. |
| CDD_DMA_TRIGGER_CPU2_TINT1 | 98| TRIGGER CPU2 TINT1. |
| CDD_DMA_TRIGGER_CPU2_TINT2 | 99| TRIGGER CPU2 TINT2. |
| CDD_DMA_TRIGGER_CPU3_TINT0 | 100| TRIGGER CPU3 TINT0. |
| CDD_DMA_TRIGGER_CPU3_TINT1 | 101| TRIGGER CPU3 TINT1. |
| CDD_DMA_TRIGGER_CPU3_TINT2 | 102| TRIGGER CPU3 TINT2. |
| CDD_DMA_TRIGGER_ECAP1 | 112| TRIGGER ECAP1. |
| CDD_DMA_TRIGGER_ECAP2 | 113| TRIGGER ECAP2. |
| CDD_DMA_TRIGGER_ECAP3 | 114| TRIGGER ECAP3. |
| CDD_DMA_TRIGGER_ECAP4 | 115| TRIGGER ECAP4. |
| CDD_DMA_TRIGGER_ECAP5 | 116| TRIGGER ECAP5. |
| CDD_DMA_TRIGGER_ECAP6 | 117| TRIGGER ECAP6. |
| CDD_DMA_TRIGGER_LINATX | 120| TRIGGER LINATX. |
| CDD_DMA_TRIGGER_LINARX | 121| TRIGGER LINARX. |
| CDD_DMA_TRIGGER_LINBTX | 122| TRIGGER LINBTX. |
| CDD_DMA_TRIGGER_LINBRX | 123| TRIGGER LINBRX. |
| CDD_DMA_TRIGGER_SYNC | 124| TRIGGER SYNC. |
| CDD_DMA_TRIGGER_SPIATX | 125| TRIGGER SPIATX. |
| CDD_DMA_TRIGGER_SPIARX | 126| TRIGGER SPIARX. |
| CDD_DMA_TRIGGER_SPIBTX | 127| TRIGGER SPIBTX. |
| CDD_DMA_TRIGGER_SPIBRX | 128| TRIGGER SPIBRX. |
| CDD_DMA_TRIGGER_SPICTX | 129| TRIGGER SPICTX. |
| CDD_DMA_TRIGGER_SPICRX | 130| TRIGGER SPICRX. |
| CDD_DMA_TRIGGER_SPIDTX | 131| TRIGGER SPIDTX. |
| CDD_DMA_TRIGGER_SPIDRX | 132| TRIGGER SPIDRX. |
| CDD_DMA_TRIGGER_SPIETX | 133| TRIGGER SPIETX. |
| CDD_DMA_TRIGGER_SPIERX | 134| TRIGGER SPIERX. |
| CDD_DMA_TRIGGER_CLB1INT | 135| TRIGGER CLB1INT. |
| CDD_DMA_TRIGGER_CLB2INT | 136| TRIGGER CLB2INT. |
| CDD_DMA_TRIGGER_CLB3INT | 137| TRIGGER CLB3INT. |
| CDD_DMA_TRIGGER_CLB4INT | 138| TRIGGER CLB4INT. |
| CDD_DMA_TRIGGER_CLB5INT | 139| TRIGGER CLB5INT. |
| CDD_DMA_TRIGGER_CLB6INT | 140| TRIGGER CLB6INT. |
| CDD_DMA_TRIGGER_FSITXA | 143| TRIGGER FSITXA. |
| CDD_DMA_TRIGGER_FSIRXA | 144| TRIGGER FSIRXA. |
| CDD_DMA_TRIGGER_FSIA_DATA_TAG_MATCH | 145| TRIGGER FSIA DATA TAG MATCH. |
| CDD_DMA_TRIGGER_FSIA_PING_TAG_MATCH | 146| TRIGGER FSIA PING TAG MATCH. |
| CDD_DMA_TRIGGER_FSIRXB | 148| TRIGGER FSIRXB. |
| CDD_DMA_TRIGGER_FSITXB | 147| TRIGGER FSITXB. |
| CDD_DMA_TRIGGER_FSIB_DATA_TAG_MATCH | 149| TRIGGER FSIB DATA TAG MATCH. |
| CDD_DMA_TRIGGER_FSIB_PING_TAG_MATCH | 150| TRIGGER FSIB PING TAG MATCH. |
| CDD_DMA_TRIGGER_FSIRXC | 152| TRIGGER FSIRXC. |
| CDD_DMA_TRIGGER_FSITXC | 151| TRIGGER FSITXC. |
| CDD_DMA_TRIGGER_FSIC_DATA_TAG_MATCH | 153| TRIGGER FSIC DATA TAG MATCH. |
| CDD_DMA_TRIGGER_FSIC_PING_TAG_MATCH | 154| TRIGGER FSIC PING TAG MATCH. |
| CDD_DMA_TRIGGER_FSITXD | 155| TRIGGER FSITXD. |
| CDD_DMA_TRIGGER_FSIRXD | 156| TRIGGER FSIRXD. |
| CDD_DMA_TRIGGER_FSID_DATA_TAG_MATCH | 157| TRIGGER FSID DATA TAG MATCH. |
| CDD_DMA_TRIGGER_FSID_PING_TAG_MATCH | 158| TRIGGER FSID PING TAG MATCH. |
| CDD_DMA_TRIGGER_CPU1_DLT | 161| TRIGGER CPU1 DLT. |
| CDD_DMA_TRIGGER_CPU3_DLT | 163| TRIGGER CPU3 DLT. |
| CDD_DMA_TRIGGER_CPU2_DLT | 162| TRIGGER CPU2 DLT. |
| CDD_DMA_TRIGGER_UARTARX | 167| TRIGGER UARTARX. |
| CDD_DMA_TRIGGER_UARTATX | 168| TRIGGER UARTATX. |
| CDD_DMA_TRIGGER_UARTBTX | 169| TRIGGER UARTBTX. |
| CDD_DMA_TRIGGER_UARTBRX | 170| TRIGGER UARTBRX. |
| CDD_DMA_TRIGGER_UARTCTX | 171| TRIGGER UARTCTX. |
| CDD_DMA_TRIGGER_UARTCRX | 172| TRIGGER UARTCRX. |
| CDD_DMA_TRIGGER_UARTDTX | 173| TRIGGER UARTDTX. |
| CDD_DMA_TRIGGER_UARTDRX | 174| TRIGGER UARTDRX. |
| CDD_DMA_TRIGGER_UARTETX | 175| TRIGGER UARTETX. |
| CDD_DMA_TRIGGER_UARTERX | 176| TRIGGER UARTERX. |
| CDD_DMA_TRIGGER_UARTFTX | 177| TRIGGER UARTFTX. |
| CDD_DMA_TRIGGER_UARTFRX | 178| TRIGGER UARTFRX. |
| CDD_DMA_TRIGGER_DTHE_SHA_DMA_S_CTXIN_REQ | 179| TRIGGER DTHE SHA DMA S CTXIN REQ. |
| CDD_DMA_TRIGGER_DTHE_SHA_DMA_S_DATAIN_REQ | 180| TRIGGER DTHE SHA DMA S DATAIN REQ. |
| CDD_DMA_TRIGGER_DTHE_SHA_DMA_S_CTXOUT_REQ | 181| TRIGGER DTHE SHA DMA S CTXOUT REQ. |
| CDD_DMA_TRIGGER_DTHE_SHA_DMA_P_CTXIN_REQ | 182| TRIGGER DTHE SHA DMA P CTXIN REQ. |
| CDD_DMA_TRIGGER_DTHE_SHA_DMA_P_DATAIN_REQ | 183| TRIGGER DTHE SHA DMA P DATAIN REQ. |
| CDD_DMA_TRIGGER_DTHE_SHA_DMA_P_CTXOUT_REQ | 184| TRIGGER DTHE SHA DMA P CTXOUT REQ. |
| CDD_DMA_TRIGGER_DTHE_AES_DMA_S_CTXIN_REQ | 185| TRIGGER DTHE AES DMA S CTXIN REQ. |
| CDD_DMA_TRIGGER_DTHE_AES_DMA_S_DATAIN_REQ | 186| TRIGGER DTHE AES DMA S DATAIN REQ. |
| CDD_DMA_TRIGGER_DTHE_AES_DMA_S_DATAOUT_REQ | 187| TRIGGER DTHE AES DMA S DATAOUT REQ. |
| CDD_DMA_TRIGGER_DTHE_AES_DMA_S_CTXOUT_REQ | 188| TRIGGER DTHE AES DMA S CTXOUT REQ. |
| CDD_DMA_TRIGGER_DTHE_AES_DMA_P_CTXIN_REQ | 189| TRIGGER DTHE AES DMA P CTXIN REQ. |
| CDD_DMA_TRIGGER_DTHE_AES_DMA_P_DATAIN_REQ | 190| TRIGGER DTHE AES DMA P DATAIN REQ. |
| CDD_DMA_TRIGGER_DTHE_AES_DMA_P_DATAOUT_REQ | 191| TRIGGER DTHE AES DMA P DATAOUT REQ. |
| CDD_DMA_TRIGGER_DTHE_AES_DMA_P_CTXOUT_REQ | 192| TRIGGER DTHE AES DMA P CTXOUT REQ. |
| CDD_DMA_TRIGGER_DTHE_SM3_CTXIN_REQ | 193| TRIGGER DTHE SM3 CTXIN REQ. |
| CDD_DMA_TRIGGER_DTHE_SM3_DATAIN_REQ | 194| TRIGGER DTHE SM3 DATAIN REQ. |
| CDD_DMA_TRIGGER_DTHE_SM3_CTXOUT_REQ | 195| TRIGGER DTHE SM3 CTXOUT REQ. |
| CDD_DMA_TRIGGER_DTHE_SM4_CTXIN_REQ | 196| TRIGGER DTHE SM4 CTXIN REQ. |
| CDD_DMA_TRIGGER_DTHE_SM4_DATAIN_REQ | 197| TRIGGER DTHE SM4 DATAIN REQ. |
| CDD_DMA_TRIGGER_DTHE_SM4_DATAOUT_REQ | 198| TRIGGER DTHE SM4 DATAOUT REQ. |
| CDD_DMA_TRIGGER_DTHE_SM4_CTXOUT_REQ | 199| TRIGGER DTHE SM4 CTXOUT REQ. |
| CDD_DMA_TRIGGER_EPG | 200| TRIGGER EPG. |
| CDD_DMA_TRIGGER_SDFM1FLT1 | 201| TRIGGER SDFM1FLT1. |
| CDD_DMA_TRIGGER_SDFM1FLT2 | 202| TRIGGER SDFM1FLT2. |
| CDD_DMA_TRIGGER_SDFM1FLT3 | 203| TRIGGER SDFM1FLT3. |
| CDD_DMA_TRIGGER_SDFM1FLT4 | 204| TRIGGER SDFM1FLT4. |
| CDD_DMA_TRIGGER_SDFM2FLT1 | 205| TRIGGER SDFM2FLT1. |
| CDD_DMA_TRIGGER_SDFM2FLT2 | 206| TRIGGER SDFM2FLT2. |
| CDD_DMA_TRIGGER_SDFM2FLT3 | 207| TRIGGER SDFM2FLT3. |
| CDD_DMA_TRIGGER_SDFM2FLT4 | 208| TRIGGER SDFM2FLT4. |
| CDD_DMA_TRIGGER_SDFM3FLT1 | 209| TRIGGER SDFM3FLT1. |
| CDD_DMA_TRIGGER_SDFM3FLT2 | 210| TRIGGER SDFM3FLT2. |
| CDD_DMA_TRIGGER_SDFM3FLT3 | 211| TRIGGER SDFM3FLT3. |
| CDD_DMA_TRIGGER_SDFM3FLT4 | 212| TRIGGER SDFM3FLT4. |
| CDD_DMA_TRIGGER_SDFM4FLT1 | 213| TRIGGER SDFM4FLT1. |
| CDD_DMA_TRIGGER_SDFM4FLT2 | 214| TRIGGER SDFM4FLT2. |
| CDD_DMA_TRIGGER_SDFM4FLT3 | 215| TRIGGER SDFM4FLT3. |
| CDD_DMA_TRIGGER_SDFM4FLT4 | 216| TRIGGER SDFM4FLT4. |
| CDD_DMA_TRIGGER_SENT1 | 217| TRIGGER SENT1. |
| CDD_DMA_TRIGGER_SENT2 | 218| TRIGGER SENT2. |
| CDD_DMA_TRIGGER_SENT3 | 219| TRIGGER SENT3. |
| CDD_DMA_TRIGGER_SENT4 | 220| TRIGGER SENT4. |
| CDD_DMA_TRIGGER_SENT5 | 221| TRIGGER SENT5. |
| CDD_DMA_TRIGGER_SENT6 | 222| TRIGGER SENT6. |
| CDD_DMA_TRIGGER_WADI1 | 223| TRIGGER WADI1. |
| CDD_DMA_TRIGGER_WADI2 | 224| TRIGGER WADI2. |
| CDD_DMA_TRIGGER_RTDMA_CH1INT | 240| TRIGGER RTDMA CH1INT. |
| CDD_DMA_TRIGGER_RTDMA_CH2INT | 241| TRIGGER RTDMA CH2INT. |
| CDD_DMA_TRIGGER_RTDMA_CH3INT | 242| TRIGGER RTDMA CH3INT. |
| CDD_DMA_TRIGGER_RTDMA_CH4INT | 243| TRIGGER RTDMA CH4INT. |
| CDD_DMA_TRIGGER_RTDMA_CH5INT | 244| TRIGGER RTDMA CH5INT. |
| CDD_DMA_TRIGGER_RTDMA_CH6INT | 245| TRIGGER RTDMA CH6INT. |
| CDD_DMA_TRIGGER_RTDMA_CH7INT | 246| TRIGGER RTDMA CH7INT. |
| CDD_DMA_TRIGGER_RTDMA_CH8INT | 247| TRIGGER RTDMA CH8INT. |
| CDD_DMA_TRIGGER_RTDMA_CH9INT | 248| TRIGGER RTDMA CH9INT. |
| CDD_DMA_TRIGGER_RTDMA_CH10INT | 249| TRIGGER RTDMA CH10INT. |
**Brief**:
Peripheral event trigger source select type.
### typedef Cdd_Dma_NotifyType
```
typedef void(* Cdd_Dma_NotifyType) (uint8 Channel_Index);
```
**Brief**:
Channel notification callback function pointer.
### typedef Cdd_Dma_MpuChmaskType
```
typedef uint16 Cdd_Dma_MpuChmaskType;
```
**Brief**:
MPU Region channel mask parameter.
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Cdd_Dma_ChannelStatus](../Classes/structCdd__Dma__ChannelStatus.md)** | DMA Channel status structure. |
| **[Cdd_Dma_ChannelParamsType](../Classes/structCdd__Dma__ChannelParamsType.md)** | DMA Channel properties. |
| **[Cdd_Dma_TransferSizeType](../Classes/structCdd__Dma__TransferSizeType.md)** | Burst and Transfer size parameter. |
| **[Cdd_Dma_TransferSrcStepType](../Classes/structCdd__Dma__TransferSrcStepType.md)** | Source burst step and transfer step parameter. |
| **[Cdd_Dma_TransferDestStepType](../Classes/structCdd__Dma__TransferDestStepType.md)** | Destination burst step and transfer step parameter. |
| **[Cdd_Dma_TransferSrcWrapType](../Classes/structCdd__Dma__TransferSrcWrapType.md)** | Source wrap size, wrap step and beginning address parameter. |
| **[Cdd_Dma_TransferDestWrapType](../Classes/structCdd__Dma__TransferDestWrapType.md)** | Destination wrap size, wrap step and beginning address parameter. |
| **[Cdd_Dma_TransferParamsType](../Classes/structCdd__Dma__TransferParamsType.md)** | DMA transfer properties. |
| **[Cdd_Dma_MpuRegionCfgType](../Classes/structCdd__Dma__MpuRegionCfgType.md)** | DMA Channel configuration structure. |
| **[Cdd_Dma_HwInstanceCfgType](../Classes/structCdd__Dma__HwInstanceCfgType.md)** | CDD DMA config type. |
| **[Cdd_Dma_ChannelCfgType](../Classes/structCdd__Dma__ChannelCfgType.md)** | CDD DMA channel config type. |
| **[Cdd_Dma_ConfigType](../Classes/structCdd__Dma__ConfigType.md)** | CDD DMA config type. |
## Defines
| Name | Brief |
| -------------- | ---------- |
| CDD_DMA_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| CDD_DMA_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| CDD_DMA_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| CDD_DMA_AR_RELEASE_MAJOR_VERSION | AUTOSAR Major version specification implemented by CDD_DMA Driver. |
| CDD_DMA_AR_RELEASE_MINOR_VERSION | AUTOSAR Minor version specification implemented by CDD_DMA Driver. |
| CDD_DMA_AR_RELEASE_REVISION_VERSION | AUTOSAR Patch version specification implemented by CDD_DMA Driver. |
| CDD_DMA_VENDOR_ID | Texas Instruments Vendor ID. |
| CDD_DMA_MODULE_ID | CDD DMA Driver Module ID. |
| CDD_DMA_INSTANCE_ID | CDD DMA Instance ID. |
| CDD_DMA_E_UNINIT | API service used without module initialization. |
| CDD_DMA_E_ALREADY_INITIALIZED | API called for reinitialization of already initialized DMA driver. |
| CDD_DMA_E_INIT_FAILED | Initialization API failed. |
| CDD_DMA_E_PARAM_POINTER | API service called with invalid parameter pointer. |
| CDD_DMA_E_PARAM_VALUE | API service called with invalid parameter pointer. |
| CDD_DMA_E_BUSY | API service called during ongoing process. |
| CDD_DMA_E_PERIPHERAL_EVENT_TRIGGER_DISABLED | API service called to force or clear peripheral event trigger when peripheral event trigger is disabled. |
| CDD_DMA_E_PERIPHERAL_EVENT_TRIGGER_ENABLED | API service called to enable peripheral event trigger when peripheral event trigger is already enabled. |
| CDD_DMA_E_ALREADY_RUNNING | API service called to start a channel when the channel is already running. |
| CDD_DMA_E_ALREADY_HALTED | API service called to halt a channel when the channel already halted. |
| CDD_DMA_E_DMACFG_COMMITTED | API service called to modify DMA configurable properties when DMA configurable properties are committed. |
| CDD_DMA_E_CHCFG_COMMITTED | API service called to modify DMA channel properties when DMA channel properties are committed. |
| CDD_DMA_E_MPUR_COMMITTED | API service called to modify DMA MPU region properties when DMA MPU region properties are committed. |
| CDD_DMA_E_MPUCFG_COMMITTED | API service called to enable or disable MPU when DMA MPU configuration are committed. |
| CDD_DMA_E_NO_OVERFLOW | API service called to clear error flag when no overflow is detected. |
| CDD_DMA_E_NO_TRIGGER | API service called to clear peripheral event trigger when no event trigger exists. |
| CDD_DMA_SID_GET_VERSION_INFO | Cdd_Dma_GetVersionInfo() API Service ID. |
| CDD_DMA_SID_INIT | Cdd_Dma_Init() API Service ID. |
| CDD_DMA_SID_DEINIT | Cdd_Dma_DeInit() API Service ID. |
| CDD_DMA_SID_SET_CHANNEL_PROPERTIES | Cdd_Dma_SetChannelProperties() API Service ID. |
| CDD_DMA_SID_SET_TRANSFER_PROPERTIES | Cdd_Dma_SetTransferProperties() API Service ID. |
| CDD_DMA_SID_SET_TRANSFER_SIZE | Cdd_Dma_SetTransferSize() API Service ID. |
| CDD_DMA_SID_SET_TRANSFER_SRC_PROPERTIES | Cdd_Dma_SetTransferSrcProperties() API Service ID. |
| CDD_DMA_SID_SET_TRANSFER_DEST_PROPERTIES | Cdd_Dma_SetTransferDestProperties() API Service ID. |
| CDD_DMA_SID_SET_TRANSFER_SRC_ADDRESS | Cdd_Dma_SetTransferSrcAddress() API Service ID. |
| CDD_DMA_SID_SET_TRANSFER_DEST_ADDRESS | Cdd_Dma_SetTransferDestAddress() API Service ID. |
| CDD_DMA_SID_SET_TRANSFER_WRAP_SRC_PROPERTIES | Cdd_Dma_SetTransferWrapSrcProperties() API Service ID. |
| CDD_DMA_SID_SET_TRANSFER_WRAP_DEST_PROPERTIES | Cdd_Dma_SetTransferWrapDestProperties() API Service ID. |
| CDD_DMA_SID_ENABLE_PERIPHERAL_EVENT_TRIGGER | Cdd_Dma_EnablePeripheralEventTrigger() API Service ID. |
| CDD_DMA_SID_DISABLE_PERIPHERAL_EVENT_TRIGGER | Cdd_Dma_DisablePeripheralEventTrigger() API Service ID. |
| CDD_DMA_SID_SET_PERIPHERAL_EVENT_TRIGGER_SOURCE | Cdd_Dma_SetPeripheralEventTriggerSource() API Service ID. |
| CDD_DMA_SID_START_CHANNEL_TRANSFER | Cdd_Dma_StartChannelTransfer() API Service ID. |
| CDD_DMA_SID_STOP_CHANNEL_TRANSFER | Cdd_Dma_StopChannelTransfer() API Service ID. |
| CDD_DMA_SID_FORCE_PERIPHERAL_EVENT_TRIGGER | Cdd_Dma_ForcePeripheralEventTrigger() API Service ID. |
| CDD_DMA_SID_CLEAR_PERIPHERAL_EVENT_TRIGGER | Cdd_Dma_ClearPeripheralEventTrigger() API Service ID. |
| CDD_DMA_SID_TRIGGER_SOFT_RESET | Cdd_Dma_TriggerSoftReset() API Service ID. |
| CDD_DMA_SID_SET_CHANNEL_PRIORITY | Cdd_Dma_SetChannelPriority() API Service ID. |
| CDD_DMA_SID_GET_CHANNEL_STATUS | Cdd_Dma_GetChannelStatus() API Service ID. |
| CDD_DMA_SID_CLEAR_ERROR_FLAG | Cdd_Dma_ClearErrorFlag() API Service ID. |
| CDD_DMA_SID_SET_CHANNEL_COMMIT | Cdd_Dma_SetChannelCommit() API Service ID. |
| CDD_DMA_SID_SET_DMACFG_COMMIT | Cdd_Dma_SetDmaCfgCommit() API Service ID. |
| CDD_DMA_SID_SET_MPUR_COMMIT | Cdd_Dma_SetMpuRegionCommit() API Service ID. |
| CDD_DMA_SID_SET_MPUCFG_COMMIT | Cdd_Dma_SetMpuCfgCommit() API Service ID. |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Cdd_Dma_GetVersionInfo](../Modules/group__CDD__DMA.md#function-cdd_dma_getversioninfo)**(Std_VersionInfoType * VersionInfoPtr)| Service to provide the version information of Cdd Dma module. |
| void | **[Cdd_Dma_Init](../Modules/group__CDD__DMA.md#function-cdd_dma_init)**(const [Cdd_Dma_ConfigType](../Classes/structCdd__Dma__ConfigType.md) * ConfigPtr)| Service to initialize CDD DMA driver. |
| void | **[Cdd_Dma_DeInit](../Modules/group__CDD__DMA.md#function-cdd_dma_deinit)**(void )| Service to deinitialize CDD DMA driver. |
| Std_ReturnType | **[Cdd_Dma_SetChannelProperties](../Modules/group__CDD__DMA.md#function-cdd_dma_setchannelproperties)**(uint8 ChannelId, [Cdd_Dma_ChannelParamsType](../Classes/structCdd__Dma__ChannelParamsType.md) ChannelProperties)| Service to set the channel properties of a DMA channel. |
| Std_ReturnType | **[Cdd_Dma_SetTransferProperties](../Modules/group__CDD__DMA.md#function-cdd_dma_settransferproperties)**(uint8 ChannelId, [Cdd_Dma_TransferParamsType](../Classes/structCdd__Dma__TransferParamsType.md) TransferProperties)| Service to set the transfer properties of a DMA channel. |
| Std_ReturnType | **[Cdd_Dma_SetTransferSize](../Modules/group__CDD__DMA.md#function-cdd_dma_settransfersize)**(uint8 ChannelId, uint8 BurstSize, uint16 TransferSize)| Service to set the burst size and transfer size of a DMA channel. |
| Std_ReturnType | **[Cdd_Dma_SetTransferSrcProperties](../Modules/group__CDD__DMA.md#function-cdd_dma_settransfersrcproperties)**(uint8 ChannelId, sint16 SrcBurstStep, sint16 SrcTransferStep)| Service to set the transfer source properties : source burst step, source transfer step of a DMA channel. |
| Std_ReturnType | **[Cdd_Dma_SetTransferDestProperties](../Modules/group__CDD__DMA.md#function-cdd_dma_settransferdestproperties)**(uint8 ChannelId, sint16 DestBurstStep, sint16 DestTransferStep)| Service to set the transfer destination properties : destination burst step, destination transfer step of a DMA channel. |
| Std_ReturnType | **[Cdd_Dma_SetTransferSrcAddress](../Modules/group__CDD__DMA.md#function-cdd_dma_settransfersrcaddress)**(uint8 ChannelId, uint32 SrcAddress)| Service to set the transfer source address of a DMA channel. |
| Std_ReturnType | **[Cdd_Dma_SetTransferDestAddress](../Modules/group__CDD__DMA.md#function-cdd_dma_settransferdestaddress)**(uint8 ChannelId, uint32 DestAddress)| Service to set the transfer destination address of a DMA channel. |
| Std_ReturnType | **[Cdd_Dma_SetTransferWrapSrcProperties](../Modules/group__CDD__DMA.md#function-cdd_dma_settransferwrapsrcproperties)**(uint8 ChannelId, uint16 SrcWrapSize, sint16 SrcWrapStep, uint32 SrcBegAddress)| Service to set the transfer source wrap properties of a DMA channel. |
| Std_ReturnType | **[Cdd_Dma_SetTransferWrapDestProperties](../Modules/group__CDD__DMA.md#function-cdd_dma_settransferwrapdestproperties)**(uint8 ChannelId, uint16 DestWrapSize, sint16 DestWrapStep, uint32 DestBegAddress)| Service to set the transfer destination wrap properties of a DMA channel. |
| Std_ReturnType | **[Cdd_Dma_EnablePeripheralEventTrigger](../Modules/group__CDD__DMA.md#function-cdd_dma_enableperipheraleventtrigger)**(uint8 ChannelId)| Service to enable peripheral event triggers of a DMA channel. |
| Std_ReturnType | **[Cdd_Dma_DisablePeripheralEventTrigger](../Modules/group__CDD__DMA.md#function-cdd_dma_disableperipheraleventtrigger)**(uint8 ChannelId)| Service to disable peripheral event triggers of a DMA channel. |
| Std_ReturnType | **[Cdd_Dma_SetPeripheralEventTriggerSource](../Modules/group__CDD__DMA.md#function-cdd_dma_setperipheraleventtriggersource)**(uint8 ChannelId, [Cdd_Dma_PeriEvtTriggerSrcType](../Modules/group__CDD__DMA.md#enum-cdd_dma_perievttriggersrctype) PeripheralEventTrigSrc)| Service to set the peripheral event trigger source for a DMA channel. |
| Std_ReturnType | **[Cdd_Dma_StartChannelTransfer](../Modules/group__CDD__DMA.md#function-cdd_dma_startchanneltransfer)**(uint8 ChannelId)| Service to start or enable a DMA channel. |
| Std_ReturnType | **[Cdd_Dma_StopChannelTransfer](../Modules/group__CDD__DMA.md#function-cdd_dma_stopchanneltransfer)**(uint8 ChannelId)| Service to stop or disable a DMA channel. |
| Std_ReturnType | **[Cdd_Dma_ForcePeripheralEventTrigger](../Modules/group__CDD__DMA.md#function-cdd_dma_forceperipheraleventtrigger)**(uint8 ChannelId)| Service to force the peripheral event trigger for the channel. |
| Std_ReturnType | **[Cdd_Dma_ClearPeripheralEventTrigger](../Modules/group__CDD__DMA.md#function-cdd_dma_clearperipheraleventtrigger)**(uint8 ChannelId)| Service to clear the peripheral event trigger for the channel. |
| Std_ReturnType | **[Cdd_Dma_TriggerSoftReset](../Modules/group__CDD__DMA.md#function-cdd_dma_triggersoftreset)**(uint8 ChannelId)| Service to trigger a soft reset for the channel. |
| Std_ReturnType | **[Cdd_Dma_SetChannelPriority](../Modules/group__CDD__DMA.md#function-cdd_dma_setchannelpriority)**(uint8 ChannelId, [Cdd_Dma_ChannelPriority](../Modules/group__CDD__DMA.md#enum-cdd_dma_channelpriority) Priority)| Service to set channel priority. |
| void | **[Cdd_Dma_GetChannelStatus](../Modules/group__CDD__DMA.md#function-cdd_dma_getchannelstatus)**(uint8 ChannelId, [Cdd_Dma_ChannelStatus](../Classes/structCdd__Dma__ChannelStatus.md) * ChannelStatus)| Service to get the channel status : peripheral event trigger status, transfer status, burst status, run status and overflow status. |
| Std_ReturnType | **[Cdd_Dma_ClearErrorFlag](../Modules/group__CDD__DMA.md#function-cdd_dma_clearerrorflag)**(uint8 ChannelId)| Service to clear the overflow error flag for a DMA channel. |
| Std_ReturnType | **[Cdd_Dma_SetDmaCfgCommit](../Modules/group__CDD__DMA.md#function-cdd_dma_setdmacfgcommit)**(uint8 HwInstanceId)| Service to commit DMA configurable properties such as priority scheme, channel priority and emulation mode for a specific instance. |
| Std_ReturnType | **[Cdd_Dma_SetChannelCommit](../Modules/group__CDD__DMA.md#function-cdd_dma_setchannelcommit)**(uint8 ChannelId)| Service to commit DMA channel configurations for a specific channel. |
| Std_ReturnType | **[Cdd_Dma_SetMpuCfgCommit](../Modules/group__CDD__DMA.md#function-cdd_dma_setmpucfgcommit)**(uint8 HwInstanceId)| Service to commit Mpu configuration: MPUEN for a specific instance. |
| Std_ReturnType | **[Cdd_Dma_SetMpuRegionCommit](../Modules/group__CDD__DMA.md#function-cdd_dma_setmpuregioncommit)**(uint16 MpuRegionId)| Service to commit Mpu Region configurations for a specific MPU region. |
### function Cdd_Dma_GetVersionInfo
```
void Cdd_Dma_GetVersionInfo(
Std_VersionInfoType * VersionInfoPtr
)
```
**Brief**:
Service to provide the version information of Cdd Dma module.
**Parameters**:
* **VersionInfoPtr** is the pointer to CDD DMA driver version information.
**Returns**:
* **None**
**Return**: None
**Precondition**: This API is available only if CDD_DMA_GET_VERSION_INFO_API is STD_ON
**Postcondition**: None
### function Cdd_Dma_Init
```
void Cdd_Dma_Init(
const Cdd_Dma_ConfigType * ConfigPtr
)
```
**Brief**:
Service to initialize CDD DMA driver.
**Parameters**:
* **ConfigPtr** is the NULL pointer for pre compile variant from plugin
**Return**: None
**Precondition**: Preconditions - Driver not already initialized
**Postcondition**: Postconditions - Driver in initialized state
### function Cdd_Dma_DeInit
```
void Cdd_Dma_DeInit(
void
)
```
**Brief**:
Service to deinitialize CDD DMA driver.
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_SetChannelProperties
```
Std_ReturnType Cdd_Dma_SetChannelProperties(
uint8 ChannelId,
Cdd_Dma_ChannelParamsType ChannelProperties
)
```
**Brief**:
Service to set the channel properties of a DMA channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which the channel properties are configured
* **ChannelProperties** Structure of type Cdd_Dma_ChannelParamsType which contains the channel properties to be set.
**Returns**:
* **E_OK** Successfully set channel properties
* **E_NOT_OK** Failed to set channel properties
**Return**: Status of setting channel properties
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_SetTransferProperties
```
Std_ReturnType Cdd_Dma_SetTransferProperties(
uint8 ChannelId,
Cdd_Dma_TransferParamsType TransferProperties
)
```
**Brief**:
Service to set the transfer properties of a DMA channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which the transfer properties are configured
* **TransferProperties** Structure of type Cdd_Dma_TransferParamsType which contains the transfer properties to be set
**Returns**:
* **E_OK** Successfully set transfer properties
* **E_NOT_OK** Failed to set transfer properties
**Return**: Status of setting transfer properties
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_SetTransferSize
```
Std_ReturnType Cdd_Dma_SetTransferSize(
uint8 ChannelId,
uint8 BurstSize,
uint16 TransferSize
)
```
**Brief**:
Service to set the burst size and transfer size of a DMA channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which the transfer size properties are configured
* **BurstSize** Number of words transferred per burst
* **TransferSize** Total number of bursts in the transfer
**Returns**:
* **E_OK** Successfully set burst size and transfer size
* **E_NOT_OK** Failed to set burst size and transfer size
**Return**: Status of setting burst size and transfer size
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_SetTransferSrcProperties
```
Std_ReturnType Cdd_Dma_SetTransferSrcProperties(
uint8 ChannelId,
sint16 SrcBurstStep,
sint16 SrcTransferStep
)
```
**Brief**:
Service to set the transfer source properties : source burst step, source transfer step of a DMA channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which the source burst step and source transfer step properties are configured
* **SrcBurstStep** Source burst step
* **SrcTransferStep** Source transfer step
**Returns**:
* **E_OK** Successfully set transfer source properties
* **E_NOT_OK** Failed to set transfer source properties
**Return**: Status of setting transfer source properties : source burst step, source transfer step
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_SetTransferDestProperties
```
Std_ReturnType Cdd_Dma_SetTransferDestProperties(
uint8 ChannelId,
sint16 DestBurstStep,
sint16 DestTransferStep
)
```
**Brief**:
Service to set the transfer destination properties : destination burst step, destination transfer step of a DMA channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which the destination burst step and destination transfer step properties are configured
* **DestBurstStep** Destination burst step
* **DestTransferStep** Destination transfer step
**Returns**:
* **E_OK** Successfully set transfer destination properties
* **E_NOT_OK** Failed to set transfer destination properties
**Return**: Status of setting transfer destination properties : destination burst step, destination transfer step
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_SetTransferSrcAddress
```
Std_ReturnType Cdd_Dma_SetTransferSrcAddress(
uint8 ChannelId,
uint32 SrcAddress
)
```
**Brief**:
Service to set the transfer source address of a DMA channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which the source address is configured
* **SrcAddress** Transfer source address
**Returns**:
* **E_OK** Successfully set transfer source address.
* **E_NOT_OK** Failed to set source address.
**Return**: Status of setting transfer source address
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_SetTransferDestAddress
```
Std_ReturnType Cdd_Dma_SetTransferDestAddress(
uint8 ChannelId,
uint32 DestAddress
)
```
**Brief**:
Service to set the transfer destination address of a DMA channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which the destination address is configured
* **DestAddress** Transfer destination address
**Returns**:
* **E_OK** Successfully set transfer destination address
* **E_NOT_OK** Failed to set destination address
**Return**: Status of setting transfer destination address
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_SetTransferWrapSrcProperties
```
Std_ReturnType Cdd_Dma_SetTransferWrapSrcProperties(
uint8 ChannelId,
uint16 SrcWrapSize,
sint16 SrcWrapStep,
uint32 SrcBegAddress
)
```
**Brief**:
Service to set the transfer source wrap properties of a DMA channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which the source wrap properties are configured
* **SrcWrapSize** Source wrap size
* **SrcWrapStep** Source wrap step
* **SrcBegAddress** Source beginning address
**Returns**:
* **E_OK** Successfully set source wrap properties
* **E_NOT_OK** Failed to set source wrap properties
**Return**: Status of setting source wrap properties
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_SetTransferWrapDestProperties
```
Std_ReturnType Cdd_Dma_SetTransferWrapDestProperties(
uint8 ChannelId,
uint16 DestWrapSize,
sint16 DestWrapStep,
uint32 DestBegAddress
)
```
**Brief**:
Service to set the transfer destination wrap properties of a DMA channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which the destination wrap properties are configured
* **DestWrapSize** Destination wrap size
* **DestWrapStep** Destination wrap step
* **DestBegAddress** Destination beginning address
**Returns**:
* **E_OK** Successfully set destination wrap properties
* **E_NOT_OK** Failed to set destination wrap properties
**Return**: Status of setting destination wrap properties
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_EnablePeripheralEventTrigger
```
Std_ReturnType Cdd_Dma_EnablePeripheralEventTrigger(
uint8 ChannelId
)
```
**Brief**:
Service to enable peripheral event triggers of a DMA channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which trigger shall be enabled
**Returns**:
* **E_OK** Successfully enabled peripheral event trigger
* **E_NOT_OK** Failed to enable peripheral event trigger
**Return**: Status of peripheral event trigger enabling
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_DisablePeripheralEventTrigger
```
Std_ReturnType Cdd_Dma_DisablePeripheralEventTrigger(
uint8 ChannelId
)
```
**Brief**:
Service to disable peripheral event triggers of a DMA channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which trigger shall be disabled
**Returns**:
* **E_OK** Successfully disabled peripheral event trigger
* **E_NOT_OK** Failed to disabled peripheral event trigger
**Return**: Status of peripheral event trigger disabling
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_SetPeripheralEventTriggerSource
```
Std_ReturnType Cdd_Dma_SetPeripheralEventTriggerSource(
uint8 ChannelId,
Cdd_Dma_PeriEvtTriggerSrcType PeripheralEventTrigSrc
)
```
**Brief**:
Service to set the peripheral event trigger source for a DMA channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which trigger source shall be set
* **PeripheralEventTrigSrc** : Peripheral event trigger source value
**Returns**:
* **E_OK** Successfully set peripheral event trigger source
* **E_NOT_OK** Failed to set peripheral event trigger source
**Return**: Status of setting peripheral event trigger source
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_StartChannelTransfer
```
Std_ReturnType Cdd_Dma_StartChannelTransfer(
uint8 ChannelId
)
```
**Brief**:
Service to start or enable a DMA channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel which shall be enabled
**Returns**:
* **E_OK** Successfully enabled the DMA channel
* **E_NOT_OK** Failed to enable the DMA channel
**Return**: Status of enabling the DMA channel
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_StopChannelTransfer
```
Std_ReturnType Cdd_Dma_StopChannelTransfer(
uint8 ChannelId
)
```
**Brief**:
Service to stop or disable a DMA channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which transfer shall be stopped
**Returns**:
* **E_OK** Successfully disabled the DMA channel
* **E_NOT_OK** Failed to disable the DMA channel
**Return**: Status of stoping the DMA channel
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_ForcePeripheralEventTrigger
```
Std_ReturnType Cdd_Dma_ForcePeripheralEventTrigger(
uint8 ChannelId
)
```
**Brief**:
Service to force the peripheral event trigger for the channel.
**Parameters**:
* **ChannelId** : Symbolic name of the DMA channel for which trigger shall be forced
**Returns**:
* **E_OK** Successfully forced trigger for the DMA channel
* **E_NOT_OK** Failed to force trigger for the DMA channel
**Return**: Status of forcing DMA channel trigger
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_ClearPeripheralEventTrigger
```
Std_ReturnType Cdd_Dma_ClearPeripheralEventTrigger(
uint8 ChannelId
)
```
**Brief**:
Service to clear the peripheral event trigger for the channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which trigger shall be cleared
**Returns**:
* **E_OK** Successfully cleared trigger for the DMA channel
* **E_NOT_OK** Failed to clear trigger for the DMA channel
**Return**: Status of clearing DMA channel trigger
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_TriggerSoftReset
```
Std_ReturnType Cdd_Dma_TriggerSoftReset(
uint8 ChannelId
)
```
**Brief**:
Service to trigger a soft reset for the channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which for which soft trigger shall be triggered
**Returns**:
* **E_OK** Successfully triggered soft reset for the DMA channel
* **E_NOT_OK** Failed to trigger soft reset for the DMA channel
**Return**: Status of trigerring soft reset
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_SetChannelPriority
```
Std_ReturnType Cdd_Dma_SetChannelPriority(
uint8 ChannelId,
Cdd_Dma_ChannelPriority Priority
)
```
**Brief**:
Service to set channel priority.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which priority shall be set
* **Priority** : Channel priority to be assigned
**Returns**:
* **E_OK** Successfully set channel priority for the DMA channel
* **E_NOT_OK** Failed to set channel priority for the DMA channel
**Return**: Status of setting channel priority
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_GetChannelStatus
```
void Cdd_Dma_GetChannelStatus(
uint8 ChannelId,
Cdd_Dma_ChannelStatus * ChannelStatus
)
```
**Brief**:
Service to get the channel status : peripheral event trigger status, transfer status, burst status, run status and overflow status.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which the status shall be read
* **ChannelStatus** : Pointer to the structure of type Cdd_Dma_ChannelStatus where the channel status will be copied
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_ClearErrorFlag
```
Std_ReturnType Cdd_Dma_ClearErrorFlag(
uint8 ChannelId
)
```
**Brief**:
Service to clear the overflow error flag for a DMA channel.
**Parameters**:
* **ChannelId** : Symbolic name of the channel for which the overflow error needs to be cleared
**Returns**:
* **E_OK** Successfully cleared overflow error flag
* **E_NOT_OK** Failed to clear overflow error flag
**Return**: Status of clearing the overflow error flag
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_SetDmaCfgCommit
```
Std_ReturnType Cdd_Dma_SetDmaCfgCommit(
uint8 HwInstanceId
)
```
**Brief**:
Service to commit DMA configurable properties such as priority scheme, channel priority and emulation mode for a specific instance.
**Parameters**:
* **HwInstanceId** Symbolic name of the DMA hardware instance
**Returns**:
* **E_OK** Successfully commited DMA configurations
* **E_NOT_OK** Failed to commit DMA configurations
**Return**: Status of commiting DMA configurations
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_SetChannelCommit
```
Std_ReturnType Cdd_Dma_SetChannelCommit(
uint8 ChannelId
)
```
**Brief**:
Service to commit DMA channel configurations for a specific channel.
**Parameters**:
* **ChannelId** Symbolic name of the DMA channel
**Returns**:
* **E_OK** Successfully commited DMA channel configurations
* **E_NOT_OK** Failed to commit DMA channel configurations
**Return**: Status of commiting DMA channel configurations
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_SetMpuCfgCommit
```
Std_ReturnType Cdd_Dma_SetMpuCfgCommit(
uint8 HwInstanceId
)
```
**Brief**:
Service to commit Mpu configuration: MPUEN for a specific instance.
**Parameters**:
* **HwInstanceId** Symbolic name of the DMA hardware instance
**Returns**:
* **E_OK** Successfully commited Mpu configuration
* **E_NOT_OK** Failed to commit Mpu configuration
**Return**: Status of commiting Mpu configuration
**Precondition**: None
**Postcondition**: None
### function Cdd_Dma_SetMpuRegionCommit
```
Std_ReturnType Cdd_Dma_SetMpuRegionCommit(
uint16 MpuRegionId
)
```
**Brief**:
Service to commit Mpu Region configurations for a specific MPU region.
**Parameters**:
* **MpuRegionId** Symbolic name of the DMA MPU region
**Returns**:
* **E_OK** Successfully commited Mpu Region configuration
* **E_NOT_OK** Failed to commit Mpu Region configuration
**Return**: Status of commiting Mpu Region configuration
**Precondition**: None
**Postcondition**: None
---
title: Cdd_Ecap public API GUIDE Header file
---
# CDD_ECAP
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Cdd_Ecap_HrCap_CalibrationClockSource](../Modules/group__CDD__ECAP.md#enum-cdd_ecap_hrcap_calibrationclocksource)** | This type defines clock sources for HR mode. |
|enum| **[Cdd_Ecap_HrCap_ContinuousCalibrationMode](../Modules/group__CDD__ECAP.md#enum-cdd_ecap_hrcap_continuouscalibrationmode)** | This type defines continuous calibration mode enabled or not. |
|enum| **[Cdd_Ecap_HrCap_CalStatus](../Modules/group__CDD__ECAP.md#enum-cdd_ecap_hrcap_calstatus)** | This type defines the source of interrupt. |
|enum| **[Cdd_Ecap_ModeType](../Modules/group__CDD__ECAP.md#enum-cdd_ecap_modetype)** | This type defines the source of interrupt. |
|enum| **[Cdd_Ecap_InputStateType](../Modules/group__CDD__ECAP.md#enum-cdd_ecap_inputstatetype)** | This type defines a input state of CDD_ECAP driver. |
|enum| **[Cdd_Ecap_ActivationType](../Modules/group__CDD__ECAP.md#enum-cdd_ecap_activationtype)** | This type defines Activation range. |
|enum| **[Cdd_Ecap_EmulationMode](../Modules/group__CDD__ECAP.md#enum-cdd_ecap_emulationmode)** | This defines the available emulation modes. |
|enum| **[Cdd_Ecap_IntrCapSelect](../Modules/group__CDD__ECAP.md#enum-cdd_ecap_intrcapselect)** | This type defines the source of interrupt. |
|enum| **[Cdd_Ecap_MeasurementModeType](../Modules/group__CDD__ECAP.md#enum-cdd_ecap_measurementmodetype)** | This type defines available measurement modes. |
|enum| **[Cdd_Ecap_SignalMeasurementPropertyType](../Modules/group__CDD__ECAP.md#enum-cdd_ecap_signalmeasurementpropertytype)** | This type defines Signal Measurement Property range. |
|enum| **[Cdd_Ecap_TimestampBufferType](../Modules/group__CDD__ECAP.md#enum-cdd_ecap_timestampbuffertype)** | This type defines TimeStamp Property range. |
|enum| **[Cdd_Ecap_StartLevelType](../Modules/group__CDD__ECAP.md#enum-cdd_ecap_startleveltype)** | This type defines the edge to start the edge capturing. |
|enum| **[Cdd_Ecap_InputSelect](../Modules/group__CDD__ECAP.md#enum-cdd_ecap_inputselect)** | This type defines Xbar input to select. |
|typedef uint32 | **[Cdd_Ecap_ValueType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_valuetype)** | This type defines Value type. |
|typedef uint32 | **[Cdd_Ecap_IndexType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_indextype)** | This type defines return value Cdd_Ecap_GetTimeStampIndex. |
|typedef uint32 | **[Cdd_Ecap_EdgeNumberType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_edgenumbertype)** | This type defines return value of Cdd_Ecap_GetEdgeNumbers. |
|typedef uint8 | **[Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype)** | This type defines Channel type. |
|typedef uint8 | **[Cdd_Ecap_ChannelPrescalerType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channelprescalertype)** | This type defines Prescaler type. |
|typedef float32 | **[Cdd_Ecap_ChannelHrScaleType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channelhrscaletype)** | This type defines the scale-factor type for HR mode. |
|typedef uint16 | **[Cdd_Ecap_ChannelHrInterruptType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channelhrinterrupttype)** | This type defines the interrupt flags type for HR mode. |
|typedef void(*)(void) | **[Cdd_Ecap_NotifyFuncType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_notifyfunctype)** | Notification callback function pointer |
### enum Cdd_Ecap_HrCap_CalibrationClockSource
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ECAP_HRCAP_CALIBRATION_CLOCK_SYSCLK | 0x0| Use SYSCLK for period match. |
| CDD_ECAP_HRCAP_CALIBRATION_CLOCK_HRCLK | 0x4| Use HRCLK for period match. |
**Brief**:
This type defines clock sources for HR mode.
### enum Cdd_Ecap_HrCap_ContinuousCalibrationMode
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ECAP_HRCAP_CONTINUOUS_CALIBRATION_DISABLED | 0x00| Continuous calibration disabled. |
| CDD_ECAP_HRCAP_CONTINUOUS_CALIBRATION_ENABLED | 0x20| Continuous calibration enabled. |
**Brief**:
This type defines continuous calibration mode enabled or not.
### enum Cdd_Ecap_HrCap_CalStatus
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ECAP_HRCAP_HRCALCAL_STATUS_DONE_ISR | =
( (0x2U) \| (0x1U) )| Calibration status done flag. |
| CDD_ECAP_HRCAP_HRCALCAL_STATUS_PERIOD_OVERFLOW_ISR | =
( (0x2U) \| (0x1U) \|
(0x4U) )| Calibration period overflow flag. |
| CDD_ECAP_HRCAP_HRCALCAL_CALIBRATION_FLAGS | =
( (0x2U) \| (0x4U) )| Calibration status done flag and period overflow flag. |
**Brief**:
This type defines the source of interrupt.
### enum Cdd_Ecap_ModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ECAP_MODE_NORMAL | | Normal Mode. |
| CDD_ECAP_MODE_SLEEP | | Sleep Mode. |
**Brief**:
This type defines the source of interrupt.
### enum Cdd_Ecap_InputStateType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ECAP_ACTIVE | | Module is in active state. |
| CDD_ECAP_IDLE | | Module is in idle state. |
**Brief**:
This type defines a input state of CDD_ECAP driver.
### enum Cdd_Ecap_ActivationType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ECAP_RISING_EDGE | | Rising Edge Activation type. |
| CDD_ECAP_FALLING_EDGE | | Falling Edge Activation type. |
| CDD_ECAP_BOTH_EDGES | | Both Edge Activation type. |
**Brief**:
This type defines Activation range.
### enum Cdd_Ecap_EmulationMode
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ECAP_EMULATION_STOP | 0x0U| TSCTR is stopped on emulation suspension. |
| CDD_ECAP_EMULATION_RUN_TO_ZERO | 0x1U| runs until 0 before stopping on emulation suspension |
| CDD_ECAP_EMULATION_FREE_RUN | 0x2U| is not affected by emulation suspension |
**Brief**:
This defines the available emulation modes.
### enum Cdd_Ecap_IntrCapSelect
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ECAP_CEVT1_INT | (0x2U)| |
| CDD_ECAP_CEVT2_INT | (0x4U)| |
| CDD_ECAP_CEVT3_INT | (0x8U)| |
| CDD_ECAP_CEVT4_INT | (0x10U)| |
| CDD_ECAP_CEVT1_CEVT2_INT | (0x2U) \| (0x4U)| |
| CDD_ECAP_CEVT1_CEVT3_INT | (0x2U) \| (0x8U)| |
| CDD_ECAP_CEVT1_CEVT4_INT | (0x2U) \| (0x10U)| |
| CDD_ECAP_CEVT2_CEVT3_INT | (0x4U) \| (0x8U)| |
| CDD_ECAP_CEVT2_CEVT4_INT | (0x4U) \| (0x10U)| |
| CDD_ECAP_CEVT3_CEVT4_INT | (0x8U) \| (0x10U)| |
| CDD_ECAP_CEVT1_CEVT2_CEVT3_INT | (0x2U) \| (0x4U) \| (0x8U)| |
| CDD_ECAP_CEVT1_CEVT2_CEVT4_INT | (0x2U) \| (0x4U) \| (0x10U)| |
| CDD_ECAP_CEVT1_CEVT3_CEVT4_INT | (0x2U) \| (0x8U) \| (0x10U)| |
| CDD_ECAP_CEVT2_CEVT3_CEVT4_INT | (0x4U) \| (0x8U) \| (0x10U)| |
| CDD_ECAP_INT_ALL | (0x2U) \| (0x4U) \| (0x8U) \| (0x10U)| |
**Brief**:
This type defines the source of interrupt.
### enum Cdd_Ecap_MeasurementModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ECAP_MODE_SIGNAL_EDGE_DETECT | | Signal Edge Detect Mode. |
| CDD_ECAP_MODE_SIGNAL_MEASUREMENT | | Signal measurement Mode. |
| CDD_ECAP_MODE_TIMESTAMP | | Signal Timestamp Mode. |
| CDD_ECAP_MODE_EDGE_COUNTER | | Signal Edge counter Mode. |
**Brief**:
This type defines available measurement modes.
### enum Cdd_Ecap_SignalMeasurementPropertyType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ECAP_LOW_TIME | | Signal Low time. |
| CDD_ECAP_HIGH_TIME | | Signal High time. |
| CDD_ECAP_PERIOD_TIME | | Signal Period time. |
**Brief**:
This type defines Signal Measurement Property range.
### enum Cdd_Ecap_TimestampBufferType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ECAP_LINEAR_BUFFER | | Linear Buffer to be used in Timestamp. |
| CDD_ECAP_CIRCULAR_BUFFER | | Circular Buffer to be used in Timestamp. |
**Brief**:
This type defines TimeStamp Property range.
### enum Cdd_Ecap_StartLevelType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ECAP_START_LEVEL_RISING_EDGE | | Rising Edge Activation type. |
| CDD_ECAP_START_LEVEL_FALLING_EDGE | | Falling Edge Activation type. |
**Brief**:
This type defines the edge to start the edge capturing.
### enum Cdd_Ecap_InputSelect
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_ECAP_INPUT_INPUTXBAR1 | 0| |
| CDD_ECAP_INPUT_INPUTXBAR2 | 1| GPIO Input Crossbar output signal-1. |
| CDD_ECAP_INPUT_INPUTXBAR3 | 2| GPIO Input Crossbar output signal-2. |
| CDD_ECAP_INPUT_INPUTXBAR4 | 3| GPIO Input Crossbar output signal-3. |
| CDD_ECAP_INPUT_INPUTXBAR5 | 4| GPIO Input Crossbar output signal-4. |
| CDD_ECAP_INPUT_INPUTXBAR6 | 5| GPIO Input Crossbar output signal-5. |
| CDD_ECAP_INPUT_INPUTXBAR7 | 6| GPIO Input Crossbar output signal-6. |
| CDD_ECAP_INPUT_INPUTXBAR8 | 7| GPIO Input Crossbar output signal-7. |
| CDD_ECAP_INPUT_INPUTXBAR9 | 8| GPIO Input Crossbar output signal-8. |
| CDD_ECAP_INPUT_INPUTXBAR10 | 9| GPIO Input Crossbar output signal-9. |
| CDD_ECAP_INPUT_INPUTXBAR11 | 10| GPIO Input Crossbar output signal-10. |
| CDD_ECAP_INPUT_INPUTXBAR12 | 11| GPIO Input Crossbar output signal-11. |
| CDD_ECAP_INPUT_INPUTXBAR13 | 12| GPIO Input Crossbar output signal-12. |
| CDD_ECAP_INPUT_INPUTXBAR14 | 13| GPIO Input Crossbar output signal-13. |
| CDD_ECAP_INPUT_INPUTXBAR15 | 14| GPIO Input Crossbar output signal-14. |
| CDD_ECAP_INPUT_INPUTXBAR16 | 15| GPIO Input Crossbar output signal-15. |
| CDD_ECAP_INPUT_ECAP1_CLB1_OUT14 | 16| GPIO Input Crossbar output signal-16. |
| CDD_ECAP_INPUT_ECAP2_CLB1_OUT14 | 16| CLB1 OUT14. |
| CDD_ECAP_INPUT_ECAP1_CLB1_OUT15 | 17| CLB1 OUT14. |
| CDD_ECAP_INPUT_ECAP2_CLB1_OUT15 | 17| CLB1 OUT15. |
| CDD_ECAP_INPUT_ECAP3_CLB2_OUT14 | 16| CLB1 OUT15. |
| CDD_ECAP_INPUT_ECAP4_CLB2_OUT14 | 16| CLB2 OUT14. |
| CDD_ECAP_INPUT_ECAP5_CLB2_OUT14 | 16| CLB2 OUT14. |
| CDD_ECAP_INPUT_ECAP3_CLB2_OUT15 | 17| CLB2 OUT14. |
| CDD_ECAP_INPUT_ECAP4_CLB2_OUT15 | 17| CLB2 OUT15. |
| CDD_ECAP_INPUT_ECAP5_CLB2_OUT15 | 17| CLB2 OUT15. |
| CDD_ECAP_INPUT_ECAP6_CLB3_OUT14 | 16| CLB2 OUT15. |
| CDD_ECAP_INPUT_ECAP6_CLB3_OUT15 | 17| CLB3 OUT14. |
| CDD_ECAP_INPUT_ECAP6_CLB4_OUT14 | 18| CLB3 OUT15. |
| CDD_ECAP_INPUT_ECAP6_CLB4_OUT15 | 19| CLB4 OUT14. |
| CDD_ECAP_INPUT_ECAP1_CLB5_OUT14 | 18| CLB4 OUT15. |
| CDD_ECAP_INPUT_ECAP2_CLB5_OUT14 | 18| CLB5 OUT14. |
| CDD_ECAP_INPUT_ECAP1_CLB5_OUT15 | 19| CLB5 OUT14. |
| CDD_ECAP_INPUT_ECAP2_CLB5_OUT15 | 19| CLB5 OUT15. |
| CDD_ECAP_INPUT_ECAP3_CLB6_OUT14 | 18| CLB5 OUT15. |
| CDD_ECAP_INPUT_ECAP4_CLB6_OUT14 | 18| CLB6 OUT14. |
| CDD_ECAP_INPUT_ECAP5_CLB6_OUT14 | 18| CLB6 OUT14. |
| CDD_ECAP_INPUT_ECAP3_CLB6_OUT15 | 19| CLB6 OUT14. |
| CDD_ECAP_INPUT_ECAP4_CLB6_OUT15 | 19| CLB6 OUT15. |
| CDD_ECAP_INPUT_ECAP5_CLB6_OUT15 | 19| CLB6 OUT15. |
| CDD_ECAP_INPUT_OUTPUTXBAR1 | 20| CLB6 OUT15. |
| CDD_ECAP_INPUT_OUTPUTXBAR2 | 21| Output Xbar Output-1. |
| CDD_ECAP_INPUT_OUTPUTXBAR3 | 22| Output Xbar Output-2. |
| CDD_ECAP_INPUT_OUTPUTXBAR4 | 23| Output Xbar Output-3. |
| CDD_ECAP_INPUT_OUTPUTXBAR5 | 24| Output Xbar Output-4. |
| CDD_ECAP_INPUT_OUTPUTXBAR6 | 25| Output Xbar Output-5. |
| CDD_ECAP_INPUT_OUTPUTXBAR7 | 26| Output Xbar Output-6. |
| CDD_ECAP_INPUT_OUTPUTXBAR8 | 27| Output Xbar Output-7. |
| CDD_ECAP_INPUT_ADC_E_EVENT4 | 28| Output Xbar Output-8. |
| CDD_ECAP_INPUT_ADC_E_EVENT3 | 29| ADCE Event4. |
| CDD_ECAP_INPUT_ADC_E_EVENT2 | 30| ADCE Event3. |
| CDD_ECAP_INPUT_ADC_E_EVENT1 | 31| ADCE Event2. |
| CDD_ECAP_INPUT_ADC_D_EVENT4 | 32| ADCE Event1. |
| CDD_ECAP_INPUT_ADC_D_EVENT3 | 33| ADCD Event4. |
| CDD_ECAP_INPUT_ADC_D_EVENT2 | 34| ADCD Event3. |
| CDD_ECAP_INPUT_ADC_D_EVENT1 | 35| ADCD Event2. |
| CDD_ECAP_INPUT_ADC_C_EVENT4 | 36| ADCD Event1. |
| CDD_ECAP_INPUT_ADC_C_EVENT3 | 37| ADCC Event4. |
| CDD_ECAP_INPUT_ADC_C_EVENT2 | 38| ADCC Event3. |
| CDD_ECAP_INPUT_ADC_C_EVENT1 | 39| ADCC Event2. |
| CDD_ECAP_INPUT_ADC_B_EVENT4 | 40| ADCC Event1. |
| CDD_ECAP_INPUT_ADC_B_EVENT3 | 41| ADCB Event4. |
| CDD_ECAP_INPUT_ADC_B_EVENT2 | 42| ADCB Event3. |
| CDD_ECAP_INPUT_ADC_B_EVENT1 | 43| ADCB Event2. |
| CDD_ECAP_INPUT_ADC_A_EVENT4 | 44| ADCB Event1. |
| CDD_ECAP_INPUT_ADC_A_EVENT3 | 45| ADCA Event4. |
| CDD_ECAP_INPUT_ADC_A_EVENT2 | 46| ADCA Event3. |
| CDD_ECAP_INPUT_ADC_A_EVENT1 | 47| ADCA Event2. |
| CDD_ECAP_INPUT_FSIA_RX_MSR_LINE | 48| ADCA Event1. |
| CDD_ECAP_INPUT_FSIA_RX_MSR_LINE_RISE | 49| FSIA Rx MSR Line. |
| CDD_ECAP_INPUT_FSIA_RX_MSR_LINE_FALL | 50| FSIA Rx MSR Line Rise. |
| CDD_ECAP_INPUT_FSIB_RX_MSR_LINE | 51| FSIA Rx MSR Line Fall. |
| CDD_ECAP_INPUT_FSIB_RX_MSR_LINE_RISE | 52| FSIB Rx MSR Line. |
| CDD_ECAP_INPUT_FSIB_RX_MSR_LINE_FALL | 53| FSIB Rx MSR Line Rise. |
| CDD_ECAP_INPUT_FSIC_RX_MSR_LINE | 54| FSIB Rx MSR Line Fall. |
| CDD_ECAP_INPUT_FSIC_RX_MSR_LINE_RISE | 55| FSIC Rx MSR Line. |
| CDD_ECAP_INPUT_FSIC_RX_MSR_LINE_FALL | 56| FSIC Rx MSR Line Rise. |
| CDD_ECAP_INPUT_FSID_RX_MSR_LINE | 57| FSIC Rx MSR Line Fall. |
| CDD_ECAP_INPUT_FSID_RX_MSR_LINE_RISE | 58| FSID Rx MSR Line. |
| CDD_ECAP_INPUT_FSID_RX_MSR_LINE_FALL | 59| FSID Rx MSR Line Rise. |
| CDD_ECAP_INPUT_SDFM2_FLT1_COMPARE_LOW | 60| FSID Rx MSR Line Fall. |
| CDD_ECAP_INPUT_SDFM2_FLT2_COMPARE_LOW | 61| SDFM-2 Filter-1 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM2_FLT3_COMPARE_LOW | 62| SDFM-2 Filter-2 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM2_FLT4_COMPARE_LOW | 63| SDFM-2 Filter-3 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM1_FLT1_COMPARE_LOW | 64| SDFM-2 Filter-4 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM1_FLT2_COMPARE_LOW | 65| SDFM-1 Filter-1 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM1_FLT3_COMPARE_LOW | 66| SDFM-1 Filter-2 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM1_FLT4_COMPARE_LOW | 67| SDFM-1 Filter-3 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM2_FLT1_COMPARE_Z | 68| SDFM-1 Filter-4 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM2_FLT2_COMPARE_Z | 69| SDFM-2 Filter-1 Compare Z Trip. |
| CDD_ECAP_INPUT_SDFM2_FLT3_COMPARE_Z | 70| SDFM-2 Filter-2 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM2_FLT4_COMPARE_Z | 71| SDFM-2 Filter-3 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM1_FLT1_COMPARE_Z | 72| SDFM-2 Filter-4 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM1_FLT2_COMPARE_Z | 73| SDFM-1 Filter-1 Compare Z Trip. |
| CDD_ECAP_INPUT_SDFM1_FLT3_COMPARE_Z | 74| SDFM-1 Filter-2 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM1_FLT4_COMPARE_Z | 75| SDFM-1 Filter-3 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM2_FLT1_COMPARE_HIGH | 76| SDFM-1 Filter-4 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM2_FLT2_COMPARE_HIGH | 77| SDFM-2 Filter-1 Compare High Trip. |
| CDD_ECAP_INPUT_SDFM2_FLT3_COMPARE_HIGH | 78| SDFM-2 Filter-2 Compare High Trip. |
| CDD_ECAP_INPUT_SDFM2_FLT4_COMPARE_HIGH | 79| SDFM-2 Filter-3 Compare High Trip. |
| CDD_ECAP_INPUT_SDFM1_FLT1_COMPARE_HIGH | 80| SDFM-2 Filter-4 Compare High Trip. |
| CDD_ECAP_INPUT_SDFM1_FLT2_COMPARE_HIGH | 81| SDFM-1 Filter-1 Compare High Trip. |
| CDD_ECAP_INPUT_SDFM1_FLT3_COMPARE_HIGH | 82| SDFM-1 Filter-2 Compare High Trip. |
| CDD_ECAP_INPUT_SDFM1_FLT4_COMPARE_HIGH | 83| SDFM-1 Filter-3 Compare High Trip. |
| CDD_ECAP_INPUT_SDFM2_FLT1_COMPARE_HIGH_OR_LOW | 84| SDFM-1 Filter-4 Compare High Trip. |
| CDD_ECAP_INPUT_SDFM2_FLT2_COMPARE_HIGH_OR_LOW | 85| SDFM-2 Filter-1 Compare High Trip or Low Trip. |
| CDD_ECAP_INPUT_SDFM2_FLT3_COMPARE_HIGH_OR_LOW | 86| SDFM-2 Filter-2 Compare High Trip or Low Trip. |
| CDD_ECAP_INPUT_SDFM2_FLT4_COMPARE_HIGH_OR_LOW | 87| SDFM-2 Filter-3 Compare High Trip or Low Trip. |
| CDD_ECAP_INPUT_SDFM1_FLT1_COMPARE_HIGH_OR_LOW | 88| SDFM-2 Filter-4 Compare High Trip or Low Trip. |
| CDD_ECAP_INPUT_SDFM1_FLT2_COMPARE_HIGH_OR_LOW | 89| SDFM-1 Filter-1 Compare High Trip or Low Trip. |
| CDD_ECAP_INPUT_SDFM1_FLT3_COMPARE_HIGH_OR_LOW | 90| SDFM-1 Filter-2 Compare High Trip or Low Trip. |
| CDD_ECAP_INPUT_SDFM1_FLT4_COMPARE_HIGH_OR_LOW | 91| SDFM-1 Filter-3 Compare High Trip or Low Trip. |
| CDD_ECAP_INPUT_ECAP5_ECAP6_DELAY_CLK | 92| SDFM-1 Filter-4 Compare High Trip or Low Trip. |
| CDD_ECAP_INPUT_ECAP6_ECAP5_DELAY_CLK | 93| Delay clock for measurement. |
| CDD_ECAP_INPUT_ECATSYNC0 | 94| Delay clock for measurement. |
| CDD_ECAP_INPUT_ECATSYNC1 | 95| Ethercat Sync0. |
| CDD_ECAP_INPUT_CMPSS1_CTRIP_LOW | 96| Ethercat Sync1. |
| CDD_ECAP_INPUT_CMPSS2_CTRIP_LOW | 97| Compare Subsystem-1 Low Trip. |
| CDD_ECAP_INPUT_CMPSS3_CTRIP_LOW | 98| Compare Subsystem-2 Low Trip. |
| CDD_ECAP_INPUT_CMPSS4_CTRIP_LOW | 99| Compare Subsystem-3 Low Trip. |
| CDD_ECAP_INPUT_CMPSS5_CTRIP_LOW | 100| Compare Subsystem-4 Low Trip. |
| CDD_ECAP_INPUT_CMPSS6_CTRIP_LOW | 101| Compare Subsystem-5 Low Trip. |
| CDD_ECAP_INPUT_CMPSS7_CTRIP_LOW | 102| Compare Subsystem-6 Low Trip. |
| CDD_ECAP_INPUT_CMPSS8_CTRIP_LOW | 103| Compare Subsystem-7 Low Trip. |
| CDD_ECAP_INPUT_CMPSS1_CTRIP_HIGH | 107| Compare Subsystem-8 Low Trip. |
| CDD_ECAP_INPUT_CMPSS2_CTRIP_HIGH | 108| Compare Subsystem-1 High Trip. |
| CDD_ECAP_INPUT_CMPSS3_CTRIP_HIGH | 109| Compare Subsystem-2 High Trip. |
| CDD_ECAP_INPUT_CMPSS4_CTRIP_HIGH | 110| Compare Subsystem-3 High Trip. |
| CDD_ECAP_INPUT_CMPSS5_CTRIP_HIGH | 111| Compare Subsystem-4 High Trip. |
| CDD_ECAP_INPUT_CMPSS6_CTRIP_HIGH | 112| Compare Subsystem-5 High Trip. |
| CDD_ECAP_INPUT_CMPSS7_CTRIP_HIGH | 113| Compare Subsystem-6 High Trip. |
| CDD_ECAP_INPUT_CMPSS8_CTRIP_HIGH | 114| Compare Subsystem-7 High Trip. |
| CDD_ECAP_INPUT_GPIO8 | 115| Compare Subsystem-8 High Trip. |
| CDD_ECAP_INPUT_GPIO9 | 116| GPIO8. |
| CDD_ECAP_INPUT_GPIO22 | 117| GPIO9. |
| CDD_ECAP_INPUT_GPIO23 | 118| GPIO22. |
| CDD_ECAP_INPUT_CMPSS1_CTRIP_HIGH_OR_LOW | 119| GPIO23. |
| CDD_ECAP_INPUT_CMPSS2_CTRIP_HIGH_OR_LOW | 120| Compare Subsystem-1 High Trip or Low Trip. |
| CDD_ECAP_INPUT_CMPSS3_CTRIP_HIGH_OR_LOW | 121| Compare Subsystem-1 High Trip or Low Trip. |
| CDD_ECAP_INPUT_CMPSS4_CTRIP_HIGH_OR_LOW | 122| Compare Subsystem-2 High Trip or Low Trip. |
| CDD_ECAP_INPUT_CMPSS5_CTRIP_HIGH_OR_LOW | 123| Compare Subsystem-3 High Trip or Low Trip. |
| CDD_ECAP_INPUT_CMPSS6_CTRIP_HIGH_OR_LOW | 124| Compare Subsystem-4 High Trip or Low Trip. |
| CDD_ECAP_INPUT_CMPSS7_CTRIP_HIGH_OR_LOW | 125| Compare Subsystem-5 High Trip or Low Trip. |
| CDD_ECAP_INPUT_CMPSS8_CTRIP_HIGH_OR_LOW | 126| Compare Subsystem-6 High Trip or Low Trip. |
| CDD_ECAP_INPUT_ECAP1_INPUTXBAR7 | 127| Compare Subsystem-7 High Trip or Low Trip. |
| CDD_ECAP_INPUT_ECAP2_INPUTXBAR8 | 127| GPIO Input Crossbar output signal-7. |
| CDD_ECAP_INPUT_ECAP3_INPUTXBAR9 | 127| GPIO Input Crossbar output signal-8. |
| CDD_ECAP_INPUT_ECAP4_INPUTXBAR10 | 127| GPIO Input Crossbar output signal-9. |
| CDD_ECAP_INPUT_ECAP5_INPUTXBAR11 | 127| GPIO Input Crossbar output signal-10. |
| CDD_ECAP_INPUT_ECAP6_INPUTXBAR12 | 127| GPIO Input Crossbar output signal-11. |
| CDD_ECAP_INPUT_SDFM4_FLT1_COMPARE_LOW | 128| GPIO Input Crossbar output signal-12. |
| CDD_ECAP_INPUT_SDFM4_FLT2_COMPARE_LOW | 129| SDFM-4 Filter-1 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM4_FLT3_COMPARE_LOW | 130| SDFM-4 Filter-2 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM4_FLT4_COMPARE_LOW | 131| SDFM-4 Filter-3 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM3_FLT1_COMPARE_LOW | 132| SDFM-4 Filter-4 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM3_FLT2_COMPARE_LOW | 133| SDFM-3 Filter-1 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM3_FLT3_COMPARE_LOW | 134| SDFM-3 Filter-2 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM3_FLT4_COMPARE_LOW | 135| SDFM-3 Filter-3 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM4_FLT4_COMPARE_Z | 139| SDFM-3 Filter-4 Compare Low Trip. |
| CDD_ECAP_INPUT_SDFM3_FLT4_COMPARE_Z | 143| SDFM-4 Filter-4 Compare Z Trip. |
| CDD_ECAP_INPUT_SDFM4_FLT1_COMPARE_HIGH | 144| SDFM-3 Filter-4 Compare Z Trip. |
| CDD_ECAP_INPUT_SDFM4_FLT2_COMPARE_HIGH | 145| SDFM-4 Filter-1 Compare High Trip. |
| CDD_ECAP_INPUT_SDFM4_FLT3_COMPARE_HIGH | 146| SDFM-4 Filter-2 Compare High Trip. |
| CDD_ECAP_INPUT_SDFM4_FLT4_COMPARE_HIGH | 147| SDFM-4 Filter-3 Compare High Trip. |
| CDD_ECAP_INPUT_SDFM3_FLT1_COMPARE_HIGH | 148| SDFM-4 Filter-4 Compare High Trip. |
| CDD_ECAP_INPUT_SDFM3_FLT2_COMPARE_HIGH | 149| SDFM-3 Filter-1 Compare High Trip. |
| CDD_ECAP_INPUT_SDFM3_FLT3_COMPARE_HIGH | 150| SDFM-3 Filter-2 Compare High Trip. |
| CDD_ECAP_INPUT_SDFM3_FLT4_COMPARE_HIGH | 151| SDFM-3 Filter-3 Compare High Trip. |
| CDD_ECAP_INPUT_SDFM4_FLT1_COMPARE_HIGH_OR_LOW | 152| SDFM-3 Filter-4 Compare High Trip. |
| CDD_ECAP_INPUT_SDFM4_FLT2_COMPARE_HIGH_OR_LOW | 153| SDFM-4 Filter-1 Compare High Trip or Low Trip. |
| CDD_ECAP_INPUT_SDFM4_FLT3_COMPARE_HIGH_OR_LOW | 154| SDFM-4 Filter-2 Compare High Trip or Low Trip. |
| CDD_ECAP_INPUT_SDFM4_FLT4_COMPARE_HIGH_OR_LOW | 155| SDFM-4 Filter-3 Compare High Trip or Low Trip. |
| CDD_ECAP_INPUT_SDFM3_FLT1_COMPARE_HIGH_OR_LOW | 156| SDFM-4 Filter-4 Compare High Trip or Low Trip. |
| CDD_ECAP_INPUT_SDFM3_FLT2_COMPARE_HIGH_OR_LOW | 157| SDFM-3 Filter-1 Compare High Trip or Low Trip. |
| CDD_ECAP_INPUT_SDFM3_FLT3_COMPARE_HIGH_OR_LOW | 158| SDFM-3 Filter-2 Compare High Trip or Low Trip. |
| CDD_ECAP_INPUT_SDFM3_FLT4_COMPARE_HIGH_OR_LOW | 159| SDFM-3 Filter-3 Compare High Trip or Low Trip. |
| CDD_ECAP_INPUT_EPWM18_DEL_ACTIVE | 160| SDFM-3 Filter-4 Compare High Trip or Low Trip. |
| CDD_ECAP_INPUT_EPWM17_DEL_ACTIVE | 161| EPWM-18 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_EPWM16_DEL_ACTIVE | 162| EPWM-17 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_EPWM15_DEL_ACTIVE | 163| EPWM-16 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_EPWM14_DEL_ACTIVE | 164| EPWM-15 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_EPWM13_DEL_ACTIVE | 165| EPWM-14 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_EPWM12_DEL_ACTIVE | 166| EPWM-13 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_EPWM11_DEL_ACTIVE | 167| EPWM-12 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_EPWM10_DEL_ACTIVE | 168| EPWM-11 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_EPWM9_DEL_ACTIVE | 169| EPWM-10 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_EPWM8_DEL_ACTIVE | 170| EPWM-9 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_EPWM7_DEL_ACTIVE | 171| EPWM-8 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_EPWM6_DEL_ACTIVE | 172| EPWM-7 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_EPWM5_DEL_ACTIVE | 173| EPWM-6 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_EPWM4_DEL_ACTIVE | 174| EPWM-5 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_EPWM3_DEL_ACTIVE | 175| EPWM-4 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_EPWM2_DEL_ACTIVE | 176| EPWM-3 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_EPWM1_DEL_ACTIVE | 177| EPWM-2 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_GPIO11 | 251| EPWM-1 Diode Emulation Logic Active. |
| CDD_ECAP_INPUT_GPIO12 | 252| GPIO11. |
| CDD_ECAP_INPUT_GPIO13 | 253| GPIO12. |
| CDD_ECAP_INPUT_GPIO14 | 254| GPIO13. |
| CDD_ECAP_INPUT_ECAP1_EPG1_DATAOUT49 | 255| GPIO14. |
| CDD_ECAP_INPUT_ECAP2_EPG1_DATAOUT50 | 255| EPG-1 Data Output-49 Connection. |
| CDD_ECAP_INPUT_ECAP3_EPG1_DATAOUT51 | 255| EPG-1 Data Output-50 Connection. |
| CDD_ECAP_INPUT_ECAP4_EPG1_DATAOUT52 | 255| EPG-1 Data Output-51 Connection. |
| CDD_ECAP_INPUT_ECAP5_EPG1_DATAOUT53 | 255| EPG-1 Data Output-52 Connection. |
| CDD_ECAP_INPUT_ECAP6_EPG1_DATAOUT54 | 255| EPG-1 Data Output-53 Connection. |
**Brief**:
This type defines Xbar input to select.
### typedef Cdd_Ecap_ValueType
```
typedef uint32 Cdd_Ecap_ValueType;
```
**Brief**:
This type defines Value type.
### typedef Cdd_Ecap_IndexType
```
typedef uint32 Cdd_Ecap_IndexType;
```
**Brief**:
This type defines return value Cdd_Ecap_GetTimeStampIndex.
### typedef Cdd_Ecap_EdgeNumberType
```
typedef uint32 Cdd_Ecap_EdgeNumberType;
```
**Brief**:
This type defines return value of Cdd_Ecap_GetEdgeNumbers.
### typedef Cdd_Ecap_ChannelType
```
typedef uint8 Cdd_Ecap_ChannelType;
```
**Brief**:
This type defines Channel type.
### typedef Cdd_Ecap_ChannelPrescalerType
```
typedef uint8 Cdd_Ecap_ChannelPrescalerType;
```
**Brief**:
This type defines Prescaler type.
### typedef Cdd_Ecap_ChannelHrScaleType
```
typedef float32 Cdd_Ecap_ChannelHrScaleType;
```
**Brief**:
This type defines the scale-factor type for HR mode.
### typedef Cdd_Ecap_ChannelHrInterruptType
```
typedef uint16 Cdd_Ecap_ChannelHrInterruptType;
```
**Brief**:
This type defines the interrupt flags type for HR mode.
### typedef Cdd_Ecap_NotifyFuncType
```
typedef void(* Cdd_Ecap_NotifyFuncType) (void);
```
**Brief**:
Notification callback function pointer
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Cdd_Ecap_DutyCycleType](../Classes/structCdd__Ecap__DutyCycleType.md)** | This type defines Duty Cycle struct. |
| **[Cdd_Ecap_ChannelConfigType](../Classes/structCdd__Ecap__ChannelConfigType.md)** | CDD_ECAP Channel Config Structure. |
| **[Cdd_Ecap_ConfigType](../Classes/structCdd__Ecap__ConfigType.md)** | CDD_ECAP Config Structure. |
| **[Cdd_Ecap_PeriodicReadBackDataType](../Classes/structCdd__Ecap__PeriodicReadBackDataType.md)** | CDD_ECAP periodic readback register definition. |
## Defines
| Name | Brief |
| -------------- | ---------- |
| CDD_ECAP_INIT_ID | Cdd_Ecap_Init() API Service ID. |
| CDD_ECAP_DEINIT_ID | Cdd_Ecap_DeInit() API Service ID. |
| CDD_ECAP_SETMODE_ID | Cdd_Ecap_SetMode() API Service ID. |
| CDD_ECAP_SETACTIVATIONCONDITION_ID | Cdd_Ecap_SetActivationCondition() API Service ID. |
| CDD_ECAP_DISABLENOTIFICATION_ID | Cdd_Ecap_DisableNotification() API Service ID. |
| CDD_ECAP_ENABLENOTIFICATION_ID | Cdd_Ecap_EnableNotification() API Service ID. |
| CDD_ECAP_GETINPUTSTATE_ID | Cdd_Ecap_GetInputState() API Service ID. |
| CDD_ECAP_STARTTIMESTAMP_ID | Cdd_Ecap_StartTimestamp() API Service ID. |
| CDD_ECAP_STOPTIMESTAMP_ID | Cdd_Ecap_StopTimestamp() API Service ID. |
| CDD_ECAP_GETTIMESTAMPINDEX_ID | Cdd_Ecap_GetTimeStampIndex() API Service ID. |
| CDD_ECAP_RESETEDGECOUNT_ID | Cdd_Ecap_ResetEdgeCount() API Service ID. |
| CDD_ECAP_ENABLEEDGECOUNT_ID | Cdd_Ecap_EnableEdgeCount() API Service ID. |
| CDD_ECAP_DISABLEEDGECOUNT_ID | Cdd_Ecap_DisableEdgeCount() API Service ID. |
| CDD_ECAP_GETEDGENUMBERS_ID | Cdd_Ecap_GetEdgeNumbers() API Service ID. |
| CDD_ECAP_GETTIMEELAPSED_ID | Cdd_Ecap_GetTimeElapsed() API Service ID. |
| CDD_ECAP_GETDUTYCYCLEVALUES_ID | Cdd_Ecap_GetDutyCycleValues() API Service ID. |
| CDD_ECAP_GETVERSIONINFO_ID | Cdd_Ecap_GetVersionInfo() API Service ID. |
| CDD_ECAP_STARTSIGNALMEASUREMENT_ID | Cdd_Ecap_StartSignalMeasurement() API Service ID. |
| CDD_ECAP_STOPSIGNALMEASUREMENT_ID | Cdd_Ecap_StopSignalMeasurement() API Service ID. |
| CDD_ECAP_ENABLEEDGEDETECTION_ID | Cdd_Ecap_EnableEdgeDetection() API Service ID. |
| CDD_ECAP_DISABLEEDGEDETECTION_ID | Cdd_Ecap_DisableEdgeDetection() API Service ID. |
| CDD_ECAP_SETSTARTLEVELCONDITION_ID | Cdd_Ecap_SetStartLevelCondition() API Service ID. |
| CDD_ECAP_HRSCALEFACTOR_ID | Cdd_Ecap_GetHrScaleFactor API Service ID. |
| CDD_ECAP_HRTIMESTAMP_ID | Cdd_Ecap_GetHrScaleFactor API Service ID. |
| CDD_ECAP_READBACK_ID | Cdd_Ecap_PeriodicReadback() API Service ID. |
| CDD_ECAP_E_PARAM_POINTER | API service called with invalid pointer. |
| CDD_ECAP_E_PARAM_CHANNEL | API service called with invalid channel identifier or channel not configured. |
| CDD_ECAP_E_PARAM_ACTIVATION | API service called with an invalid or not feasible activation. |
| CDD_ECAP_E_INIT_FAILED | Init Function Failed. |
| CDD_ECAP_E_PARAM_BUFFER_SIZE | API service used with invalid Buffer size. |
| CDD_ECAP_E_PARAM_MODE | API service called with invalid mode. |
| CDD_ECAP_E_UNINIT | API service called without module initialisation. |
| CDD_ECAP_E_NOT_STARTED | Cdd_Ecap_StopTimestamp called on channel not started or already stopped. |
| CDD_ECAP_E_BUSY_OPERATION | API service called while a running operation. |
| CDD_ECAP_E_ALREADY_INITIALIZED | API service Cdd_Ecap_Init called when module already initialized. |
| CDD_ECAP_E_PARAM_NOTIFY_INTERVAL | API service called when notify interval is invalid. |
| CDD_ECAP_E_PARAM_VINFO | API service Cdd_Ecap_GetVersionInfo called and parameter is invalid. |
| CDD_ECAP_E_PARAM_START_LEVEL | API service called with an invalid or not feasible start level. |
| CDD_ECAP_E_HR_CHANNEL | API service called with an invalid channel in the HR mode. |
| CDD_ECAP_DEINIT_RUNNING_CHANNEL_ID | API service called when DeInit is called while the channel is running. |
| CDD_ECAP_STATUS_UNINIT | CDD_ECAP driver Status uninitialized. |
| CDD_ECAP_STATUS_INIT | CDD_ECAP driver Status Initialized. |
| CDD_ECAP_SF_NOTREADY | CDD_ECAP Scalefactor is not ready. |
| CDD_ECAP_ECEINT_CEVT1 | Capture Event 1 Interrupt Enable. |
| CDD_ECAP_ECEINT_CEVT2 | Capture Event 2 Interrupt Enable. |
| CDD_ECAP_ECEINT_CEVT3 | Capture Event 3 Interrupt Enable. |
| CDD_ECAP_ECEINT_CEVT4 | Capture Event 4 Interrupt Enable. |
| CDD_ECAP_HRCAP_GLOBAL_CALIBRATION_INTERRUPT | Global calibration interrupt flag. |
| CDD_ECAP_HRCAP_CALIBRATION_DONE | Calibration done flag. |
| CDD_ECAP_HRCAP_CALIBRATION_PERIOD_OVERFLOW | Calibration period overflow flag. |
| CDD_ECAP_VENDOR_ID | Texas Instruments Vendor ID. |
| CDD_ECAP_MODULE_ID | CDD ECAP Driver Module ID. |
| CDD_ECAP_INSTANCE_ID | CDD ECAP Driver Instance ID. |
| CDD_ECAP_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| CDD_ECAP_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| CDD_ECAP_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| CDD_ECAP_AR_RELEASE_MAJOR_VERSION | AUTOSAR Major version specification implemented by CDD_ECAP Driver. |
| CDD_ECAP_AR_RELEASE_MINOR_VERSION | AUTOSAR Minor version specification implemented by CDD_ECAP Driver. |
| CDD_ECAP_AR_RELEASE_REVISION_VERSION | AUTOSAR Patch version specification implemented by CDD_ECAP Driver. |
| CDD_ECAP_HRCAP_HRCAPCAL_OVERFLOW | |
| CDD_ECAP_HRCAP_HRCAPCAL_INV_OVERFLOW | |
| CDD_ECAP_CFG_MAJOR_VERSION | |
| CDD_ECAP_CFG_MINOR_VERSION | |
| CDD_ECAP_CFG_PATCH_VERSION | |
| CDD_ECAP_HW_CNT | |
| CDD_ECAP_DE_INIT_API | Enable/Disable Cdd_Ecap DeInit API. |
| CDD_ECAP_EDGE_COUNT_API | Enable/Disable Edge Count API. |
| CDD_ECAP_EDGE_DETECT_API | Enable/Disable Edge Detect API. |
| CDD_ECAP_GET_DUTY_CYCLE_VALUES_API | Enable/Disable Get Duty Cycle Values API. |
| CDD_ECAP_GET_INPUT_STATE_API | Enable/Disable Get Input State API. |
| CDD_ECAP_GET_TIME_ELAPSED_API | Enable/Disable Get Time Elapsed API. |
| CDD_ECAP_GET_VERSION_INFO_API | Enable/Disable Get Version Info API. |
| CDD_ECAP_SIGNAL_MEASUREMENT_API | Enable/Disable Signal Measurement API. |
| CDD_ECAP_TIMESTAMP_API | Enable/Disable Timestamp API. |
| CDD_ECAP_HR_API | Enable/Disable High Resolution API. |
| CDD_ECAP_DEV_ERROR_DETECT | Enable/Disable Development error detet. |
| CDD_ECAP_MAX_NUM_CHANNELS | Maximum number of Cdd_Ecap channels. |
| CDD_ECAP_INIT_CONFIG_PC | Pre Compile config macro name. |
| CddEcapConf_CddEcapChannel_CddEcapChannel_0 | Channel ID Symbolic Names Configured channel ID(s) |
| CddEcapConf_CddEcapChannel_CddEcapChannel_1 | Channel identifiers. |
| CddEcapConf_CddEcapChannel_CddEcapChannel_2 | Channel identifiers. |
| CddEcapConf_CddEcapChannel_CddEcapChannel_3 | Channel identifiers. |
| CDD_ECAP_CHANNEL0 | Channel identifiers. |
| CDD_ECAP_CHANNEL1 | ECAP Channel 1, in MAIN DOMAIN. |
| CDD_ECAP_CHANNEL2 | ECAP Channel 2, in MAIN DOMAIN. |
| CDD_ECAP_CHANNEL3 | ECAP Channel 3, in MAIN DOMAIN. |
| CDD_ECAP_CHANNEL0_INT_ENABLE | |
| CDD_ECAP_CHANNEL0_INT_ISR_CAT1_INT | |
| CDD_ECAP_CHANNEL1_INT_ENABLE | |
| CDD_ECAP_CHANNEL1_INT_ISR_CAT1_INT | |
| CDD_ECAP_CHANNEL2_INT_ENABLE | |
| CDD_ECAP_CHANNEL2_INT_ISR_CAT1_INT | |
| CDD_ECAP_CHANNEL3_INT_ENABLE | |
| CDD_ECAP_CHANNEL3_INT_ISR_CAT1_INT | |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Cdd_Ecap_Init](../Modules/group__CDD__ECAP.md#function-cdd_ecap_init)**(const [Cdd_Ecap_ConfigType](../Classes/structCdd__Ecap__ConfigType.md) * ConfigPtr)| Service to initialize Cdd Ecap driver. |
| void | **[Cdd_Ecap_DeInit](../Modules/group__CDD__ECAP.md#function-cdd_ecap_deinit)**(void )| Service to De-initialize Cdd Ecap driver. |
| void | **[Cdd_Ecap_SetActivationCondition](../Modules/group__CDD__ECAP.md#function-cdd_ecap_setactivationcondition)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel, [Cdd_Ecap_ActivationType](../Modules/group__CDD__ECAP.md#enum-cdd_ecap_activationtype) Activation)| Service for setting the activation condition. |
| void | **[Cdd_Ecap_SetStartLevelCondition](../Modules/group__CDD__ECAP.md#function-cdd_ecap_setstartlevelcondition)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel, [Cdd_Ecap_StartLevelType](../Modules/group__CDD__ECAP.md#enum-cdd_ecap_startleveltype) StartLevel)| Service for setting the start level condition. |
| void | **[Cdd_Ecap_DisableNotification](../Modules/group__CDD__ECAP.md#function-cdd_ecap_disablenotification)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel)| Service for disabling the notification. |
| void | **[Cdd_Ecap_EnableNotification](../Modules/group__CDD__ECAP.md#function-cdd_ecap_enablenotification)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel)| Service for enabling the notification. |
| [Cdd_Ecap_InputStateType](../Modules/group__CDD__ECAP.md#enum-cdd_ecap_inputstatetype) | **[Cdd_Ecap_GetInputState](../Modules/group__CDD__ECAP.md#function-cdd_ecap_getinputstate)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel)| Service for getting the input state of CDD_ECAP channel. |
| void | **[Cdd_Ecap_StartTimestamp](../Modules/group__CDD__ECAP.md#function-cdd_ecap_starttimestamp)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel, [Cdd_Ecap_ValueType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_valuetype) * BufferPtr, uint16 BufferSize, uint16 NotifyInterval)| Service for starting the timestamp measurement. |
| void | **[Cdd_Ecap_StopTimestamp](../Modules/group__CDD__ECAP.md#function-cdd_ecap_stoptimestamp)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel)| Service for stopping the timestamp measurement. |
| [Cdd_Ecap_IndexType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_indextype) | **[Cdd_Ecap_GetTimestampIndex](../Modules/group__CDD__ECAP.md#function-cdd_ecap_gettimestampindex)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel)| Service for reading the index of the timestamp measurement. |
| void | **[Cdd_Ecap_ResetEdgeCount](../Modules/group__CDD__ECAP.md#function-cdd_ecap_resetedgecount)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel)| Service resets the edge count value to 0. |
| void | **[Cdd_Ecap_EnableEdgeCount](../Modules/group__CDD__ECAP.md#function-cdd_ecap_enableedgecount)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel)| Service for enabling the counting of edges of the given channel. |
| void | **[Cdd_Ecap_DisableEdgeCount](../Modules/group__CDD__ECAP.md#function-cdd_ecap_disableedgecount)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel)| Service for disabling the counting of edges of the given channel. |
| [Cdd_Ecap_EdgeNumberType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_edgenumbertype) | **[Cdd_Ecap_GetEdgeNumbers](../Modules/group__CDD__ECAP.md#function-cdd_ecap_getedgenumbers)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel)| Service for getting the count of edges of the given channel. |
| void | **[Cdd_Ecap_EnableEdgeDetection](../Modules/group__CDD__ECAP.md#function-cdd_ecap_enableedgedetection)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel)| Service for enabling the detection of edges of the given channel. |
| void | **[Cdd_Ecap_DisableEdgeDetection](../Modules/group__CDD__ECAP.md#function-cdd_ecap_disableedgedetection)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel)| Service for disabling the detection of edges of the given channel. |
| void | **[Cdd_Ecap_StartSignalMeasurement](../Modules/group__CDD__ECAP.md#function-cdd_ecap_startsignalmeasurement)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel)| Service for starting the measurement of signals for a given channel. |
| void | **[Cdd_Ecap_StopSignalMeasurement](../Modules/group__CDD__ECAP.md#function-cdd_ecap_stopsignalmeasurement)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel)| Service for stopping the measurement of signals for a given channel. |
| [Cdd_Ecap_ValueType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_valuetype) | **[Cdd_Ecap_GetTimeElapsed](../Modules/group__CDD__ECAP.md#function-cdd_ecap_gettimeelapsed)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel)| Service for reading the time elapsed between the edges of a channel. |
| void | **[Cdd_Ecap_GetDutyCycleValues](../Modules/group__CDD__ECAP.md#function-cdd_ecap_getdutycyclevalues)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel, [Cdd_Ecap_DutyCycleType](../Classes/structCdd__Ecap__DutyCycleType.md) * DutyCycleValues)| Service for reading the active time and period. |
| void | **[Cdd_Ecap_GetVersionInfo](../Modules/group__CDD__ECAP.md#function-cdd_ecap_getversioninfo)**(Std_VersionInfoType * VersionInfoPtr)| service that returns the version information of the module. |
| void | **[Cdd_Ecap_PeriodicReadback](../Modules/group__CDD__ECAP.md#function-cdd_ecap_periodicreadback)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel, [Cdd_Ecap_PeriodicReadBackDataType](../Classes/structCdd__Ecap__PeriodicReadBackDataType.md) * ReadBackRegisterdata)| This service shall read all the statically configured registers. |
| [Cdd_Ecap_ChannelHrScaleType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channelhrscaletype) | **[Cdd_Ecap_GetHrScaleFactor](../Modules/group__CDD__ECAP.md#function-cdd_ecap_gethrscalefactor)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel)| Service to retrieve the scale factor for high resolution capability. |
| [Cdd_Ecap_ChannelHrScaleType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channelhrscaletype) | **[Cdd_Ecap_ConvertHrTimeStampToEcapTimeStamp](../Modules/group__CDD__ECAP.md#function-cdd_ecap_converthrtimestamptoecaptimestamp)**([Cdd_Ecap_ChannelType](../Modules/group__CDD__ECAP.md#typedef-cdd_ecap_channeltype) Channel, uint32 timeStamp)| Service to convert the event timestamp to nanoseconds for high resolution capability. |
| void | **[Cdd_Ecap_TimeStampNotify](../Modules/group__CDD__ECAP.md#function-cdd_ecap_timestampnotify)**(void )| |
| void | **[Cdd_Ecap_SignalNotify](../Modules/group__CDD__ECAP.md#function-cdd_ecap_signalnotify)**(void )| |
### function Cdd_Ecap_Init
```
void Cdd_Ecap_Init(
const Cdd_Ecap_ConfigType * ConfigPtr
)
```
**Brief**:
Service to initialize Cdd Ecap driver.
This service initializes all the ECAP HW units.
**Parameters**:
* **ConfigPtr** Pointer to configuration set (Varaint PC requires a NULL_PTR)
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_DeInit
```
void Cdd_Ecap_DeInit(
void
)
```
**Brief**:
Service to De-initialize Cdd Ecap driver.
This service De-initializes all the ECAP HW units.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_SetActivationCondition
```
void Cdd_Ecap_SetActivationCondition(
Cdd_Ecap_ChannelType Channel,
Cdd_Ecap_ActivationType Activation
)
```
**Brief**:
Service for setting the activation condition.
This service sets the activation condition of a channel(Rising, Falling or Both Edges).
**Parameters**:
* **Channel** CDD_ECAP Channel in use
* **Activation** Activation condition or Edge to be selected
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_SetStartLevelCondition
```
void Cdd_Ecap_SetStartLevelCondition(
Cdd_Ecap_ChannelType Channel,
Cdd_Ecap_StartLevelType StartLevel
)
```
**Brief**:
Service for setting the start level condition.
This service sets the start level condition of a channel (Rising or Falling). In case of both edge detection, this parameter selects the start edge from which to start counting the edges.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
* **StartLevel** Start level condition or Edge to be selected
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_DisableNotification
```
void Cdd_Ecap_DisableNotification(
Cdd_Ecap_ChannelType Channel
)
```
**Brief**:
Service for disabling the notification.
This service disables the notification function of a channel.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_EnableNotification
```
void Cdd_Ecap_EnableNotification(
Cdd_Ecap_ChannelType Channel
)
```
**Brief**:
Service for enabling the notification.
This service enables the notification function of a channel.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_GetInputState
```
Cdd_Ecap_InputStateType Cdd_Ecap_GetInputState(
Cdd_Ecap_ChannelType Channel
)
```
**Brief**:
Service for getting the input state of CDD_ECAP channel.
This service gets the input state of CDD_ECAP channel.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_StartTimestamp
```
void Cdd_Ecap_StartTimestamp(
Cdd_Ecap_ChannelType Channel,
Cdd_Ecap_ValueType * BufferPtr,
uint16 BufferSize,
uint16 NotifyInterval
)
```
**Brief**:
Service for starting the timestamp measurement.
This service starts the timestamp measurement on the edges of a given channel.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
* **BufferPtr** Pointer which points to timestamp buffer
* **BufferSize** Size of the timestamp buffer
* **NotifyInterval** Notify Interval
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_StopTimestamp
```
void Cdd_Ecap_StopTimestamp(
Cdd_Ecap_ChannelType Channel
)
```
**Brief**:
Service for stopping the timestamp measurement.
This service stops the timestamp measurement on the edges of a given channel.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_GetTimestampIndex
```
Cdd_Ecap_IndexType Cdd_Ecap_GetTimestampIndex(
Cdd_Ecap_ChannelType Channel
)
```
**Brief**:
Service for reading the index of the timestamp measurement.
This service reads the index of the timestamp measurement.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_ResetEdgeCount
```
void Cdd_Ecap_ResetEdgeCount(
Cdd_Ecap_ChannelType Channel
)
```
**Brief**:
Service resets the edge count value to 0.
This service resets the edge count value to 0.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_EnableEdgeCount
```
void Cdd_Ecap_EnableEdgeCount(
Cdd_Ecap_ChannelType Channel
)
```
**Brief**:
Service for enabling the counting of edges of the given channel.
This service enables the counting of edges of the given channel.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_DisableEdgeCount
```
void Cdd_Ecap_DisableEdgeCount(
Cdd_Ecap_ChannelType Channel
)
```
**Brief**:
Service for disabling the counting of edges of the given channel.
This service disables the counting of edges of the given channel.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_GetEdgeNumbers
```
Cdd_Ecap_EdgeNumberType Cdd_Ecap_GetEdgeNumbers(
Cdd_Ecap_ChannelType Channel
)
```
**Brief**:
Service for getting the count of edges of the given channel.
This service counts the edges of the given channel.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_EnableEdgeDetection
```
void Cdd_Ecap_EnableEdgeDetection(
Cdd_Ecap_ChannelType Channel
)
```
**Brief**:
Service for enabling the detection of edges of the given channel.
This service enables the edge detection of given channel.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_DisableEdgeDetection
```
void Cdd_Ecap_DisableEdgeDetection(
Cdd_Ecap_ChannelType Channel
)
```
**Brief**:
Service for disabling the detection of edges of the given channel.
This service disables the edge detection of given channel.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_StartSignalMeasurement
```
void Cdd_Ecap_StartSignalMeasurement(
Cdd_Ecap_ChannelType Channel
)
```
**Brief**:
Service for starting the measurement of signals for a given channel.
This service starts the signal measurement of a given channel.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_StopSignalMeasurement
```
void Cdd_Ecap_StopSignalMeasurement(
Cdd_Ecap_ChannelType Channel
)
```
**Brief**:
Service for stopping the measurement of signals for a given channel.
This service stops the signal measurement of a given channel.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_GetTimeElapsed
```
Cdd_Ecap_ValueType Cdd_Ecap_GetTimeElapsed(
Cdd_Ecap_ChannelType Channel
)
```
**Brief**:
Service for reading the time elapsed between the edges of a channel.
This service reads the time elapsed between the edges of a channel(High time, low time, period
and duty).
**Parameters**:
* **Channel** CDD_ECAP Channel in use
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_GetDutyCycleValues
```
void Cdd_Ecap_GetDutyCycleValues(
Cdd_Ecap_ChannelType Channel,
Cdd_Ecap_DutyCycleType * DutyCycleValues
)
```
**Brief**:
Service for reading the active time and period.
This service reads the active time and period of a given channel.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
* **DutyCycleValues** Duty cycle values
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_GetVersionInfo
```
void Cdd_Ecap_GetVersionInfo(
Std_VersionInfoType * VersionInfoPtr
)
```
**Brief**:
service that returns the version information of the module.
This service returns the version information of the Cdd Ecap module.
**Parameters**:
* **VersionInfoPtr** Pointer to where to store the version information of this module
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_PeriodicReadback
```
void Cdd_Ecap_PeriodicReadback(
Cdd_Ecap_ChannelType Channel,
Cdd_Ecap_PeriodicReadBackDataType * ReadBackRegisterdata
)
```
**Brief**:
This service shall read all the statically configured registers.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
* **ReadBackRegisterdata** pointer for the read back registers
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_GetHrScaleFactor
```
Cdd_Ecap_ChannelHrScaleType Cdd_Ecap_GetHrScaleFactor(
Cdd_Ecap_ChannelType Channel
)
```
**Brief**:
Service to retrieve the scale factor for high resolution capability.
This service retrieves the scale factor for high resolution capability.
**Parameters**:
* **Channel** CDD_ECAP Channel in use.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_ConvertHrTimeStampToEcapTimeStamp
```
Cdd_Ecap_ChannelHrScaleType Cdd_Ecap_ConvertHrTimeStampToEcapTimeStamp(
Cdd_Ecap_ChannelType Channel,
uint32 timeStamp
)
```
**Brief**:
Service to convert the event timestamp to nanoseconds for high resolution capability.
This service converts the event timestamp to nanoseconds for high resolution capability.
**Parameters**:
* **Channel** CDD_ECAP Channel in use
* **timeStamp** Event timestamp
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ecap_TimeStampNotify
```
void Cdd_Ecap_TimeStampNotify(
void
)
```
### function Cdd_Ecap_SignalNotify
```
void Cdd_Ecap_SignalNotify(
void
)
```
---
title: Cdd I2c
---
# CDD_I2C
[More...](#detailed-description)
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Cdd_I2c_HwUnitStatusType](../Modules/group__CDD__I2C.md#enum-cdd_i2c_hwunitstatustype)** | This is an enum containing the possible HW unit states states. The default HW unit state is CDD_I2C_HW_UNIT_FREE. |
|enum| **[Cdd_I2c_ComponentStatusType](../Modules/group__CDD__I2C.md#enum-cdd_i2c_componentstatustype)** | This is an enum containing the possible driver states. The default driver state is CDD_I2C_UNINIT. |
|enum| **[Cdd_I2c_HandlingType](../Modules/group__CDD__I2C.md#enum-cdd_i2c_handlingtype)** | This is an enum containing the possible variants of arbitration loss timeout handling. |
|enum| **[Cdd_I2c_ChannelResultType](../Modules/group__CDD__I2C.md#enum-cdd_i2c_channelresulttype)** | This is an enum containing all the possible channel results The default channel state is CDD_I2C_CH_RESULT_OK. |
|enum| **[Cdd_I2c_SequenceResultType](../Modules/group__CDD__I2C.md#enum-cdd_i2c_sequenceresulttype)** | This type defines a range of specific sequences status for the I2C Driver. |
|enum| **[Cdd_I2c_RestartModeType](../Modules/group__CDD__I2C.md#enum-cdd_i2c_restartmodetype)** | This is an enum containing the possible restart modes. The default mode is CDD_I2C_RESTART_MODE_NOSTOP. |
|typedef uint16 | **[Cdd_I2c_AddressType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_addresstype)** | This type defines the addresss size. |
|typedef uint8 | **[Cdd_I2c_DirectionType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_directiontype)** | This type defines the direction of operation - write or read. |
|typedef uint8 | **[Cdd_I2c_DataType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_datatype)** | This type defines the data to be transmitted using the CDD_I2C Driver. |
|typedef uint8 * | **[Cdd_I2c_DataPtrType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_dataptrtype)** | Definition for the pointer type for general buffer handling. |
|typedef const uint8 * | **[Cdd_I2c_DataConstPtrType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_dataconstptrtype)** | Definition for the pointer type for TX buffer handling. |
|typedef uint8 | **[Cdd_I2c_HwUnitType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_hwunittype)** | Specifies the identification (ID) for a CDD_I2C Hardware unit. |
|typedef uint8 | **[Cdd_I2c_SequenceType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_sequencetype)** | This is the type for a sequence identifier. |
|typedef uint8 | **[Cdd_I2c_ChannelType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_channeltype)** | This is the type for a Ch identifier. |
|typedef uint16 | **[Cdd_I2c_DataLengthType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_datalengthtype)** | Type to define the number of data elements to be sent and/or received during a transmission. |
|typedef void(*)(void) | **[Cdd_I2c_SequenceEndNotification](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_sequenceendnotification)** | Callback routine provided by the user for each Sequence to notify the caller that a Sequence has been finished. |
|typedef void(*)(uint8 errorCode) | **[Cdd_I2c_SequenceErrorNotification](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_sequenceerrornotification)** | Callback routine provided by the user for each Sequence to notify the caller that a Sequence has been finished with an error. |
|typedef void(*)(Cdd_I2c_HwUnitType hwUnitId) | **[Cdd_I2c_TargetRxStartNotificationType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_targetrxstartnotificationtype)** | Target RX start notification callback - called on start condition. |
|typedef void(*)(Cdd_I2c_HwUnitType hwUnitId) | **[Cdd_I2c_TargetTxStartNotificationType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_targettxstartnotificationtype)** | Target TX start notification callback - called on start condition. |
|typedef void(*)(Cdd_I2c_HwUnitType hwUnitId, Cdd_I2c_DataPtrType pRxBuffer, Cdd_I2c_DataLengthType rxCount, uint8 event) | **[Cdd_I2c_TargetRxCompleteNotificationType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_targetrxcompletenotificationtype)** | Target RX complete notification callback - called on stop condition or the buffer is fully filled. |
|typedef void(*)(Cdd_I2c_HwUnitType hwUnitId, Cdd_I2c_DataConstPtrType pTxBuffer, Cdd_I2c_DataLengthType txCount, uint8 event) | **[Cdd_I2c_TargetTxCompleteNotificationType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_targettxcompletenotificationtype)** | Target TX complete notification callback - called on stop condition or the buffer is fully transferred. |
|typedef void(*)(Cdd_I2c_HwUnitType hwUnitId, uint8 errorEvent) | **[Cdd_I2c_TargetErrorNotificationType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_targeterrornotificationtype)** | Target error notification callback - called on bus error conditions. |
### enum Cdd_I2c_HwUnitStatusType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_I2C_HW_UNIT_FREE | | CDD_I2C Hardware unit not in use by a sequence. |
| CDD_I2C_HW_UNIT_BUSY | | CDD_I2C Hardware unit in use by a sequence. |
**Brief**:
This is an enum containing the possible HW unit states states. The default HW unit state is CDD_I2C_HW_UNIT_FREE.
### enum Cdd_I2c_ComponentStatusType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_I2C_UNINIT | | I2C driver is uninitialized. |
| CDD_I2C_IDLE | | I2C driver is idle. |
| CDD_I2C_BUSY | | I2C driver is busy. |
**Brief**:
This is an enum containing the possible driver states. The default driver state is CDD_I2C_UNINIT.
### enum Cdd_I2c_HandlingType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_I2C_BURST_MODE | | In case bus is busy detach from I2C bus. |
| CDD_I2C_RECURRENT_MODE | | In case bus is busy try to recover I2C bus. |
**Brief**:
This is an enum containing the possible variants of arbitration loss timeout handling.
### enum Cdd_I2c_ChannelResultType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_I2C_CH_RESULT_OK | | I2C channel transmission not in progress. |
| CDD_I2C_CH_RESULT_NOT_OK | | I2C channel transmission is not OK. |
| CDD_I2C_CH_RESULT_PENDING | | I2C channel transmission is in progress. |
| CDD_I2C_CH_RESULT_BUSFAIL | | I2C channel transmission failed due to bus unavailability. |
| CDD_I2C_CH_RESULT_ARBFAIL | | I2C channel transmission failed due to arbitration loss. |
| CDD_I2C_CH_RESULT_NACKFAIL | | I2C channel transmission failed due to bus NACK. |
| CDD_I2C_CH_RESULT_HW_UNIT_RESET | | I2C channel transmission failed due to HW unit reset. |
**Brief**:
This is an enum containing all the possible channel results The default channel state is CDD_I2C_CH_RESULT_OK.
### enum Cdd_I2c_SequenceResultType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_I2C_SEQ_OK | 0x00U| The last transmission of the Sequence has been finished successfully. |
| CDD_I2C_SEQ_PENDING | 0x01U| The I2C Driver is performing an I2C Sequence. The meaning of this status is equal to I2C_BUSY. |
| CDD_I2C_SEQ_QUEUED | 0x02U| An I2C Sequence is queued and waiting to be transmitted. |
| CDD_I2C_SEQ_NACK | 0x03U| An I2C Sequence encountered a NACK signal. |
| CDD_I2C_SEQ_FAILED | 0x04U| The last transmission of the Sequence has failed. |
| CDD_I2C_SEQ_CANCELLED | 0x05U| I2C sequence transmission cancelled from queue. |
| CDD_I2C_SEQ_NOT_OK | 0x06U| I2C sequence transmission is not OK. |
| CDD_I2C_SEQ_ARB | 0x07U| An I2C Sequence encountered a arbitration loss. |
| CDD_I2C_SEQ_HW_UNIT_RESET | 0x08U| An I2C Sequence was terminated due to HW unit reset (bus-off recovery) |
**Brief**:
This type defines a range of specific sequences status for the I2C Driver.
### enum Cdd_I2c_RestartModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_I2C_RESTART_MODE_STOP | | CDD_I2C restart mode with stop at end of each transaction/channel write/read. |
| CDD_I2C_RESTART_MODE_NOSTOP | | CDD_I2C restart mode with no stop at end of each transaction/channel write/read, by default there is start at begining of each transaction. |
**Brief**:
This is an enum containing the possible restart modes. The default mode is CDD_I2C_RESTART_MODE_NOSTOP.
### typedef Cdd_I2c_AddressType
```
typedef uint16 Cdd_I2c_AddressType;
```
**Brief**:
This type defines the addresss size.
### typedef Cdd_I2c_DirectionType
```
typedef uint8 Cdd_I2c_DirectionType;
```
**Brief**:
This type defines the direction of operation - write or read.
### typedef Cdd_I2c_DataType
```
typedef uint8 Cdd_I2c_DataType;
```
**Brief**:
This type defines the data to be transmitted using the CDD_I2C Driver.
### typedef Cdd_I2c_DataPtrType
```
typedef uint8* Cdd_I2c_DataPtrType;
```
**Brief**:
Definition for the pointer type for general buffer handling.
### typedef Cdd_I2c_DataConstPtrType
```
typedef const uint8* Cdd_I2c_DataConstPtrType;
```
**Brief**:
Definition for the pointer type for TX buffer handling.
### typedef Cdd_I2c_HwUnitType
```
typedef uint8 Cdd_I2c_HwUnitType;
```
**Brief**:
Specifies the identification (ID) for a CDD_I2C Hardware unit.
### typedef Cdd_I2c_SequenceType
```
typedef uint8 Cdd_I2c_SequenceType;
```
**Brief**:
This is the type for a sequence identifier.
### typedef Cdd_I2c_ChannelType
```
typedef uint8 Cdd_I2c_ChannelType;
```
**Brief**:
This is the type for a Ch identifier.
### typedef Cdd_I2c_DataLengthType
```
typedef uint16 Cdd_I2c_DataLengthType;
```
**Brief**:
Type to define the number of data elements to be sent and/or received during a transmission.
### typedef Cdd_I2c_SequenceEndNotification
```
typedef void(* Cdd_I2c_SequenceEndNotification) (void);
```
**Brief**:
Callback routine provided by the user for each Sequence to notify the caller that a Sequence has been finished.
### typedef Cdd_I2c_SequenceErrorNotification
```
typedef void(* Cdd_I2c_SequenceErrorNotification) (uint8 errorCode);
```
**Brief**:
Callback routine provided by the user for each Sequence to notify the caller that a Sequence has been finished with an error.
**Parameters**:
* **errorCode** Sequence error code
### typedef Cdd_I2c_TargetRxStartNotificationType
```
typedef void(* Cdd_I2c_TargetRxStartNotificationType) (Cdd_I2c_HwUnitType hwUnitId);
```
**Brief**:
Target RX start notification callback - called on start condition.
**Parameters**:
* **hwUnitId** I2C instance
### typedef Cdd_I2c_TargetTxStartNotificationType
```
typedef void(* Cdd_I2c_TargetTxStartNotificationType) (Cdd_I2c_HwUnitType hwUnitId);
```
**Brief**:
Target TX start notification callback - called on start condition.
**Parameters**:
* **hwUnitId** I2C instance
### typedef Cdd_I2c_TargetRxCompleteNotificationType
```
typedef void(* Cdd_I2c_TargetRxCompleteNotificationType) (Cdd_I2c_HwUnitType hwUnitId, Cdd_I2c_DataPtrType pRxBuffer, Cdd_I2c_DataLengthType rxCount, uint8 event);
```
**Brief**:
Target RX complete notification callback - called on stop condition or the buffer is fully filled.
**Parameters**:
* **hwUnitId** I2C instance
* **pRxBuffer** Pointer to RX data buffer given at time of submit
* **rxCount** Number of bytes actually received
* **event** CDD_I2C_TARGET_EVENT_TRANSFER_COMPLETE or CDD_I2C_TARGET_EVENT_STOP
### typedef Cdd_I2c_TargetTxCompleteNotificationType
```
typedef void(* Cdd_I2c_TargetTxCompleteNotificationType) (Cdd_I2c_HwUnitType hwUnitId, Cdd_I2c_DataConstPtrType pTxBuffer, Cdd_I2c_DataLengthType txCount, uint8 event);
```
**Brief**:
Target TX complete notification callback - called on stop condition or the buffer is fully transferred.
**Parameters**:
* **hwUnitId** I2C instance
* **pTxBuffer** Pointer to TX data buffer
* **txCount** Number of bytes actually transmitted
* **event** CDD_I2C_TARGET_EVENT_TRANSFER_COMPLETE or CDD_I2C_TARGET_EVENT_STOP
### typedef Cdd_I2c_TargetErrorNotificationType
```
typedef void(* Cdd_I2c_TargetErrorNotificationType) (Cdd_I2c_HwUnitType hwUnitId, uint8 errorEvent);
```
**Brief**:
Target error notification callback - called on bus error conditions.
**Parameters**:
* **hwUnitId** I2C instance
* **errorEvent** Error Events: CDD_I2C_TARGET_EVENT_NO_BUFFER, CDD_I2C_TARGET_EVENT_TX_UNDERFLOW, CDD_I2C_TARGET_EVENT_RX_OVERFLOW, CDD_I2C_TARGET_EVENT_NACK
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Cdd_I2c_HwUnitConfigType](../Classes/structCdd__I2c__HwUnitConfigType.md)** | CDD_I2C Hardware unit configuration structure. |
| **[Cdd_I2c_ChConfigType](../Classes/structCdd__I2c__ChConfigType.md)** | CDD_I2C Channel configuration structure. |
| **[Cdd_I2c_SequenceConfigType](../Classes/structCdd__I2c__SequenceConfigType.md)** | CDD_I2C Sequence configuration structure. |
| **[Cdd_I2c_ConfigType](../Classes/structCdd__I2c__ConfigType.md)** | CDD_I2C config structure. |
## Defines
| Name | Brief |
| -------------- | ---------- |
| CDD_I2C_CFG_MAJOR_VERSION | I2C configuration Major Version. |
| CDD_I2C_CFG_MINOR_VERSION | I2C configuration Minor Version. |
| CDD_I2C_CFG_PATCH_VERSION | I2C configuration Patch Version. |
| CDD_I2C_HW_UNIT_I2CA | HW unit 0. |
| CDD_I2C_HW_UNIT_I2CB | HW unit 1. |
| CDD_I2C_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| CDD_I2C_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| CDD_I2C_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| CDD_I2C_AR_RELEASE_MAJOR_VERSION | AUTOSAR Major version specification implemented by CDD_I2C Driver. |
| CDD_I2C_AR_RELEASE_MINOR_VERSION | AUTOSAR Minor version specification implemented by CDD_I2C Driver. |
| CDD_I2C_AR_RELEASE_REVISION_VERSION | AUTOSAR Patch version specification implemented by CDD_I2C Driver. |
| CDD_I2C_VENDOR_ID | Texas Instruments Vendor ID. |
| CDD_I2C_MODULE_ID | CDD_I2C Driver Module ID. |
| CDD_I2C_INSTANCE_ID | CDD_I2C Instance ID. |
| CDD_I2C_SID_INIT | Service ID Cdd_I2c_Init() |
| CDD_I2C_SID_DEINIT | Service ID Cdd_I2c_DeInit() |
| CDD_I2C_SID_GET_VERSION_INFO | Service ID Cdd_I2c_GetVersionInfo() |
| CDD_I2C_SID_SETUP_EB | Service ID Cdd_I2c_SetupEB() |
| CDD_I2C_SID_SETUP_EB_DYNAMIC | Service ID Cdd_I2c_SetupDynamicEB() |
| CDD_I2C_SID_ASYNC_TRANSMIT | Service ID Cdd_I2c_AsyncTransmit() |
| CDD_I2C_SID_CANCEL | Service ID Cdd_I2c_Cancel() |
| CDD_I2C_SID_GET_RESULT | Service ID Cdd_I2c_GetResult() |
| CDD_I2C_SID_GET_SEQUENCE_RESULT | Service ID Cdd_I2c_GetSequenceResult() |
| CDD_I2C_SID_MAIN_FUNCTION | Service ID Cdd_I2c_MainFunction() |
| CDD_I2C_SID_GET_STATUS | Service ID Cdd_I2c_GetStatus() |
| CDD_I2C_SID_RESET_HW_UNIT | Service ID Cdd_I2c_ResetHwUnit() |
| CDD_I2C_SID_TARGET_START | Service ID Cdd_I2c_TargetStart() |
| CDD_I2C_SID_TARGET_STOP | Service ID Cdd_I2c_TargetStop() |
| CDD_I2C_SID_TARGET_SUBMIT_TX_BUF | Service ID Cdd_I2c_TargetSubmitTxBuffer() |
| CDD_I2C_SID_TARGET_SUBMIT_RX_BUF | Service ID Cdd_I2c_TargetSubmitRxBuffer() |
| CDD_I2C_E_NO_ERROR | No errors. |
| CDD_I2C_E_UNINIT | Error code for not initialized module. |
| CDD_I2C_E_ALREADY_INITIALIZED | Init service called twice without deinit. |
| CDD_I2C_E_PARAM_CHANNEL | Channel out of bounds, exceeds the maximum number of configured channels. |
| CDD_I2C_E_PARAM_SEQUENCE | Sequence out of bounds, exceeds the maximum number of configured sequences. |
| CDD_I2C_E_PARAM_LENGTH | Length out of bounds – a zero length is not accepted. |
| CDD_I2C_E_PARAM_VINFO_PTR | An invalid version info pointer has been passed (a NULL_PTR) |
| CDD_I2C_E_PARAM_CONFIG | An invalid configuration has been passed (a non NULL_PTR) |
| CDD_I2C_E_PARAM_TRANS_BUFFER | Two in-valid transmission buffers have been passed (no NULL_PTR/ or both NULL_PTR) |
| CDD_I2C_E_PARAM_ADDRESS | Address out of bounds, exceeds the limit of the configured address range. |
| CDD_I2C_E_PARAM_DIRECTION | Buffer direction conflicts with channel direction set via EB. |
| CDD_I2C_E_PARAM_HWUNIT | API service called with invalid HW unit ID. |
| CDD_I2C_E_SEQ_BUSY | API service called with sequence is busy. |
| CDD_I2C_E_PARAM_MODE | API service called with invalid mode - controller or target. |
| CDD_I2C_E_NACK_RECEIVED | Error is reported if NACK was received. |
| CDD_I2C_E_ARBITRATION_FAILURE | Error is reported if the master loses arbitration. This usually happens if the SDA is stuck low or another master has won the arbitration procedure. |
| CDD_I2C_E_BUS_FAILURE | Error is reported if the SCL line is stuck low. |
| CDD_I2C_E_CANCELLED | Sequence cancelled. |
| CDD_I2C_E_RX_OVERFLOW | RX buffer overflow - applicable only in target mode. |
| CDD_I2C_E_TX_UNDERFLOW | TX buffer underflow - applicable only in target mode. |
| CDD_I2C_E_NO_BUFFER | No buffer submitted - applicable only in target mode. |
| CDD_I2C_E_HW_UNIT_RESET | HW unit reset error. |
| CDD_I2C_WRITE | CDD_I2C direction - write. |
| CDD_I2C_READ | CDD_I2C direction - read. |
| CDD_I2C_ADDRESS_7_BIT | 7 bit address |
| CDD_I2C_ADDRESS_10_BIT | 10 bit address |
| CDD_I2C_MODE_CONTROLLER | HW unit operates as I2C controller (master) |
| CDD_I2C_MODE_TARGET | HW unit operates as I2C target (slave) |
| CDD_I2C_TARGET_EVENT_TRANSFER_COMPLETE | |
| CDD_I2C_TARGET_EVENT_STOP | |
| CDD_I2C_TARGET_EVENT_NO_BUFFER | |
| CDD_I2C_TARGET_EVENT_TX_UNDERFLOW | |
| CDD_I2C_TARGET_EVENT_RX_OVERFLOW | |
| CDD_I2C_TARGET_EVENT_NACK | |
| CDD_I2C_PRE_COMPILE_VARIANT | I2C Build Variant. Build variants.(i.e Pre Compile and Post Build) |
| CDD_I2C_CONFIG_PC | Precompile variant macro. |
| CDD_I2C_POLLING_MODE | STD_ON if any HW unit uses polling. |
| CDD_I2C_INTERRUPT_MODE | STD_ON if any HW unit uses interrupts. |
| CDD_I2C_CONTROLLER_ACTIVE | STD_ON if any HW unit is in controller mode. |
| CDD_I2C_TARGET_ACTIVE | STD_ON if any HW unit is in target mode. |
| CDD_I2C_DEV_ERROR_DETECT | Enable/Disable I2C dev detect error. |
| CDD_I2C_VERSION_INFO_API | Version info API macro. |
| CDD_I2C_CANCEL_API | Check to enable cancel API. |
| CDD_I2C_GET_STATUS_API | Check to enable get driver status API. |
| CDD_I2C_HW_UNIT_MAX | Maximum supported HW units for the SOC. |
| CDD_I2C_MAX_CH_PER_SEQ | Maximum channels allowed per sequence. |
| CDD_I2C_MAX_CH | Maximum channels across all sequence/hwunit. |
| CDD_I2C_MAX_SEQ | Maximum sequence across all hwunit. |
| CDD_I2C_MAX_HW_UNIT | Maximum HW unit. |
| CDD_I2C_HW_UNIT_I2CA_ACTIVE | |
| CDD_I2C_HW_UNIT_I2CB_ACTIVE | |
| CDD_I2C_HW_UNIT_I2CA_CONTROLLER_INT_MODE | |
| CDD_I2C_HW_UNIT_I2CA_ISR_CAT2_INT | |
| CDD_I2C_HW_UNIT_I2CB_CONTROLLER_INT_MODE | |
| CDD_I2C_HW_UNIT_I2CB_ISR_CAT2_INT | |
| CddI2cConf_CddI2cSeqConfig_CddI2cSeqConfig_0 | Symbolic Name for I2c Sequence 0. |
| CddI2cConf_CddI2cSeqConfig_CddI2cSeqConfig_1 | Symbolic Name for I2c Sequence 1. |
| CddI2cConf_CddI2cSeqConfig_CddI2cSeqConfig_2 | Symbolic Name for I2c Sequence 2. |
| CddI2cConf_CddI2cSeqConfig_CddI2cSeqConfig_3 | Symbolic Name for I2c Sequence 3. |
| CddI2cConf_CddI2cSeqConfig_CddI2cSeqConfig_4 | Symbolic Name for I2c Sequence 4. |
| CddI2cConf_CddI2cSeqConfig_CddI2cSeqConfig_5 | Symbolic Name for I2c Sequence 5. |
| CddI2cConf_CddI2cSeqConfig_CddI2cSeqConfig_6 | Symbolic Name for I2c Sequence 6. |
| CddI2cConf_CddI2cSeqConfig_CddI2cSeqConfig_7 | Symbolic Name for I2c Sequence 7. |
| CddI2cConf_CddI2cChConfig_CddI2cChConfig_0 | Symbolic Name for I2c Channel 0. |
| CddI2cConf_CddI2cChConfig_CddI2cChConfig_1 | Symbolic Name for I2c Channel 1. |
| CddI2cConf_CddI2cChConfig_CddI2cChConfig_2 | Symbolic Name for I2c Channel 2. |
| CddI2cConf_CddI2cChConfig_CddI2cChConfig_3 | Symbolic Name for I2c Channel 3. |
| CddI2cConf_CddI2cChConfig_CddI2cChConfig_4 | Symbolic Name for I2c Channel 4. |
| CddI2cConf_CddI2cChConfig_CddI2cChConfig_5 | Symbolic Name for I2c Channel 5. |
| CddI2cConf_CddI2cChConfig_CddI2cChConfig_6 | Symbolic Name for I2c Channel 6. |
| CddI2cConf_CddI2cChConfig_CddI2cChConfig_7 | Symbolic Name for I2c Channel 7. |
| CddI2cConf_CddI2cChConfig_CddI2cChConfig_8 | Symbolic Name for I2c Channel 8. |
| CddI2cConf_CddI2cChConfig_CddI2cChConfig_9 | Symbolic Name for I2c Channel 9. |
| CddI2cConf_CddI2cChConfig_CddI2cChConfig_10 | Symbolic Name for I2c Channel 10. |
| CddI2cConf_CddI2cChConfig_CddI2cChConfig_11 | Symbolic Name for I2c Channel 11. |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Cdd_I2c_Init](../Modules/group__CDD__I2C.md#function-cdd_i2c_init)**(const [Cdd_I2c_ConfigType](../Classes/structCdd__I2c__ConfigType.md) * configPtr)| Service for CDD_I2C initialization. |
| Std_ReturnType | **[Cdd_I2c_DeInit](../Modules/group__CDD__I2C.md#function-cdd_i2c_deinit)**(void )| Service for CDD_I2C driver de-initialization. |
| void | **[Cdd_I2c_GetVersionInfo](../Modules/group__CDD__I2C.md#function-cdd_i2c_getversioninfo)**(Std_VersionInfoType * versionInfo)| Service that returns the version information of the module. |
| Std_ReturnType | **[Cdd_I2c_SetupEB](../Modules/group__CDD__I2C.md#function-cdd_i2c_setupeb)**([Cdd_I2c_ChannelType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_channeltype) chId, [Cdd_I2c_DataConstPtrType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_dataconstptrtype) txDataBufferPtr, [Cdd_I2c_DataPtrType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_dataptrtype) rxDataBufferPtr, [Cdd_I2c_DataLengthType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_datalengthtype) length)| Service to setup the buffers and the length of data for the Ch specified. |
| Std_ReturnType | **[Cdd_I2c_SetupEBDynamic](../Modules/group__CDD__I2C.md#function-cdd_i2c_setupebdynamic)**([Cdd_I2c_ChannelType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_channeltype) chId, [Cdd_I2c_AddressType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_addresstype) deviceAddress, [Cdd_I2c_DataConstPtrType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_dataconstptrtype) txDataBufferPtr, [Cdd_I2c_DataPtrType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_dataptrtype) rxDataBufferPtr, [Cdd_I2c_DataLengthType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_datalengthtype) length)| Service to setup the buffers and the length of data for the Ch specified. |
| Std_ReturnType | **[Cdd_I2c_AsyncTransmit](../Modules/group__CDD__I2C.md#function-cdd_i2c_asynctransmit)**([Cdd_I2c_SequenceType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_sequencetype) sequenceId)| The service conducts an asynchronous data transmission according to the parameters provided to the Cdd_I2c_SetupEB() service. The callback Cdd_I2c_SequenceErrorNotification() is called, when the asynchronous operation has finished. |
| Std_ReturnType | **[Cdd_I2c_Cancel](../Modules/group__CDD__I2C.md#function-cdd_i2c_cancel)**([Cdd_I2c_SequenceType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_sequencetype) sequenceId)| Cancel a transmission. |
| void | **[Cdd_I2c_MainFunction](../Modules/group__CDD__I2C.md#function-cdd_i2c_mainfunction)**(void )| Makes a target channel available for processing requests (addressing). When called, the target channel becomes available for starting incoming or outgoing transfers. |
| [Cdd_I2c_SequenceResultType](../Modules/group__CDD__I2C.md#enum-cdd_i2c_sequenceresulttype) | **[Cdd_I2c_GetSequenceResult](../Modules/group__CDD__I2C.md#function-cdd_i2c_getsequenceresult)**([Cdd_I2c_SequenceType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_sequencetype) sequenceId)| This service returns the current status of the given SequenceId. |
| [Cdd_I2c_ChannelResultType](../Modules/group__CDD__I2C.md#enum-cdd_i2c_channelresulttype) | **[Cdd_I2c_GetResult](../Modules/group__CDD__I2C.md#function-cdd_i2c_getresult)**([Cdd_I2c_ChannelType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_channeltype) chId)| This service returns the current status of the given channel. |
| Std_ReturnType | **[Cdd_I2c_ResetHwUnit](../Modules/group__CDD__I2C.md#function-cdd_i2c_resethwunit)**([Cdd_I2c_HwUnitType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_hwunittype) hwUnitId)| Service to reset and recover a single I2C HW unit from a bus-off condition. |
| [Cdd_I2c_ComponentStatusType](../Modules/group__CDD__I2C.md#enum-cdd_i2c_componentstatustype) | **[Cdd_I2c_GetStatus](../Modules/group__CDD__I2C.md#function-cdd_i2c_getstatus)**(void )| This service returns the module's status. |
| Std_ReturnType | **[Cdd_I2c_TargetStart](../Modules/group__CDD__I2C.md#function-cdd_i2c_targetstart)**([Cdd_I2c_HwUnitType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_hwunittype) hwUnitId)| This service starts the target-mode for the provided HW unit ID This enables interrupts and targets will start responding to I2C events after this. |
| Std_ReturnType | **[Cdd_I2c_TargetStop](../Modules/group__CDD__I2C.md#function-cdd_i2c_targetstop)**([Cdd_I2c_HwUnitType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_hwunittype) hwUnitId)| This service stops the target-mode for the provided HW unit ID. This disables interrupts and targets will not respond to I2C events after this. |
| Std_ReturnType | **[Cdd_I2c_TargetSubmitTxBuffer](../Modules/group__CDD__I2C.md#function-cdd_i2c_targetsubmittxbuffer)**([Cdd_I2c_HwUnitType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_hwunittype) hwUnitId, [Cdd_I2c_DataConstPtrType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_dataconstptrtype) pTxBuffer, [Cdd_I2c_DataLengthType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_datalengthtype) txBufferSize)| Submit TX buffer - call before Start or in TX Notification callback to provide a new buffer to work with. |
| Std_ReturnType | **[Cdd_I2c_TargetSubmitRxBuffer](../Modules/group__CDD__I2C.md#function-cdd_i2c_targetsubmitrxbuffer)**([Cdd_I2c_HwUnitType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_hwunittype) hwUnitId, [Cdd_I2c_DataPtrType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_dataptrtype) pRxBuffer, [Cdd_I2c_DataLengthType](../Modules/group__CDD__I2C.md#typedef-cdd_i2c_datalengthtype) rxBufferSize)| Submit RX buffer - call before Start or in RX Notification callback to provide a new buffer to work with. |
| void | **[I2c_appSeqComplete](../Modules/group__CDD__I2C.md#function-i2c_appseqcomplete)**(void )| |
| void | **[I2c_appSeqFail](../Modules/group__CDD__I2C.md#function-i2c_appseqfail)**(uint8 errorCode)| |
### function Cdd_I2c_Init
```
void Cdd_I2c_Init(
const Cdd_I2c_ConfigType * configPtr
)
```
**Brief**:
Service for CDD_I2C initialization.
Initialize the CDD_I2C hardware for each Cdd_I2cChannel using the Cdd_I2cHwUnitBaseAddress and configure the Cdd_I2cBaudRate accordingly.
Note: This API is applicable for both controller and target mode.
Service ID[hex] - CDD_I2C_SID_INIT Sync/Async - Synchronous Reentrancy - Non Reentrant
**Parameters**:
* **configPtr** Pointer to CDD_I2C Driver configuration set
**Return**: None
**Precondition**: Preconditions - Driver not already initialized
**Postcondition**: Postconditions - Driver in initialized state
### function Cdd_I2c_DeInit
```
Std_ReturnType Cdd_I2c_DeInit(
void
)
```
**Brief**:
Service for CDD_I2C driver de-initialization.
CDD_I2C_DeInit de-initializes the CDD_I2C peripheral(s) into a Power On Reset state.
Note: This API is applicable for both controller and target mode.
Service ID[hex] - CDD_I2C_SID_DEINIT Sync/Async - Synchronous Reentrancy - Non Reentrant
**Returns**:
* **E_OK** Success
* **E_NOT_OK** Request rejected
**Return**: Std_ReturnType
**Precondition**: None
**Postcondition**: None
### function Cdd_I2c_GetVersionInfo
```
void Cdd_I2c_GetVersionInfo(
Std_VersionInfoType * versionInfo
)
```
**Brief**:
Service that returns the version information of the module.
Note: This API is applicable for both controller and target mode.
Service ID[hex] - CDD_I2C_SID_GET_VERSION_INFO Sync/Async - Synchronous Reentrancy - Reentrant
**Parameters**:
* **versionInfo** Pointer to where to store the version information of this module
**Return**: None
**Precondition**: This API is available only if CDD_I2C_VERSION_INFO_API is STD_ON
**Postcondition**: None
### function Cdd_I2c_SetupEB
```
Std_ReturnType Cdd_I2c_SetupEB(
Cdd_I2c_ChannelType chId,
Cdd_I2c_DataConstPtrType txDataBufferPtr,
Cdd_I2c_DataPtrType rxDataBufferPtr,
Cdd_I2c_DataLengthType length
)
```
**Brief**:
Service to setup the buffers and the length of data for the Ch specified.
Note: This API is applicable only for controller mode.
Service ID[hex] - CDD_I2C_SID_SETUP_EB Sync/Async - Synchronous Reentrancy - Non Reentrant
**Parameters**:
* **chId** Channel to be used in the transmission
* **txDataBufferPtr** Pointer to the TX transmission data location
* **rxDataBufferPtr** Pointer to the RX transmission data location
* **length** Length (number of data elements) of the data to be transmitted from TxDataBufferPtr and/or received from RxDataBufferPtr.
**Returns**:
* **E_OK** Success
* **E_NOT_OK** Request rejected
**Return**: Std_ReturnType
**Precondition**: None
**Postcondition**: None
### function Cdd_I2c_SetupEBDynamic
```
Std_ReturnType Cdd_I2c_SetupEBDynamic(
Cdd_I2c_ChannelType chId,
Cdd_I2c_AddressType deviceAddress,
Cdd_I2c_DataConstPtrType txDataBufferPtr,
Cdd_I2c_DataPtrType rxDataBufferPtr,
Cdd_I2c_DataLengthType length
)
```
**Brief**:
Service to setup the buffers and the length of data for the Ch specified.
Note: This API is applicable only for controller mode.
Service ID[hex] - CDD_I2C_SID_SETUP_EB_DYNAMIC Sync/Async - Synchronous Reentrancy - Non Reentrant
**Parameters**:
* **chId** Channel to be used in the transmission
* **deviceAddress** Any other value then zero will override the statically configured device address.
* **txDataBufferPtr** Pointer to the TX transmission data location
* **rxDataBufferPtr** Pointer to the RX transmission data location
* **length** Length (number of data elements) of the data to be transmitted from TxDataBufferPtr and/or received from RxDataBufferPtr.
**Returns**:
* **E_OK** Success
* **E_NOT_OK** Request rejected
**Return**: Std_ReturnType
**Precondition**: None
**Postcondition**: None
### function Cdd_I2c_AsyncTransmit
```
Std_ReturnType Cdd_I2c_AsyncTransmit(
Cdd_I2c_SequenceType sequenceId
)
```
**Brief**:
The service conducts an asynchronous data transmission according to the parameters provided to the Cdd_I2c_SetupEB() service. The callback Cdd_I2c_SequenceErrorNotification() is called, when the asynchronous operation has finished.
Note: This API is applicable only for controller mode.
Service ID[hex] - CDD_I2C_SID_ASYNC_TRANSMIT Sync/Async - Synchronous Reentrancy - Non Reentrant
**Parameters**:
* **sequenceId** Sequence used for data exchange
**Returns**:
* **E_OK** Success
* **E_NOT_OK** Request rejected
**Return**: Std_ReturnType
**Precondition**: None
**Postcondition**: None
### function Cdd_I2c_Cancel
```
Std_ReturnType Cdd_I2c_Cancel(
Cdd_I2c_SequenceType sequenceId
)
```
**Brief**:
Cancel a transmission.
A request that is already in transmission progress, is cancelled by finishing the current sequence. This is done to achieve a stable state with no undefined data. A queued transmission request is cancelled at once.
Note: This API is applicable only for controller mode.
Service ID[hex] - CDD_I2C_SID_CANCEL Sync/Async - Synchronous Reentrancy - Non Reentrant
**Parameters**:
* **sequenceId** Sequence to cancel
**Returns**:
* **E_OK** Success
* **E_NOT_OK** Request rejected
**Return**: Std_ReturnType
**Precondition**: None
**Postcondition**: None
### function Cdd_I2c_MainFunction
```
void Cdd_I2c_MainFunction(
void
)
```
**Brief**:
Makes a target channel available for processing requests (addressing). When called, the target channel becomes available for starting incoming or outgoing transfers.
Note: This API is applicable only for controller mode.
Service ID[hex] - CDD_I2C_SID_MAIN_FUNCTION Sync/Async - Asynchronous Reentrancy - Reentrant
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_I2c_GetSequenceResult
```
Cdd_I2c_SequenceResultType Cdd_I2c_GetSequenceResult(
Cdd_I2c_SequenceType sequenceId
)
```
**Brief**:
This service returns the current status of the given SequenceId.
Note: This API is applicable only for controller mode.
Service ID[hex] - CDD_I2C_SID_GET_SEQUENCE_RESULT Sync/Async - Synchronous Reentrancy - Reentrant
**Parameters**:
* **sequenceId** Sequence to query
**Return**: CDD_I2C_SequenceResultType - Return the current status
**Precondition**: None
**Postcondition**: None
### function Cdd_I2c_GetResult
```
Cdd_I2c_ChannelResultType Cdd_I2c_GetResult(
Cdd_I2c_ChannelType chId
)
```
**Brief**:
This service returns the current status of the given channel.
Note: This API is applicable only for controller mode.
Service ID[hex] - CDD_I2C_SID_GET_RESULT Sync/Async - Synchronous Reentrancy - Reentrant
**Parameters**:
* **chId** Channel to query
**Return**: Cdd_I2c_ChannelResultType - Return the current status
**Precondition**: None
**Postcondition**: None
### function Cdd_I2c_ResetHwUnit
```
Std_ReturnType Cdd_I2c_ResetHwUnit(
Cdd_I2c_HwUnitType hwUnitId
)
```
**Brief**:
Service to reset and recover a single I2C HW unit from a bus-off condition.
This API performs a hard reset of the specified I2C hardware unit without attempting a STOP condition on the bus. Use this when the bus is stuck (e.g. SCL held low by a faulty target) and Cdd_I2c_Cancel cannot complete because the state machine is unable to progress.
The reset performs the following:
* Disables all interrupts on the HW unit
* Marks the currently active channel (if any) with CDD_I2C_CH_RESULT_BUSFAIL
* Drains all queued channels on this HW unit and marks them with CDD_I2C_CH_RESULT_BUSFAIL. All channels on this HW unit are affected, including channels belonging to different sequences queued on the same HW unit.
* For each affected sequence whose pending channel count reaches zero, the sequence result is set to CDD_I2C_SEQ_HW_UNIT_RESET and the sequence error notification callback (errorNotify) is invoked with CDD_I2C_E_BUS_FAILURE if configured.
* Re-initializes the HW unit registers (baud rate, address, mode)
* Sets the HW unit status to free for new transfers
Service ID[hex] - CDD_I2C_SID_RESET_HW_UNIT Sync/Async - Synchronous Reentrancy - Non Reentrant
**Parameters**:
* **hwUnitId** I2C HW unit ID to reset
**Returns**:
* **E_OK** Success
* **E_NOT_OK** Request rejected (invalid params or driver not init)
**Return**: Std_ReturnType
**Precondition**: Driver must be initialized
**Postcondition**: HW unit is reset and ready for new transfers
### function Cdd_I2c_GetStatus
```
Cdd_I2c_ComponentStatusType Cdd_I2c_GetStatus(
void
)
```
**Brief**:
This service returns the module's status.
Service ID[hex] - CDD_I2C_SID_GET_STATUS Sync/Async - Synchronous Reentrancy - Reentrant
**Return**: Cdd_I2c_ComponentStatusType - Return the current status
**Precondition**: None
**Postcondition**: None
### function Cdd_I2c_TargetStart
```
Std_ReturnType Cdd_I2c_TargetStart(
Cdd_I2c_HwUnitType hwUnitId
)
```
**Brief**:
This service starts the target-mode for the provided HW unit ID This enables interrupts and targets will start responding to I2C events after this.
Note: This API is applicable only for target mode.
Service ID[hex] - CDD_I2C_SID_TARGET_START Sync/Async - Synchronous Reentrancy - Reentrant
**Parameters**:
* **hwUnitId** I2C HW unit ID
**Returns**:
* **E_OK** Success
* **E_NOT_OK** Request rejected
**Return**: Std_ReturnType
**Precondition**: None
**Postcondition**: None
### function Cdd_I2c_TargetStop
```
Std_ReturnType Cdd_I2c_TargetStop(
Cdd_I2c_HwUnitType hwUnitId
)
```
**Brief**:
This service stops the target-mode for the provided HW unit ID. This disables interrupts and targets will not respond to I2C events after this.
Note: This API is applicable only for target mode.
Service ID[hex] - CDD_I2C_SID_TARGET_STOP Sync/Async - Synchronous Reentrancy - Reentrant
**Parameters**:
* **hwUnitId** I2C HW unit ID
**Returns**:
* **E_OK** Success
* **E_NOT_OK** Request rejected
**Return**: Std_ReturnType
**Precondition**: None
**Postcondition**: None
### function Cdd_I2c_TargetSubmitTxBuffer
```
Std_ReturnType Cdd_I2c_TargetSubmitTxBuffer(
Cdd_I2c_HwUnitType hwUnitId,
Cdd_I2c_DataConstPtrType pTxBuffer,
Cdd_I2c_DataLengthType txBufferSize
)
```
**Brief**:
Submit TX buffer - call before Start or in TX Notification callback to provide a new buffer to work with.
**Parameters**:
* **hwUnitId** I2C HW unit ID
* **pTxBuffer** Pointer to TX data buffer
* **txBufferSize** Size of TX data buffer in bytes
**Return**: E_OK on success, E_NOT_OK on failure
**Precondition**: None
**Postcondition**: None
### function Cdd_I2c_TargetSubmitRxBuffer
```
Std_ReturnType Cdd_I2c_TargetSubmitRxBuffer(
Cdd_I2c_HwUnitType hwUnitId,
Cdd_I2c_DataPtrType pRxBuffer,
Cdd_I2c_DataLengthType rxBufferSize
)
```
**Brief**:
Submit RX buffer - call before Start or in RX Notification callback to provide a new buffer to work with.
**Parameters**:
* **hwUnitId** I2C HW unit ID
* **pRxBuffer** Pointer to RX data buffer
* **rxBufferSize** Size of RX data buffer in bytes
**Return**: E_OK on success, E_NOT_OK on failure
**Precondition**: None
**Postcondition**: None
### function I2c_appSeqComplete
```
void I2c_appSeqComplete(
void
)
```
### function I2c_appSeqFail
```
void I2c_appSeqFail(
uint8 errorCode
)
```
## Detailed Description
This files defines I2C configuration structures
---
title: Cdd Ipc
---
# CDD_IPC
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Cdd_Ipc_CoreType](../Modules/group__CDD__IPC.md#enum-cdd_ipc_coretype)** | CPU cores type. |
|enum| **[Cdd_Ipc_TxProcessingType](../Modules/group__CDD__IPC.md#enum-cdd_ipc_txprocessingtype)** | IPC Tx processing. |
|enum| **[Cdd_Ipc_InstanceType](../Modules/group__CDD__IPC.md#enum-cdd_ipc_instancetype)** | IPC Instance type. |
|typedef void(*)(const PduInfoType *PduInfoPtr) | **[Cdd_Ipc_NotifyType](../Modules/group__CDD__IPC.md#typedef-cdd_ipc_notifytype)** | Notification callback function pointer. |
### enum Cdd_Ipc_CoreType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_IPC_CPU1 | 0U| CPU1. |
| CDD_IPC_CPU2 | 1U| CPU2. |
| CDD_IPC_CPU3 | 2U| CPU3. |
**Brief**:
CPU cores type.
### enum Cdd_Ipc_TxProcessingType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_IPC_POLLING | 1U| Polling mode. |
| CDD_IPC_INTERRUPT | 2U| Interrupt mode. |
**Brief**:
IPC Tx processing.
### enum Cdd_Ipc_InstanceType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_IPC_INSTANCE_NONE | 0U| No IPC instance. |
| CDD_IPC_CPU1_L_CPU2_R_INST0 | CPU1IPCSEND_BASE + IPC_O_CPU1TOCPU2INTIPCSET(0U)| CPU1 - Local core, CPU2 - Remote core, Instance 1. |
| CDD_IPC_CPU1_L_CPU2_R_INST1 | CPU1IPCSEND_BASE + IPC_O_CPU1TOCPU2INTIPCSET(1U)| CPU1 - Local core, CPU2 - Remote core, Instance 2. |
| CDD_IPC_CPU1_L_CPU2_R_INST2 | CPU1IPCSEND_BASE + IPC_O_CPU1TOCPU2INTIPCSET(2U)| CPU1 - Local core, CPU2 - Remote core, Instance 3. |
| CDD_IPC_CPU1_L_CPU2_R_INST3 | CPU1IPCSEND_BASE + IPC_O_CPU1TOCPU2INTIPCSET(3U)| CPU1 - Local core, CPU2 - Remote core, Instance 4. |
| CDD_IPC_CPU1_L_CPU3_R_INST0 | CPU1IPCSEND_BASE + IPC_O_CPU1TOCPU3INTIPCSET(0U)| CPU1 - Local core, CPU3 - Remote core, Instance 1. |
| CDD_IPC_CPU1_L_CPU3_R_INST1 | CPU1IPCSEND_BASE + IPC_O_CPU1TOCPU3INTIPCSET(1U)| CPU1 - Local core, CPU3 - Remote core, Instance 2. |
| CDD_IPC_CPU1_L_CPU3_R_INST2 | CPU1IPCSEND_BASE + IPC_O_CPU1TOCPU3INTIPCSET(2U)| CPU1 - Local core, CPU3 - Remote core, Instance 3. |
| CDD_IPC_CPU1_L_CPU3_R_INST3 | CPU1IPCSEND_BASE + IPC_O_CPU1TOCPU3INTIPCSET(3U)| CPU1 - Local core, CPU3 - Remote core, Instance 4. |
| CDD_IPC_CPU2_L_CPU1_R_INST0 | CPU2IPCSEND_BASE + IPC_O_CPU2TOCPU1INTIPCSET(0U)| CPU2 - Local core, CPU1 - Remote core, Instance 1. |
| CDD_IPC_CPU2_L_CPU1_R_INST1 | CPU2IPCSEND_BASE + IPC_O_CPU2TOCPU1INTIPCSET(1U)| CPU2 - Local core, CPU1 - Remote core, Instance 2. |
| CDD_IPC_CPU2_L_CPU1_R_INST2 | CPU2IPCSEND_BASE + IPC_O_CPU2TOCPU1INTIPCSET(2U)| CPU2 - Local core, CPU1 - Remote core, Instance 3. |
| CDD_IPC_CPU2_L_CPU1_R_INST3 | CPU2IPCSEND_BASE + IPC_O_CPU2TOCPU1INTIPCSET(3U)| CPU2 - Local core, CPU1 - Remote core, Instance 4. |
| CDD_IPC_CPU2_L_CPU3_R_INST0 | CPU2IPCSEND_BASE + IPC_O_CPU2TOCPU3INTIPCSET(0U)| CPU2 - Local core, CPU3 - Remote core, Instance 1. |
| CDD_IPC_CPU2_L_CPU3_R_INST1 | CPU2IPCSEND_BASE + IPC_O_CPU2TOCPU3INTIPCSET(1U)| CPU2 - Local core, CPU3 - Remote core, Instance 2. |
| CDD_IPC_CPU2_L_CPU3_R_INST2 | CPU2IPCSEND_BASE + IPC_O_CPU2TOCPU3INTIPCSET(2U)| CPU2 - Local core, CPU3 - Remote core, Instance 3. |
| CDD_IPC_CPU2_L_CPU3_R_INST3 | CPU2IPCSEND_BASE + IPC_O_CPU2TOCPU3INTIPCSET(3U)| CPU2 - Local core, CPU3 - Remote core, Instance 4. |
| CDD_IPC_CPU3_L_CPU1_R_INST0 | CPU3IPCSEND_BASE + IPC_O_CPU3TOCPU1INTIPCSET(0U)| CPU3 - Local core, CPU1 - Remote core, Instance 1. |
| CDD_IPC_CPU3_L_CPU1_R_INST1 | CPU3IPCSEND_BASE + IPC_O_CPU3TOCPU1INTIPCSET(1U)| CPU3 - Local core, CPU1 - Remote core, Instance 2. |
| CDD_IPC_CPU3_L_CPU1_R_INST2 | CPU3IPCSEND_BASE + IPC_O_CPU3TOCPU1INTIPCSET(2U)| CPU3 - Local core, CPU1 - Remote core, Instance 3. |
| CDD_IPC_CPU3_L_CPU1_R_INST3 | CPU3IPCSEND_BASE + IPC_O_CPU3TOCPU1INTIPCSET(3U)| CPU3 - Local core, CPU1 - Remote core, Instance 4. |
| CDD_IPC_CP3_L_CPU2_R_INST0 | CPU3IPCSEND_BASE + IPC_O_CPU3TOCPU2INTIPCSET(0U)| CPU3 - Local core, CPU2 - Remote core, Instance 1. |
| CDD_IPC_CP3_L_CPU2_R_INST1 | CPU3IPCSEND_BASE + IPC_O_CPU3TOCPU2INTIPCSET(1U)| CPU3 - Local core, CPU2 - Remote core, Instance 2. |
| CDD_IPC_CP3_L_CPU2_R_INST2 | CPU3IPCSEND_BASE + IPC_O_CPU3TOCPU2INTIPCSET(2U)| CPU3 - Local core, CPU2 - Remote core, Instance 3. |
| CDD_IPC_CP3_L_CPU2_R_INST3 | CPU3IPCSEND_BASE + IPC_O_CPU3TOCPU2INTIPCSET(3U)| CPU3 - Local core, CPU2 - Remote core, Instance 4. |
**Brief**:
IPC Instance type.
### typedef Cdd_Ipc_NotifyType
```
typedef void(* Cdd_Ipc_NotifyType) (const PduInfoType *PduInfoPtr);
```
**Brief**:
Notification callback function pointer.
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Cdd_Ipc_TxChannelConfigType](../Classes/structCdd__Ipc__TxChannelConfigType.md)** | IPC Tx channel config type. |
| **[Cdd_Ipc_TxInstanceConfigType](../Classes/structCdd__Ipc__TxInstanceConfigType.md)** | IPC Tx instance config type. |
| **[Cdd_Ipc_RxChannelConfigType](../Classes/structCdd__Ipc__RxChannelConfigType.md)** | IPC Rx channel config type. |
| **[Cdd_Ipc_RxInstanceConfigType](../Classes/structCdd__Ipc__RxInstanceConfigType.md)** | IPC Rx instance config type. |
| **[Cdd_Ipc_ConfigType](../Classes/structCdd__Ipc__ConfigType.md)** | IPC config type. |
## Defines
| Name | Brief |
| -------------- | ---------- |
| CDD_IPC_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| CDD_IPC_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| CDD_IPC_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| CDD_IPC_AR_RELEASE_MAJOR_VERSION | AUTOSAR Major version specification implemented by CDD_IPC Driver. |
| CDD_IPC_AR_RELEASE_MINOR_VERSION | AUTOSAR Minor version specification implemented by CDD_IPC Driver. |
| CDD_IPC_AR_RELEASE_REVISION_VERSION | AUTOSAR Patch version specification implemented by CDD_IPC Driver. |
| CDD_IPC_VENDOR_ID | Texas Instruments Vendor ID. |
| CDD_IPC_MODULE_ID | CDD IPC Driver Module ID. |
| CDD_IPC_INSTANCE_ID | CDD IPC Instance ID. |
| CDD_IPC_E_UNINIT | API service used without module initialization. |
| CDD_IPC_E_ALREADY_INITIALIZED | API Cdd_Ipc_Init service called while the IPC driver has already been initialized. |
| CDD_IPC_E_PARAM_VALUE | API service called with invalid parameter value. |
| CDD_IPC_E_PARAM_POINTER | API service called with invalid data buffer pointer. |
| CDD_IPC_E_INVALID_LENGTH | API service called with invalid data length. |
| CDD_IPC_SID_GET_VERSION_INFO | Cdd_Ipc_GetVersionInfo() API Service ID. |
| CDD_IPC_SID_INIT | Cdd_Ipc_Init() API Service ID. |
| CDD_IPC_SID_SYNC | Cdd_Ipc_Sync() API Service ID. |
| CDD_IPC_SID_TRANSMIT | Cdd_Ipc_Transmit() API Service ID. |
| CDD_IPC_SID_MAIN_FUNCTION_READ | Cdd_Ipc_MainFunction_Read() API Service ID. |
| CDD_IPC_IS_TX_INSTANCE_FREE | Cdd_Ipc_IsTxInstanceFree() API Service ID. |
| CDD_IPC_SID_GET_COUNTER | Cdd_Ipc_GetCounter() API Service ID. |
| BIT_MASK_EIGHT | Bit mask for last 8 bits. |
| BIT_MASK_FOUR | Bit mask for last 4 bits. |
| BIT_SHIFT_BY_8 | Shift bits by 8 bits. |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Cdd_Ipc_GetVersionInfo](../Modules/group__CDD__IPC.md#function-cdd_ipc_getversioninfo)**(Std_VersionInfoType * VersionInfoPtr)| Service to provide the version information of Cdd Ipc module. |
| void | **[Cdd_Ipc_Init](../Modules/group__CDD__IPC.md#function-cdd_ipc_init)**(const [Cdd_Ipc_ConfigType](../Classes/structCdd__Ipc__ConfigType.md) * ConfigPtr)| Service to initialize CDD IPC driver. |
| Std_ReturnType | **[Cdd_Ipc_Sync](../Modules/group__CDD__IPC.md#function-cdd_ipc_sync)**([Cdd_Ipc_CoreType](../Modules/group__CDD__IPC.md#enum-cdd_ipc_coretype) RemoteCore)| Service to synchronise two cores communicating in IPC communication within a preconfigured timeout. |
| Std_ReturnType | **[Cdd_Ipc_Transmit](../Modules/group__CDD__IPC.md#function-cdd_ipc_transmit)**(PduIdType ChannelId, const PduInfoType * PduInfoPtr)| Service to request transmission. |
| void | **[Cdd_Ipc_MainFunction_Read](../Modules/group__CDD__IPC.md#function-cdd_ipc_mainfunction_read)**(void )| Service to perform the polling of confgured IPC Rx instances. |
| boolean | **[Cdd_Ipc_IsTxInstanceFree](../Modules/group__CDD__IPC.md#function-cdd_ipc_istxinstancefree)**(PduIdType ChannelId)| Service to check the status of the instance that is configured for transmitting the message in the respective channel. |
| uint64 | **[Cdd_Ipc_GetCounter](../Modules/group__CDD__IPC.md#function-cdd_ipc_getcounter)**(void )| Service to read the timestamp counter value. |
### function Cdd_Ipc_GetVersionInfo
```
void Cdd_Ipc_GetVersionInfo(
Std_VersionInfoType * VersionInfoPtr
)
```
**Brief**:
Service to provide the version information of Cdd Ipc module.
**Parameters**:
* **VersionInfoPtr** is the pointer to CDD IPC driver version information.
**Returns**:
* **None**
**Return**: None
**Precondition**: This API is available only if CDD_IPC_GET_VERSION_INFO_API is STD_ON
**Postcondition**: None
### function Cdd_Ipc_Init
```
void Cdd_Ipc_Init(
const Cdd_Ipc_ConfigType * ConfigPtr
)
```
**Brief**:
Service to initialize CDD IPC driver.
**Parameters**:
* **ConfigPtr** is the configuration pointer pointing to a generated configuration variant from plugin
**Return**: None
**Precondition**: Preconditions - Driver not already initialized
**Postcondition**: Postconditions - Driver in initialized state
### function Cdd_Ipc_Sync
```
Std_ReturnType Cdd_Ipc_Sync(
Cdd_Ipc_CoreType RemoteCore
)
```
**Brief**:
Service to synchronise two cores communicating in IPC communication within a preconfigured timeout.
**Parameters**:
* **RemoteCore** is the symbolic name of the remote core that needs to be synchronized with.
**Returns**:
* **E_OK** Synchronization is successful.
* **E_NOT_OK** Synchronization failed.
**Return**: Status of synchronization.
**Precondition**: None
**Postcondition**: None
### function Cdd_Ipc_Transmit
```
Std_ReturnType Cdd_Ipc_Transmit(
PduIdType ChannelId,
const PduInfoType * PduInfoPtr
)
```
**Brief**:
Service to request transmission.
**Parameters**:
* **ChannelId** : When Cdd Ipc is integrated with Autosar Com stack, this parameter is a Pdu identifier used to address the respective channel. When Cdd Ipc is not integrated with Autosar Com stack, this parameter is a channel identifier used to address the respective channel.
* **PduInfoPtr** is the pointer to a struct of type PduInfoType containing the complete data to be transmitted.
**Returns**:
* **E_OK** Transmit request has been accepted.
* **E_NOT_OK** Transmit request has not been accepted.
**Return**: Cdd_Ipc_Transmit request is accepted or not
**Precondition**: None
**Postcondition**: None
### function Cdd_Ipc_MainFunction_Read
```
void Cdd_Ipc_MainFunction_Read(
void
)
```
**Brief**:
Service to perform the polling of confgured IPC Rx instances.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Ipc_IsTxInstanceFree
```
boolean Cdd_Ipc_IsTxInstanceFree(
PduIdType ChannelId
)
```
**Brief**:
Service to check the status of the instance that is configured for transmitting the message in the respective channel.
**Parameters**:
* **ChannelId** : When Cdd Ipc is integrated with Autosar Com stack, this parameter is a Pdu identifier used to address the respective channel. When Cdd Ipc is not integrated with Autosar Com stack, this parameter is a channel identifier used to address the respective channel.
**Returns**:
* **TRUE** Instance is free
* **FALSE** Instance is busy
**Return**: IPC instance configured for transmitting the PDU is busy or not
**Precondition**: None
**Postcondition**: None
### function Cdd_Ipc_GetCounter
```
uint64 Cdd_Ipc_GetCounter(
void
)
```
**Brief**:
Service to read the timestamp counter value.
**Return**: 64-bit timestamp counter value
**Precondition**: None
**Postcondition**: None
---
title: Cdd_Pwm API GUIDE Header file
---
# CDD_PWM
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype)** | Cdd_Pwm_OutputChannelType determines the channel output. |
|enum| **[Cdd_Pwm_TimeBaseCountModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_timebasecountmodetype)** | Enumeration to define the time base counter mode. |
|enum| **[Cdd_Pwm_ActionQualifierOutputEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifieroutputeventtype)** | Cdd_Pwm_ActionQualifierOutputEventType output defines the action qualifier event type. |
|enum| **[Cdd_Pwm_ActionQualifierOutputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifieroutputtype)**
|enum| **[Cdd_Pwm_ClockDividerType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_clockdividertype)**
|enum| **[Cdd_Pwm_HighSpeedClkDivType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_highspeedclkdivtype)**
|enum| **[Cdd_Pwm_CounterCompareModuleType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_countercomparemoduletype)**
|enum| **[Cdd_Pwm_CounterCompareLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_countercompareloadmodetype)** | Action qualifier Shadow mode load mode. |
|enum| **[Cdd_Pwm_InterruptSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_interruptsourcetype)** | Enumeration for interrupt source. |
|enum| **[Cdd_Pwm_ActionQualifierLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifierloadmodetype)** | Action qualifier Shadow mode load mode. |
|enum| **[Cdd_Pwm_EmulationModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_emulationmodetype)**
|enum| **[Cdd_Pwm_SfoStatusType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_sfostatustype)** | Enumeration for SFO status. |
|enum| **[Cdd_Pwm_SyncCountModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_synccountmodetype)** | Time Base counter synchronization mode. |
|enum| **[Cdd_Pwm_SyncOutPulseSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_syncoutpulsesourcetype)**
|enum| **[Cdd_Pwm_OneShotSyncOutTriggerType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_oneshotsyncouttriggertype)** | Values that can be passed to Cdd_Pwm_SetOneShotSyncOutTrigger() as the trigger parameter. |
|enum| **[Cdd_Pwm_PeriodLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_periodloadmodetype)** | Values that can be passed to Cdd_Pwm_SetPeriodLoadMode() as the loadMode parameter. |
|enum| **[Cdd_Pwm_PeriodShadowLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_periodshadowloadmodetype)** | Values that can be passed to Cdd_Pwm_SelectPeriodLoadEvent() as the shadowLoadMode parameter. |
|enum| **[Cdd_Pwm_GlobalLoadType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_globalloadtype)** | Global load register types. |
|enum| **[Cdd_Pwm_DcTripInputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_dctripinputtype)** | Digital compare trip input types. |
|enum| **[Cdd_Pwm_ActionQualifierTriggerSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifiertriggersourcetype)** | Values that can be passed to Cdd_Pwm_SetActionQualifierT1TriggerSource() and Cdd_Pwm_SetActionQualifierT2TriggerSource() as the trigger parameter. |
|enum| **[Cdd_Pwm_ActionQualifierSwOutputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifierswoutputtype)** | Values that can be passed to Cdd_Pwm_SetActionQualifierContSWForceAction() as the outPut parameter. |
|enum| **[Cdd_Pwm_ActionQualifierEventActionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifiereventactiontype)** | Values that can be passed to Cdd_Pwm_SetActionQualifierActionComplete() as the action parameter. |
|enum| **[Cdd_Pwm_AdditionalActionQualifierEventActionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_additionalactionqualifiereventactiontype)** | Values that can be passed to Cdd_Pwm_SetAdditionalActionQualifierActionComplete() as the action parameter. |
|enum| **[Cdd_Pwm_ActionQualifierContForceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifiercontforcetype)** | Action qualifier continuous force type. |
|enum| **[Cdd_Pwm_DeadBandDelayModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_deadbanddelaymodetype)** | Values that can be passed to Cdd_Pwm_SetDeadBandDelayPolarity(), Cdd_Pwm_SetDeadBandDelayMode() as the delayMode parameter. |
|enum| **[Cdd_Pwm_DeadBandDelayInputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_deadbanddelayinputtype)** | Dead band delay input types. |
|enum| **[Cdd_Pwm_DeadBandPolarityType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_deadbandpolaritytype)** | Values that can be passed to Cdd_Pwm_SetDeadBandDelayPolarity as the polarity parameter. |
|enum| **[Cdd_Pwm_DeadBandControlLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_deadbandcontrolloadmodetype)** | Values that can be passed to Cdd_Pwm_SetDeadBandControlShadowLoadMode() as the loadMode parameter. |
|enum| **[Cdd_Pwm_DeadBandDelayLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_deadbanddelayloadmodetype)** | Values that can be passed to Cdd_Pwm_SetRisingEdgeDelayCountShadowLoadMode() and Cdd_Pwm_SetFallingEdgeDelayCountShadowLoadModeas the loadMode parameter. |
|enum| **[Cdd_Pwm_DeadBandClockModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_deadbandclockmodetype)** | Values that can be passed to Cdd_Pwm_SetDeadBandCounterClock() as the clockMode parameter. |
|enum| **[Cdd_Pwm_TripZoneDigitalCompareOutputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzonedigitalcompareoutputtype)** | Trip Zone. |
|enum| **[Cdd_Pwm_TripZoneFlagType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzoneflagtype)** | Cycle By Cycle Trip Zone Flag types. |
|enum| **[Cdd_Pwm_CbcTzFlagType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_cbctzflagtype)** | Cycle By Cycle Trip Zone Flag types. |
|enum| **[Cdd_Pwm_OneshotTzFlagType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_oneshottzflagtype)** | One-shot Trip Zone Flag types. |
|enum| **[Cdd_Pwm_TripZoneForceEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzoneforceeventtype)** | Trip Zone Force Event types. |
|enum| **[Cdd_Pwm_TripZoneActionEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzoneactioneventtype)** | Values that can be passed to Cdd_Pwm_SetTripZoneAction() as the TzEvent parameter. |
|enum| **[Cdd_Pwm_TzSignalType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tzsignaltype)** | Values that can be passed to Cdd_Pwm_EnableTripZoneSignals() and Cdd_Pwm_DisableTripZoneSignals() as the TzSignal parameter. |
|enum| **[Cdd_Pwm_TzCapEvtType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tzcapevttype)** | Enumeration to configure tripzone CAPEVT signal. |
|enum| **[Cdd_Pwm_TzInterruptSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tzinterruptsourcetype)** | Values that can be passed to Cdd_Pwm_ConfigureTripZoneInterrupt() and Cdd_Pwm_DisableTripZoneInterrupt() as the TzInterrupt parameter. |
|enum| **[Cdd_Pwm_TripZoneDigitalCompareOutputEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzonedigitalcompareoutputeventtype)** | Values that can be passed to Cdd_Pwm_SetTripZoneDigitalCompareEventCondition() as the dcEvent parameter. |
|enum| **[Cdd_Pwm_TripZoneActionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzoneactiontype)** | Values that can be passed to Cdd_Pwm_SetTripZoneAction() as the TzAction parameter. |
|enum| **[Cdd_Pwm_TripZoneAdvancedEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzoneadvancedeventtype)** | Values that can be passed to Cdd_Pwm_SetTripZoneAdvAction() as the TzAdvEvent parameter. |
|enum| **[Cdd_Pwm_TripZoneAdvancedActionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzoneadvancedactiontype)** | Values that can be passed to Cdd_Pwm_SetTripZoneAdvDigitalCompareActionA(), Cdd_Pwm_SetTripZoneAdvDigitalCompareActionB(), Cdd_Pwm_SetTripZoneAdvAction() as the TzAdvDCAction parameter. |
|enum| **[Cdd_Pwm_TripZoneAdvDigitalCompareEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzoneadvdigitalcompareeventtype)** | Values that can be passed to Cdd_Pwm_SetTripZoneAdvDigitalCompareActionA() and Cdd_Pwm_SetTripZoneAdvDigitalCompareActionB() as the TzAdvDCEvent parameter. |
|enum| **[Cdd_Pwm_XCmpRegType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmpregtype)** | XCMP. |
|enum| **[Cdd_Pwm_XCmpShadowSetType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmpshadowsettype)** | XCMP shadow set types. |
|enum| **[Cdd_Pwm_XCompareRegType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcompareregtype)** | Values that can be passed to Cdd_Pwm_SetCmpShadowRegValue() as the cmpReg parameter. |
|enum| **[Cdd_Pwm_XMinMaxRegType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xminmaxregtype)** | Values that can be passed to Cdd_Pwm_SetXMINMAXRegValue() as the xminmaxReg parameter. |
|enum| **[Cdd_Pwm_XCmpAqOutputEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmpaqoutputeventtype)** | Values that can be passed to Cdd_Pwm_SetXCmpActionQualifierAction() as the event parameter. |
|enum| **[Cdd_Pwm_XCmp_AllocCmpAType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmp_alloccmpatype)** | Values that can be passed to Cdd_Pwm_AllocAXCMP() as the alloctype parameter. |
|enum| **[Cdd_Pwm_XCmp_AllocCmpBType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmp_alloccmpbtype)** | Values that can be passed to Cdd_Pwm_AllocBXCMP() as the alloctype parameter. |
|enum| **[Cdd_Pwm_XCmpLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmploadmodetype)** | Values that can be passed to Cdd_Pwm_SetXCmpLoadMode() as the mode parameter. |
|enum| **[Cdd_Pwm_XCmpShadowLevelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmpshadowleveltype)** | Values that can be passed to Cdd_Pwm_SetXCmpShadowLevel() as the level parameter. |
|enum| **[Cdd_Pwm_XCmpShadowBufPtrType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmpshadowbufptrtype)** | Values that can be passed to Cdd_Pwm_SetXCmpShadowBufPtrLoadOnce() as the ptr parameter. |
|enum| **[Cdd_Pwm_DiodeEmulationTripSrcType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_diodeemulationtripsrctype)** | Diode Emulation Enumerations. |
|enum| **[Cdd_Pwm_DiodeEmulationModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_diodeemulationmodetype)** | Values that can be passed to Cdd_Pwm_SetDiodeEmulationMode() as the mode parameter. |
|enum| **[Cdd_Pwm_DiodeEmulationDirectionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_diodeemulationdirectiontype)** | Diode emulation direction types. |
|enum| **[Cdd_Pwm_DiodeEmulationSignalType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_diodeemulationsignaltype)** | Values that can be passed to Cdd_Pwm_SelectDiodeEmulationPwmSignal() as the signal parameter. |
|enum| **[Cdd_Pwm_CbcTripZoneClearModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_cbctripzoneclearmodetype)** | Values that can be passed to Cdd_Pwm_SelectCycleByCycleTripZoneClearEvent() as the clearMode parameter. |
|enum| **[Cdd_Pwm_SelectTripOutSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_selecttripoutsourcetype)** | Values that can be passed to Cdd_Pwm_EnableTripOutSource() and Cdd_Pwm_DisableTripOutSource() as the TzTripOut parameter. |
|enum| **[Cdd_Pwm_AdcStartOfConversionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_adcstartofconversiontype)** | ADC Start of Conversion type for PWM module. |
|enum| **[Cdd_Pwm_AdcStartOfConversionSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_adcstartofconversionsourcetype)** | ADC Start of Conversion source types. |
|enum| **[Cdd_Pwm_DigitalCompareType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcomparetype)** | Digital Compare types for PWM module. |
|enum| **[Cdd_Pwm_DigitalCompareTripInputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcomparetripinputtype)** | Digital Compare Trip Input types. |
|enum| **[Cdd_Pwm_DigitalCompareBlankingPulseType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcompareblankingpulsetype)** | Digital Compare Blanking Pulse types. |
|enum| **[Cdd_Pwm_DigitalCompareFilterInputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcomparefilterinputtype)** | Digital Compare Filter Input types. |
|enum| **[Cdd_Pwm_DigitalCompareEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcompareeventtype)** | Digital Compare Event types. |
|enum| **[Cdd_Pwm_DigitalCompareEventSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcompareeventsourcetype)** | Digital Compare Event Source types. |
|enum| **[Cdd_Pwm_DigitalCompareSyncModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcomparesyncmodetype)** | Digital Compare Event Sync Mode types. |
|enum| **[Cdd_Pwm_DigitalCompareCbcLatchModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcomparecbclatchmodetype)** | Digital Compare CBC Latch Mode types. |
|enum| **[Cdd_Pwm_DigitalCompareCBCLatchClearEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcomparecbclatchcleareventtype)** | Digital Compare CBC Latch Clear Event types. |
|enum| **[Cdd_Pwm_SelectCaptureGateInputPolarityType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_selectcapturegateinputpolaritytype)** | Capture Gate Input Polarity types. |
|enum| **[Cdd_Pwm_SelectCaptureInputPolarityType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_selectcaptureinputpolaritytype)** | Capture Input Polarity types. |
|enum| **[Cdd_Pwm_CaptureInputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_captureinputtype)** | Capture Input types. |
|enum| **[Cdd_Pwm_GlobalLoadTriggerType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_globalloadtriggertype)** | Global Load Trigger types. |
|enum| **[Cdd_Pwm_ValleyTriggerSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_valleytriggersourcetype)** | Valley Trigger Source types. |
|enum| **[Cdd_Pwm_ValleyCounterEdgeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_valleycounteredgetype)** | Valley Counter Edge types. |
|enum| **[Cdd_Pwm_ValleyDelayModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_valleydelaymodetype)** | Valley Delay Mode types. |
|enum| **[Cdd_Pwm_DigitalCompareEdgeFilterModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcompareedgefiltermodetype)** | Digital Compare Edge Filter Mode types. |
|enum| **[Cdd_Pwm_DigitalCompareEdgeFilterEdgeCountType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcompareedgefilteredgecounttype)** | Digital Compare Edge Filter Edge Count types. |
|enum| **[Cdd_Pwm_EvtMixTriggerSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_evtmixtriggersourcetype)** | Mixed Event Interrupt Source types. |
|enum| **[Cdd_Pwm_EtMixSignalSelectType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_etmixsignalselecttype)** | ET Mix Signal Select types. |
|enum| **[Cdd_Pwm_LockRegisterGroupType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_lockregistergrouptype)** | Lock Register Group types. |
|enum| **[Cdd_Pwm_HrpwmMepEdgeModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_hrpwmmepedgemodetype)** | HRPWM MEP Edge Mode types. |
|enum| **[Cdd_Pwm_HrpwmMepCtrlModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_hrpwmmepctrlmodetype)** | HRPWM MEP Control Mode types. |
|enum| **[Cdd_Pwm_HrpwmLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_hrpwmloadmodetype)** | HRPWM Load Mode types. |
|enum| **[Cdd_Pwm_HrpwmChannelBOutputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_hrpwmchannelboutputtype)** | HRPWM Channel B Output types. |
|enum| **[Cdd_Pwm_HrpwmSyncPulseSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_hrpwmsyncpulsesourcetype)** | HRPWM Sync Pulse Source types. |
|enum| **[Cdd_Pwm_HrpwmMepDeadBandEdgeModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_hrpwmmepdeadbandedgemodetype)** | HRPWM MEP Dead Band Edge Mode types. |
|enum| **[Cdd_Pwm_HrpwmLockRegisterGroupType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_hrpwmlockregistergrouptype)** | HRPWM Lock Register Group types. |
|enum| **[Cdd_Pwm_OutputSymmetryType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputsymmetrytype)** | Cdd_Pwm_OutputSymmetryType determines the symmetry of the output waveform of a PWM instance. |
|typedef uint8 | **[Cdd_Pwm_ChannelType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_channeltype)** | Numeric Identifier of a PWM channel. |
|typedef uint8 | **[Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype)** | Numeric Identifier of a PWM instance. |
|typedef uint8 | **[Cdd_Pwm_HrpwmCalInstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_hrpwmcalinstancetype)** | Numeric Identifier of a HRPWMCAL instance. |
|typedef uint16 | **[Cdd_Pwm_PeriodType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_periodtype)** | Period of the PWM instance. |
|typedef uint16 | **[Cdd_Pwm_DutyCycleType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_dutycycletype)** | Duty cycle of the PWM channel. |
|typedef void(*)(void) | **[Cdd_Pwm_NotificationType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_notificationtype)** | Notification function pointer. |
|typedef void(*)(uint16 TripZoneFlag) | **[Cdd_Pwm_TripZoneNotificationType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_tripzonenotificationtype)** | Trip zone notification function pointer. |
### enum Cdd_Pwm_OutputChannelType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_OUTPUT_A | 0U| Ouput channel A. |
| CDD_PWM_OUTPUT_B | 1U| Ouput channel B. |
**Brief**:
Cdd_Pwm_OutputChannelType determines the channel output.
### enum Cdd_Pwm_TimeBaseCountModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_COUNTER_MODE_UP | 0U| |
| CDD_PWM_COUNTER_MODE_DOWN | 1U| Up - count mode. |
| CDD_PWM_COUNTER_MODE_UP_DOWN | 2U| Down - count mode. |
| CDD_PWM_COUNTER_MODE_STOP_FREEZE | 3U| Up - down - count mode. |
**Brief**:
Enumeration to define the time base counter mode.
### enum Cdd_Pwm_ActionQualifierOutputEventType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_ZERO | 0U| Time base counter equals zero. |
| CDD_PWM_AQ_OUTPUT_ON_T1_COUNT_UP | 1U| T1 event on count up. |
| CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_PERIOD | 2U| Time base counter equals period. |
| CDD_PWM_AQ_OUTPUT_ON_T1_COUNT_DOWN | 3U| T1 event on count down. |
| CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA | 4U| Time base counter up equals COMPA. |
| CDD_PWM_AQ_OUTPUT_ON_T2_COUNT_UP | 5U| T2 event on count up. |
| CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA | 6U| Time base counter down equals COMPA. |
| CDD_PWM_AQ_OUTPUT_ON_T2_COUNT_DOWN | 7U| T2 event on count down. |
| CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB | 8U| Time base counter up equals COMPB. |
| CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB | 10U| Time base counter down equals COMPB. |
**Brief**:
Cdd_Pwm_ActionQualifierOutputEventType output defines the action qualifier event type.
### enum Cdd_Pwm_ActionQualifierOutputType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_AQ_OUTPUT_NO_CHANGE | 0U| |
| CDD_PWM_AQ_OUTPUT_LOW | 1U| No change in the output pins. |
| CDD_PWM_AQ_OUTPUT_HIGH | 2U| Set output pins to low. |
| CDD_PWM_AQ_OUTPUT_TOGGLE | 3U| Set output pins to High. |
### enum Cdd_Pwm_ClockDividerType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_CLOCK_DIVIDER_1 | 0U| |
| CDD_PWM_CLOCK_DIVIDER_2 | 1U| |
| CDD_PWM_CLOCK_DIVIDER_4 | 2U| |
| CDD_PWM_CLOCK_DIVIDER_8 | 3U| |
| CDD_PWM_CLOCK_DIVIDER_16 | 4U| |
| CDD_PWM_CLOCK_DIVIDER_32 | 5U| |
| CDD_PWM_CLOCK_DIVIDER_64 | 6U| |
| CDD_PWM_CLOCK_DIVIDER_128 | 7U| |
### enum Cdd_Pwm_HighSpeedClkDivType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_HSCLOCK_DIVIDER_1 | 0U| |
| CDD_PWM_HSCLOCK_DIVIDER_2 | 1U| |
| CDD_PWM_HSCLOCK_DIVIDER_4 | 2U| |
| CDD_PWM_HSCLOCK_DIVIDER_6 | 3U| |
| CDD_PWM_HSCLOCK_DIVIDER_8 | 4U| |
| CDD_PWM_HSCLOCK_DIVIDER_10 | 5U| |
| CDD_PWM_HSCLOCK_DIVIDER_12 | 6U| |
| CDD_PWM_HSCLOCK_DIVIDER_14 | 7U| |
### enum Cdd_Pwm_CounterCompareModuleType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_COUNTER_COMPARE_A | 0U| |
| CDD_PWM_COUNTER_COMPARE_B | 2U| |
| CDD_PWM_COUNTER_COMPARE_C | 5U| |
| CDD_PWM_COUNTER_COMPARE_D | 7U| |
### enum Cdd_Pwm_CounterCompareLoadModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_COMP_LOAD_ON_CNTR_ZERO | 0U| |
| CDD_PWM_COMP_LOAD_ON_CNTR_PERIOD | 1U| |
| CDD_PWM_COMP_LOAD_ON_CNTR_ZERO_PERIOD | 2U| |
| CDD_PWM_COMP_LOAD_FREEZE | 3U| |
| CDD_PWM_COMP_LOAD_ON_SYNC_CNTR_ZERO | 4U| |
| CDD_PWM_COMP_LOAD_ON_SYNC_CNTR_PERIOD | 5U| |
| CDD_PWM_COMP_LOAD_ON_SYNC_CNTR_ZERO_PERIOD | 6U| |
| CDD_PWM_COMP_LOAD_ON_SYNC_ONLY | 8U| |
**Brief**:
Action qualifier Shadow mode load mode.
### enum Cdd_Pwm_InterruptSourceType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_NT_TBCTR_DISABLED | 0U| Time-base counter equal to zero. |
| CDD_PWM_INT_TBCTR_ZERO | 1U| Time-base counter equal to zero. |
| CDD_PWM_INT_TBCTR_PERIOD | 2U| Time-base counter equal to period. |
| CDD_PWM_INT_TBCTR_ETINTMIX | 3U| Time-base counter based on mixed events (ETINTMIX) |
| CDD_PWM_INT_TBCTR_U_CMPA | 4U| Time-base counter equal to CMPA when the timer is incrementing. |
| CDD_PWM_INT_TBCTR_D_CMPA | 5U| Time-base counter equal to CMPAwhen the timer is decrementing. |
| CDD_PWM_INT_TBCTR_U_CMPB | 6U| Time-base counter equal to CMPB when the timer is incrementing. |
| CDD_PWM_INT_TBCTR_D_CMPB | 7U| Time-base counter equal to CMPB when the timer is decrementing. |
| CDD_PWM_INT_TBCTR_U_CMPC | 8U| Time-base counter equal to CMPC when the timer is incrementing. |
| CDD_PWM_INT_TBCTR_D_CMPC | 10U| Time-base counter equal to CMPC when the timer is decrementing. |
| CDD_PWM_INT_TBCTR_U_CMPD | 12U| Time-base counter equal to CMPD when the timer is incrementing. |
| CDD_PWM_INT_TBCTR_D_CMPD | 14U| Time-base counter equal to CMPD when the timer is decrementing. |
**Brief**:
Enumeration for interrupt source.
### enum Cdd_Pwm_ActionQualifierLoadModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_AQ_LOAD_ON_CNTR_ZERO | 0U| |
| CDD_PWM_AQ_LOAD_ON_CNTR_PERIOD | 1U| |
| CDD_PWM_AQ_LOAD_ON_CNTR_ZERO_PERIOD | 2U| |
| CDD_PWM_AQ_LOAD_FREEZE | 3U| |
| CDD_PWM_AQ_LOAD_ON_SYNC_CNTR_ZERO | 4U| |
| CDD_PWM_AQ_LOAD_ON_SYNC_CNTR_PERIOD | 5U| |
| CDD_PWM_AQ_LOAD_ON_SYNC_CNTR_ZERO_PERIOD | 6U| |
| CDD_PWM_AQ_LOAD_ON_SYNC_ONLY | 8U| |
**Brief**:
Action qualifier Shadow mode load mode.
### enum Cdd_Pwm_EmulationModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_EMULATION_STOP_AFTER_NEXT_TB | 0U| |
| CDD_PWM_EMULATION_STOP_AFTER_FULL_CYCLE | 1U| |
| CDD_PWM_EMULATION_FREE_RUN | 2U| |
### enum Cdd_Pwm_SfoStatusType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_SFO_INCOMPLETE | 0U| |
| CDD_PWM_SFO_COMPLETE | 1U| |
| CDD_PWM_SFO_ERROR | 2U| |
**Brief**:
Enumeration for SFO status.
### enum Cdd_Pwm_SyncCountModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_COUNT_MODE_DOWN_AFTER_SYNC | 0U| |
| CDD_PWM_COUNT_MODE_UP_AFTER_SYNC | 1U| |
**Brief**:
Time Base counter synchronization mode.
### enum Cdd_Pwm_SyncOutPulseSourceType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_SYNC_OUT_PULSE_ON_SOFTWARE | EPWM_SYNCOUTEN_SWEN| |
| CDD_PWM_SYNC_OUT_PULSE_ON_CNTR_ZERO | EPWM_SYNCOUTEN_ZEROEN| |
| CDD_PWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_B | EPWM_SYNCOUTEN_CMPBEN| |
| CDD_PWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_C | EPWM_SYNCOUTEN_CMPCEN| |
| CDD_PWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_D | EPWM_SYNCOUTEN_CMPDEN| |
| CDD_PWM_SYNC_OUT_PULSE_ON_DCA_EVT1_SYNC | EPWM_SYNCOUTEN_DCAEVT1EN| |
| CDD_PWM_SYNC_OUT_PULSE_ON_DCB_EVT1_SYNC | EPWM_SYNCOUTEN_DCBEVT1EN| |
| CDD_PWM_SYNC_OUT_PULSE_ON_ALL | ((uint16)EPWM_SYNCOUTEN_SWEN \| (uint16)EPWM_SYNCOUTEN_ZEROEN \| (uint16)EPWM_SYNCOUTEN_CMPBEN \| (uint16)EPWM_SYNCOUTEN_CMPCEN \| (uint16)EPWM_SYNCOUTEN_CMPDEN \| (uint16)EPWM_SYNCOUTEN_DCAEVT1EN \| (uint16)EPWM_SYNCOUTEN_DCBEVT1EN)| |
### enum Cdd_Pwm_OneShotSyncOutTriggerType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_OSHT_SYNC_OUT_TRIG_SYNC | 0x0U| |
| CDD_PWM_OSHT_SYNC_OUT_TRIG_RELOAD | 0x1U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetOneShotSyncOutTrigger() as the trigger parameter.
### enum Cdd_Pwm_PeriodLoadModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_PERIOD_SHADOW_LOAD | 0U| |
| CDD_PWM_PERIOD_DIRECT_LOAD | 1U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetPeriodLoadMode() as the loadMode parameter.
### enum Cdd_Pwm_PeriodShadowLoadModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_SHADOW_LOAD_MODE_COUNTER_ZERO | 0U| |
| CDD_PWM_SHADOW_LOAD_MODE_COUNTER_SYNC | 1U| |
| CDD_PWM_SHADOW_LOAD_MODE_SYNC | 2U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SelectPeriodLoadEvent() as the shadowLoadMode parameter.
### enum Cdd_Pwm_GlobalLoadType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_GL_REGISTER_TBPRD_TBPRDHR | 0x1U| |
| CDD_PWM_GL_REGISTER_CMPA_CMPAHR | 0x2U| |
| CDD_PWM_GL_REGISTER_CMPB_CMPBHR | 0x4U| |
| CDD_PWM_GL_REGISTER_CMPC | 0x8U| |
| CDD_PWM_GL_REGISTER_CMPD | 0x10U| |
| CDD_PWM_GL_REGISTER_DBRED_DBREDHR | 0x20U| |
| CDD_PWM_GL_REGISTER_DBFED_DBFEDHR | 0x40U| |
| CDD_PWM_GL_REGISTER_DBCTL | 0x80U| |
| CDD_PWM_GL_REGISTER_AQCTLA_AQCTLA2 | 0x100U| |
| CDD_PWM_GL_REGISTER_AQCTLB_AQCTLB2 | 0x200U| |
| CDD_PWM_GL_REGISTER_AQCSFRC | 0x400U| |
**Brief**:
Global load register types.
### enum Cdd_Pwm_DcTripInputType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DC_COMBINATIONAL_TRIPIN1 | 0x1U| |
| CDD_PWM_DC_COMBINATIONAL_TRIPIN2 | 0x2U| |
| CDD_PWM_DC_COMBINATIONAL_TRIPIN3 | 0x4U| |
| CDD_PWM_DC_COMBINATIONAL_TRIPIN4 | 0x8U| |
| CDD_PWM_DC_COMBINATIONAL_TRIPIN5 | 0x10U| |
| CDD_PWM_DC_COMBINATIONAL_TRIPIN6 | 0x20U| |
| CDD_PWM_DC_COMBINATIONAL_TRIPIN7 | 0x40U| |
| CDD_PWM_DC_COMBINATIONAL_TRIPIN8 | 0x80U| |
| CDD_PWM_DC_COMBINATIONAL_TRIPIN9 | 0x100U| |
| CDD_PWM_DC_COMBINATIONAL_TRIPIN10 | 0x200U| |
| CDD_PWM_DC_COMBINATIONAL_TRIPIN11 | 0x400U| |
| CDD_PWM_DC_COMBINATIONAL_TRIPIN12 | 0x800U| |
| CDD_PWM_DC_COMBINATIONAL_TRIPIN14 | 0x2000U| |
| CDD_PWM_DC_COMBINATIONAL_TRIPIN15 | 0x4000U| |
**Brief**:
Digital compare trip input types.
### enum Cdd_Pwm_ActionQualifierTriggerSourceType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_AQ_TRIGGER_EVENT_TRIG_DCA_1 | 0U| |
| CDD_PWM_AQ_TRIGGER_EVENT_TRIG_DCA_2 | 1U| |
| CDD_PWM_AQ_TRIGGER_EVENT_TRIG_DCB_1 | 2U| |
| CDD_PWM_AQ_TRIGGER_EVENT_TRIG_DCB_2 | 3U| |
| CDD_PWM_AQ_TRIGGER_EVENT_TRIG_TZ_1 | 4U| |
| CDD_PWM_AQ_TRIGGER_EVENT_TRIG_TZ_2 | 5U| |
| CDD_PWM_AQ_TRIGGER_EVENT_TRIG_TZ_3 | 6U| |
| CDD_PWM_AQ_TRIGGER_EVENT_TRIG_CDD_PWM_SYNCIN | 7U| |
| CDD_PWM_AQ_TRIGGER_EVENT_TRIG_DC_EVTFILT | 8U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetActionQualifierT1TriggerSource() and Cdd_Pwm_SetActionQualifierT2TriggerSource() as the trigger parameter.
### enum Cdd_Pwm_ActionQualifierSwOutputType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_AQ_SW_DISABLED | 0U| |
| CDD_PWM_AQ_SW_OUTPUT_LOW | 1U| |
| CDD_PWM_AQ_SW_OUTPUT_HIGH | 2U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetActionQualifierContSWForceAction() as the outPut parameter.
### enum Cdd_Pwm_ActionQualifierEventActionType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_AQ_OUTPUT_NO_CHANGE_ZERO | 0x0U| |
| CDD_PWM_AQ_OUTPUT_LOW_ZERO | 0x1U| |
| CDD_PWM_AQ_OUTPUT_HIGH_ZERO | 0x2U| |
| CDD_PWM_AQ_OUTPUT_TOGGLE_ZERO | 0x3U| |
| CDD_PWM_AQ_OUTPUT_NO_CHANGE_PERIOD | 0x0U| |
| CDD_PWM_AQ_OUTPUT_LOW_PERIOD | 0x4U| |
| CDD_PWM_AQ_OUTPUT_HIGH_PERIOD | 0x8U| |
| CDD_PWM_AQ_OUTPUT_TOGGLE_PERIOD | 0xCU| |
| CDD_PWM_AQ_OUTPUT_NO_CHANGE_UP_CMPA | 0x00U| |
| CDD_PWM_AQ_OUTPUT_LOW_UP_CMPA | 0x10U| |
| CDD_PWM_AQ_OUTPUT_HIGH_UP_CMPA | 0x20U| |
| CDD_PWM_AQ_OUTPUT_TOGGLE_UP_CMPA | 0x30U| |
| CDD_PWM_AQ_OUTPUT_NO_CHANGE_DOWN_CMPA | 0x00U| |
| CDD_PWM_AQ_OUTPUT_LOW_DOWN_CMPA | 0x40U| |
| CDD_PWM_AQ_OUTPUT_HIGH_DOWN_CMPA | 0x80U| |
| CDD_PWM_AQ_OUTPUT_TOGGLE_DOWN_CMPA | 0xC0U| |
| CDD_PWM_AQ_OUTPUT_NO_CHANGE_UP_CMPB | 0x000U| |
| CDD_PWM_AQ_OUTPUT_LOW_UP_CMPB | 0x100U| |
| CDD_PWM_AQ_OUTPUT_HIGH_UP_CMPB | 0x200U| |
| CDD_PWM_AQ_OUTPUT_TOGGLE_UP_CMPB | 0x300U| |
| CDD_PWM_AQ_OUTPUT_NO_CHANGE_DOWN_CMPB | 0x000U| |
| CDD_PWM_AQ_OUTPUT_LOW_DOWN_CMPB | 0x400U| |
| CDD_PWM_AQ_OUTPUT_HIGH_DOWN_CMPB | 0x800U| |
| CDD_PWM_AQ_OUTPUT_TOGGLE_DOWN_CMPB | 0xC00U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetActionQualifierActionComplete() as the action parameter.
### enum Cdd_Pwm_AdditionalActionQualifierEventActionType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_AQ_OUTPUT_NO_CHANGE_UP_T1 | 0x0U| |
| CDD_PWM_AQ_OUTPUT_LOW_UP_T1 | 0x1U| |
| CDD_PWM_AQ_OUTPUT_HIGH_UP_T1 | 0x2U| |
| CDD_PWM_AQ_OUTPUT_TOGGLE_UP_T1 | 0x3U| |
| CDD_PWM_AQ_OUTPUT_NO_CHANGE_DOWN_T1 | 0x0U| |
| CDD_PWM_AQ_OUTPUT_LOW_DOWN_T1 | 0x4U| |
| CDD_PWM_AQ_OUTPUT_HIGH_DOWN_T1 | 0x8U| |
| CDD_PWM_AQ_OUTPUT_TOGGLE_DOWN_T1 | 0xCU| |
| CDD_PWM_AQ_OUTPUT_NO_CHANGE_UP_T2 | 0x00U| |
| CDD_PWM_AQ_OUTPUT_LOW_UP_T2 | 0x10U| |
| CDD_PWM_AQ_OUTPUT_HIGH_UP_T2 | 0x20U| |
| CDD_PWM_AQ_OUTPUT_TOGGLE_UP_T2 | 0x30U| |
| CDD_PWM_AQ_OUTPUT_NO_CHANGE_DOWN_T2 | 0x00U| |
| CDD_PWM_AQ_OUTPUT_LOW_DOWN_T2 | 0x40U| |
| CDD_PWM_AQ_OUTPUT_HIGH_DOWN_T2 | 0x80U| |
| CDD_PWM_AQ_OUTPUT_TOGGLE_DOWN_T2 | 0xC0U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetAdditionalActionQualifierActionComplete() as the action parameter.
### enum Cdd_Pwm_ActionQualifierContForceType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO | 0U| Shadow mode load when counter equals zero. |
| CDD_PWM_AQ_SW_SH_LOAD_ON_CNTR_PERIOD | 1U| Shadow mode load when counter equals period. |
| CDD_PWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO_PERIOD | 2U| Shadow mode load when counter equals zero or period. |
| CDD_PWM_AQ_SW_IMMEDIATE_LOAD | 3U| No shadow load mode Immediate mode only. |
**Brief**:
Action qualifier continuous force type.
### enum Cdd_Pwm_DeadBandDelayModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DB_FED | 0U| |
| CDD_PWM_DB_RED | 1U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetDeadBandDelayPolarity(), Cdd_Pwm_SetDeadBandDelayMode() as the delayMode parameter.
### enum Cdd_Pwm_DeadBandDelayInputType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DB_INPUT_EPWMA | 0U| |
| CDD_PWM_DB_INPUT_EPWMB | 1U| |
| CDD_PWM_DB_INPUT_DB_RED | 2U| |
**Brief**:
Dead band delay input types.
### enum Cdd_Pwm_DeadBandPolarityType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DB_POLARITY_ACTIVE_HIGH | 0U| |
| CDD_PWM_DB_POLARITY_ACTIVE_LOW | 1U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetDeadBandDelayPolarity as the polarity parameter.
### enum Cdd_Pwm_DeadBandControlLoadModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DB_LOAD_ON_CNTR_ZERO | 0U| |
| CDD_PWM_DB_LOAD_ON_CNTR_PERIOD | 1U| |
| CDD_PWM_DB_LOAD_ON_CNTR_ZERO_PERIOD | 2U| |
| CDD_PWM_DB_LOAD_FREEZE | 3U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetDeadBandControlShadowLoadMode() as the loadMode parameter.
### enum Cdd_Pwm_DeadBandDelayLoadModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DELAY_LOAD_ON_CNTR_ZERO | 0U| |
| CDD_PWM_DELAY_LOAD_ON_CNTR_PERIOD | 1U| |
| CDD_PWM_DELAY_LOAD_ON_CNTR_ZERO_PERIOD | 2U| |
| CDD_PWM_DELAY_LOAD_FREEZE | 3U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetRisingEdgeDelayCountShadowLoadMode() and Cdd_Pwm_SetFallingEdgeDelayCountShadowLoadModeas the loadMode parameter.
### enum Cdd_Pwm_DeadBandClockModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DB_COUNTER_CLOCK_FULL_CYCLE | 0U| |
| CDD_PWM_DB_COUNTER_CLOCK_HALF_CYCLE | 1U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetDeadBandCounterClock() as the clockMode parameter.
### enum Cdd_Pwm_TripZoneDigitalCompareOutputType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_TZ_DC_OUTPUT_A1 | 0U| |
| CDD_PWM_TZ_DC_OUTPUT_A2 | 1U| |
| CDD_PWM_TZ_DC_OUTPUT_B1 | 2U| |
| CDD_PWM_TZ_DC_OUTPUT_B2 | 3U| |
**Brief**:
Trip Zone.
Values that can be passed to Cdd_Pwm_SetTripZoneDigitalCompareEventCondition() as the dcType parameter.
### enum Cdd_Pwm_TripZoneFlagType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_TZ_INTERRUPT | 0x1U| |
| CDD_PWM_TZ_FLAG_CBC | 0x2U| |
| CDD_PWM_TZ_FLAG_OST | 0x4U| |
| CDD_PWM_TZ_FLAG_DCAEVT1 | 0x8U| |
| CDD_PWM_TZ_FLAG_DCAEVT2 | 0x10U| |
| CDD_PWM_TZ_FLAG_DCBEVT1 | 0x20U| |
| CDD_PWM_TZ_FLAG_DCBEVT2 | 0x40U| |
| CDD_PWM_TZ_FLAG_CAPEVT | 0x80U| |
**Brief**:
Cycle By Cycle Trip Zone Flag types.
### enum Cdd_Pwm_CbcTzFlagType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_TZ_CBC_FLAG_1 | 0x1U| |
| CDD_PWM_TZ_CBC_FLAG_2 | 0x2U| |
| CDD_PWM_TZ_CBC_FLAG_3 | 0x4U| |
| CDD_PWM_TZ_CBC_FLAG_4 | 0x8U| |
| CDD_PWM_TZ_CBC_FLAG_5 | 0x10U| |
| CDD_PWM_TZ_CBC_FLAG_6 | 0x20U| |
| CDD_PWM_TZ_CBC_FLAG_DCAEVT2 | 0x40U| |
| CDD_PWM_TZ_CBC_FLAG_DCBEVT2 | 0x80U| |
| CDD_PWM_TZ_CBC_FLAG_CAPEVT | 0x100U| |
**Brief**:
Cycle By Cycle Trip Zone Flag types.
### enum Cdd_Pwm_OneshotTzFlagType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_TZ_OST_FLAG_OST1 | 0x1U| |
| CDD_PWM_TZ_OST_FLAG_OST2 | 0x2U| |
| CDD_PWM_TZ_OST_FLAG_OST3 | 0x4U| |
| CDD_PWM_TZ_OST_FLAG_OST4 | 0x8U| |
| CDD_PWM_TZ_OST_FLAG_OST5 | 0x10U| |
| CDD_PWM_TZ_OST_FLAG_OST6 | 0x20U| |
| CDD_PWM_TZ_OST_FLAG_DCAEVT1 | 0x40U| |
| CDD_PWM_TZ_OST_FLAG_DCBEVT1 | 0x80U| |
| CDD_PWM_TZ_OST_FLAG_CAPEVT | 0x100U| |
**Brief**:
One-shot Trip Zone Flag types.
### enum Cdd_Pwm_TripZoneForceEventType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_TZ_FORCE_EVENT_CBC | 0x2U| |
| CDD_PWM_TZ_FORCE_EVENT_OST | 0x4U| |
| CDD_PWM_TZ_FORCE_EVENT_DCAEVT1 | 0x8U| |
| CDD_PWM_TZ_FORCE_EVENT_DCAEVT2 | 0x10U| |
| CDD_PWM_TZ_FORCE_EVENT_DCBEVT1 | 0x20U| |
| CDD_PWM_TZ_FORCE_EVENT_DCBEVT2 | 0x40U| |
| CDD_PWM_TZ_FORCE_EVENT_CAPEVT | 0x80U| |
**Brief**:
Trip Zone Force Event types.
### enum Cdd_Pwm_TripZoneActionEventType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_TZ_ACTION_EVENT_TZA | 0U| |
| CDD_PWM_TZ_ACTION_EVENT_TZB | 1U| |
| CDD_PWM_TZ_ACTION_EVENT_DCAEVT1 | 2U| |
| CDD_PWM_TZ_ACTION_EVENT_DCAEVT2 | 3U| |
| CDD_PWM_TZ_ACTION_EVENT_DCBEVT1 | 4U| |
| CDD_PWM_TZ_ACTION_EVENT_DCBEVT2 | 5U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetTripZoneAction() as the TzEvent parameter.
### enum Cdd_Pwm_TzSignalType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_TZ_SIGNAL_CBC1 | 0x1U| |
| CDD_PWM_TZ_SIGNAL_CBC2 | 0x2U| |
| CDD_PWM_TZ_SIGNAL_CBC3 | 0x4U| |
| CDD_PWM_TZ_SIGNAL_CBC4 | 0x8U| |
| CDD_PWM_TZ_SIGNAL_CBC5 | 0x10U| |
| CDD_PWM_TZ_SIGNAL_CBC6 | 0x20U| |
| CDD_PWM_TZ_SIGNAL_DCAEVT2 | 0x40U| |
| CDD_PWM_TZ_SIGNAL_DCBEVT2 | 0x80U| |
| CDD_PWM_TZ_SIGNAL_OSHT1 | 0x100U| |
| CDD_PWM_TZ_SIGNAL_OSHT2 | 0x200U| |
| CDD_PWM_TZ_SIGNAL_OSHT3 | 0x400U| |
| CDD_PWM_TZ_SIGNAL_OSHT4 | 0x800U| |
| CDD_PWM_TZ_SIGNAL_OSHT5 | 0x1000U| |
| CDD_PWM_TZ_SIGNAL_OSHT6 | 0x2000U| |
| CDD_PWM_TZ_SIGNAL_DCAEVT1 | 0x4000U| |
| CDD_PWM_TZ_SIGNAL_DCBEVT1 | 0x8000U| |
**Brief**:
Values that can be passed to Cdd_Pwm_EnableTripZoneSignals() and Cdd_Pwm_DisableTripZoneSignals() as the TzSignal parameter.
### enum Cdd_Pwm_TzCapEvtType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_TZ_SIGNAL_CAPEVT_CBC | 0x1U| |
| CDD_PWM_TZ_SIGNAL_CAPEVT_OST | 0x100U| |
**Brief**:
Enumeration to configure tripzone CAPEVT signal.
### enum Cdd_Pwm_TzInterruptSourceType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_TZ_INTERRUPT_CBC | 0x2U| |
| CDD_PWM_TZ_INTERRUPT_OST | 0x4U| |
| CDD_PWM_TZ_INTERRUPT_DCAEVT1 | 0x8U| |
| CDD_PWM_TZ_INTERRUPT_DCAEVT2 | 0x10U| |
| CDD_PWM_TZ_INTERRUPT_DCBEVT1 | 0x20U| |
| CDD_PWM_TZ_INTERRUPT_DCBEVT2 | 0x40U| |
| CDD_PWM_TZ_INTERRUPT_CAPEVT | 0x80U| |
**Brief**:
Values that can be passed to Cdd_Pwm_ConfigureTripZoneInterrupt() and Cdd_Pwm_DisableTripZoneInterrupt() as the TzInterrupt parameter.
### enum Cdd_Pwm_TripZoneDigitalCompareOutputEventType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_TZ_EVENT_DC_DISABLED | 0U| |
| CDD_PWM_TZ_EVENT_DCXH_LOW | 1U| |
| CDD_PWM_TZ_EVENT_DCXH_HIGH | 2U| |
| CDD_PWM_TZ_EVENT_DCXL_LOW | 3U| |
| CDD_PWM_TZ_EVENT_DCXL_HIGH | 4U| |
| CDD_PWM_TZ_EVENT_DCXL_HIGH_DCXH_LOW | 5U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetTripZoneDigitalCompareEventCondition() as the dcEvent parameter.
### enum Cdd_Pwm_TripZoneActionType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_TZ_ACTION_HIGH_Z | 0U| |
| CDD_PWM_TZ_ACTION_HIGH | 1U| |
| CDD_PWM_TZ_ACTION_LOW | 2U| |
| CDD_PWM_TZ_ACTION_DISABLE | 3U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetTripZoneAction() as the TzAction parameter.
### enum Cdd_Pwm_TripZoneAdvancedEventType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_TZ_ADV_ACTION_EVENT_TZA_U | 0U| |
| CDD_PWM_TZ_ADV_ACTION_EVENT_TZA_D | 1U| |
| CDD_PWM_TZ_ADV_ACTION_EVENT_TZB_U | 2U| |
| CDD_PWM_TZ_ADV_ACTION_EVENT_TZB_D | 3U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetTripZoneAdvAction() as the TzAdvEvent parameter.
Trip zone advanced event type
### enum Cdd_Pwm_TripZoneAdvancedActionType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_TZ_ADV_ACTION_HIGH_Z | 0U| |
| CDD_PWM_TZ_ADV_ACTION_HIGH | 1U| |
| CDD_PWM_TZ_ADV_ACTION_LOW | 2U| |
| CDD_PWM_TZ_ADV_ACTION_TOGGLE | 3U| |
| CDD_PWM_TZ_ADV_ACTION_DISABLE | 7U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetTripZoneAdvDigitalCompareActionA(), Cdd_Pwm_SetTripZoneAdvDigitalCompareActionB(), Cdd_Pwm_SetTripZoneAdvAction() as the TzAdvDCAction parameter.
### enum Cdd_Pwm_TripZoneAdvDigitalCompareEventType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_TZ_ADV_ACTION_EVENT_DCXEVT1_U | 0U| |
| CDD_PWM_TZ_ADV_ACTION_EVENT_DCXEVT1_D | 1U| |
| CDD_PWM_TZ_ADV_ACTION_EVENT_DCXEVT2_U | 2U| |
| CDD_PWM_TZ_ADV_ACTION_EVENT_DCXEVT2_D | 3U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetTripZoneAdvDigitalCompareActionA() and Cdd_Pwm_SetTripZoneAdvDigitalCompareActionB() as the TzAdvDCEvent parameter.
### enum Cdd_Pwm_XCmpRegType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_XCMP1_ACTIVE | 0x0U| |
| CDD_PWM_XCMP2_ACTIVE | 0x2U| |
| CDD_PWM_XCMP3_ACTIVE | 0x4U| |
| CDD_PWM_XCMP4_ACTIVE | 0x6U| |
| CDD_PWM_XCMP5_ACTIVE | 0x8U| |
| CDD_PWM_XCMP6_ACTIVE | 0xAU| |
| CDD_PWM_XCMP7_ACTIVE | 0xCU| |
| CDD_PWM_XCMP8_ACTIVE | 0xEU| |
| CDD_PWM_XTBPRD_ACTIVE | 0x10U| |
| CDD_PWM_XCMP1_SHADOW1 | 0x40U| |
| CDD_PWM_XCMP2_SHADOW1 | 0x42U| |
| CDD_PWM_XCMP3_SHADOW1 | 0x44U| |
| CDD_PWM_XCMP4_SHADOW1 | 0x46U| |
| CDD_PWM_XCMP5_SHADOW1 | 0x48U| |
| CDD_PWM_XCMP6_SHADOW1 | 0x4AU| |
| CDD_PWM_XCMP7_SHADOW1 | 0x4CU| |
| CDD_PWM_XCMP8_SHADOW1 | 0x4EU| |
| CDD_PWM_XTBPRD_SHADOW1 | 0x50U| |
| CDD_PWM_XCMP1_SHADOW2 | 0x80U| |
| CDD_PWM_XCMP2_SHADOW2 | 0x82U| |
| CDD_PWM_XCMP3_SHADOW2 | 0x84U| |
| CDD_PWM_XCMP4_SHADOW2 | 0x86U| |
| CDD_PWM_XCMP5_SHADOW2 | 0x88U| |
| CDD_PWM_XCMP6_SHADOW2 | 0x8AU| |
| CDD_PWM_XCMP7_SHADOW2 | 0x8CU| |
| CDD_PWM_XCMP8_SHADOW2 | 0x8EU| |
| CDD_PWM_XTBPRD_SHADOW2 | 0x90U| |
| CDD_PWM_XCMP1_SHADOW3 | 0xC0U| |
| CDD_PWM_XCMP2_SHADOW3 | 0xC2U| |
| CDD_PWM_XCMP3_SHADOW3 | 0xC4U| |
| CDD_PWM_XCMP4_SHADOW3 | 0xC6U| |
| CDD_PWM_XCMP5_SHADOW3 | 0xC8U| |
| CDD_PWM_XCMP6_SHADOW3 | 0xCAU| |
| CDD_PWM_XCMP7_SHADOW3 | 0xCCU| |
| CDD_PWM_XCMP8_SHADOW3 | 0xCEU| |
| CDD_PWM_XTBPRD_SHADOW3 | 0xD0U| |
**Brief**:
XCMP.
Values that can be passed to Cdd_Pwm_SetXCmpRegValue() as the xcmpReg parameter.
### enum Cdd_Pwm_XCmpShadowSetType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_XCMP_ACTIVE | 0x0U| |
| CDD_PWM_XCMP_SHADOW1 | 0x1U| |
| CDD_PWM_XCMP_SHADOW2 | 0x2U| |
| CDD_PWM_XCMP_SHADOW3 | 0x3U| |
**Brief**:
XCMP shadow set types.
### enum Cdd_Pwm_XCompareRegType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_CMPC_SHADOW1 | 0x0U| |
| CDD_PWM_CMPD_SHADOW1 | 0x2U| |
| CDD_PWM_CMPC_SHADOW2 | 0x40U| |
| CDD_PWM_CMPD_SHADOW2 | 0x42U| |
| CDD_PWM_CMPC_SHADOW3 | 0x80U| |
| CDD_PWM_CMPD_SHADOW3 | 0x82U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetCmpShadowRegValue() as the cmpReg parameter.
### enum Cdd_Pwm_XMinMaxRegType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_XMAX_ACTIVE | 0x0U| |
| CDD_PWM_XMIN_ACTIVE | 0x1U| |
| CDD_PWM_XMAX_SHADOW1 | 0x40U| |
| CDD_PWM_XMIN_SHADOW1 | 0x41U| |
| CDD_PWM_XMAX_SHADOW2 | 0x80U| |
| CDD_PWM_XMIN_SHADOW2 | 0x81U| |
| CDD_PWM_XMAX_SHADOW3 | 0xC0U| |
| CDD_PWM_XMIN_SHADOW3 | 0xC1U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetXMINMAXRegValue() as the xminmaxReg parameter.
### enum Cdd_Pwm_XCmpAqOutputEventType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_XCMP1 | 0U| |
| CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_XCMP2 | 1U| |
| CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_XCMP3 | 2U| |
| CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_XCMP4 | 3U| |
| CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_XCMP5 | 4U| |
| CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_XCMP6 | 5U| |
| CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_XCMP7 | 6U| |
| CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_XCMP8 | 7U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetXCmpActionQualifierAction() as the event parameter.
### enum Cdd_Pwm_XCmp_AllocCmpAType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_XCMP_NONE_CMPA | 0U| |
| CDD_PWM_XCMP_1_CMPA | 1U| |
| CDD_PWM_XCMP_2_CMPA | 2U| |
| CDD_PWM_XCMP_3_CMPA | 3U| |
| CDD_PWM_XCMP_4_CMPA | 4U| |
| CDD_PWM_XCMP_5_CMPA | 5U| |
| CDD_PWM_XCMP_6_CMPA | 6U| |
| CDD_PWM_XCMP_7_CMPA | 7U| |
| CDD_PWM_XCMP_8_CMPA | 8U| |
**Brief**:
Values that can be passed to Cdd_Pwm_AllocAXCMP() as the alloctype parameter.
### enum Cdd_Pwm_XCmp_AllocCmpBType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_XCMP_5_CMPB | 5U| |
| CDD_PWM_XCMP_6_CMPB | 6U| |
| CDD_PWM_XCMP_7_CMPB | 7U| |
| CDD_PWM_XCMP_8_CMPB | 8U| |
**Brief**:
Values that can be passed to Cdd_Pwm_AllocBXCMP() as the alloctype parameter.
### enum Cdd_Pwm_XCmpLoadModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_XCMP_LOADONCE | 0U| |
| CDD_PWM_XCMP_LOADMULTIPLE | 1U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetXCmpLoadMode() as the mode parameter.
### enum Cdd_Pwm_XCmpShadowLevelType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_XCMP_SHADOWLEVEL_0 | 0U| |
| CDD_PWM_XCMP_SHADOWLEVEL_1 | 1U| |
| CDD_PWM_XCMP_SHADOWLEVEL_2 | 2U| |
| CDD_PWM_XCMP_SHADOWLEVEL_3 | 3U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetXCmpShadowLevel() as the level parameter.
### enum Cdd_Pwm_XCmpShadowBufPtrType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_XCMP_XLOADCTL_SHDWBUFPTR_NULL | 0U| |
| CDD_PWM_XCMP_XLOADCTL_SHDWBUFPTR_ONE | 1U| |
| CDD_PWM_XCMP_XLOADCTL_SHDWBUFPTR_TWO | 2U| |
| CDD_PWM_XCMP_XLOADCTL_SHDWBUFPTR_THREE | 3U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetXCmpShadowBufPtrLoadOnce() as the ptr parameter.
### enum Cdd_Pwm_DiodeEmulationTripSrcType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DE_SRC_TRIPH | 0x0U| |
| CDD_PWM_DE_SRC_TRIPL | 0x1U| |
**Brief**:
Diode Emulation Enumerations.
Diode Emulation trip sources
### enum Cdd_Pwm_DiodeEmulationModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DIODE_EMULATION_CBC | 0U| |
| CDD_PWM_DIODE_EMULATION_OST | 1U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SetDiodeEmulationMode() as the mode parameter.
### enum Cdd_Pwm_DiodeEmulationDirectionType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DE_COUNT_UP | 0x0U| |
| CDD_PWM_DE_COUNT_DOWN | 0x1U| |
**Brief**:
Diode emulation direction types.
### enum Cdd_Pwm_DiodeEmulationSignalType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DE_SYNC_TRIPH_OR_TRIPL | 0U| |
| CDD_PWM_DE_SYNC_INV_TRIPH_OR_TRIPL | 1U| |
| CDD_PWM_DE_LOW | 2U| |
| CDD_PWM_DE_HIGH | 3U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SelectDiodeEmulationPwmSignal() as the signal parameter.
### enum Cdd_Pwm_CbcTripZoneClearModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_TZ_CBC_PULSE_CLR_CNTR_ZERO | 0U| |
| CDD_PWM_TZ_CBC_PULSE_CLR_CNTR_PERIOD | 1U| |
| CDD_PWM_TZ_CBC_PULSE_CLR_CNTR_ZERO_PERIOD | 2U| |
**Brief**:
Values that can be passed to Cdd_Pwm_SelectCycleByCycleTripZoneClearEvent() as the clearMode parameter.
### enum Cdd_Pwm_SelectTripOutSourceType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_TZ_TRIPOUT_OST | 0U| |
| CDD_PWM_TZ_TRIPOUT_CBC | 1U| |
| CDD_PWM_TZ_TRIPOUT_TZ1 | 2U| |
| CDD_PWM_TZ_TRIPOUT_TZ2 | 3U| |
| CDD_PWM_TZ_TRIPOUT_TZ3 | 4U| |
| CDD_PWM_TZ_TRIPOUT_TZ4 | 5U| |
| CDD_PWM_TZ_TRIPOUT_TZ5 | 6U| |
| CDD_PWM_TZ_TRIPOUT_TZ6 | 7U| |
| CDD_PWM_TZ_TRIPOUT_DCAEVT1 | 8U| |
| CDD_PWM_TZ_TRIPOUT_DCAEVT2 | 9U| |
| CDD_PWM_TZ_TRIPOUT_DCBEVT1 | 10U| |
| CDD_PWM_TZ_TRIPOUT_DCBEVT2 | 11U| |
| CDD_PWM_TZ_TRIPOUT_CAPEVT | 12U| |
**Brief**:
Values that can be passed to Cdd_Pwm_EnableTripOutSource() and Cdd_Pwm_DisableTripOutSource() as the TzTripOut parameter.
### enum Cdd_Pwm_AdcStartOfConversionType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_SOC_A | 0U| |
| CDD_PWM_SOC_B | 1U| |
**Brief**:
ADC Start of Conversion type for PWM module.
### enum Cdd_Pwm_AdcStartOfConversionSourceType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_SOC_DCXEVT1 | 0U| |
| CDD_PWM_SOC_TBCTR_ZERO | 1U| |
| CDD_PWM_SOC_TBCTR_PERIOD | 2U| |
| CDD_PWM_SOC_TBCTR_ETSOCAMIX | 3U| |
| CDD_PWM_SOC_TBCTR_U_CMPA | 4U| |
| CDD_PWM_SOC_TBCTR_U_CMPC | 8U| |
| CDD_PWM_SOC_TBCTR_D_CMPA | 5U| |
| CDD_PWM_SOC_TBCTR_D_CMPC | 10U| |
| CDD_PWM_SOC_TBCTR_U_CMPB | 6U| |
| CDD_PWM_SOC_TBCTR_U_CMPD | 12U| |
| CDD_PWM_SOC_TBCTR_D_CMPB | 7U| |
| CDD_PWM_SOC_TBCTR_D_CMPD | 14U| |
**Brief**:
ADC Start of Conversion source types.
### enum Cdd_Pwm_DigitalCompareType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DC_TYPE_DCAH | 0U| |
| CDD_PWM_DC_TYPE_DCAL | 1U| |
| CDD_PWM_DC_TYPE_DCBH | 2U| |
| CDD_PWM_DC_TYPE_DCBL | 3U| |
**Brief**:
Digital Compare types for PWM module.
### enum Cdd_Pwm_DigitalCompareTripInputType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DC_TRIP_TRIPIN1 | 0U| |
| CDD_PWM_DC_TRIP_TRIPIN2 | 1U| |
| CDD_PWM_DC_TRIP_TRIPIN3 | 2U| |
| CDD_PWM_DC_TRIP_TRIPIN4 | 3U| |
| CDD_PWM_DC_TRIP_TRIPIN5 | 4U| |
| CDD_PWM_DC_TRIP_TRIPIN6 | 5U| |
| CDD_PWM_DC_TRIP_TRIPIN7 | 6U| |
| CDD_PWM_DC_TRIP_TRIPIN8 | 7U| |
| CDD_PWM_DC_TRIP_TRIPIN9 | 8U| |
| CDD_PWM_DC_TRIP_TRIPIN10 | 9U| |
| CDD_PWM_DC_TRIP_TRIPIN11 | 10U| |
| CDD_PWM_DC_TRIP_TRIPIN12 | 11U| |
| CDD_PWM_DC_TRIP_TRIPIN14 | 13U| |
| CDD_PWM_DC_TRIP_TRIPIN15 | 14U| |
| CDD_PWM_DC_TRIP_COMBINATION | 15U| |
**Brief**:
Digital Compare Trip Input types.
### enum Cdd_Pwm_DigitalCompareBlankingPulseType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DC_WINDOW_START_TBCTR_PERIOD | 0U| |
| CDD_PWM_DC_WINDOW_START_TBCTR_ZERO | 1U| |
| CDD_PWM_DC_WINDOW_START_TBCTR_ZERO_PERIOD | 2U| |
| CDD_PWM_DC_WINDOW_START_BLANK_PULSE_MIX | 3U| |
**Brief**:
Digital Compare Blanking Pulse types.
### enum Cdd_Pwm_DigitalCompareFilterInputType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DC_WINDOW_SOURCE_DCAEVT1 | 0U| |
| CDD_PWM_DC_WINDOW_SOURCE_DCAEVT2 | 1U| |
| CDD_PWM_DC_WINDOW_SOURCE_DCBEVT1 | 2U| |
| CDD_PWM_DC_WINDOW_SOURCE_DCBEVT2 | 3U| |
**Brief**:
Digital Compare Filter Input types.
### enum Cdd_Pwm_DigitalCompareEventType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DC_EVENT_1 | 0U| |
| CDD_PWM_DC_EVENT_2 | 1U| |
**Brief**:
Digital Compare Event types.
### enum Cdd_Pwm_DigitalCompareEventSourceType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DC_EVENT_SOURCE_ORIG_SIGNAL | 0U| |
| CDD_PWM_DC_EVENT_SOURCE_FILT_SIGNAL | 1U| |
**Brief**:
Digital Compare Event Source types.
### enum Cdd_Pwm_DigitalCompareSyncModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DC_EVENT_INPUT_SYNCED | 0U| |
| CDD_PWM_DC_EVENT_INPUT_NOT_SYNCED | 1U| |
**Brief**:
Digital Compare Event Sync Mode types.
### enum Cdd_Pwm_DigitalCompareCbcLatchModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DC_CBC_LATCH_DISABLED | 0x0U| |
| CDD_PWM_DC_CBC_LATCH_ENABLED | 0x1U| |
**Brief**:
Digital Compare CBC Latch Mode types.
### enum Cdd_Pwm_DigitalCompareCBCLatchClearEventType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DC_CBC_LATCH_CLR_CNTR_ZERO | 0x0U| |
| CDD_PWM_DC_CBC_LATCH_CLR_ON_CNTR_PERIOD | 0x1U| |
| CDD_PWM_DC_CBC_LATCH_CLR_ON_CNTR_ZERO_PERIOD | 0x2U| |
**Brief**:
Digital Compare CBC Latch Clear Event types.
### enum Cdd_Pwm_SelectCaptureGateInputPolarityType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_CAPGATE_INPUT_ALWAYS_ON | 0U| |
| CDD_PWM_CAPGATE_INPUT_ALWAYS_OFF | 1U| |
| CDD_PWM_CAPGATE_INPUT_SYNC | 2U| |
| CDD_PWM_CAPGATE_INPUT_SYNC_INVERT | 3U| |
**Brief**:
Capture Gate Input Polarity types.
### enum Cdd_Pwm_SelectCaptureInputPolarityType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_CAPTURE_INPUT_CAPIN_SYNC | 0U| |
| CDD_PWM_CAPTURE_INPUT_CAPIN_SYNC_INVERT | 1U| |
**Brief**:
Capture Input Polarity types.
### enum Cdd_Pwm_CaptureInputType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_CAPTURE_INPUT | 0U| |
| CDD_PWM_CAPTURE_GATE | 1U| |
**Brief**:
Capture Input types.
### enum Cdd_Pwm_GlobalLoadTriggerType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_GL_LOAD_PULSE_CNTR_ZERO | 0x0U| |
| CDD_PWM_GL_LOAD_PULSE_CNTR_PERIOD | 0x1U| |
| CDD_PWM_GL_LOAD_PULSE_CNTR_ZERO_PERIOD | 0x2U| |
| CDD_PWM_GL_LOAD_PULSE_SYNC | 0x3U| |
| CDD_PWM_GL_LOAD_PULSE_SYNC_OR_CNTR_ZERO | 0x4U| |
| CDD_PWM_GL_LOAD_PULSE_SYNC_OR_CNTR_PERIOD | 0x5U| |
| CDD_PWM_GL_LOAD_PULSE_SYNC_CNTR_ZERO_PERIOD | 0x6U| |
| CDD_PWM_GL_LOAD_PULSE_CNTR_U_CMPC | 0x8U| |
| CDD_PWM_GL_LOAD_PULSE_CNTR_D_CMPC | 0x9U| |
| CDD_PWM_GL_LOAD_PULSE_CNTR_U_CMPD | 0xAU| |
| CDD_PWM_GL_LOAD_PULSE_CNTR_D_CMPD | 0xBU| |
| CDD_PWM_GL_LOAD_PULSE_GLOBAL_FORCE | 0xFU| |
**Brief**:
Global Load Trigger types.
### enum Cdd_Pwm_ValleyTriggerSourceType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_VALLEY_TRIGGER_EVENT_SOFTWARE | 0U| |
| CDD_PWM_VALLEY_TRIGGER_EVENT_CNTR_ZERO | 1U| |
| CDD_PWM_VALLEY_TRIGGER_EVENT_CNTR_PERIOD | 2U| |
| CDD_PWM_VALLEY_TRIGGER_EVENT_CNTR_ZERO_PERIOD | 3U| |
| CDD_PWM_VALLEY_TRIGGER_EVENT_DCAEVT1 | 4U| |
| CDD_PWM_VALLEY_TRIGGER_EVENT_DCAEVT2 | 5U| |
| CDD_PWM_VALLEY_TRIGGER_EVENT_DCBEVT1 | 6U| |
| CDD_PWM_VALLEY_TRIGGER_EVENT_DCBEVT2 | 7U| |
**Brief**:
Valley Trigger Source types.
### enum Cdd_Pwm_ValleyCounterEdgeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_VALLEY_COUNT_START_EDGE | 0U| |
| CDD_PWM_VALLEY_COUNT_STOP_EDGE | 1U| |
**Brief**:
Valley Counter Edge types.
### enum Cdd_Pwm_ValleyDelayModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_VALLEY_DELAY_MODE_SW_DELAY | 0U| |
| CDD_PWM_VALLEY_DELAY_MODE_VCNT_DELAY_SW_DELAY | 1U| |
| CDD_PWM_VALLEY_DELAY_MODE_VCNT_DELAY_SHIFT_1_SW_DELAY | 2U| |
| CDD_PWM_VALLEY_DELAY_MODE_VCNT_DELAY_SHIFT_2_SW_DELAY | 3U| |
| CDD_PWM_VALLEY_DELAY_MODE_VCNT_DELAY_SHIFT_4_SW_DELAY | 4U| |
**Brief**:
Valley Delay Mode types.
### enum Cdd_Pwm_DigitalCompareEdgeFilterModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DC_EDGEFILT_MODE_RISING | 0U| |
| CDD_PWM_DC_EDGEFILT_MODE_FALLING | 1U| |
| CDD_PWM_DC_EDGEFILT_MODE_BOTH | 2U| |
**Brief**:
Digital Compare Edge Filter Mode types.
### enum Cdd_Pwm_DigitalCompareEdgeFilterEdgeCountType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_DC_EDGEFILT_EDGECNT_0 | 0U| |
| CDD_PWM_DC_EDGEFILT_EDGECNT_1 | 1U| |
| CDD_PWM_DC_EDGEFILT_EDGECNT_2 | 2U| |
| CDD_PWM_DC_EDGEFILT_EDGECNT_3 | 3U| |
| CDD_PWM_DC_EDGEFILT_EDGECNT_4 | 4U| |
| CDD_PWM_DC_EDGEFILT_EDGECNT_5 | 5U| |
| CDD_PWM_DC_EDGEFILT_EDGECNT_6 | 6U| |
| CDD_PWM_DC_EDGEFILT_EDGECNT_7 | 7U| |
**Brief**:
Digital Compare Edge Filter Edge Count types.
### enum Cdd_Pwm_EvtMixTriggerSourceType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_ETMIX_TBCTR_ZERO | 0U| |
| CDD_PWM_ETMIX_TBCTR_PERIOD | 1U| |
| CDD_PWM_ETMIX_TBCTR_U_CMPA | 2U| |
| CDD_PWM_ETMIX_TBCTR_D_CMPA | 3U| |
| CDD_PWM_ETMIX_TBCTR_U_CMPB | 4U| |
| CDD_PWM_ETMIX_TBCTR_D_CMPB | 5U| |
| CDD_PWM_ETMIX_TBCTR_U_CMPC | 6U| |
| CDD_PWM_ETMIX_TBCTR_D_CMPC | 7U| |
| CDD_PWM_ETMIX_TBCTR_U_CMPD | 8U| |
| CDD_PWM_ETMIX_TBCTR_D_CMPD | 9U| |
| CDD_PWM_ETMIX_DCAEVT1 | 10U| |
**Brief**:
Mixed Event Interrupt Source types.
### enum Cdd_Pwm_EtMixSignalSelectType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_ETMIX_INTERRUPT | 0x0U| |
| CDD_PWM_ETMIX_SOCA | 0x1U| |
| CDD_PWM_ETMIX_SOCB | 0x2U| |
**Brief**:
ET Mix Signal Select types.
### enum Cdd_Pwm_LockRegisterGroupType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_REGISTER_GROUP_GLOBAL_LOAD | 0x2U| |
| CDD_PWM_REGISTER_GROUP_TRIP_ZONE | 0x4U| |
| CDD_PWM_REGISTER_GROUP_TRIP_ZONE_CLEAR | 0x8U| |
| CDD_PWM_REGISTER_GROUP_DIGITAL_COMPARE | 0x10U| |
**Brief**:
Lock Register Group types.
### enum Cdd_Pwm_HrpwmMepEdgeModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_HRPWM_MEP_CTRL_DISABLE | 0U| |
| CDD_PWM_HRPWM_MEP_CTRL_RISING_EDGE | 1U| |
| CDD_PWM_HRPWM_MEP_CTRL_FALLING_EDGE | 2U| |
| CDD_PWM_HRPWM_MEP_CTRL_RISING_AND_FALLING_EDGE | 3U| |
**Brief**:
HRPWM MEP Edge Mode types.
### enum Cdd_Pwm_HrpwmMepCtrlModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_HRPWM_MEP_DUTY_PERIOD_CTRL | 0U| |
| CDD_PWM_HRPWM_MEP_PHASE_CTRL | 1U| |
**Brief**:
HRPWM MEP Control Mode types.
### enum Cdd_Pwm_HrpwmLoadModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_HRPWM_LOAD_ON_CNTR_ZERO | 0U| |
| CDD_PWM_HRPWM_LOAD_ON_CNTR_PERIOD | 1U| |
| CDD_PWM_HRPWM_LOAD_ON_CNTR_ZERO_PERIOD | 2U| |
| CDD_PWM_HRPWM_LOAD_ON_CMP_EQ | 3U| |
**Brief**:
HRPWM Load Mode types.
### enum Cdd_Pwm_HrpwmChannelBOutputType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_HRPWM_OUTPUT_ON_B_NORMAL | 0U| |
| CDD_PWM_HRPWM_OUTPUT_ON_B_INV_A | 1U| |
**Brief**:
HRPWM Channel B Output types.
### enum Cdd_Pwm_HrpwmSyncPulseSourceType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_HRPWM_PWMSYNC_SOURCE_PERIOD | 0U| |
| CDD_PWM_HRPWM_PWMSYNC_SOURCE_ZERO | 1U| |
| CDD_PWM_HRPWM_PWMSYNC_SOURCE_COMPC_UP | 4U| |
| CDD_PWM_HRPWM_PWMSYNC_SOURCE_COMPC_DOWN | 5U| |
| CDD_PWM_HRPWM_PWMSYNC_SOURCE_COMPD_UP | 6U| |
| CDD_PWM_HRPWM_PWMSYNC_SOURCE_COMPD_DOWN | 7U| |
**Brief**:
HRPWM Sync Pulse Source types.
### enum Cdd_Pwm_HrpwmMepDeadBandEdgeModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_HRPWM_DB_MEP_CTRL_DISABLE | 0U| |
| CDD_PWM_HRPWM_DB_MEP_CTRL_RED | 1U| |
| CDD_PWM_HRPWM_DB_MEP_CTRL_FED | 2U| |
| CDD_PWM_HRPWM_DB_MEP_CTRL_RED_FED | 3U| |
**Brief**:
HRPWM MEP Dead Band Edge Mode types.
### enum Cdd_Pwm_HrpwmLockRegisterGroupType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_HRPWM_REGISTER_GROUP_HRPWM | 0x1U| |
| CDD_PWM_HRPWM_REGISTER_GROUP_GLOBAL_LOAD | 0x2U| |
| CDD_PWM_HRPWM_REGISTER_GROUP_TRIP_ZONE | 0x4U| |
| CDD_PWM_HRPWM_REGISTER_GROUP_TRIP_ZONE_CLEAR | 0x8U| |
| CDD_PWM_HRPWM_REGISTER_GROUP_DIGITAL_COMPARE | 0x10U| |
**Brief**:
HRPWM Lock Register Group types.
### enum Cdd_Pwm_OutputSymmetryType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_PWM_ASYMMETRIC_WAVEFORM | | Asymmetric waveform. |
| CDD_PWM_SYMMETRIC_WAVEFORM | | Symmetric waveform. |
**Brief**:
Cdd_Pwm_OutputSymmetryType determines the symmetry of the output waveform of a PWM instance.
### typedef Cdd_Pwm_ChannelType
```
typedef uint8 Cdd_Pwm_ChannelType;
```
**Brief**:
Numeric Identifier of a PWM channel.
### typedef Cdd_Pwm_InstanceType
```
typedef uint8 Cdd_Pwm_InstanceType;
```
**Brief**:
Numeric Identifier of a PWM instance.
### typedef Cdd_Pwm_HrpwmCalInstanceType
```
typedef uint8 Cdd_Pwm_HrpwmCalInstanceType;
```
**Brief**:
Numeric Identifier of a HRPWMCAL instance.
### typedef Cdd_Pwm_PeriodType
```
typedef uint16 Cdd_Pwm_PeriodType;
```
**Brief**:
Period of the PWM instance.
### typedef Cdd_Pwm_DutyCycleType
```
typedef uint16 Cdd_Pwm_DutyCycleType;
```
**Brief**:
Duty cycle of the PWM channel.
### typedef Cdd_Pwm_NotificationType
```
typedef void(* Cdd_Pwm_NotificationType) (void);
```
**Brief**:
Notification function pointer.
### typedef Cdd_Pwm_TripZoneNotificationType
```
typedef void(* Cdd_Pwm_TripZoneNotificationType) (uint16 TripZoneFlag);
```
**Brief**:
Trip zone notification function pointer.
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Cdd_Pwm_HwUnitCfgType](../Classes/structCdd__Pwm__HwUnitCfgType.md)** | |
| **[Cdd_Pwm_ConfigType](../Classes/structCdd__Pwm__ConfigType.md)** | PWM driver configuration. |
## Defines
| Name | Brief |
| -------------- | ---------- |
| CDD_PWM_SYNC_OUT_SOURCE_M | |
| CDD_PWM_TZINT_SRC_MAX | |
| CDD_PWM_TZFLAG_MAX | |
| CDD_PWM_TZCBC_INTFLAGS_MAX | |
| CDD_PWM_TZOST_INTFLAGS_MAX | |
| CDD_PWM_TZFRC_FLAGS_MAX | |
| CDD_PWM_TZCAPEVTSIG_MAX | |
| CDD_PWM_AQEVT_ACTION_MAX | |
| CDD_PWM_ADDITIONAL_AQEVT_ACTION_MAX | |
| CDD_PWM_GLB_LOAD_MAX | |
| CDD_PWM_DC_TRIPINPUT_COMBO_MAX | |
| CDD_PWM_MAX_PHASESHIFT | |
| CDD_PWM_HRPWM_MAX_PHASESHIFT | |
| CDD_PWM_MAX_PERIOD | |
| CDD_PWM_HRPWM_MAX_PERIOD | |
| CDD_PWM_EDGECOUNT | |
| CDD_PWM_HRPWM_EDGECOUNT | |
| CDD_PWM_MEPCOUNT | |
| CDD_PWM_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| CDD_PWM_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| CDD_PWM_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| CDD_PWM_AR_RELEASE_MAJOR_VERSION | AUTOSAR Major version specification implemented by CDD_PWM Driver. |
| CDD_PWM_AR_RELEASE_MINOR_VERSION | AUTOSAR Minor version specification implemented by CDD_PWM Driver. |
| CDD_PWM_AR_RELEASE_REVISION_VERSION | AUTOSAR Patch version specification implemented by CDD_PWM Driver. |
| CDD_PWM_VENDOR_ID | Texas Instruments Vendor ID. |
| CDD_PWM_MODULE_ID | CDD PWM Driver Module ID. |
| CDD_PWM_INSTANCE_ID | CDD PWM Instance ID. |
| CDD_PWM_SID_INIT | Cdd_Pwm_Init() API Service ID. |
| CDD_PWM_SID_ENABLE_NOTIFICATION | Cdd_Pwm_EnableNotification() API Service ID. |
| CDD_PWM_SID_DISABLE_NOTIFICATION | Cdd_Pwm_DisableNotification() API Service ID. |
| CDD_PWM_SID_SET_INTEVTCOUNT | Cdd_Pwm_SetInterruptEventCount API Service ID. |
| CDD_PWM_SID_GET_VERSION_INFO | Cdd_Pwm_GetVersionInfo() API Service ID. |
| CDD_PWM_SID_SET_EMULATION_MODE | Cdd_Pwm_SetEmulationMode() API Service ID. |
| CDD_PWM_SID_CONFIGURE_TRIPZONE_NOTIFICATION | Cdd_Pwm_ConfigureTripZoneNotification() API Service ID. |
| CDD_PWM_SID_SET_TB_COUNTER | Cdd_Pwm_SetTimeBaseCounter() API Service ID. |
| CDD_PWM_SID_SET_COUNTMODE_AFTERSYNC | Cdd_Pwm_SetCountModeAfterSync() API Service ID. |
| CDD_PWM_SID_SET_CLOCKPRESCALE | Cdd_Pwm_SetClockPrescaler() API Service ID. |
| CDD_PWM_SID_FORCE_SYNC_PULSE | Cdd_Pwm_ForceSyncPulse() API Service ID. |
| CDD_PWM_SID_SET_SYNC_INPULSE_SOURCE | Cdd_Pwm_SetSyncInPulseSource() API Service ID. |
| CDD_PWM_SID_CONFIGURE_SYNCOUT_PULSE | Cdd_Pwm_ConfigureSyncOutPulseSource() API Service ID. |
| CDD_PWM_SID_SET_ONESHOT_SYNCOUT_TRIGGER | Cdd_Pwm_SetOneShotSyncOutTrigger() API Service ID. |
| CDD_PWM_SID_SET_PRDLOADMODE | Cdd_Pwm_SetPeriodLoadMode API Service ID. |
| CDD_PWM_SID_CONFIGURE_PHSSHIFTLOAD | Cdd_Pwm_ConfigurePhaseShiftLoad() API Service ID. |
| CDD_PWM_SID_SET_TBCOUNTERMODE | Cdd_Pwm_SetTimeBaseCounterMode() API Service ID. |
| CDD_PWM_SID_SELECT_PERIODLOADEVT | Cdd_Pwm_SelectPeriodLoadEvent() API Service ID. |
| CDD_PWM_SID_CONFIGURE_ONESHTSYNC | Cdd_Pwm_ConfigureOneShotSync() API Service ID. |
| CDD_PWM_SID_SET_START_ONESHTSYNC | Cdd_Pwm_StartOneShotSync() API Service ID. |
| CDD_PWM_SID_GET_TBCOUNTERVAL | Cdd_Pwm_GetTimeBaseCounterValue() API Service ID. |
| CDD_PWM_SID_GET_TBCOUNTER_OVFSTATUS | Cdd_Pwm_GetTimeBaseCounterOverflowStatus() API Service ID. |
| CDD_PWM_SID_CLEAR_TBOVFEVT | Cdd_Pwm_ClearTimeBaseCounterOverflowEvent() API Service ID. |
| CDD_PWM_SID_GETSYNCSTATUS | Cdd_Pwm_GetSyncStatus API Service ID. |
| CDD_PWM_SID_SET_CLEARSYNCEVT | Cdd_Pwm_ClearSyncEvent API Service ID. |
| CDD_PWM_SID_GET_TBCNTRDIRECTION | Cdd_Pwm_GetTimeBaseCounterDirection API Service ID. |
| CDD_PWM_SID_SET_PHASESHIFT | Cdd_Pwm_SetPhaseShift API Service ID. |
| CDD_PWM_SID_SET_TB_PERIOD | Cdd_Pwm_SetTimeBasePeriod API Service ID. |
| CDD_PWM_SID_GET_TB_PERIOD | Cdd_Pwm_GetTimeBasePeriod API Service ID. |
| CDD_PWM_SID_SET_CTRCMP_SHADOWLOADMODE | Cdd_Pwm_ConfigureEpwmXLink API Service ID. |
| CDD_PWM_SID_DISABLE_CTRCMP_SHADOWLOADMODE | Cdd_Pwm_DisableCounterCompareShadowLoadMode API Service ID. |
| CDD_PWM_SID_SET_CTRCMPVAL | Cdd_Pwm_SetCounterCompareValue API Service ID. |
| CDD_PWM_SID_GET_CTRCMPVAL | Cdd_Pwm_GetCounterCompareValue API Service ID. |
| CDD_PWM_SID_GET_CTRCMP_SHDSTATUS | Cdd_Pwm_GetCounterCompareShadowStatus API Service ID. |
| CDD_PWM_SID_CONFIGURE_LINKDUTYHR | Cdd_Pwm_ConfigureLinkDutyHR API Service ID. |
| CDD_PWM_SID_SET_AQSHDLOADMODE | Cdd_Pwm_SetActionQualifierShadowLoadMode API Service ID. |
| CDD_PWM_SID_DISABLE_AQSHDLOADMODE | Cdd_Pwm_DisableActionQualifierShadowLoadMode API Service ID. |
| CDD_PWM_SID_SET_AQT1TRIGSRC | Cdd_Pwm_SetActionQualifierT1TriggerSource API Service ID. |
| CDD_PWM_SID_SET_AQT2TRIGSRC | Cdd_Pwm_SetActionQualifierT2TriggerSource API Service ID. |
| CDD_PWM_SID_SET_AQACTION | Cdd_Pwm_SetActionQualifierAction API Service ID. |
| CDD_PWM_SID_SET_AQACTION_COMPLETE | Cdd_Pwm_SetActionQualifierActionComplete API Service ID. |
| CDD_PWM_SID_SET_ADDITIONALAQACTION_COMPLETE | Cdd_Pwm_SetAdditionalActionQualifierActionComplete API Service ID. |
| CDD_PWM_SID_SET_AQCNTSWFRC_SHDMODE | Cdd_Pwm_SetActionQualifierContSwForceShadowMode API Service ID. |
| CDD_PWM_SID_SET_AQCNTSWFRC_ACTION | Cdd_Pwm_SetActionQualifierContSwForceAction API Service ID. |
| CDD_PWM_SID_SET_AQSWACTION | Cdd_Pwm_SetActionQualifierSwAction API Service ID. |
| CDD_PWM_SID_FRC_AQSWACTION | Cdd_Pwm_ForceActionQualifierSwAction API Service ID. |
| CDD_PWM_SID_SET_DBOUTPUTSWAPMODE | Cdd_Pwm_SetDeadBandOutputSwapMode API Service ID. |
| CDD_PWM_SID_SET_DBODELAYMODE | Cdd_Pwm_SetDeadBandDelayMode API Service ID. |
| CDD_PWM_SID_SET_DBODELAY_POLARITY | Cdd_Pwm_SetDeadBandDelayPolarity API Service ID. |
| CDD_PWM_SID_SET_REDB_DELAYINPUT | Cdd_Pwm_SetRisingEdgeDeadBandDelayInput API Service ID. |
| CDD_PWM_SID_SET_FEDB_DELAYINPUT | Cdd_Pwm_SetFallingEdgeDeadBandDelayInput API Service ID. |
| CDD_PWM_SID_SET_DBCTL_SHDLOADMODE | Cdd_Pwm_SetDeadBandControlShadowLoadMode API Service ID. |
| CDD_PWM_SID_SET_RED_COUNTSHDLOADMODE | Cdd_Pwm_SetRisingEdgeDelayCountShadowLoadMode API Service ID. |
| CDD_PWM_SID_DISABLE_RED_COUNTSHDLOADMODE | Cdd_Pwm_DisableRisingEdgeDelayCountShadowLoadMode API Service ID. |
| CDD_PWM_SID_SET_FED_COUNTSHDLOADMODE | Cdd_Pwm_SetFallingEdgeDelayCountShadowLoadMode API Service ID. |
| CDD_PWM_SID_DISABLE_FED_COUNTSHDLOADMODE | Cdd_Pwm_DisableFallingEdgeDelayCountShadowLoadMode API Service ID. |
| CDD_PWM_SID_SET_DBCTRCLK | Cdd_Pwm_SetDeadBandCounterClock API Service ID. |
| CDD_PWM_SID_SET_REDCOUNT | Cdd_Pwm_SetRisingEdgeDelayCount API Service ID. |
| CDD_PWM_SID_SET_FEDCOUNT | Cdd_Pwm_SetFallingEdgeDelayCount API Service ID. |
| CDD_PWM_SID_CONFIGURE_CHOPPER | Cdd_Pwm_ConfigureChopper API Service ID. |
| CDD_PWM_SID_SET_CHOPPER_DC | Cdd_Pwm_SetChopperDutyCycle API Service ID. |
| CDD_PWM_SID_SET_CHOPPER_FREQ | Cdd_Pwm_SetChopperFreq API Service ID. |
| CDD_PWM_SID_SET_CHOPPER_FIRSTPULWIDTH | Cdd_Pwm_SetChopperFirstPulseWidth API Service ID. |
| CDD_PWM_SID_CONFIGURE_TZSIGNALS | Cdd_Pwm_ConfigureTripZoneSignals API Service ID. |
| CDD_PWM_SID_SET_TZDC_EVTCONDITION | Cdd_Pwm_SetTripZoneDigitalCompareEventCondition API Service ID. |
| CDD_PWM_SID_CONFIGURE_TZADVACTION | Cdd_Pwm_ConfigureTripZoneAdvAction API Service ID. |
| CDD_PWM_SID_SET_TZACTION | Cdd_Pwm_SetTripZoneAction API Service ID. |
| CDD_PWM_SID_SET_TZADVACTION | Cdd_Pwm_SetTripZoneAdvAction API Service ID. |
| CDD_PWM_SID_SET_TZADV_DCACTION | Cdd_Pwm_SetTripZoneAdvDigitalCompareAction API Service ID. |
| CDD_PWM_SID_CONFIGURE_TZINT | gCdd_Pwm_ConfigureTripZoneInterrupt API Service ID |
| CDD_PWM_SID_GET_TZFLAGSTATUS | Cdd_Pwm_GetTripZoneFlagStatus API Service ID. |
| CDD_PWM_SID_GET_CBCTZ_FLAGSTATUS | Cdd_Pwm_GetCycleByCycleTripZoneFlagStatus API Service ID. |
| CDD_PWM_SID_GET_OSTZ_FLAGSTATUS | Cdd_Pwm_GetOneShotTripZoneFlagStatus API Service ID. |
| CDD_PWM_SID_SELECT_CBCTZCLREVT | Cdd_Pwm_SelectCycleByCycleTripZoneClearEvent API Service ID. |
| CDD_PWM_SID_CLEAR_TZFLAG | Cdd_Pwm_ClearTripZoneFlag API Service ID. |
| CDD_PWM_SID_CLEAR_CBCTZFLAG | Cdd_Pwm_ClearCycleByCycleTripZoneFlag API Service ID. |
| CDD_PWM_SID_CLEAR_OSTZFLAG | Cdd_Pwm_ClearOneShotTripZoneFlag API Service ID. |
| CDD_PWM_SID_FORCE_TZEVT | Cdd_Pwm_ForceTripZoneEvent API Service ID. |
| CDD_PWM_SID_CONFIGURE_TRIPOUTSRC | Cdd_Pwm_ConfigureTripOutSource API Service ID. |
| CDD_PWM_SID_CONFIGURE_INTERRUPT | Cdd_Pwm_ConfigureInterrupt API Service ID. |
| CDD_PWM_SID_SET_INTSRC | Cdd_Pwm_SetInterruptSource API Service ID. |
| CDD_PWM_SID_GET_EVTTRIGINTSTATUS | Cdd_Pwm_GetEventTriggerInterruptStatus API Service ID. |
| CDD_PWM_SID_CLEAR_EVTTRIGINTFLAG | Cdd_Pwm_ClearEventTriggerInterruptFlag API Service ID. |
| CDD_PWM_SID_CONFIGURE_INTEVTCOUNTINIT | Cdd_Pwm_ConfigureInterruptEventCountInit API Service ID. |
| CDD_PWM_SID_FORCE_INTEVTCOUNTINIT | Cdd_Pwm_ForceInterruptEventCountInit API Service ID. |
| CDD_PWM_SID_SET_INTEVTCOUNTINITVAL | Cdd_Pwm_SetInterruptEventCountInitValue API Service ID. |
| CDD_PWM_SID_GET_INTEVTCNT | Cdd_Pwm_GetInterruptEventCount API Service ID. |
| CDD_PWM_SID_FORCE_EVTTRIGINT | Cdd_Pwm_ForceEventTriggerInterrupt API Service ID. |
| CDD_PWM_SID_SET_MIXEVTTRIGSRC | Cdd_Pwm_SetMixEvtTriggerSource API Service ID. |
| CDD_PWM_SID_CONFIGURE_ADCTRIG | Cdd_Pwm_ConfigureAdcTrigger API Service ID. |
| CDD_PWM_SID_SET_ADCTRIGSRC | Cdd_Pwm_SetAdcTriggerSource API Service ID. |
| CDD_PWM_SID_SET_ADCTRIGEVTPRESCALE | Cdd_Pwm_SetAdcTriggerEventPrescale API Service ID. |
| CDD_PWM_SID_GET_ADCTRIGFLAGSTATUS | Cdd_Pwm_GetAdcTriggerFlagStatus API Service ID. |
| CDD_PWM_SID_CLEAR_ADCTRIGFLAG | Cdd_Pwm_ClearAdcTriggerFlag API Service ID. |
| CDD_PWM_SID_CONFIGURE_ADCTRIGEVTCNTINIT | Cdd_Pwm_ConfigureAdcTriggerEventCountInit API Service ID. |
| CDD_PWM_SID_FORCE_ADCTRIGEVTCNTINIT | Cdd_Pwm_ForceAdcTriggerEventCountInit API Service ID. |
| CDD_PWM_SID_SET_ADCTRIGEVTCNTINITVAL | Cdd_Pwm_SetAdcTriggerEventCountInitValue API Service ID. |
| CDD_PWM_SID_GET_ADCTRIGEVTCNT | Cdd_Pwm_GetAdcTriggerEventCount API Service ID. |
| CDD_PWM_SID_FORCE_ADCTRIGGER | Cdd_Pwm_ForceAdcTrigger API Service ID. |
| CDD_PWM_SID_CONFIGURE_DC_BLANKWINDOW | Cdd_Pwm_ConfigureDigitalCompareBlankingWindow API Service ID. |
| CDD_PWM_SID_CONFIGURE_DC_WINDOWINVMODE | Cdd_Pwm_ConfigureDigitalCompareWindowInverseMode API Service ID. |
| CDD_PWM_SID_SET_DC_BLANKEVT | Cdd_Pwm_SetDigitalCompareBlankingEvent API Service ID. |
| CDD_PWM_SID_SET_DC_FILTERINPUT | Cdd_Pwm_SetDigitalCompareFilterInput API Service ID. |
| CDD_PWM_SID_CONFIGURE_DC_EDGEFILTER | Cdd_Pwm_ConfigureDigitalCompareEdgeFilter API Service ID. |
| CDD_PWM_SID_SET_DC_EDGEFILMODE | Cdd_Pwm_SetDigitalCompareEdgeFilterMode API Service ID. |
| CDD_PWM_SID_SET_DC_EDGEFILEDGECNT | Cdd_Pwm_SetDigitalCompareEdgeFilterEdgeCount API Service ID. |
| CDD_PWM_SID_GET_DC_EDGEFILEDGECNT | Cdd_Pwm_GetDigitalCompareEdgeFilterEdgeCount API Service ID. |
| CDD_PWM_SID_GET_DC_EDGEFILEDGESTATUS | Cdd_Pwm_GetDigitalCompareEdgeFilterEdgeStatus API Service ID. |
| CDD_PWM_SID_SET_DC_WINOFFSET | Cdd_Pwm_SetDigitalCompareWindowOffset API Service ID. |
| CDD_PWM_SID_SET_DC_WINLENGTH | Cdd_Pwm_SetDigitalCompareWindowLength API Service ID. |
| CDD_PWM_SID_GET_DC_BLANKWINOFFSETCNT | Cdd_Pwm_GetDigitalCompareBlankingWindowOffsetCount API Service ID. |
| CDD_PWM_SID_GET_DC_BLANKWINLENGTH | Cdd_Pwm_GetDigitalCompareBlankingWindowLengthCount API Service ID. |
| CDD_PWM_SID_SET_DC_EVTSOURCE | Cdd_Pwm_SetDigitalCompareEventSource API Service ID. |
| CDD_PWM_SID_SET_DC_EVTSYNCMODE | Cdd_Pwm_SetDigitalCompareEventSyncMode API Service ID. |
| CDD_PWM_SID_CONFIGURE_DC_ADCTRIG | Cdd_Pwm_ConfigureDigitalCompareAdcTrigger API Service ID. |
| CDD_PWM_SID_CONFIGURE_DC_SYNCEVENT | Cdd_Pwm_ConfigureDigitalCompareSyncEvent API Service ID. |
| CDD_PWM_SID_SET_DCCBC_LATCHMODE | Cdd_Pwm_SetDigitalCompareCBCLatchMode API Service ID. |
| CDD_PWM_SID_SET_DCCBC_LATCHCLREVT | Cdd_Pwm_SelectDigitalCompareCBCLatchClearEvent API Service ID. |
| CDD_PWM_SID_GET_DCCBC_LATCHSTATUS | Cdd_Pwm_GetDigitalCompareCBCLatchStatus API Service ID. |
| CDD_PWM_SID_CONFIGURE_DCCTRCAP | Cdd_Pwm_ConfigureDigitalCompareCounterCapture API Service ID. |
| CDD_PWM_SID_SET_DCCTRSHDMODE | Cdd_Pwm_SetDigitalCompareCounterShadowMode API Service ID. |
| CDD_PWM_SID_GET_DCCAPSTATUS | Cdd_Pwm_GetDigitalCompareCaptureStatus API Service ID. |
| CDD_PWM_SID_CONFIGURE_DCCTRCAPMODE | Cdd_Pwm_ConfigureDigitalCompareCounterCaptureMode API Service ID. |
| CDD_PWM_SID_CLEAR_DCCAPSTATUSFLAG | Cdd_Pwm_ClearDigitalCompareCaptureStatusFlag API Service ID. |
| CDD_PWM_SID_GET_DCCAPCNT | Cdd_Pwm_GetDigitalCompareCaptureCount API Service ID. |
| CDD_PWM_SID_CONFIGURE_DCTRIPCOMBINPUT | Cdd_Pwm_ConfigureDigitalCompareTripCombinationInput API Service ID. |
| CDD_PWM_SID_CONFIGURE_CAPINEVT | Cdd_Pwm_ConfigureCaptureInEvent API Service ID. |
| CDD_PWM_SID_CONFIGURE_CAPGATEINPUTPOL | Cdd_Pwm_ConfigCaptureGateInputPolarity API Service ID. |
| CDD_PWM_SID_INVERT_CAPGINPUTPOLARITY | Cdd_Pwm_InvertCaptureInputPolarity API Service ID. |
| CDD_PWM_SID_CONFIGURE_INDPULSELOGIC | Cdd_Pwm_ConfigureIndependentPulseLogic API Service ID. |
| CDD_PWM_SID_FRC_CAPEVTLOAD | Cdd_Pwm_ForceCaptureEventLoad API Service ID. |
| CDD_PWM_SID_SEL_CAPTRIPINPUT | Cdd_Pwm_SelectCaptureTripInput API Service ID. |
| CDD_PWM_SID_CONFIGURE_CAPTRIPCOMBINPUT | Cdd_Pwm_ConfigureCaptureTripCombinationInput API Service ID. |
| CDD_PWM_SID_CONFIGURE_VALLEYCAPTURE | Cdd_Pwm_ConfigureValleyCapture API Service ID. |
| CDD_PWM_SID_START_VALLEYCAPTURE | Cdd_Pwm_StartValleyCapture API Service ID. |
| CDD_PWM_SID_SET_VALLEYTRIGSRC | Cdd_Pwm_SetValleyTriggerSource API Service ID. |
| CDD_PWM_SID_SET_VALLEYTRIGEDGECNT | Cdd_Pwm_SetValleyTriggerEdgeCounts API Service ID. |
| CDD_PWM_SID_CONFIGURE_VALLEYHWDELAY | Cdd_Pwm_ConfigureValleyHwDelay API Service ID. |
| CDD_PWM_SID_SET_VALLEYSWDELAYVAL | Cdd_Pwm_SetValleySwDelayValue API Service ID. |
| CDD_PWM_SID_SET_VALLEYDELAYDIVIDER | Cdd_Pwm_SetValleyDelayDivider API Service ID. |
| CDD_PWM_SID_GET_VALLEYEDGESTATUS | Cdd_Pwm_GetValleyEdgeStatus API Service ID. |
| CDD_PWM_SID_GET_VALLEYCOUNT | Cdd_Pwm_GetValleyCount API Service ID. |
| CDD_PWM_SID_GET_VALLEYHWDELAY | Cdd_Pwm_GetValleyHwDelay API Service ID. |
| CDD_PWM_SID_CONFIGURE_GLBLOAD | Cdd_Pwm_ConfigureGlobalLoad API Service ID. |
| CDD_PWM_SID_SET_GLBLOADTRIG | Cdd_Pwm_SetGlobalLoadTrigger API Service ID. |
| CDD_PWM_SID_SET_GLBLOADEVTPRESCALE | Cdd_Pwm_SetGlobalLoadEventPrescale API Service ID. |
| CDD_PWM_SID_GET_GLBLOADEVTCNT | Cdd_Pwm_GetGlobalLoadEventCount API Service ID. |
| CDD_PWM_SID_SET_GLBLOADOSLATCH | Cdd_Pwm_SetGlobalLoadOneShotLatch API Service ID. |
| CDD_PWM_SID_CONFIGURE_GLBLOADOSMODE | Cdd_Pwm_ConfigureGlobalLoadOneShotMode API Service ID. |
| CDD_PWM_SID_FRC_GLBLOADOSEVT | Cdd_Pwm_ForceGlobalLoadOneShotEvent API Service ID. |
| CDD_PWM_SID_CONFIGURE_GLBLOADREG | Cdd_Pwm_ConfigureGlobalLoadRegisters API Service ID. |
| CDD_PWM_SID_LOCKREGISTER | Cdd_Pwm_LockRegisters API Service ID. |
| CDD_PWM_SID_CONFIGURE_XCMPMODE | Cdd_Pwm_ConfigureXCmpMode API Service ID. |
| CDD_PWM_SID_CONFIGURE_SPLICTXCMP | Cdd_Pwm_ConfigureSplitXCmp API Service ID. |
| CDD_PWM_SID_ALLOC_AXCMP | Cdd_Pwm_AllocAXCmp API Service ID. |
| CDD_PWM_SID_ALLOC_BXCMP | Cdd_Pwm_AllocBXCmp API Service ID. |
| CDD_PWM_SID_SET_XCMPREGVAL | Cdd_Pwm_SetXCmpRegValue API Service ID. |
| CDD_PWM_SID_SET_CMPSHDREGVAL | Cdd_Pwm_SetCmpShadowRegValue API Service ID. |
| CDD_PWM_SID_SET_XMINMAXREGVAL | Cdd_Pwm_SetXMinMaxRegValue API Service ID. |
| CDD_PWM_SID_SET_XCMPAQACTION | Cdd_Pwm_SetXCmpActionQualifierAction API Service ID. |
| CDD_PWM_SID_ENABLE_XLOAD | Cdd_Pwm_EnableXLoad API Service ID. |
| CDD_PWM_SID_FRC_XLOAD | Cdd_Pwm_ForceXLoad API Service ID. |
| CDD_PWM_SID_SET_XCMPLOADMODE | Cdd_Pwm_SetXCmpLoadMode API Service ID. |
| CDD_PWM_SID_SET_XCMPSHDMODE | Cdd_Pwm_SetXCmpShadowLevel API Service ID. |
| CDD_PWM_SID_SET_XCMPSHDBUFPTR_LOADONCE | Cdd_Pwm_SetXCmpShadowBufPtrLoadOnce API Service ID. |
| CDD_PWM_SID_SET_XCMPSHD_REPBUFCOUNT | Cdd_Pwm_SetXCmpShadowRepeatBufxCount API Service ID. |
| CDD_PWM_SID_CONFIGURE_MINDB | Cdd_Pwm_ConfigureMinimumDeadBand API Service ID. |
| CDD_PWM_SID_INVERT_MINDB | Cdd_Pwm_InvertMinimumDeadBandSignal API Service ID. |
| CDD_PWM_SID_SELECT_MINDB_ANDOR_LOGIC | Cdd_Pwm_SelectMinimumDeadBandAndOrLogic API Service ID. |
| CDD_PWM_SID_SELECT_MINDB_BLOCKSIGNAL | Cdd_Pwm_SelectMinimumDeadBandBlockingSignal API Service ID. |
| CDD_PWM_SID_SET_MINDB_BANDREFSIGNAL | Cdd_Pwm_SelectMinimumDeadBandReferenceSignal API Service ID. |
| CDD_PWM_SID_DISABLE_DBCTL_SHDLOADMODE | Cdd_Pwm_DisableDeadBandControlShadowLoadMode API Service ID. |
| CDD_PWM_SID_GET_MINDB_DELAY | Cdd_Pwm_GetMinDeadBandDelay API Service ID. |
| CDD_PWM_SID_SET_MINDB_DELAY | Cdd_Pwm_SetMinimumDeadBandDelay API Service ID. |
| CDD_PWM_SID_SEL_DCTRIPINPUT | Cdd_Pwm_SelectDigitalCompareTripInput API Service ID. |
| CDD_PWM_SID_CONFIGURE_ICL | Cdd_Pwm_ConfigureIllegalComboLogic API Service ID. |
| CDD_PWM_SID_SELECT_XBARINPUT | Cdd_Pwm_SelectXbarInput API Service ID. |
| CDD_PWM_SID_SET_LUTDECX | Cdd_Pwm_SetLutDecX API Service ID. |
| CDD_PWM_SID_CONFIGURE_DEMODE | Cdd_Pwm_ConfigureDiodeEmulationMode API Service ID. |
| CDD_PWM_SID_SET_DEMODE | Cdd_Pwm_SetDiodeEmulationMode API Service ID. |
| CDD_PWM_SID_SET_DE_REENTRYDELAY | Cdd_Pwm_SetDiodeEmulationReentryDelay API Service ID. |
| CDD_PWM_SID_CONFIGURE_DE_TRIPLOWSRC | Cdd_Pwm_ConfigureDiodeEmulationTripLowSources API Service ID. |
| CDD_PWM_SID_CONFIGURE_DE_TRIPHIGHSRC | Cdd_Pwm_ConfigureDiodeEmulationTripHighSources API Service ID. |
| CDD_PWM_SID_SET_DEPWMSIGNAL | Cdd_Pwm_SelectDiodeEmulationPwmSignal API Service ID. |
| CDD_PWM_SID_SET_DETRIPSIG | Cdd_Pwm_SelectDiodeEmulationTripSignal API Service ID. |
| CDD_PWM_SID_NBPDELOGIC | Cdd_Pwm_NoBypassDiodeEmulationLogic API Service ID. |
| CDD_PWM_SID_BPDELOGIC | Cdd_Pwm_ByPassDiodeEmulationLogic API Service ID. |
| CDD_PWM_SID_FORCE_DE_ACTIVE | Cdd_Pwm_ForceDiodeEmulationActive API Service ID. |
| CDD_PWM_SID_CONFIGURE_DEMONITORMODECTRL | Cdd_Pwm_ConfigureDiodeEmulationMonitorModeControl API Service ID. |
| CDD_PWM_SID_SET_DEMONITORMODESTEP | Cdd_Pwm_SetDiodeEmulationMonitorModeStep API Service ID. |
| CDD_PWM_SID_SET_DE_MONITORCNTRTHRESHOLD | Cdd_Pwm_SetDiodeEmulationMonitorCounterThreshold API Service ID. |
| CDD_PWM_SID_CLEARDEACTIVEFLAG | Cdd_Pwm_ClearDiodeEmulationActiveFlag API Service ID. |
| CDD_PWM_SID_SET_HRPWM_PHASESHIFT | Cdd_Pwm_HrpwmSetPhaseShift API Service ID. |
| CDD_PWM_SID_SET_HRPWM_HIRESSHIFT | Cdd_Pwm_HrpwmSetHiResPhaseShiftOnly API Service ID. |
| CDD_PWM_SID_SET_HRPWM_TBPRD | Cdd_Pwm_HrpwmSetTimeBasePeriod API Service ID. |
| CDD_PWM_SID_SET_HRPWM_HIRESTBPRD | Cdd_Pwm_HrpwmSetHiResTimeBasePeriodOnly API Service ID. |
| CDD_PWM_GET_HRPWM_TBPRD | Cdd_Pwm_HrpwmGetTimeBasePeriod API Service ID. |
| CDD_PWM_GET_HRPWM_HIRESTBPRD | Cdd_Pwm_HrpwmGetHiResTimeBasePeriodOnly API Service ID. |
| CDD_PWM_SET_HRPWM_MEPEDGESELECT | Cdd_Pwm_HrpwmSetMepEdgeSelect API Service ID. |
| CDD_PWM_SID_SET_HRPWM_MEPCTLMODE | Cdd_Pwm_HrpwmSetMepControlMode API Service ID. |
| CDD_PWM_SID_SET_HRPWM_SETCTRCMPSHDLOADEVT | Cdd_Pwm_HrpwmSetCounterCompareShadowLoadEvent API Service ID. |
| CDD_PWM_SID_SET_HRPWM_SETOUTPUTSWAPMODE | Cdd_Pwm_HrpwmSetOutputSwapMode API Service ID. |
| CDD_PWM_SID_SET_HRPWM_SETCHANNELBOUTPATH | Cdd_Pwm_HrpwmSetChannelBOutputPath API Service ID. |
| CDD_PWM_SID_CONFIGURE_HRPWM_AUTOCONVERSION | Cdd_Pwm_HrpwmConfigureAutoConversion API Service ID. |
| CDD_PWM_SID_SET_CONFIGURE_HRPWMPRDCONTROL | Cdd_Pwm_HrpwmConfigurePeriodControl API Service ID. |
| CDD_PWM_SID_SET_CONFIGURE_HRPWM_PHSSHIFTLOAD | Cdd_Pwm_PrivHrpwmConfigurePhaseShiftLoad API Service ID. |
| CDD_PWM_SID_SET_HRPWM_SYNCPULSESRC | Cdd_Pwm_HrpwmSetSyncPulseSource API Service ID. |
| CDD_PWM_SID_SET_HRPWM_TRANSREM | Cdd_Pwm_HrpwmSetTranslatorRemainder API Service ID. |
| CDD_PWM_SID_SET_HRPWMCTRCMP | Cdd_Pwm_HrpwmSetCounterCompareValue API Service ID. |
| CDD_PWM_SID_SET_HRPWM_HIRESCTRCMP | Cdd_Pwm_HrpwmSetHiResCounterCompareValueOnly API Service ID. |
| CDD_PWM_SID_GET_HRPWM_CTRCMPVAL | Cdd_Pwm_HrpwmGetCounterCompareValue API Service ID. |
| CDD_PWM_SID_GET_HRPWM_HIRESCTRCMPVAL | Cdd_Pwm_GetHiResCounterCompareValueOnly API Service ID. |
| CDD_PWM_SID_SET_HRPWM_RED | Cdd_Pwm_HrpwmSetRisingEdgeDelay API Service ID. |
| CDD_PWM_SID_SET_HRPWM_HIRESRED | Cdd_Pwm_HrpwmSetHiResRisingEdgeDelayOnly API Service ID. |
| CDD_PWM_SID_SET_HRPWM_FED | Cdd_Pwm_HrpwmSetFallingEdgeDelay API Service ID. |
| CDD_PWM_SID_SET_HRPWM_HIRESFED | Cdd_Pwm_HrpwmSetHiResFallingEdgeDelayOnly API Service ID. |
| CDD_PWM_SID_SET_HRPWM_MEPSTEP | Cdd_Pwm_HrpwmSetMepStep API Service ID. |
| CDD_PWM_SID_SET_HRPWM_DBMEPEDGESEL | Cdd_Pwm_HrpwmSetDeadbandMepEdgeSelect API Service ID. |
| CDD_PWM_SID_SET_HRPWM_REDLOADMODE | Cdd_Pwm_HrpwmSetRisingEdgeDelayLoadMode API Service ID. |
| CDD_PWM_SID_SET_HRPWM_FEDLOADMODE | Cdd_Pwm_HrpwmSetFallingEdgeDelayLoadMode API Service ID. |
| CDD_PWM_SID_SET_HRPWM_LOCKREGISTER | Cdd_Pwm_HrpwmLockRegisters API Service ID. |
| CDD_PWM_SID_SET_HRPWM_XCMPREGVAL | Cdd_Pwm_HrpwmSetXCmpRegValue API Service ID. |
| CDD_PWM_SID_SET_HRPWM_HIRESXCMPREGVAL | Cdd_Pwm_HrpwmSetHiResXCmpRegValueOnly API Service ID. |
| CDD_PWM_SID_CONFIGURE_TZ2SIGNALS | Cdd_Pwm_ConfigureTripZone2Signals API Service ID. |
| CDD_PWM_SID_SFO | Cdd_Pwm_Sfo API Service ID. |
| CDD_PWM_E_UNINIT | API service used without module initialization. |
| CDD_PWM_E_ALREADY_INITIALIZED | API Cdd_Pwm_Init service called while the PWM driver has already been initialized. |
| CDD_PWM_E_INVALID_ID | API service called with invalid parameter ID. |
| CDD_PWM_E_NOTIF_CAPABILITY | Enable/disable notification function for a PWM instance whose configuration set has no notification available. |
| CDD_PWM_E_PARAM_POINTER | API service called with invalid pointer. |
| CDD_PWM_E_INVALID_VALUE | API service called when the event count is invalid/out-of-range. |
| CDD_PWM_E_INVALID_OUTPUT_CHANNEL | API service called with invalid parameter ID. |
| CDD_PWM_E_INVALID_PRESCALE | API service called with invalid value. |
| CDD_PWM_E_INVALID_CTRCOMPARE | API service called with invalid value. |
| CDD_PWM_E_INVALID_EVENT | API service called with invalid value. |
| CDD_PWM_E_INVALID_POLARITY | API service called with invalid value. |
| CDD_PWM_E_INVALID_ADCSOC_TYPE | API service called with invalid value. |
| CDD_PWM_E_INVALID_EVENT_SRC | API service called with invalid value. |
| CDD_PWM_E_INVALID_SHDSET | API service called with invalid value. |
| CDD_PWM_CFG_MAJOR_VERSION | |
| CDD_PWM_CFG_MINOR_VERSION | |
| CDD_PWM_CFG_PATCH_VERSION | |
| CDD_PWM_PRE_COMPILE_VARIANT | |
| CDD_PWM_CONFIG_PC | |
| CDD_PWM_ADVANCED_MODE_API | |
| CDD_PWM_INSTANCE_COUNT | |
| CDD_PWM_COUNT | |
| CDD_PWM_INTEVT_COUNT | |
| CDD_PWM_DEV_ERROR_DETECT | |
| CDD_PWM_CHANNEL_COUNT | |
| CDD_PWM_SET_OUTPUT_TO_IDLE_API | |
| CDD_PWM_SET_PERIOD_API | |
| CDD_PWM_SET_DUTY_CYCLE_API | |
| CDD_PWM_DEINIT_API | |
| CDD_PWM_VERSION_INFO_API | |
| CDD_PWM_NOTIFICATION_SUPPORTED | |
| CddPwmConf_CddPwmHwUnitConfig_CddPwmHwUnitConfig_0 | |
| CddPwmConf_CddPwmOutputChannel_CddPwmOutputChannel_0 | |
| CddPwmConf_CddPwmOutputChannel_CddPwmOutputChannel_1 | |
| CddPwmConf_CddPwmHwUnitConfig_CddPwmHwUnitConfig_1 | |
| CddPwmConf_CddPwmOutputChannel_CddPwmOutputChannel_2 | |
| CddPwmConf_CddPwmOutputChannel_CddPwmOutputChannel_3 | |
| CDD_PWM1_INT_ENABLE | |
| CDD_PWM1_ISR_CAT1_RTINT | |
| CDD_PWM2_INT_ENABLE | |
| CDD_PWM2_ISR_CAT1_RTINT | |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Cdd_Pwm_Init](../Modules/group__CDD__PWM.md#function-cdd_pwm_init)**(const [Cdd_Pwm_ConfigType](../Classes/structCdd__Pwm__ConfigType.md) * CfgPtr)| Service to initialize Cdd Pwm driver. |
| void | **[Cdd_Pwm_GetVersionInfo](../Modules/group__CDD__PWM.md#function-cdd_pwm_getversioninfo)**(Std_VersionInfoType * VersionInfo)| service that returns the version information of the module |
| void | **[Cdd_Pwm_EnableNotification](../Modules/group__CDD__PWM.md#function-cdd_pwm_enablenotification)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Service to enable the PWM signal edge notification according to notification parameter. |
| void | **[Cdd_Pwm_DisableNotification](../Modules/group__CDD__PWM.md#function-cdd_pwm_disablenotification)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Service to disable the PWM signal edge notification. |
| void | **[Cdd_Pwm_ConfigureTripZoneNotification](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuretripzonenotification)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Service to configure trip zone notification. |
| void | **[Cdd_Pwm_SetInterruptEventCount](../Modules/group__CDD__PWM.md#function-cdd_pwm_setinterrupteventcount)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 EventCount)| Sets the EPWM interrupt event counts. |
| void | **[Cdd_Pwm_SetEmulationMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_setemulationmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, Cdd_Pwm_EmulationModeType EmulationMode)| Service to set emulation mode. |
| void | **[Cdd_Pwm_SetTimeBaseCounter](../Modules/group__CDD__PWM.md#function-cdd_pwm_settimebasecounter)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 Count)| Set the time base count. |
| void | **[Cdd_Pwm_SetCountModeAfterSync](../Modules/group__CDD__PWM.md#function-cdd_pwm_setcountmodeaftersync)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_SyncCountModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_synccountmodetype) Mode)| Set count mode after phase shift sync. |
| void | **[Cdd_Pwm_SetClockPrescaler](../Modules/group__CDD__PWM.md#function-cdd_pwm_setclockprescaler)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, Cdd_Pwm_ClockDividerType Prescaler, Cdd_Pwm_HighSpeedClkDivType HighSpeedPrescaler)| Set the time base clock and the high speed time base clock count pre-scaler. |
| void | **[Cdd_Pwm_ForceSyncPulse](../Modules/group__CDD__PWM.md#function-cdd_pwm_forcesyncpulse)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Force a software sync pulse. |
| void | **[Cdd_Pwm_SetSyncInPulseSource](../Modules/group__CDD__PWM.md#function-cdd_pwm_setsyncinpulsesource)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, Cdd_Pwm_SyncInPulseSourceType Source)| Set up the source for sync-in pulse. |
| void | **[Cdd_Pwm_ConfigureSyncOutPulseSource](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuresyncoutpulsesource)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, Cdd_Pwm_SyncOutPulseSourceType Source, boolean Select)| Enables sync-out pulse source. |
| void | **[Cdd_Pwm_SetOneShotSyncOutTrigger](../Modules/group__CDD__PWM.md#function-cdd_pwm_setoneshotsyncouttrigger)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OneShotSyncOutTriggerType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_oneshotsyncouttriggertype) Trigger)| Set up the one-shot sync-out trigger source. |
| void | **[Cdd_Pwm_SetPeriodLoadMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_setperiodloadmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_PeriodLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_periodloadmodetype) LoadMode)| Set PWM period load mode. |
| void | **[Cdd_Pwm_ConfigurePhaseShiftLoad](../Modules/group__CDD__PWM.md#function-cdd_pwm_configurephaseshiftload)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable phase shift load. |
| void | **[Cdd_Pwm_SetTimeBaseCounterMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_settimebasecountermode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_TimeBaseCountModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_timebasecountmodetype) CounterMode)| Set time base counter mode. |
| void | **[Cdd_Pwm_SelectPeriodLoadEvent](../Modules/group__CDD__PWM.md#function-cdd_pwm_selectperiodloadevent)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_PeriodShadowLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_periodshadowloadmodetype) ShadowLoadMode)| Set shadow to active period load on sync mode. |
| void | **[Cdd_Pwm_ConfigureOneShotSync](../Modules/group__CDD__PWM.md#function-cdd_pwm_configureoneshotsync)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disable one shot sync mode. |
| void | **[Cdd_Pwm_StartOneShotSync](../Modules/group__CDD__PWM.md#function-cdd_pwm_startoneshotsync)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Start one shot sync mode. |
| uint16 | **[Cdd_Pwm_GetTimeBaseCounterValue](../Modules/group__CDD__PWM.md#function-cdd_pwm_gettimebasecountervalue)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Returns time base counter value. |
| boolean | **[Cdd_Pwm_GetTimeBaseCounterOverflowStatus](../Modules/group__CDD__PWM.md#function-cdd_pwm_gettimebasecounteroverflowstatus)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Return time base counter maximum status. |
| void | **[Cdd_Pwm_ClearTimeBaseCounterOverflowEvent](../Modules/group__CDD__PWM.md#function-cdd_pwm_cleartimebasecounteroverflowevent)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Clear max time base counter event. |
| boolean | **[Cdd_Pwm_GetSyncStatus](../Modules/group__CDD__PWM.md#function-cdd_pwm_getsyncstatus)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Return external sync signal status. |
| void | **[Cdd_Pwm_ClearSyncEvent](../Modules/group__CDD__PWM.md#function-cdd_pwm_clearsyncevent)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Clear external sync signal event. |
| uint16 | **[Cdd_Pwm_GetTimeBaseCounterDirection](../Modules/group__CDD__PWM.md#function-cdd_pwm_gettimebasecounterdirection)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Return time base counter direction. |
| void | **[Cdd_Pwm_SetPhaseShift](../Modules/group__CDD__PWM.md#function-cdd_pwm_setphaseshift)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 PhaseCount)| Sets the phase shift offset counter value. |
| void | **[Cdd_Pwm_SetTimeBasePeriod](../Modules/group__CDD__PWM.md#function-cdd_pwm_settimebaseperiod)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 PeriodCount)| Sets the PWM period count. |
| uint16 | **[Cdd_Pwm_GetTimeBasePeriod](../Modules/group__CDD__PWM.md#function-cdd_pwm_gettimebaseperiod)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Gets the PWM period count. |
| void | **[Cdd_Pwm_SetCounterCompareShadowLoadMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_setcountercompareshadowloadmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, Cdd_Pwm_CounterCompareModuleType CompModule, [Cdd_Pwm_CounterCompareLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_countercompareloadmodetype) LoadMode)| Sets up the Counter Compare shadow load mode. |
| void | **[Cdd_Pwm_DisableCounterCompareShadowLoadMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_disablecountercompareshadowloadmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, Cdd_Pwm_CounterCompareModuleType CompModule)| Disables counter compare shadow load mode. |
| void | **[Cdd_Pwm_SetCounterCompareValue](../Modules/group__CDD__PWM.md#function-cdd_pwm_setcountercomparevalue)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, Cdd_Pwm_CounterCompareModuleType CompModule, uint16 CompCount)| Sets counter compare values. |
| uint16 | **[Cdd_Pwm_GetCounterCompareValue](../Modules/group__CDD__PWM.md#function-cdd_pwm_getcountercomparevalue)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, Cdd_Pwm_CounterCompareModuleType CompModule)| Gets counter compare values. |
| boolean | **[Cdd_Pwm_GetCounterCompareShadowStatus](../Modules/group__CDD__PWM.md#function-cdd_pwm_getcountercompareshadowstatus)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel)| Returns the counter compare shadow register full status. |
| void | **[Cdd_Pwm_ConfigureLinkDutyHR](../Modules/group__CDD__PWM.md#function-cdd_pwm_configurelinkdutyhr)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disables CMPAHR, CMPBHR register linking. |
| void | **[Cdd_Pwm_SetActionQualifierShadowLoadMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_setactionqualifiershadowloadmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_ActionQualifierLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifierloadmodetype) LoadMode)| Sets the Action Qualifier shadow load mode. |
| void | **[Cdd_Pwm_DisableActionQualifierShadowLoadMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_disableactionqualifiershadowloadmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel)| Disables Action Qualifier shadow load mode. |
| void | **[Cdd_Pwm_SetActionQualifierT1TriggerSource](../Modules/group__CDD__PWM.md#function-cdd_pwm_setactionqualifiert1triggersource)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_ActionQualifierTriggerSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifiertriggersourcetype) Trigger)| Sets up Action qualifier trigger source for event T1. |
| void | **[Cdd_Pwm_SetActionQualifierT2TriggerSource](../Modules/group__CDD__PWM.md#function-cdd_pwm_setactionqualifiert2triggersource)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_ActionQualifierTriggerSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifiertriggersourcetype) Trigger)| Sets up Action qualifier trigger source for event T2. |
| void | **[Cdd_Pwm_SetActionQualifierAction](../Modules/group__CDD__PWM.md#function-cdd_pwm_setactionqualifieraction)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) EpwmOutput, [Cdd_Pwm_ActionQualifierOutputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifieroutputtype) Output, [Cdd_Pwm_ActionQualifierOutputEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifieroutputeventtype) Event)| Sets up Action qualifier outputs. |
| void | **[Cdd_Pwm_SetActionQualifierActionComplete](../Modules/group__CDD__PWM.md#function-cdd_pwm_setactionqualifieractioncomplete)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_ActionQualifierEventActionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifiereventactiontype) Action)| |
| void | **[Cdd_Pwm_SetAdditionalActionQualifierActionComplete](../Modules/group__CDD__PWM.md#function-cdd_pwm_setadditionalactionqualifieractioncomplete)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_AdditionalActionQualifierEventActionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_additionalactionqualifiereventactiontype) Action)| Sets up Additional action qualifier event outputs. |
| void | **[Cdd_Pwm_SetActionQualifierContSwForceShadowMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_setactionqualifiercontswforceshadowmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_ActionQualifierContForceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifiercontforcetype) Mode)| Sets up Action qualifier continuous software load mode. |
| void | **[Cdd_Pwm_SetActionQualifierContSwForceAction](../Modules/group__CDD__PWM.md#function-cdd_pwm_setactionqualifiercontswforceaction)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_ActionQualifierSwOutputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifierswoutputtype) Output)| Triggers a continuous software forced event. |
| void | **[Cdd_Pwm_SetActionQualifierSwAction](../Modules/group__CDD__PWM.md#function-cdd_pwm_setactionqualifierswaction)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_ActionQualifierOutputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifieroutputtype) Output)| Sets up one time software forced Action qualifier outputs. |
| void | **[Cdd_Pwm_ForceActionQualifierSwAction](../Modules/group__CDD__PWM.md#function-cdd_pwm_forceactionqualifierswaction)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel)| Triggers a one time software forced event on Action qualifier. |
| void | **[Cdd_Pwm_SetDeadBandOutputSwapMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdeadbandoutputswapmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, boolean EnableSwapMode)| Sets Dead Band signal output swap mode. |
| void | **[Cdd_Pwm_SetDeadBandDelayMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdeadbanddelaymode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_DeadBandDelayModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_deadbanddelaymodetype) DelayMode, boolean EnableDelayMode)| Sets Dead Band signal output mode. |
| void | **[Cdd_Pwm_SetDeadBandDelayPolarity](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdeadbanddelaypolarity)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_DeadBandDelayModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_deadbanddelaymodetype) DelayMode, [Cdd_Pwm_DeadBandPolarityType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_deadbandpolaritytype) Polarity)| Sets Dead Band delay polarity. |
| void | **[Cdd_Pwm_SetRisingEdgeDeadBandDelayInput](../Modules/group__CDD__PWM.md#function-cdd_pwm_setrisingedgedeadbanddelayinput)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel)| Sets Rising Edge Dead Band delay input. |
| void | **[Cdd_Pwm_SetFallingEdgeDeadBandDelayInput](../Modules/group__CDD__PWM.md#function-cdd_pwm_setfallingedgedeadbanddelayinput)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_DeadBandDelayInputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_deadbanddelayinputtype) Input)| Sets Dead Band delay input. |
| void | **[Cdd_Pwm_SetDeadBandControlShadowLoadMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdeadbandcontrolshadowloadmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_DeadBandControlLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_deadbandcontrolloadmodetype) LoadMode)| Set the Dead Band control shadow load mode. |
| void | **[Cdd_Pwm_DisableDeadBandControlShadowLoadMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_disabledeadbandcontrolshadowloadmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Disable Dead Band control shadow load mode. |
| void | **[Cdd_Pwm_SetRisingEdgeDelayCountShadowLoadMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_setrisingedgedelaycountshadowloadmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_DeadBandDelayLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_deadbanddelayloadmodetype) LoadMode)| Set the RED (Rising Edge Delay) shadow load mode. |
| void | **[Cdd_Pwm_DisableRisingEdgeDelayCountShadowLoadMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_disablerisingedgedelaycountshadowloadmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Disable the RED (Rising Edge Delay) shadow load mode. |
| void | **[Cdd_Pwm_SetFallingEdgeDelayCountShadowLoadMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_setfallingedgedelaycountshadowloadmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_DeadBandDelayLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_deadbanddelayloadmodetype) LoadMode)| Set the FED (Falling Edge Delay) shadow load mode. |
| void | **[Cdd_Pwm_DisableFallingEdgeDelayCountShadowLoadMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_disablefallingedgedelaycountshadowloadmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Disables the FED (Falling Edge Delay) shadow load mode. |
| void | **[Cdd_Pwm_SetDeadBandCounterClock](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdeadbandcounterclock)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_DeadBandClockModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_deadbandclockmodetype) ClockMode)| Sets Dead Band Counter clock rate. |
| void | **[Cdd_Pwm_SetRisingEdgeDelayCount](../Modules/group__CDD__PWM.md#function-cdd_pwm_setrisingedgedelaycount)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 RedCount)| Set EPWM RED count. |
| void | **[Cdd_Pwm_SetFallingEdgeDelayCount](../Modules/group__CDD__PWM.md#function-cdd_pwm_setfallingedgedelaycount)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 FedCount)| Set EPWM FED count. |
| void | **[Cdd_Pwm_ConfigureChopper](../Modules/group__CDD__PWM.md#function-cdd_pwm_configurechopper)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disable chopper mode. |
| void | **[Cdd_Pwm_SetChopperDutyCycle](../Modules/group__CDD__PWM.md#function-cdd_pwm_setchopperdutycycle)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 DutyCycleCount)| Set chopper duty cycle. |
| void | **[Cdd_Pwm_SetChopperFreq](../Modules/group__CDD__PWM.md#function-cdd_pwm_setchopperfreq)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 FreqDiv)| Set chopper clock frequency scaler. |
| void | **[Cdd_Pwm_SetChopperFirstPulseWidth](../Modules/group__CDD__PWM.md#function-cdd_pwm_setchopperfirstpulsewidth)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 FirstPulseWidth)| Set chopper first pulse width. |
| void | **[Cdd_Pwm_ConfigureTripZoneSignals](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuretripzonesignals)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_TzSignalType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tzsignaltype) TzSignal, boolean Select)| Enable/disables Trip Zone signal. |
| void | **[Cdd_Pwm_ConfigureTripZone2Signals](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuretripzone2signals)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_TzCapEvtType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tzcapevttype) TzSignal, boolean Select)| |
| void | **[Cdd_Pwm_SetTripZoneDigitalCompareEventCondition](../Modules/group__CDD__PWM.md#function-cdd_pwm_settripzonedigitalcompareeventcondition)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_TripZoneDigitalCompareOutputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzonedigitalcompareoutputtype) DcType, [Cdd_Pwm_TripZoneDigitalCompareOutputEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzonedigitalcompareoutputeventtype) DcEvent)| Set Digital compare conditions that cause Trip Zone event. |
| void | **[Cdd_Pwm_ConfigureTripZoneAdvAction](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuretripzoneadvaction)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disable advanced Trip Zone event Action. |
| void | **[Cdd_Pwm_SetTripZoneAction](../Modules/group__CDD__PWM.md#function-cdd_pwm_settripzoneaction)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_TripZoneActionEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzoneactioneventtype) TzEvent, [Cdd_Pwm_TripZoneActionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzoneactiontype) TzAction)| Set Trip Zone Action. |
| void | **[Cdd_Pwm_SetTripZoneAdvAction](../Modules/group__CDD__PWM.md#function-cdd_pwm_settripzoneadvaction)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_TripZoneAdvancedEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzoneadvancedeventtype) TzAdvEvent, [Cdd_Pwm_TripZoneAdvancedActionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzoneadvancedactiontype) TzAdvAction)| Set Advanced Trip Zone Action. |
| void | **[Cdd_Pwm_SetTripZoneAdvDigitalCompareAction](../Modules/group__CDD__PWM.md#function-cdd_pwm_settripzoneadvdigitalcompareaction)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_TripZoneAdvDigitalCompareEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzoneadvdigitalcompareeventtype) TzAdvDCEvent, [Cdd_Pwm_TripZoneAdvancedActionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzoneadvancedactiontype) TzAdvDCAction)| Set Advanced Digital Compare Trip Zone Action on EPWMA. |
| void | **[Cdd_Pwm_ConfigureTripZoneInterrupt](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuretripzoneinterrupt)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_TzInterruptSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tzinterruptsourcetype) TzInterrupt, boolean Select)| Enable/disable Trip Zone interrupts. |
| uint16 | **[Cdd_Pwm_GetTripZoneFlagStatus](../Modules/group__CDD__PWM.md#function-cdd_pwm_gettripzoneflagstatus)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Gets the Trip Zone status flag. |
| uint16 | **[Cdd_Pwm_GetCycleByCycleTripZoneFlagStatus](../Modules/group__CDD__PWM.md#function-cdd_pwm_getcyclebycycletripzoneflagstatus)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Gets the Trip Zone Cycle by Cycle flag status. |
| uint16 | **[Cdd_Pwm_GetOneShotTripZoneFlagStatus](../Modules/group__CDD__PWM.md#function-cdd_pwm_getoneshottripzoneflagstatus)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Gets the Trip Zone One Shot flag status. |
| void | **[Cdd_Pwm_SelectCycleByCycleTripZoneClearEvent](../Modules/group__CDD__PWM.md#function-cdd_pwm_selectcyclebycycletripzoneclearevent)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_CbcTripZoneClearModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_cbctripzoneclearmodetype) ClearEvent)| Set the Trip Zone CBC pulse clear event. |
| void | **[Cdd_Pwm_ClearTripZoneFlag](../Modules/group__CDD__PWM.md#function-cdd_pwm_cleartripzoneflag)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_TripZoneFlagType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzoneflagtype) TzFlags)| Clear Trip Zone flag. |
| void | **[Cdd_Pwm_ClearCycleByCycleTripZoneFlag](../Modules/group__CDD__PWM.md#function-cdd_pwm_clearcyclebycycletripzoneflag)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_CbcTzFlagType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_cbctzflagtype) TzCbcFlags)| Clear the Trip Zone Cycle by Cycle flag. |
| void | **[Cdd_Pwm_ClearOneShotTripZoneFlag](../Modules/group__CDD__PWM.md#function-cdd_pwm_clearoneshottripzoneflag)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OneshotTzFlagType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_oneshottzflagtype) TzOstFlags)| Clear the Trip Zone One Shot flag. |
| void | **[Cdd_Pwm_ForceTripZoneEvent](../Modules/group__CDD__PWM.md#function-cdd_pwm_forcetripzoneevent)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_TripZoneForceEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_tripzoneforceeventtype) TzForceEvent)| Force Trip Zone events. |
| void | **[Cdd_Pwm_ConfigureTripOutSource](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuretripoutsource)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_SelectTripOutSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_selecttripoutsourcetype) TzTripOut, boolean Select)| Select TRIPOUT signals for the EPWM module. |
| void | **[Cdd_Pwm_ConfigureInterrupt](../Modules/group__CDD__PWM.md#function-cdd_pwm_configureinterrupt)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disable EPWM interrupt. |
| void | **[Cdd_Pwm_SetInterruptSource](../Modules/group__CDD__PWM.md#function-cdd_pwm_setinterruptsource)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_InterruptSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_interruptsourcetype) InterruptSource)| Sets the EPWM interrupt source. |
| boolean | **[Cdd_Pwm_GetEventTriggerInterruptStatus](../Modules/group__CDD__PWM.md#function-cdd_pwm_geteventtriggerinterruptstatus)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Return the interrupt status. |
| void | **[Cdd_Pwm_ClearEventTriggerInterruptFlag](../Modules/group__CDD__PWM.md#function-cdd_pwm_cleareventtriggerinterruptflag)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Clear interrupt flag. |
| void | **[Cdd_Pwm_ConfigureInterruptEventCountInit](../Modules/group__CDD__PWM.md#function-cdd_pwm_configureinterrupteventcountinit)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disable Pre-interrupt count load. |
| void | **[Cdd_Pwm_ForceInterruptEventCountInit](../Modules/group__CDD__PWM.md#function-cdd_pwm_forceinterrupteventcountinit)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Force a software pre interrupt event counter load. |
| void | **[Cdd_Pwm_SetInterruptEventCountInitValue](../Modules/group__CDD__PWM.md#function-cdd_pwm_setinterrupteventcountinitvalue)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 EventCount)| Set interrupt count. |
| uint16 | **[Cdd_Pwm_GetInterruptEventCount](../Modules/group__CDD__PWM.md#function-cdd_pwm_getinterrupteventcount)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Get the interrupt count. |
| void | **[Cdd_Pwm_ForceEventTriggerInterrupt](../Modules/group__CDD__PWM.md#function-cdd_pwm_forceeventtriggerinterrupt)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Force EPWM interrupt. |
| void | **[Cdd_Pwm_SetMixEvtTriggerSource](../Modules/group__CDD__PWM.md#function-cdd_pwm_setmixevttriggersource)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_EtMixSignalSelectType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_etmixsignalselecttype) EtMixSignal, [Cdd_Pwm_EvtMixTriggerSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_evtmixtriggersourcetype) InterruptSource)| Sets the mixed event trigger interrupt source. |
| void | **[Cdd_Pwm_ConfigureAdcTrigger](../Modules/group__CDD__PWM.md#function-cdd_pwm_configureadctrigger)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_AdcStartOfConversionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_adcstartofconversiontype) AdcSocType, boolean Select)| Enable/disable Adc SOC event. |
| void | **[Cdd_Pwm_SetAdcTriggerSource](../Modules/group__CDD__PWM.md#function-cdd_pwm_setadctriggersource)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_AdcStartOfConversionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_adcstartofconversiontype) AdcSocType, [Cdd_Pwm_AdcStartOfConversionSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_adcstartofconversionsourcetype) SocSource)| Sets the EPWM SOC source. |
| void | **[Cdd_Pwm_SetAdcTriggerEventPrescale](../Modules/group__CDD__PWM.md#function-cdd_pwm_setadctriggereventprescale)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_AdcStartOfConversionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_adcstartofconversiontype) AdcSocType, uint16 PreScaleCount)| Sets the EPWM SOC event counts. |
| boolean | **[Cdd_Pwm_GetAdcTriggerFlagStatus](../Modules/group__CDD__PWM.md#function-cdd_pwm_getadctriggerflagstatus)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_AdcStartOfConversionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_adcstartofconversiontype) AdcSocType)| Return the SOC event status. |
| void | **[Cdd_Pwm_ClearAdcTriggerFlag](../Modules/group__CDD__PWM.md#function-cdd_pwm_clearadctriggerflag)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_AdcStartOfConversionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_adcstartofconversiontype) AdcSocType)| Clear SOC flag. |
| void | **[Cdd_Pwm_ConfigureAdcTriggerEventCountInit](../Modules/group__CDD__PWM.md#function-cdd_pwm_configureadctriggereventcountinit)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_AdcStartOfConversionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_adcstartofconversiontype) AdcSocType, boolean Select)| Enable/disable Pre-SOC event count load. |
| void | **[Cdd_Pwm_ForceAdcTriggerEventCountInit](../Modules/group__CDD__PWM.md#function-cdd_pwm_forceadctriggereventcountinit)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_AdcStartOfConversionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_adcstartofconversiontype) AdcSocType)| Force a software pre SOC event counter load. |
| void | **[Cdd_Pwm_SetAdcTriggerEventCountInitValue](../Modules/group__CDD__PWM.md#function-cdd_pwm_setadctriggereventcountinitvalue)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_AdcStartOfConversionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_adcstartofconversiontype) AdcSocType, uint16 EventCount)| Set Adc Trigger count values. |
| uint16 | **[Cdd_Pwm_GetAdcTriggerEventCount](../Modules/group__CDD__PWM.md#function-cdd_pwm_getadctriggereventcount)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_AdcStartOfConversionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_adcstartofconversiontype) AdcSocType)| Get the SOC event count. |
| void | **[Cdd_Pwm_ForceAdcTrigger](../Modules/group__CDD__PWM.md#function-cdd_pwm_forceadctrigger)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_AdcStartOfConversionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_adcstartofconversiontype) AdcSocType)| Force SOC event. |
| void | **[Cdd_Pwm_SelectDigitalCompareTripInput](../Modules/group__CDD__PWM.md#function-cdd_pwm_selectdigitalcomparetripinput)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_DigitalCompareTripInputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcomparetripinputtype) TripInput, [Cdd_Pwm_DigitalCompareType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcomparetype) DcType)| Set the DC trip input. |
| void | **[Cdd_Pwm_ConfigureDigitalCompareBlankingWindow](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuredigitalcompareblankingwindow)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disable DC filter blanking window. |
| void | **[Cdd_Pwm_ConfigureDigitalCompareWindowInverseMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuredigitalcomparewindowinversemode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disable Digital Compare Window inverse mode. |
| void | **[Cdd_Pwm_SetDigitalCompareBlankingEvent](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdigitalcompareblankingevent)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_DigitalCompareBlankingPulseType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcompareblankingpulsetype) BlankingPulse)| Set the Digital Compare filter blanking pulse. |
| void | **[Cdd_Pwm_SetDigitalCompareFilterInput](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdigitalcomparefilterinput)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_DigitalCompareFilterInputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcomparefilterinputtype) FilterInput)| Set up the Digital Compare filter input. |
| void | **[Cdd_Pwm_ConfigureDigitalCompareEdgeFilter](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuredigitalcompareedgefilter)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disable Digital Compare Edge Filter. |
| void | **[Cdd_Pwm_SetDigitalCompareEdgeFilterMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdigitalcompareedgefiltermode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_DigitalCompareEdgeFilterModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcompareedgefiltermodetype) EdgeMode)| Set the Digital Compare Edge Filter Mode. |
| void | **[Cdd_Pwm_SetDigitalCompareEdgeFilterEdgeCount](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdigitalcompareedgefilteredgecount)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 EdgeCount)| Set the Digital Compare Edge Filter Edge Count. |
| uint16 | **[Cdd_Pwm_GetDigitalCompareEdgeFilterEdgeCount](../Modules/group__CDD__PWM.md#function-cdd_pwm_getdigitalcompareedgefilteredgecount)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Returns the Digital Compare Edge Filter Edge Count. |
| uint16 | **[Cdd_Pwm_GetDigitalCompareEdgeFilterEdgeStatus](../Modules/group__CDD__PWM.md#function-cdd_pwm_getdigitalcompareedgefilteredgestatus)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Returns the Digital Compare Edge filter captured edge count status. |
| void | **[Cdd_Pwm_SetDigitalCompareWindowOffset](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdigitalcomparewindowoffset)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 WindowOffsetCount)| Set up the Digital Compare filter window offset. |
| void | **[Cdd_Pwm_SetDigitalCompareWindowLength](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdigitalcomparewindowlength)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 WindowLengthCount)| Set up the Digital Compare filter window length. |
| uint16 | **[Cdd_Pwm_GetDigitalCompareBlankingWindowOffsetCount](../Modules/group__CDD__PWM.md#function-cdd_pwm_getdigitalcompareblankingwindowoffsetcount)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Return DC filter blanking window offset count. |
| uint16 | **[Cdd_Pwm_GetDigitalCompareBlankingWindowLengthCount](../Modules/group__CDD__PWM.md#function-cdd_pwm_getdigitalcompareblankingwindowlengthcount)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Return DC filter blanking window length count. |
| void | **[Cdd_Pwm_SetDigitalCompareEventSource](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdigitalcompareeventsource)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_DigitalCompareEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcompareeventtype) DcEvent, [Cdd_Pwm_DigitalCompareEventSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcompareeventsourcetype) DcEventSource)| Set up the Digital Compare Event source. |
| void | **[Cdd_Pwm_SetDigitalCompareEventSyncMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdigitalcompareeventsyncmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_DigitalCompareEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcompareeventtype) DcEvent, [Cdd_Pwm_DigitalCompareSyncModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcomparesyncmodetype) SyncMode)| Set up the Digital Compare input sync mode. |
| void | **[Cdd_Pwm_ConfigureDigitalCompareAdcTrigger](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuredigitalcompareadctrigger)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, boolean Select)| Enable/disable Digital Compare to generate Start of Conversion. |
| void | **[Cdd_Pwm_ConfigureDigitalCompareSyncEvent](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuredigitalcomparesyncevent)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, boolean Select)| Enable/disable Digital Compare to generate sync out pulse. |
| void | **[Cdd_Pwm_SetDigitalCompareCBCLatchMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdigitalcomparecbclatchmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_DigitalCompareEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcompareeventtype) DcEvent, [Cdd_Pwm_DigitalCompareCbcLatchModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcomparecbclatchmodetype) LatchMode)| Set up the Digital Compare CBC latch mode. |
| void | **[Cdd_Pwm_SelectDigitalCompareCBCLatchClearEvent](../Modules/group__CDD__PWM.md#function-cdd_pwm_selectdigitalcomparecbclatchclearevent)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_DigitalCompareEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcompareeventtype) DcEvent, [Cdd_Pwm_DigitalCompareCBCLatchClearEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcomparecbclatchcleareventtype) ClearEvent)| Sets the Digital Compare CBC latch clear event. |
| boolean | **[Cdd_Pwm_GetDigitalCompareCBCLatchStatus](../Modules/group__CDD__PWM.md#function-cdd_pwm_getdigitalcomparecbclatchstatus)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_DigitalCompareEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcompareeventtype) DcEvent)| Gets the Digital Compare CBC latch status. |
| void | **[Cdd_Pwm_ConfigureDigitalCompareCounterCapture](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuredigitalcomparecountercapture)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disables the Time Base Counter Capture controller. |
| void | **[Cdd_Pwm_SetDigitalCompareCounterShadowMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdigitalcomparecountershadowmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean EnableShadowMode)| Set the Time Base Counter Capture mode. |
| boolean | **[Cdd_Pwm_GetDigitalCompareCaptureStatus](../Modules/group__CDD__PWM.md#function-cdd_pwm_getdigitalcomparecapturestatus)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Return the DC Capture event status. |
| void | **[Cdd_Pwm_ConfigureDigitalCompareCounterCaptureMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuredigitalcomparecountercapturemode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean DisableClearMode)| Configures DC capture operating mode. |
| void | **[Cdd_Pwm_ClearDigitalCompareCaptureStatusFlag](../Modules/group__CDD__PWM.md#function-cdd_pwm_cleardigitalcomparecapturestatusflag)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Clears DC capture latched status flag. |
| uint16 | **[Cdd_Pwm_GetDigitalCompareCaptureCount](../Modules/group__CDD__PWM.md#function-cdd_pwm_getdigitalcomparecapturecount)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Return the DC Time Base Counter capture value. |
| void | **[Cdd_Pwm_ConfigureDigitalCompareTripCombinationInput](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuredigitalcomparetripcombinationinput)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_DcTripInputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_dctripinputtype) TripInput, [Cdd_Pwm_DigitalCompareType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcomparetype) DcType, boolean Select)| Enable/disable DC TRIP combinational input. |
| void | **[Cdd_Pwm_ConfigureCaptureInEvent](../Modules/group__CDD__PWM.md#function-cdd_pwm_configurecaptureinevent)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disables the Capture event. |
| void | **[Cdd_Pwm_ConfigCaptureGateInputPolarity](../Modules/group__CDD__PWM.md#function-cdd_pwm_configcapturegateinputpolarity)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_SelectCaptureGateInputPolarityType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_selectcapturegateinputpolaritytype) PolaritySelect)| Polarity selection for capture gate input. |
| void | **[Cdd_Pwm_InvertCaptureInputPolarity](../Modules/group__CDD__PWM.md#function-cdd_pwm_invertcaptureinputpolarity)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_SelectCaptureInputPolarityType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_selectcaptureinputpolaritytype) PolaritySelect)| Polarity selection for capture input. |
| void | **[Cdd_Pwm_ConfigureIndependentPulseLogic](../Modules/group__CDD__PWM.md#function-cdd_pwm_configureindependentpulselogic)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disables independent pulse selection for Blanking and Capture Logic. |
| void | **[Cdd_Pwm_ForceCaptureEventLoad](../Modules/group__CDD__PWM.md#function-cdd_pwm_forcecaptureeventload)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Capture event force load. |
| void | **[Cdd_Pwm_SelectCaptureTripInput](../Modules/group__CDD__PWM.md#function-cdd_pwm_selectcapturetripinput)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_DigitalCompareTripInputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_digitalcomparetripinputtype) TripInput, [Cdd_Pwm_CaptureInputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_captureinputtype) DcType)| Set the capture trip input. |
| void | **[Cdd_Pwm_ConfigureCaptureTripCombinationInput](../Modules/group__CDD__PWM.md#function-cdd_pwm_configurecapturetripcombinationinput)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_DcTripInputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_dctripinputtype) TripInput, [Cdd_Pwm_CaptureInputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_captureinputtype) DcType, boolean Select)| Enable/disable Capture TRIP combinational input. |
| void | **[Cdd_Pwm_ConfigureValleyCapture](../Modules/group__CDD__PWM.md#function-cdd_pwm_configurevalleycapture)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Valley switching. |
| void | **[Cdd_Pwm_StartValleyCapture](../Modules/group__CDD__PWM.md#function-cdd_pwm_startvalleycapture)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Start valley capture mode. |
| void | **[Cdd_Pwm_SetValleyTriggerSource](../Modules/group__CDD__PWM.md#function-cdd_pwm_setvalleytriggersource)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_ValleyTriggerSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_valleytriggersourcetype) Trigger)| Set valley capture trigger. |
| void | **[Cdd_Pwm_SetValleyTriggerEdgeCounts](../Modules/group__CDD__PWM.md#function-cdd_pwm_setvalleytriggeredgecounts)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 StartCount, uint16 StopCount)| Set valley capture trigger source count. |
| void | **[Cdd_Pwm_ConfigureValleyHwDelay](../Modules/group__CDD__PWM.md#function-cdd_pwm_configurevalleyhwdelay)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disable valley switching delay. |
| void | **[Cdd_Pwm_SetValleySwDelayValue](../Modules/group__CDD__PWM.md#function-cdd_pwm_setvalleyswdelayvalue)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 DelayOffsetValue)| Set Valley delay values. |
| void | **[Cdd_Pwm_SetValleyDelayDivider](../Modules/group__CDD__PWM.md#function-cdd_pwm_setvalleydelaydivider)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_ValleyDelayModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_valleydelaymodetype) DelayMode)| Set Valley delay mode. |
| boolean | **[Cdd_Pwm_GetValleyEdgeStatus](../Modules/group__CDD__PWM.md#function-cdd_pwm_getvalleyedgestatus)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_ValleyCounterEdgeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_valleycounteredgetype) Edge)| Get the valley edge status bit. |
| uint16 | **[Cdd_Pwm_GetValleyCount](../Modules/group__CDD__PWM.md#function-cdd_pwm_getvalleycount)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Get the Valley Counter value. |
| uint16 | **[Cdd_Pwm_GetValleyHwDelay](../Modules/group__CDD__PWM.md#function-cdd_pwm_getvalleyhwdelay)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Get the Valley delay value. |
| void | **[Cdd_Pwm_ConfigureGlobalLoad](../Modules/group__CDD__PWM.md#function-cdd_pwm_configureglobalload)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disable Global shadow load mode. |
| void | **[Cdd_Pwm_SetGlobalLoadTrigger](../Modules/group__CDD__PWM.md#function-cdd_pwm_setgloballoadtrigger)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_GlobalLoadTriggerType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_globalloadtriggertype) LoadTrigger)| Set Global load trigger. |
| void | **[Cdd_Pwm_SetGlobalLoadEventPrescale](../Modules/group__CDD__PWM.md#function-cdd_pwm_setgloballoadeventprescale)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 PrescalePulseCount)| Set the number of Global load pulse event counts. |
| uint16 | **[Cdd_Pwm_GetGlobalLoadEventCount](../Modules/group__CDD__PWM.md#function-cdd_pwm_getgloballoadeventcount)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Return the number of Global load pulse event counts. |
| void | **[Cdd_Pwm_ConfigureGlobalLoadOneShotMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuregloballoadoneshotmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disable One shot global shadow to active load. |
| void | **[Cdd_Pwm_SetGlobalLoadOneShotLatch](../Modules/group__CDD__PWM.md#function-cdd_pwm_setgloballoadoneshotlatch)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Enable One shot global shadow to active load. |
| void | **[Cdd_Pwm_ForceGlobalLoadOneShotEvent](../Modules/group__CDD__PWM.md#function-cdd_pwm_forcegloballoadoneshotevent)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Force a software One shot global shadow to active load pulse. |
| void | **[Cdd_Pwm_ConfigureGlobalLoadRegisters](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuregloballoadregisters)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_GlobalLoadType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_globalloadtype) LoadRegister, boolean Select)| Enable/disable a register to be loaded Globally. |
| void | **[Cdd_Pwm_LockRegisters](../Modules/group__CDD__PWM.md#function-cdd_pwm_lockregisters)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_LockRegisterGroupType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_lockregistergrouptype) RegisterGroup)| Lock registers. |
| void | **[Cdd_Pwm_ConfigureXCmpMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_configurexcmpmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| XCMP related APIs. |
| void | **[Cdd_Pwm_ConfigureSplitXCmp](../Modules/group__CDD__PWM.md#function-cdd_pwm_configuresplitxcmp)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disable EPWM XCMP Split. |
| void | **[Cdd_Pwm_AllocAXCmp](../Modules/group__CDD__PWM.md#function-cdd_pwm_allocaxcmp)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_XCmp_AllocCmpAType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmp_alloccmpatype) Alloctype)| Allocates XCMP registers to CMPA. |
| void | **[Cdd_Pwm_AllocBXCmp](../Modules/group__CDD__PWM.md#function-cdd_pwm_allocbxcmp)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_XCmp_AllocCmpBType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmp_alloccmpbtype) Alloctype)| Allocates XCMP registers to CMPB. |
| void | **[Cdd_Pwm_SetXCmpRegValue](../Modules/group__CDD__PWM.md#function-cdd_pwm_setxcmpregvalue)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_XCmpRegType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmpregtype) XCmpReg, uint16 XCmpValue)| Writes values to XCMP registers. |
| void | **[Cdd_Pwm_SetCmpShadowRegValue](../Modules/group__CDD__PWM.md#function-cdd_pwm_setcmpshadowregvalue)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_XCompareRegType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcompareregtype) XCmpReg, uint16 XCmpValue)| Writes values to CMPx Shadow registers. |
| void | **[Cdd_Pwm_SetXMinMaxRegValue](../Modules/group__CDD__PWM.md#function-cdd_pwm_setxminmaxregvalue)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_XMinMaxRegType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xminmaxregtype) XMinMaxReg, uint16 XCmpValue)| Writes values to XMINMAX registers. |
| void | **[Cdd_Pwm_SetXCmpActionQualifierAction](../Modules/group__CDD__PWM.md#function-cdd_pwm_setxcmpactionqualifieraction)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_XCmpShadowSetType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmpshadowsettype) ShadowSet, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_ActionQualifierOutputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_actionqualifieroutputtype) Output, [Cdd_Pwm_XCmpAqOutputEventType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmpaqoutputeventtype) Event)| Set up Action qualifier outputs based on XAQ registers. |
| void | **[Cdd_Pwm_EnableXLoad](../Modules/group__CDD__PWM.md#function-cdd_pwm_enablexload)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Enables EPWM XCMP reload event. |
| void | **[Cdd_Pwm_ForceXLoad](../Modules/group__CDD__PWM.md#function-cdd_pwm_forcexload)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Forces register loading from shadow buffers. |
| void | **[Cdd_Pwm_SetXCmpLoadMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_setxcmploadmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_XCmpLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmploadmodetype) Mode)| Selects the mode for the XCMP Shadow registers. |
| void | **[Cdd_Pwm_SetXCmpShadowLevel](../Modules/group__CDD__PWM.md#function-cdd_pwm_setxcmpshadowlevel)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_XCmpShadowLevelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmpshadowleveltype) Level)| Selects the shadow register level allocation. |
| void | **[Cdd_Pwm_SetXCmpShadowBufPtrLoadOnce](../Modules/group__CDD__PWM.md#function-cdd_pwm_setxcmpshadowbufptrloadonce)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_XCmpShadowBufPtrType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmpshadowbufptrtype) Ptr)| Selects which shadow register set is in use. |
| void | **[Cdd_Pwm_SetXCmpShadowRepeatBufxCount](../Modules/group__CDD__PWM.md#function-cdd_pwm_setxcmpshadowrepeatbufxcount)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_XCmpShadowSetType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmpshadowsettype) Bufferset, uint32 Count)| Chooses how many times Shadow buffer 2 or 3U is applied. |
| void | **[Cdd_Pwm_ConfigureMinimumDeadBand](../Modules/group__CDD__PWM.md#function-cdd_pwm_configureminimumdeadband)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, boolean Select)| Minimum Dead Band Module related APIs. |
| void | **[Cdd_Pwm_InvertMinimumDeadBandSignal](../Modules/group__CDD__PWM.md#function-cdd_pwm_invertminimumdeadbandsignal)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, boolean Invert)| Invert the Minimum DeadBand Reference Signal. |
| void | **[Cdd_Pwm_SelectMinimumDeadBandAndOrLogic](../Modules/group__CDD__PWM.md#function-cdd_pwm_selectminimumdeadbandandorlogic)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, boolean Logic)| Select signal for AND OR logic of Minimum DeadBand Module. |
| void | **[Cdd_Pwm_SelectMinimumDeadBandBlockingSignal](../Modules/group__CDD__PWM.md#function-cdd_pwm_selectminimumdeadbandblockingsignal)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, boolean BlockingSignal)| Select Minimum DeadBand Blocking Signal. |
| void | **[Cdd_Pwm_SelectMinimumDeadBandReferenceSignal](../Modules/group__CDD__PWM.md#function-cdd_pwm_selectminimumdeadbandreferencesignal)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, Cdd_Pwm_MindbReferenceSignalType ReferenceSignal)| Select Minimum DeadBand Reference Signal. |
| uint16 | **[Cdd_Pwm_GetMinDeadBandDelay](../Modules/group__CDD__PWM.md#function-cdd_pwm_getmindeadbanddelay)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel)| Get Minimum DeadBand Delay Value. |
| void | **[Cdd_Pwm_SetMinimumDeadBandDelay](../Modules/group__CDD__PWM.md#function-cdd_pwm_setminimumdeadbanddelay)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, uint16 Delay)| Set the Minimum DeadBand Delay Value. |
| void | **[Cdd_Pwm_ConfigureIllegalComboLogic](../Modules/group__CDD__PWM.md#function-cdd_pwm_configureillegalcombologic)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, boolean Select)| Illegal Combo Logic. |
| void | **[Cdd_Pwm_SelectXbarInput](../Modules/group__CDD__PWM.md#function-cdd_pwm_selectxbarinput)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, Cdd_Pwm_XbarInputType XbarInput)| Select XBAR input for Illegal Combo Logic. |
| void | **[Cdd_Pwm_SetLutDecX](../Modules/group__CDD__PWM.md#function-cdd_pwm_setlutdecx)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, Cdd_Pwm_LutDecXType Decx, boolean Force)| Force Decx values. |
| void | **[Cdd_Pwm_ConfigureDiodeEmulationMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_configurediodeemulationmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Diode Emulation logic related APIs. |
| void | **[Cdd_Pwm_SetDiodeEmulationMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdiodeemulationmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_DiodeEmulationModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_diodeemulationmodetype) Mode)| Selects the mode for the Diode emulation mode. |
| void | **[Cdd_Pwm_SetDiodeEmulationReentryDelay](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdiodeemulationreentrydelay)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint8 Delay)| Set EPWM diode emulation re-entry delay. |
| void | **[Cdd_Pwm_ConfigureDiodeEmulationTripLowSources](../Modules/group__CDD__PWM.md#function-cdd_pwm_configurediodeemulationtriplowsources)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, Cdd_Pwm_DETripLowSourceType Source)| Set EPWM diode emulation trip source for TripL. |
| void | **[Cdd_Pwm_ConfigureDiodeEmulationTripHighSources](../Modules/group__CDD__PWM.md#function-cdd_pwm_configurediodeemulationtriphighsources)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, Cdd_Pwm_DETripHighSourceType Source)| Set EPWM diode emulation trip source for TripH. |
| void | **[Cdd_Pwm_SelectDiodeEmulationPwmSignal](../Modules/group__CDD__PWM.md#function-cdd_pwm_selectdiodeemulationpwmsignal)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_DiodeEmulationSignalType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_diodeemulationsignaltype) DiodeEmuationsignal)| Selects EPWM diode emulation pwm signal. |
| void | **[Cdd_Pwm_SelectDiodeEmulationTripSignal](../Modules/group__CDD__PWM.md#function-cdd_pwm_selectdiodeemulationtripsignal)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_DiodeEmulationTripSrcType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_diodeemulationtripsrctype) TripSrc)| Selects between TRIPH and TRIPL for an epwm channel in DE mode. |
| void | **[Cdd_Pwm_NoBypassDiodeEmulationLogic](../Modules/group__CDD__PWM.md#function-cdd_pwm_nobypassdiodeemulationlogic)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| PWMTRIP does not bypass the diode emulation logic. |
| void | **[Cdd_Pwm_ByPassDiodeEmulationLogic](../Modules/group__CDD__PWM.md#function-cdd_pwm_bypassdiodeemulationlogic)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| PWMTRIP bypasses the diode emulation PWM generation logic. |
| void | **[Cdd_Pwm_ForceDiodeEmulationActive](../Modules/group__CDD__PWM.md#function-cdd_pwm_forcediodeemulationactive)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Forces DEACTIVE flag to 1. |
| void | **[Cdd_Pwm_ConfigureDiodeEmulationMonitorModeControl](../Modules/group__CDD__PWM.md#function-cdd_pwm_configurediodeemulationmonitormodecontrol)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable/disables DE monitor control mode. |
| void | **[Cdd_Pwm_SetDiodeEmulationMonitorModeStep](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdiodeemulationmonitormodestep)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_DiodeEmulationDirectionType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_diodeemulationdirectiontype) Direction, uint8 StepSize)| Sets the DE monitor counter step size. |
| void | **[Cdd_Pwm_SetDiodeEmulationMonitorCounterThreshold](../Modules/group__CDD__PWM.md#function-cdd_pwm_setdiodeemulationmonitorcounterthreshold)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 Threshold)| Sets the DE monitor counter threshold value. |
| void | **[Cdd_Pwm_ClearDiodeEmulationActiveFlag](../Modules/group__CDD__PWM.md#function-cdd_pwm_cleardiodeemulationactiveflag)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Clears DE mode active flag. |
| void | **[Cdd_Pwm_HrpwmSetPhaseShift](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsetphaseshift)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint32 PhaseCount)| Sets the consolidated phase shift value in high resolution mode. |
| void | **[Cdd_Pwm_HrpwmSetHiResPhaseShiftOnly](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsethiresphaseshiftonly)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 HrPhaseCount)| Sets only the high resolution phase shift value. |
| void | **[Cdd_Pwm_HrpwmSetTimeBasePeriod](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsettimebaseperiod)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint32 PeriodCount)| Sets the consolidated period of time base counter used in HR mode. |
| void | **[Cdd_Pwm_HrpwmSetHiResTimeBasePeriodOnly](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsethirestimebaseperiodonly)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 HrPeriodCount)| Sets only the high resolution time base counter. |
| uint32 | **[Cdd_Pwm_HrpwmGetTimeBasePeriod](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmgettimebaseperiod)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Gets the consolidated time base period count used in HR mode. |
| uint16 | **[Cdd_Pwm_HrpwmGetHiResTimeBasePeriodOnly](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmgethirestimebaseperiodonly)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId)| Gets only the high resolution time base period count. |
| void | **[Cdd_Pwm_HrpwmSetMepEdgeSelect](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsetmepedgeselect)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_HrpwmMepEdgeModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_hrpwmmepedgemodetype) MepEdgeMode)| Sets the high resolution edge controlled by MEP (Micro Edge Positioner) |
| void | **[Cdd_Pwm_HrpwmSetMepControlMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsetmepcontrolmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_HrpwmMepCtrlModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_hrpwmmepctrlmodetype) MepCtrlMode)| Sets the MEP (Micro Edge Positioner) control mode. |
| void | **[Cdd_Pwm_HrpwmSetCounterCompareShadowLoadEvent](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsetcountercompareshadowloadevent)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, [Cdd_Pwm_HrpwmLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_hrpwmloadmodetype) LoadEvent)| Sets the high resolution comparator load mode. |
| void | **[Cdd_Pwm_HrpwmSetOutputSwapMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsetoutputswapmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean EnableOutputSwap)| Sets the high resolution output swap mode. |
| void | **[Cdd_Pwm_HrpwmSetChannelBOutputPath](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsetchannelboutputpath)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_HrpwmChannelBOutputType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_hrpwmchannelboutputtype) OutputOnB)| Sets the high resolution output on EPWMxB. |
| void | **[Cdd_Pwm_HrpwmConfigureAutoConversion](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmconfigureautoconversion)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enables MEP (Micro Edge Positioner) automatic scale mode. |
| void | **[Cdd_Pwm_HrpwmConfigurePeriodControl](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmconfigureperiodcontrol)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable high resolution period feature. |
| void | **[Cdd_Pwm_HrpwmConfigurePhaseShiftLoad](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmconfigurephaseshiftload)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, boolean Select)| Enable high resolution phase load. |
| void | **[Cdd_Pwm_HrpwmSetSyncPulseSource](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsetsyncpulsesource)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_HrpwmSyncPulseSourceType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_hrpwmsyncpulsesourcetype) SyncPulseSource)| Set high resolution PWMSYNC source. |
| void | **[Cdd_Pwm_HrpwmSetTranslatorRemainder](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsettranslatorremainder)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 TrRemVal)| Sets the Translator Remainder value. |
| void | **[Cdd_Pwm_HrpwmSetCounterCompareValue](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsetcountercomparevalue)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, uint32 CompareCount)| Sets the consolidated counter compare values in HR mode. |
| void | **[Cdd_Pwm_HrpwmSetHiResCounterCompareValueOnly](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsethirescountercomparevalueonly)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel, uint16 HrCompCount)| Sets only the high resolution counter compare value. |
| uint32 | **[Cdd_Pwm_HrpwmGetCounterCompareValue](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmgetcountercomparevalue)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel)| Gets the consolidated counter compare values. |
| uint16 | **[Cdd_Pwm_GetHiResCounterCompareValueOnly](../Modules/group__CDD__PWM.md#function-cdd_pwm_gethirescountercomparevalueonly)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_OutputChannelType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_outputchanneltype) OutputChannel)| Gets only the high resolution counter compare values. |
| void | **[Cdd_Pwm_HrpwmSetRisingEdgeDelay](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsetrisingedgedelay)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint32 RedCount)| Sets the consolidated RED count in high resolution mode. |
| void | **[Cdd_Pwm_HrpwmSetHiResRisingEdgeDelayOnly](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsethiresrisingedgedelayonly)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 HrRedCount)| Sets the high resolution RED count only. |
| void | **[Cdd_Pwm_HrpwmSetFallingEdgeDelay](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsetfallingedgedelay)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint32 FedCount)| Sets the consolidated FED value in high resolution mode. |
| void | **[Cdd_Pwm_HrpwmSetHiResFallingEdgeDelayOnly](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsethiresfallingedgedelayonly)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, uint16 HrFedCount)| Sets the high resolution FED count only. |
| void | **[Cdd_Pwm_HrpwmSetMepStep](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsetmepstep)**([Cdd_Pwm_HrpwmCalInstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_hrpwmcalinstancetype) InstanceId, uint16 MepCount)| Set high resolution MEP (Micro Edge Positioner) step. |
| void | **[Cdd_Pwm_HrpwmSetDeadbandMepEdgeSelect](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsetdeadbandmepedgeselect)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_HrpwmMepDeadBandEdgeModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_hrpwmmepdeadbandedgemodetype) MepDbEdge)| Set high resolution Dead Band MEP (Micro Edge Positioner) control. |
| void | **[Cdd_Pwm_HrpwmSetRisingEdgeDelayLoadMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsetrisingedgedelayloadmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_HrpwmLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_hrpwmloadmodetype) LoadEvent)| Set the high resolution Dead Band RED load mode. |
| void | **[Cdd_Pwm_HrpwmSetFallingEdgeDelayLoadMode](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsetfallingedgedelayloadmode)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_HrpwmLoadModeType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_hrpwmloadmodetype) LoadEvent)| Set the high resolution Dead Band FED load mode. |
| void | **[Cdd_Pwm_HrpwmLockRegisters](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmlockregisters)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_HrpwmLockRegisterGroupType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_hrpwmlockregistergrouptype) RegisterGroup)| Lock HRPWM registers. |
| void | **[Cdd_Pwm_HrpwmSetXCmpRegValue](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsetxcmpregvalue)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_XCmpRegType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmpregtype) XCmpReg, uint32 XCmpValue)| Sets the consolidated XCMP values in HR mode. |
| void | **[Cdd_Pwm_HrpwmSetHiResXCmpRegValueOnly](../Modules/group__CDD__PWM.md#function-cdd_pwm_hrpwmsethiresxcmpregvalueonly)**([Cdd_Pwm_InstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_instancetype) InstanceId, [Cdd_Pwm_XCmpRegType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_xcmpregtype) XCmpReg, uint16 HrXCmpValue)| Sets only the high resolution XCMP value. |
| [Cdd_Pwm_SfoStatusType](../Modules/group__CDD__PWM.md#enum-cdd_pwm_sfostatustype) | **[Cdd_Pwm_Sfo](../Modules/group__CDD__PWM.md#function-cdd_pwm_sfo)**([Cdd_Pwm_HrpwmCalInstanceType](../Modules/group__CDD__PWM.md#typedef-cdd_pwm_hrpwmcalinstancetype) Cdd_Pwm_HrpwmCalId)| SFO V8 Calibration Function. |
### function Cdd_Pwm_Init
```
void Cdd_Pwm_Init(
const Cdd_Pwm_ConfigType * CfgPtr
)
```
**Brief**:
Service to initialize Cdd Pwm driver.
This service initializes all the PWM channels with the configured values.
**Parameters**:
* **CfgPtr** Pointer to configuration set (Variant PC requires a NULL_PTR)
**Returns**:
* **None**
**Return**: None
**Postcondition**: None
### function Cdd_Pwm_GetVersionInfo
```
void Cdd_Pwm_GetVersionInfo(
Std_VersionInfoType * VersionInfo
)
```
**Brief**:
service that returns the version information of the module
This service returns the version information of the Pwm module
**Parameters**:
* **VersionInfo** Pointer to where to store the version information of this module
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_EnableNotification
```
void Cdd_Pwm_EnableNotification(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Service to enable the PWM signal edge notification according to notification parameter.
This service enables the PWM signal edge notification according to notification parameter
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_DisableNotification
```
void Cdd_Pwm_DisableNotification(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Service to disable the PWM signal edge notification.
This service disables signal edge notification for the requested PWM Channels.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureTripZoneNotification
```
void Cdd_Pwm_ConfigureTripZoneNotification(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Service to configure trip zone notification.
This service configures trip zone notification.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Boolean to enable/disable the notification.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetInterruptEventCount
```
void Cdd_Pwm_SetInterruptEventCount(
Cdd_Pwm_InstanceType InstanceId,
uint16 EventCount
)
```
**Brief**:
Sets the EPWM interrupt event counts.
This function sets the interrupt event count that determines the number of events that have to occur before an interrupt is issued. Maximum value for EventCount is 15.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **EventCount** Event count for interrupt scale
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetEmulationMode
```
void Cdd_Pwm_SetEmulationMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_EmulationModeType EmulationMode
)
```
**Brief**:
Service to set emulation mode.
This function sets the emulation behaviours of the time base counter. Valid values for emulationMode are:
* CDD_PWM_EMULATION_STOP_AFTER_NEXT_TB - Stop after next Time Base counter increment or decrement.
* CDD_PWM_EMULATION_STOP_AFTER_FULL_CYCLE - Stop when counter completes whole cycle
* CDD_PWM_EMULATION_FREE_RUN - Free run.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **EmulationMode** Emulation Mode
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetTimeBaseCounter
```
void Cdd_Pwm_SetTimeBaseCounter(
Cdd_Pwm_InstanceType InstanceId,
uint16 Count
)
```
**Brief**:
Set the time base count.
This function sets the 16 bit counter value of the time base counter.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Count** Time base count value
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetCountModeAfterSync
```
void Cdd_Pwm_SetCountModeAfterSync(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_SyncCountModeType Mode
)
```
**Brief**:
Set count mode after phase shift sync.
This function sets the time base count to count up or down after a new phase value set by the Cdd_Pwm_SetPhaseShift(). The count direction is determined by the variable mode Valid inputs for mode are:
* CDD_PWM_COUNT_MODE_UP_AFTER_SYNC - Count up after sync
* CDD_PWM_COUNT_MODE_DOWN_AFTER_SYNC - Count down after sync
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Mode** Count mode after sync.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetClockPrescaler
```
void Cdd_Pwm_SetClockPrescaler(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_ClockDividerType Prescaler,
Cdd_Pwm_HighSpeedClkDivType HighSpeedPrescaler
)
```
**Brief**:
Set the time base clock and the high speed time base clock count pre-scaler.
This function sets the pre scaler(divider)value for the time base clock counter and the high speed time base clock counter. Valid values for pre-scaler and highSpeedPrescaler are CDD_PWM_CLOCK_DIVIDER_X, where X is 1U,2U,4U,8U,16U,32U,64 or 128. The actual numerical values for these macros represent values 0U,1...7. The equation for the output clock is: TBCLK = EPWMCLK/(highSpeedPrescaler * pre-scaler)
**Note:** EPWMCLK is a scaled version of SYSCLK. At reset EPWMCLK is half SYSCLK.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Prescaler** Time base count pre scale value
* **HighSpeedPrescaler** High speed time base count pre scale value
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ForceSyncPulse
```
void Cdd_Pwm_ForceSyncPulse(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Force a software sync pulse.
This function causes a single software initiated sync pulse Make sure the appropriate mode is selected using Cdd_Pwm_SetupSyncOutputMode() before using this function.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetSyncInPulseSource
```
void Cdd_Pwm_SetSyncInPulseSource(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_SyncInPulseSourceType Source
)
```
**Brief**:
Set up the source for sync-in pulse.
This function set the sync out pulse mode Valid values for mode are:
* CDD_PWM_SYNC_IN_PULSE_SRC_SYNCOUT_EPWM1-16 - sync-in pulse source can be any of the EPWM1-16 sync-out signal
* CDD_PWM_SYNC_IN_PULSE_SRC_SYNCOUT_ECAP1-7 - sync-in pulse source can be selected as any of the ECAP1-16 sync-out signal
* CDD_PWM_SYNC_IN_PULSE_SRC_INPUTXBAR_OUT5-6 - sync-in pulse source can be selected as any of the Input xbar out5-6 signal
* CDD_PWM_SYNC_IN_PULSE_SRC_ETHERCAT_SYNC0-1 - sync-in pulse source can be selected as any of the Ethercat sync0-1 signal
* CDD_PWM_SYNC_IN_PULSE_SRC_DISABLE - sync-in pulse is disabled for the CDD_PWM module
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Source** Sync-in pulse source
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureSyncOutPulseSource
```
void Cdd_Pwm_ConfigureSyncOutPulseSource(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_SyncOutPulseSourceType Source,
boolean Select
)
```
**Brief**:
Enables sync-out pulse source.
This function enables the sync-out pulse source Below valid values for param **Source** can be OR'd together to enable multiple sync-out sources:
* CDD_PWM_SYNC_OUT_PULSE_ON_SOFTWARE - sync-out pulse is generated by software when CDD_PWM_forceSyncPulse() function is called or by EPWMxSYNCI signal.
* CDD_PWM_SYNC_OUT_PULSE_ON_CNTR_ZERO - sync-out pulse is generated when time base counter equals zero.
* CDD_PWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_B - sync-out pulse is generated when time base counter equals compare B value
* CDD_PWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_C - sync-out pulse is generated when time base counter equals compare C value
* CDD_PWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_D - sync-out pulse is generated when time base counter equals compare D value
* CDD_PWM_SYNC_OUT_PULSE_ON_DCA_EVT1_SYNC - sync-out pulse is generated by DCA event1 sync signal
* CDD_PWM_SYNC_OUT_PULSE_ON_DCB_EVT1_SYNC - sync-out pulse is generated by DCB event1 sync signal
* CDD_PWM_SYNC_OUT_PULSE_ON_ALL - sync-out pulse is generated by all the above sources
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Source** Sync-out pulse source
* **Select** Boolean to enable/disable the source
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetOneShotSyncOutTrigger
```
void Cdd_Pwm_SetOneShotSyncOutTrigger(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OneShotSyncOutTriggerType Trigger
)
```
**Brief**:
Set up the one-shot sync-out trigger source.
This function sets the one-shot sync-out trigger source Valid values for param **Trigger** are:
* CDD_PWM_OSHT_SYNC_OUT_TRIG_SYNC - Trigger for one-shot sync-out signal is one-shot sync event.
* CDD_PWM_OSHT_SYNC_OUT_TRIG_RELOAD - Trigger for one-shot sync-out signal is one-shot reload event.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Trigger** One-shot sync-out signal trigger source
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetPeriodLoadMode
```
void Cdd_Pwm_SetPeriodLoadMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_PeriodLoadModeType LoadMode
)
```
**Brief**:
Set PWM period load mode.
This function sets the load mode for the PWM period. If LoadMode is set to CDD_PWM_PERIOD_SHADOW_LOAD, a write or read to the TBPRD (PWM Period count register) accesses the shadow register. If LoadMode is set to CDD_PWM_PERIOD_DIRECT_LOAD, a write or read to the TBPRD register accesses the register directly.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **LoadMode** PWM period load mode
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigurePhaseShiftLoad
```
void Cdd_Pwm_ConfigurePhaseShiftLoad(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable phase shift load.
This function enables loading of phase shift when the appropriate sync event occurs.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Boolean to enable/disable phase shift load.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetTimeBaseCounterMode
```
void Cdd_Pwm_SetTimeBaseCounterMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_TimeBaseCountModeType CounterMode
)
```
**Brief**:
Set time base counter mode.
This function sets up the time base counter mode Valid values for CounterMode are:
* CDD_PWM_COUNTER_MODE_UP - Up - count mode
* CDD_PWM_COUNTER_MODE_DOWN - Down - count mode
* CDD_PWM_COUNTER_MODE_UP_DOWN - Up - down - count mode
* CDD_PWM_COUNTER_MODE_STOP_FREEZE - Stop - Freeze counter.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **CounterMode** Time base counter mode
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SelectPeriodLoadEvent
```
void Cdd_Pwm_SelectPeriodLoadEvent(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_PeriodShadowLoadModeType ShadowLoadMode
)
```
**Brief**:
Set shadow to active period load on sync mode.
This function sets up the shadow to active Period register load mode with respect to a sync event. Valid values for ShadowLoadMode are:
* CDD_PWM_SHADOW_LOAD_MODE_COUNTER_ZERO - shadow to active load occurs when time base counter reaches 0.
* CDD_PWM_SHADOW_LOAD_MODE_COUNTER_SYNC - shadow to active load occurs when time base counter reaches 0 and a SYNC occurs.
* CDD_PWM_SHADOW_LOAD_MODE_SYNC - shadow to active load occurs only when a SYNC occurs.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **ShadowLoadMode** Shadow to active load mode
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureOneShotSync
```
void Cdd_Pwm_ConfigureOneShotSync(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disable one shot sync mode.
This function Enable/disables one shot sync mode
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Boolean to enable/disable one shot sync mode
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_StartOneShotSync
```
void Cdd_Pwm_StartOneShotSync(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Start one shot sync mode.
This function propagates a one shot sync pulse
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetTimeBaseCounterValue
```
uint16 Cdd_Pwm_GetTimeBaseCounterValue(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Returns time base counter value.
This function returns the current value of the time base counter.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Returns**:
* **uint16** Current value of the time base counter
**Return**: Time base counter value
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetTimeBaseCounterOverflowStatus
```
boolean Cdd_Pwm_GetTimeBaseCounterOverflowStatus(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Return time base counter maximum status.
This function returns the status of the time base max counter.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Returns**:
* **boolean** True if the counter has reached 0xFFFF, false otherwise
**Return**: Status of time base counter overflow
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ClearTimeBaseCounterOverflowEvent
```
void Cdd_Pwm_ClearTimeBaseCounterOverflowEvent(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Clear max time base counter event.
This function clears the max time base counter latch event. The latch event occurs when the time base counter reaches its maximum value of 0xFFFF.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetSyncStatus
```
boolean Cdd_Pwm_GetSyncStatus(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Return external sync signal status.
This function returns the external sync signal status.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Returns**:
* **boolean** True if an external sync signal event occurred, false otherwise
**Return**: Status of external sync signal
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ClearSyncEvent
```
void Cdd_Pwm_ClearSyncEvent(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Clear external sync signal event.
This function clears the external sync signal latch event.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetTimeBaseCounterDirection
```
uint16 Cdd_Pwm_GetTimeBaseCounterDirection(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Return time base counter direction.
This function returns the direction of the time base counter.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Returns**:
* **uint16** CDD_PWM_TIME_BASE_STATUS_COUNT_UP if counting up or CDD_PWM_TIME_BASE_STATUS_COUNT_DOWN if counting down
**Return**: Counter direction status
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetPhaseShift
```
void Cdd_Pwm_SetPhaseShift(
Cdd_Pwm_InstanceType InstanceId,
uint16 PhaseCount
)
```
**Brief**:
Sets the phase shift offset counter value.
This function sets the 16 bit time-base counter phase of the EPWM relative to the time-base that is supplying the synchronization input signal. Call the Cdd_Pwm_EnablePhaseShiftLoad() function to enable loading of the PhaseCount phase shift value when a sync event occurs.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **PhaseCount** Phase shift count value
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetTimeBasePeriod
```
void Cdd_Pwm_SetTimeBasePeriod(
Cdd_Pwm_InstanceType InstanceId,
uint16 PeriodCount
)
```
**Brief**:
Sets the PWM period count.
This function sets the period of the PWM count. The value of PeriodCount is the value written to the register. User should map the desired period or frequency of the waveform into the correct PeriodCount. Invoke the function Cdd_Pwm_SelectPeriodLoadEvent() with the appropriate parameter to set the load mode of the Period count. PeriodCount has a maximum valid value of 0xFFFF
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **PeriodCount** Period count value
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetTimeBasePeriod
```
uint16 Cdd_Pwm_GetTimeBasePeriod(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Gets the PWM period count.
This function gets the period of the PWM count.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Returns**:
* **uint16** Current period count value
**Return**: The period count value
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetCounterCompareShadowLoadMode
```
void Cdd_Pwm_SetCounterCompareShadowLoadMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_CounterCompareModuleType CompModule,
Cdd_Pwm_CounterCompareLoadModeType LoadMode
)
```
**Brief**:
Sets up the Counter Compare shadow load mode.
This function enables and sets up the counter compare shadow load mode Valid values for the variables are:
* CompModule
* CDD_PWM_COUNTER_COMPARE_A - counter compare A.
* CDD_PWM_COUNTER_COMPARE_B - counter compare B.
* CDD_PWM_COUNTER_COMPARE_C - counter compare C.
* CDD_PWM_COUNTER_COMPARE_D - counter compare D.
* LoadMode
* CDD_PWM_COMP_LOAD_ON_CNTR_ZERO - load when counter equals zero
* CDD_PWM_COMP_LOAD_ON_CNTR_PERIOD - load when counter equals period
* CDD_PWM_COMP_LOAD_ON_CNTR_ZERO_PERIOD - load when counter equals zero or period
* CDD_PWM_COMP_LOAD_FREEZE - Freeze shadow to active load
* CDD_PWM_COMP_LOAD_ON_SYNC_CNTR_ZERO - load when counter equals zero
* CDD_PWM_COMP_LOAD_ON_SYNC_CNTR_PERIOD -load when counter equals period
* CDD_PWM_COMP_LOAD_ON_SYNC_CNTR_ZERO_PERIOD - load when counter equals zero or period
* CDD_PWM_COMP_LOAD_ON_SYNC_ONLY - load on sync only
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **CompModule** Counter compare module
* **LoadMode** Shadow to active load mode
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_DisableCounterCompareShadowLoadMode
```
void Cdd_Pwm_DisableCounterCompareShadowLoadMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_CounterCompareModuleType CompModule
)
```
**Brief**:
Disables counter compare shadow load mode.
This function disables counter compare shadow load mode Valid values for the variables are:
* CompModule
* CDD_PWM_COUNTER_COMPARE_A - counter compare A.
* CDD_PWM_COUNTER_COMPARE_B - counter compare B.
* CDD_PWM_COUNTER_COMPARE_C - counter compare C.
* CDD_PWM_COUNTER_COMPARE_D - counter compare D.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **CompModule** Counter compare module
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetCounterCompareValue
```
void Cdd_Pwm_SetCounterCompareValue(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_CounterCompareModuleType CompModule,
uint16 CompCount
)
```
**Brief**:
Sets counter compare values.
This function sets the counter compare value for counter compare registers. The maximum value for CompCount is 0xFUFFF. Valid values for CompModule are:
* CDD_PWM_COUNTER_COMPARE_A - counter compare A.
* CDD_PWM_COUNTER_COMPARE_B - counter compare B.
* CDD_PWM_COUNTER_COMPARE_C - counter compare C.
* CDD_PWM_COUNTER_COMPARE_D - counter compare D.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **CompModule** Counter Compare value module
* **CompCount** Counter compare count value
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetCounterCompareValue
```
uint16 Cdd_Pwm_GetCounterCompareValue(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_CounterCompareModuleType CompModule
)
```
**Brief**:
Gets counter compare values.
This function gets the counter compare value for counter compare registers. Valid values for CompModule are:
* CDD_PWM_COUNTER_COMPARE_A - counter compare A.
* CDD_PWM_COUNTER_COMPARE_B - counter compare B.
* CDD_PWM_COUNTER_COMPARE_C - counter compare C.
* CDD_PWM_COUNTER_COMPARE_D - counter compare D.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **CompModule** Counter Compare value module
**Returns**:
* **uint16** Counter compare value
**Return**: The counter compare count value
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetCounterCompareShadowStatus
```
boolean Cdd_Pwm_GetCounterCompareShadowStatus(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel
)
```
**Brief**:
Returns the counter compare shadow register full status.
This function returns the counter Compare shadow register full status flag. Valid values for OutputChannel are:
* CDD_PWM_COUNTER_COMPARE_A - counter compare A.
* CDD_PWM_COUNTER_COMPARE_B - counter compare B.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Counter Compare value module
**Returns**:
* **TRUE** If the shadow register is full.
* **FALSE** If the shadow register is not full.
**Return**: Shadow register full status
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureLinkDutyHR
```
void Cdd_Pwm_ConfigureLinkDutyHR(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disables CMPAHR, CMPBHR register linking.
This function Enable/disables CMPAHR and CMPBHR register linking. CMPBHR assumes the same value as CMPAHR.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Enable/disable selection.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetActionQualifierShadowLoadMode
```
void Cdd_Pwm_SetActionQualifierShadowLoadMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_ActionQualifierLoadModeType LoadMode
)
```
**Brief**:
Sets the Action Qualifier shadow load mode.
Action Qualifier module related APIs
This function enables and sets the Action Qualifier shadow load mode Valid values for the variables are:
* OutputChannel
* CDD_PWM_ACTION_QUALIFIER_A - Action Qualifier A.
* CDD_PWM_ACTION_QUALIFIER_B - Action Qualifier B.
* LoadMode
* CDD_PWM_AQ_LOAD_ON_CNTR_ZERO - load when counter equals zero
* CDD_PWM_AQ_LOAD_ON_CNTR_PERIOD - load when counter equals period
* CDD_PWM_AQ_LOAD_ON_CNTR_ZERO_PERIOD - load when counter equals zero or period
* CDD_PWM_AQ_LOAD_FREEZE - Freeze shadow to active load
* CDD_PWM_AQ_LOAD_ON_SYNC_CNTR_ZERO - load on sync or when counter equals zero
* CDD_PWM_AQ_LOAD_ON_SYNC_CNTR_PERIOD - load on sync or when counter equals period
* CDD_PWM_AQ_LOAD_ON_SYNC_CNTR_ZERO_PERIOD - load on sync or when counter equals zero or period
* CDD_PWM_AQ_LOAD_ON_SYNC_ONLY - load on sync only
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Action Qualifier module value
* **LoadMode** Shadow to active load mode
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_DisableActionQualifierShadowLoadMode
```
void Cdd_Pwm_DisableActionQualifierShadowLoadMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel
)
```
**Brief**:
Disables Action Qualifier shadow load mode.
This function disables the Action Qualifier shadow load mode Valid values for the variables are:
* OutputChannel
* CDD_PWM_ACTION_QUALIFIER_A - Action Qualifier A.
* CDD_PWM_ACTION_QUALIFIER_B - Action Qualifier B.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Action Qualifier module value
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetActionQualifierT1TriggerSource
```
void Cdd_Pwm_SetActionQualifierT1TriggerSource(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_ActionQualifierTriggerSourceType Trigger
)
```
**Brief**:
Sets up Action qualifier trigger source for event T1.
This function sets up the sources for Action Qualifier event T1. Valid values for Trigger are:
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_DCA_1 - Digital compare event A 1
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_DCA_2 - Digital compare event A 2
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_DCB_1 - Digital compare event B 1
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_DCB_2 - Digital compare event B 2
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_TZ_1 - Trip zone 1
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_TZ_2 - Trip zone 2
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_TZ_3U - Trip zone 3U
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_CDD_PWM_SYNCIN - EPWM sync
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_DC_EVTFILT - Digital compare filter event
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Trigger** Sources for Action Qualifier triggers.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetActionQualifierT2TriggerSource
```
void Cdd_Pwm_SetActionQualifierT2TriggerSource(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_ActionQualifierTriggerSourceType Trigger
)
```
**Brief**:
Sets up Action qualifier trigger source for event T2.
This function sets up the sources for Action Qualifier event T2. Valid values for Trigger are:
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_DCA_1 - Digital compare event A 1
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_DCA_2 - Digital compare event A 2
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_DCB_1 - Digital compare event B 1
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_DCB_2 - Digital compare event B 2
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_TZ_1 - Trip zone 1
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_TZ_2 - Trip zone 2
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_TZ_3U - Trip zone 3U
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_CDD_PWM_SYNCIN - EPWM sync
* CDD_PWM_AQ_TRIGGER_EVENT_TRIG_DC_EVTFILT - Digital compare filter event
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Trigger** Sources for Action Qualifier triggers.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetActionQualifierAction
```
void Cdd_Pwm_SetActionQualifierAction(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType EpwmOutput,
Cdd_Pwm_ActionQualifierOutputType Output,
Cdd_Pwm_ActionQualifierOutputEventType Event
)
```
**Brief**:
Sets up Action qualifier outputs.
This function sets up the Action Qualifier output on EPWM A or EPWMB, depending on the value of EpwmOutput, to a value specified by Output based on the input events - specified by Event. The following are valid values for the parameters.
* EpwmOutput
* CDD_PWM_AQ_OUTPUT_A - EPWMxA output
* CDD_PWM_AQ_OUTPUT_B - EPWMxB output
* Output
* CDD_PWM_AQ_OUTPUT_NO_CHANGE - No change in the output pins
* CDD_PWM_AQ_OUTPUT_LOW - Set output pins to low
* CDD_PWM_AQ_OUTPUT_HIGH - Set output pins to High
* CDD_PWM_AQ_OUTPUT_TOGGLE - Toggle the output pins
* Event
* CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_ZERO - Time base counter equals zero
* CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_PERIOD - Time base counter equals period
* CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA - Time base counter up equals COMPA
* CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA - Time base counter down equals COMPA
* CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB - Time base counter up equals COMPB
* CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB - Time base counter down equals COMPB
* CDD_PWM_AQ_OUTPUT_ON_T1_COUNT_UP - T1 event on count up
* CDD_PWM_AQ_OUTPUT_ON_T1_COUNT_DOWN - T1 event on count down
* CDD_PWM_AQ_OUTPUT_ON_T2_COUNT_UP - T2 event on count up
* CDD_PWM_AQ_OUTPUT_ON_T2_COUNT_DOWN - T2 event on count down
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **EpwmOutput** The EPWM output type
* **Output** The Action Qualifier output.
* **Event** The event that causes a change in output.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetActionQualifierActionComplete
```
void Cdd_Pwm_SetActionQualifierActionComplete(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_ActionQualifierEventActionType Action
)
```
### function Cdd_Pwm_SetAdditionalActionQualifierActionComplete
```
void Cdd_Pwm_SetAdditionalActionQualifierActionComplete(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_AdditionalActionQualifierEventActionType Action
)
```
**Brief**:
Sets up Additional action qualifier event outputs.
This function sets up the Additional Action Qualifier output on EPWMA or EPWMB depending on the value of OutputChannel, to a value specified by Action. Valid Action param values from different event scenarios should be OR'd together to configure complete action for a pwm output. The following are valid values for the parameters.
* OutputChannel
* CDD_PWM_AQ_OUTPUT_A - EPWMxA output
* CDD_PWM_AQ_OUTPUT_B - EPWMxB output
* Action
* When T1 event occurs during up-count
* CDD_PWM_AQ_OUTPUT_NO_CHANGE_UP_T1 - T1 event on count up and no change in output pins
* CDD_PWM_AQ_OUTPUT_LOW_UP_T1 - T1 event on count up and set output pins to low
* CDD_PWM_AQ_OUTPUT_HIGH_UP_T1 - T1 event on count up and set output pins to high
* CDD_PWM_AQ_OUTPUT_TOGGLE_UP_T1 - T1 event on count up and toggle the output pins
* When T1 event occurs during down-count
* CDD_PWM_AQ_OUTPUT_NO_CHANGE_DOWN_T1- T1 event on count down and no change in output pins
* CDD_PWM_AQ_OUTPUT_LOW_DOWN_T1 - T1 event on count down and set output pins to low
* CDD_PWM_AQ_OUTPUT_HIGH_DOWN_T1 - T1 event on count down and set output pins to high
* CDD_PWM_AQ_OUTPUT_TOGGLE_DOWN_T1 - T1 event on count down and toggle the output pins
* When T2 event occurs during up-count
* CDD_PWM_AQ_OUTPUT_NO_CHANGE_UP_T2 - T2 event on count up and no change in output pins
* CDD_PWM_AQ_OUTPUT_LOW_UP_T2 - T2 event on count up and set output pins to low
* CDD_PWM_AQ_OUTPUT_HIGH_UP_T2 - T2 event on count up and set output pins to high
* CDD_PWM_AQ_OUTPUT_TOGGLE_UP_T2 - T2 event on count up and toggle the output pins
* When T2 event occurs during down-count
* CDD_PWM_AQ_OUTPUT_NO_CHANGE_DOWN_T2 - T2 event on count down and no change in output pins
* CDD_PWM_AQ_OUTPUT_LOW_DOWN_T2 - T2 event on count down and set output pins to low
* CDD_PWM_AQ_OUTPUT_HIGH_DOWN_T2 - T2 event on count down and set output pins to high
* CDD_PWM_AQ_OUTPUT_TOGGLE_DOWN_T2 - T2 event on count down and toggle the output pins
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** The EPWM output type
* **Action** The desired action when the specified event occurs.
**Returns**:
* **None**
**Return**: None
**Note**: A logical OR of the valid values should be passed as the Action parameter. Single action should be configured for each event scenario.
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetActionQualifierContSwForceShadowMode
```
void Cdd_Pwm_SetActionQualifierContSwForceShadowMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_ActionQualifierContForceType Mode
)
```
**Brief**:
Sets up Action qualifier continuous software load mode.
This function sets up the AQCFRSC register load mode for continuous software force reload mode The software force actions are determined by the Cdd_Pwm_SetActionQualifierContSwForceAction() function. Valid values for Mode are:
* CDD_PWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO - shadow mode load when counter equals zero
* CDD_PWM_AQ_SW_SH_LOAD_ON_CNTR_PERIOD - shadow mode load when counter equals period
* CDD_PWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO_PERIOD - shadow mode load when counter equals zero or period
* CDD_PWM_AQ_SW_IMMEDIATE_LOAD - immediate mode load only
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Mode** Mode for shadow to active load mode
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetActionQualifierContSwForceAction
```
void Cdd_Pwm_SetActionQualifierContSwForceAction(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_ActionQualifierSwOutputType Output
)
```
**Brief**:
Triggers a continuous software forced event.
This function triggers a continuous software forced Action Qualifier output on EPWM A or B based on the value of OutputChannel. Valid values for the parameters are:
* OutputChannel
* CDD_PWM_AQ_OUTPUT_A - EPWMxA output
* CDD_PWM_AQ_OUTPUT_B - EPWMxB output
* Output
* CDD_PWM_AQ_SW_DISABLED - Software forcing disabled.
* CDD_PWM_AQ_SW_OUTPUT_LOW - Set output pins to low
* CDD_PWM_AQ_SW_OUTPUT_HIGH - Set output pins to High
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** The EPWM output type
* **Output** The Action Qualifier output.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetActionQualifierSwAction
```
void Cdd_Pwm_SetActionQualifierSwAction(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_ActionQualifierOutputType Output
)
```
**Brief**:
Sets up one time software forced Action qualifier outputs.
This function sets up the one time software forced Action Qualifier output on EPWM A or EPWMB, depending on the value of OutputChannel to a value specified by Output. The following are valid values for the parameters.
* OutputChannel
* CDD_PWM_AQ_OUTPUT_A - EPWMxA output
* CDD_PWM_AQ_OUTPUT_B - EPWMxB output
* Output
* CDD_PWM_AQ_OUTPUT_NO_CHANGE - No change in the output pins
* CDD_PWM_AQ_OUTPUT_LOW - Set output pins to low
* CDD_PWM_AQ_OUTPUT_HIGH - Set output pins to High
* CDD_PWM_AQ_OUTPUT_TOGGLE - Toggle the output pins
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** The EPWM output type
* **Output** The Action Qualifier output.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ForceActionQualifierSwAction
```
void Cdd_Pwm_ForceActionQualifierSwAction(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel
)
```
**Brief**:
Triggers a one time software forced event on Action qualifier.
This function triggers a one time software forced Action Qualifier event on EPWM A or B based on the value of OutputChannel. Valid values for OutputChannel are:
* CDD_PWM_AQ_OUTPUT_A - EPWMxA output
* CDD_PWM_AQ_OUTPUT_B - EPWMxB output
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** The EPWM output type
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDeadBandOutputSwapMode
```
void Cdd_Pwm_SetDeadBandOutputSwapMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
boolean EnableSwapMode
)
```
**Brief**:
Sets Dead Band signal output swap mode.
This function sets up the output signal swap mode For example if the output variable is set to CDD_PWM_DB_OUTPUT_A and enableSwapMode is true, then the EPWM A output gets its signal from the EPWM B signal path.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** The EPWM Dead Band output.
* **EnableSwapMode** The output swap mode
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDeadBandDelayMode
```
void Cdd_Pwm_SetDeadBandDelayMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DeadBandDelayModeType DelayMode,
boolean EnableDelayMode
)
```
**Brief**:
Sets Dead Band signal output mode.
This function sets up the dead band delay mode The delayMode variable determines if the applied delay is Rising Edge or Falling Edge The enableDelayMode determines if a dead band delay should be applied. Valid values for the variables are:
* delayMode
* CDD_PWM_DB_RED - Rising Edge delay
* CDD_PWM_DB_FED - Falling Edge delay
* enableDelayMode
* true - Falling edge or Rising edge delay is applied.
* false - Dead Band delay is bypassed.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **DelayMode** The Dead Band delay type
* **EnableDelayMode** The dead band delay mode
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDeadBandDelayPolarity
```
void Cdd_Pwm_SetDeadBandDelayPolarity(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DeadBandDelayModeType DelayMode,
Cdd_Pwm_DeadBandPolarityType Polarity
)
```
**Brief**:
Sets Dead Band delay polarity.
This function sets up the polarity as determined by the variable polarity of the Falling Edge or Rising Edge delay depending on the value of delayMode Valid values for the variables are:
* delayMode
* CDD_PWM_DB_RED - Rising Edge delay
* CDD_PWM_DB_FED - Falling Edge delay
* polarity
* CDD_PWM_DB_POLARITY_ACTIVE_HIGH - polarity is not inverted.
* CDD_PWM_DB_POLARITY_ACTIVE_LOW - polarity is inverted.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **DelayMode** The Dead Band delay type
* **Polarity** The polarity of the delayed signal.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetRisingEdgeDeadBandDelayInput
```
void Cdd_Pwm_SetRisingEdgeDeadBandDelayInput(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel
)
```
**Brief**:
Sets Rising Edge Dead Band delay input.
This function sets up the rising Edge delay input signal. Valid values for input are:
* CDD_PWM_DB_INPUT_EPWMA - Input signal is EPWMA( Valid for both Falling
Edge and Rising Edge)
* CDD_PWM_DB_INPUT_EPWMB - Input signal is EPWMB( Valid for both Falling
Edge and Rising Edge)
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** The input signal to the dead band.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetFallingEdgeDeadBandDelayInput
```
void Cdd_Pwm_SetFallingEdgeDeadBandDelayInput(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DeadBandDelayInputType Input
)
```
**Brief**:
Sets Dead Band delay input.
This function sets up the rising Edge delay input signal. Valid values for input are:
* CDD_PWM_DB_INPUT_EPWMA - Input signal is EPWMA(Valid for both Falling
Edge and Rising Edge)
* CDD_PWM_DB_INPUT_EPWMB - Input signal is EPWMB(Valid for both Falling
Edge and Rising Edge)
* CDD_PWM_DB_INPUT_DB_RED - Input signal is the output of Rising Edge delay. (Valid only for Falling Edge delay)
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Input** The input signal to the dead band.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDeadBandControlShadowLoadMode
```
void Cdd_Pwm_SetDeadBandControlShadowLoadMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DeadBandControlLoadModeType LoadMode
)
```
**Brief**:
Set the Dead Band control shadow load mode.
This function enables and sets the Dead Band control register shadow load mode Valid values for the _loadMode_ parameter are:
* CDD_PWM_DB_LOAD_ON_CNTR_ZERO - load when counter equals zero.
* CDD_PWM_DB_LOAD_ON_CNTR_PERIOD - load when counter equals period.
* CDD_PWM_DB_LOAD_ON_CNTR_ZERO_PERIOD - load when counter equals zero or period.
* CDD_PWM_DB_LOAD_FREEZE - Freeze shadow to active load.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **LoadMode** The shadow to active load mode
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_DisableDeadBandControlShadowLoadMode
```
void Cdd_Pwm_DisableDeadBandControlShadowLoadMode(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Disable Dead Band control shadow load mode.
This function disables the Dead Band control register shadow load mode
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetRisingEdgeDelayCountShadowLoadMode
```
void Cdd_Pwm_SetRisingEdgeDelayCountShadowLoadMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DeadBandDelayLoadModeType LoadMode
)
```
**Brief**:
Set the RED (Rising Edge Delay) shadow load mode.
This function sets the Rising Edge Delay register shadow load mode Valid values for the _loadMode_ parameter are:
* CDD_PWM_DELAY_LOAD_ON_CNTR_ZERO - load when counter equals zero.
* CDD_PWM_DELAY_LOAD_ON_CNTR_PERIOD - load when counter equals period.
* CDD_PWM_DELAY_LOAD_ON_CNTR_ZERO_PERIOD - load when counter equals zero or period.
* CDD_PWM_DELAY_LOAD_FREEZE - Freeze shadow to active load.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **LoadMode** The shadow to active load event.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_DisableRisingEdgeDelayCountShadowLoadMode
```
void Cdd_Pwm_DisableRisingEdgeDelayCountShadowLoadMode(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Disable the RED (Rising Edge Delay) shadow load mode.
This function disables the Rising Edge Delay register shadow load mode
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetFallingEdgeDelayCountShadowLoadMode
```
void Cdd_Pwm_SetFallingEdgeDelayCountShadowLoadMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DeadBandDelayLoadModeType LoadMode
)
```
**Brief**:
Set the FED (Falling Edge Delay) shadow load mode.
This function enables and sets the Falling Edge Delay register shadow load mode Valid values for the _loadMode_ parameters are:
* CDD_PWM_DELAY_LOAD_ON_CNTR_ZERO - load when counter equals zero.
* CDD_PWM_DELAY_LOAD_ON_CNTR_PERIOD - load when counter equals period.
* CDD_PWM_DELAY_LOAD_ON_CNTR_ZERO_PERIOD - load when counter equals zero or period.
* CDD_PWM_DELAY_LOAD_FREEZE - Freeze shadow to active load.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **LoadMode** The shadow to active load event.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_DisableFallingEdgeDelayCountShadowLoadMode
```
void Cdd_Pwm_DisableFallingEdgeDelayCountShadowLoadMode(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Disables the FED (Falling Edge Delay) shadow load mode.
This function disables the Falling Edge Delay register shadow load mode
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDeadBandCounterClock
```
void Cdd_Pwm_SetDeadBandCounterClock(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DeadBandClockModeType ClockMode
)
```
**Brief**:
Sets Dead Band Counter clock rate.
This function sets up the Dead Band counter clock rate with respect to TBCLK (EPWM time base counter). Valid values for clockMode are:
* CDD_PWM_DB_COUNTER_CLOCK_FULL_CYCLE -Dead band counter runs at TBCLK (EPWM Time Base Counter) rate
* CDD_PWM_DB_COUNTER_CLOCK_HALF_CYCLE -Dead band counter runs at 2*TBCLK (twice EPWM Time Base Counter)rate
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **ClockMode** The Dead Band counter clock mode
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetRisingEdgeDelayCount
```
void Cdd_Pwm_SetRisingEdgeDelayCount(
Cdd_Pwm_InstanceType InstanceId,
uint16 RedCount
)
```
**Brief**:
Set EPWM RED count.
This function sets the RED (Rising Edge Delay) count value The value of redCount should be less than 0x4000U.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **RedCount** The RED(Rising Edge Delay) count.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetFallingEdgeDelayCount
```
void Cdd_Pwm_SetFallingEdgeDelayCount(
Cdd_Pwm_InstanceType InstanceId,
uint16 FedCount
)
```
**Brief**:
Set EPWM FED count.
This function sets the FED (Falling Edge Delay) count value The value of fedCount should be less than 0x4000U.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **FedCount** The FED(Falling Edge Delay) count.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureChopper
```
void Cdd_Pwm_ConfigureChopper(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disable chopper mode.
This function Enable/disables EPWM chopper module
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Enable/disable selection for chopper.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetChopperDutyCycle
```
void Cdd_Pwm_SetChopperDutyCycle(
Cdd_Pwm_InstanceType InstanceId,
uint16 DutyCycleCount
)
```
**Brief**:
Set chopper duty cycle.
This function sets the chopping clock duty cycle The value of dutyCycleCount should be less than 7. The dutyCycleCount value is converted to the actual chopper duty cycle value base on the following equation: chopper duty cycle = (dutyCycleCount + 1) / 8
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **DutyCycleCount** The chopping clock duty cycle count.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetChopperFreq
```
void Cdd_Pwm_SetChopperFreq(
Cdd_Pwm_InstanceType InstanceId,
uint16 FreqDiv
)
```
**Brief**:
Set chopper clock frequency scaler.
This function sets the scaler for the chopping clock frequency. The value of freqDiv should be less than 8. The chopping clock frequency is altered based on the following equation. chopper clock frequency = SYSCLKOUT / ( 1 + freqDiv)
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **FreqDiv** The chopping clock frequency divider.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetChopperFirstPulseWidth
```
void Cdd_Pwm_SetChopperFirstPulseWidth(
Cdd_Pwm_InstanceType InstanceId,
uint16 FirstPulseWidth
)
```
**Brief**:
Set chopper first pulse width.
This function sets the first pulse width of chopper output waveform. The value of firstPulseWidth should be less than 0x10U. The value of the first pulse width in seconds is given using the following equation: first pulse width = 1 / (((firstPulseWidth + 1) * SYSCLKOUT)/8)
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **FirstPulseWidth** The width of the first pulse
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureTripZoneSignals
```
void Cdd_Pwm_ConfigureTripZoneSignals(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_TzSignalType TzSignal,
boolean Select
)
```
**Brief**:
Enable/disables Trip Zone signal.
This function Enable/disables the Trip Zone signals specified by TzSignal as a source for the Trip Zone module Valid values for TzSignal are:
* CDD_PWM_TZ_SIGNAL_CBC1 - TZ1 Cycle By Cycle
* CDD_PWM_TZ_SIGNAL_CBC2 - TZ2 Cycle By Cycle
* CDD_PWM_TZ_SIGNAL_CBC3U - TZ3U Cycle By Cycle
* CDD_PWM_TZ_SIGNAL_CBC4 - TZ4 Cycle By Cycle
* CDD_PWM_TZ_SIGNAL_CBC5 - TZ5 Cycle By Cycle
* CDD_PWM_TZ_SIGNAL_CBC6 - TZ6 Cycle By Cycle
* CDD_PWM_TZ_SIGNAL_DCAEVT2 - DCAEVT2 Cycle By Cycle
* CDD_PWM_TZ_SIGNAL_DCBEVT2 - DCBEVT2 Cycle By Cycle
* CDD_PWM_TZ_SIGNAL_OSHT1 - One-shot TZ1
* CDD_PWM_TZ_SIGNAL_OSHT2 - One-shot TZ2
* CDD_PWM_TZ_SIGNAL_OSHT3U - One-shot TZ3U
* CDD_PWM_TZ_SIGNAL_OSHT4 - One-shot TZ4
* CDD_PWM_TZ_SIGNAL_OSHT5 - One-shot TZ5
* CDD_PWM_TZ_SIGNAL_OSHT6 - One-shot TZ6
* CDD_PWM_TZ_SIGNAL_DCAEVT1 - One-shot DCAEVT1
* CDD_PWM_TZ_SIGNAL_DCBEVT1 - One-shot DCBEVT1
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **TzSignal** The Trip Zone signal.
* **Select** Enable/disable selection for the signal.
**Returns**:
* **None**
**Return**: None
**Note**: A logical OR of the valid values can be passed as the TzSignal parameter.
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureTripZone2Signals
```
void Cdd_Pwm_ConfigureTripZone2Signals(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_TzCapEvtType TzSignal,
boolean Select
)
```
### function Cdd_Pwm_SetTripZoneDigitalCompareEventCondition
```
void Cdd_Pwm_SetTripZoneDigitalCompareEventCondition(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_TripZoneDigitalCompareOutputType DcType,
Cdd_Pwm_TripZoneDigitalCompareOutputEventType DcEvent
)
```
**Brief**:
Set Digital compare conditions that cause Trip Zone event.
This function sets up the Digital Compare output Trip Zone event sources. The dcType variable specifies the event source to be whether Digital Compare output A or Digital Compare output B. The dcEvent parameter specifies the event that causes Trip Zone Valid values for the parameters are:
* dcType
* CDD_PWM_TZ_DC_OUTPUT_A1 - Digital Compare output 1 A
* CDD_PWM_TZ_DC_OUTPUT_A2 - Digital Compare output 2 A
* CDD_PWM_TZ_DC_OUTPUT_B1 - Digital Compare output 1 B
* CDD_PWM_TZ_DC_OUTPUT_B2 - Digital Compare output 2 B
* dcEvent
* CDD_PWM_TZ_EVENT_DC_DISABLED - Event Trigger is disabled
* CDD_PWM_TZ_EVENT_DCXH_LOW - Trigger event when DCxH low
* CDD_PWM_TZ_EVENT_DCXH_HIGH - Trigger event when DCxH high
* CDD_PWM_TZ_EVENT_DCXL_LOW - Trigger event when DCxL low
* CDD_PWM_TZ_EVENT_DCXL_HIGH - Trigger event when DCxL high
* CDD_PWM_TZ_EVENT_DCXL_HIGH_DCXH_LOW - Trigger event when DCxL high DCxH low
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **DcType** Digital compare output type
* **DcEvent** Digital Compare output event.
**Returns**:
* **None**
**Return**: None
**Note**: x in DCxH/DCxL represents DCAH/DCAL or DCBH/DCBL
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureTripZoneAdvAction
```
void Cdd_Pwm_ConfigureTripZoneAdvAction(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disable advanced Trip Zone event Action.
This function Enable/disables the advanced actions of the Trip Zone events. The advanced features combine the trip zone events with the direction of the counter.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Enable/disable selection for advanced trip zone action.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetTripZoneAction
```
void Cdd_Pwm_SetTripZoneAction(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_TripZoneActionEventType TzEvent,
Cdd_Pwm_TripZoneActionType TzAction
)
```
**Brief**:
Set Trip Zone Action.
This function sets the Trip Zone Action to be taken when a Trip Zone event occurs. Valid values for the parameters are:
* TzEvent
* CDD_PWM_TZ_ACTION_EVENT_DCBEVT2 - DCBEVT2 (Digital Compare B event 2)
* CDD_PWM_TZ_ACTION_EVENT_DCBEVT1 - DCBEVT1 (Digital Compare B event 1)
* CDD_PWM_TZ_ACTION_EVENT_DCAEVT2 - DCAEVT2 (Digital Compare A event 2)
* CDD_PWM_TZ_ACTION_EVENT_DCAEVT1 - DCAEVT1 (Digital Compare A event 1)
* CDD_PWM_TZ_ACTION_EVENT_TZB - TZ1 - TZ6U, DCBEVT2U, DCBEVT1
* CDD_PWM_TZ_ACTION_EVENT_TZA - TZ1 - TZ6U, DCAEVT2U, DCAEVT1
* TzAction
* CDD_PWM_TZ_ACTION_HIGH_Z - high impedance output
* CDD_PWM_TZ_ACTION_HIGH - high output
* CDD_PWM_TZ_ACTION_LOW - low low
* CDD_PWM_TZ_ACTION_DISABLE - disable action
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **TzEvent** The Trip Zone event type
* **TzAction** The Trip zone Action.
**Returns**:
* **None**
**Return**: None
**Note**:
* Disable the advanced Trip Zone event using Cdd_Pwm_DisableTripZoneAdvAction() before calling this function.
* This function operates on both EPWMA and EPWMB depending on the TzEvent parameter.
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetTripZoneAdvAction
```
void Cdd_Pwm_SetTripZoneAdvAction(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_TripZoneAdvancedEventType TzAdvEvent,
Cdd_Pwm_TripZoneAdvancedActionType TzAdvAction
)
```
**Brief**:
Set Advanced Trip Zone Action.
This function sets the Advanced Trip Zone Action to be taken when an advanced Trip Zone event occurs.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **TzAdvEvent** Trip Zone event type with valid values:
* CDD_PWM_TZ_ADV_ACTION_EVENT_TZB_D - TZ1 - TZ6U, DCBEVT2U, DCBEVT1 while counting down
* CDD_PWM_TZ_ADV_ACTION_EVENT_TZB_U - TZ1 - TZ6U, DCBEVT2U, DCBEVT1 while counting up
* CDD_PWM_TZ_ADV_ACTION_EVENT_TZA_D - TZ1 - TZ6U, DCAEVT2U, DCAEVT1 while counting down
* CDD_PWM_TZ_ADV_ACTION_EVENT_TZA_U - TZ1 - TZ6U, DCAEVT2U, DCAEVT1 while counting up
* **TzAdvAction** Trip zone Action with valid values:
* CDD_PWM_TZ_ADV_ACTION_HIGH_Z - high impedance output
* CDD_PWM_TZ_ADV_ACTION_HIGH - high voltage state
* CDD_PWM_TZ_ADV_ACTION_LOW - low voltage state
* CDD_PWM_TZ_ADV_ACTION_TOGGLE - Toggle output
* CDD_PWM_TZ_ADV_ACTION_DISABLE - disable action
**Return**: None
**Note**:
* This function enables the advanced Trip Zone event.
* This function operates on both EPWMA and EPWMB depending on the TzAdvEvent parameter.
* Advanced Trip Zone events take into consideration the direction of the counter in addition to Trip Zone events.
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetTripZoneAdvDigitalCompareAction
```
void Cdd_Pwm_SetTripZoneAdvDigitalCompareAction(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_TripZoneAdvDigitalCompareEventType TzAdvDCEvent,
Cdd_Pwm_TripZoneAdvancedActionType TzAdvDCAction
)
```
**Brief**:
Set Advanced Digital Compare Trip Zone Action on EPWMA.
This function sets the Digital Compare (DC) Advanced Trip Zone Action to be taken on EPWMA when an advanced Digital Compare Trip Zone A event occurs.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** The EPWM output channel
* **TzAdvDCEvent** Digital Compare Trip Zone event type with valid values:
* CDD_PWM_TZ_ADV_ACTION_EVENT_DCXEVT2_D - Digital Compare event A2 while counting down
* CDD_PWM_TZ_ADV_ACTION_EVENT_DCXEVT2_U - Digital Compare event A2 while counting up
* CDD_PWM_TZ_ADV_ACTION_EVENT_DCXEVT1_D - Digital Compare event A1 while counting down
* CDD_PWM_TZ_ADV_ACTION_EVENT_DCXEVT1_U - Digital Compare event A1 while counting up
* **TzAdvDCAction** Digital Compare Trip zone Action with valid values:
* CDD_PWM_TZ_ADV_ACTION_HIGH_Z - high impedance output
* CDD_PWM_TZ_ADV_ACTION_HIGH - high voltage state
* CDD_PWM_TZ_ADV_ACTION_LOW - low voltage state
* CDD_PWM_TZ_ADV_ACTION_TOGGLE - Toggle output
* CDD_PWM_TZ_ADV_ACTION_DISABLE - disable action
**Return**: None
**Note**:
* This function enables the advanced Trip Zone event.
* Advanced Trip Zone events take into consideration the direction of the counter in addition to Digital Compare Trip Zone events.
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureTripZoneInterrupt
```
void Cdd_Pwm_ConfigureTripZoneInterrupt(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_TzInterruptSourceType TzInterrupt,
boolean Select
)
```
**Brief**:
Enable/disable Trip Zone interrupts.
This function Enable/disables the Trip Zone interrupts.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **TzInterrupt** Trip Zone interrupt with valid values:
* CDD_PWM_TZ_INTERRUPT_CBC - Trip Zones Cycle By Cycle interrupt
* CDD_PWM_TZ_INTERRUPT_OST - Trip Zones One Shot interrupt
* CDD_PWM_TZ_INTERRUPT_DCAEVT1 - Digital Compare A Event 1 interrupt
* CDD_PWM_TZ_INTERRUPT_DCAEVT2 - Digital Compare A Event 2 interrupt
* CDD_PWM_TZ_INTERRUPT_DCBEVT1 - Digital Compare B Event 1 interrupt
* CDD_PWM_TZ_INTERRUPT_DCBEVT2 - Digital Compare B Event 2 interrupt
* CDD_PWM_TZ_INTERRUPT_CAPEVT - Trip Zones Capture Event interrupt
* **Select** Enable/Disable selection
**Return**: None
**Note**: A logical OR of the valid values can be passed as the TzInterrupt parameter.
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetTripZoneFlagStatus
```
uint16 Cdd_Pwm_GetTripZoneFlagStatus(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Gets the Trip Zone status flag.
This function returns the Trip Zone status flag.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: The function returns the following or the bitwise OR value of the following values:
* CDD_PWM_TZ_INTERRUPT - Trip Zone interrupt was generated due to the following TZ events
* CDD_PWM_TZ_FLAG_CBC - Trip Zones Cycle By Cycle event status flag
* CDD_PWM_TZ_FLAG_OST - Trip Zones One Shot event status flag
* CDD_PWM_TZ_FLAG_DCAEVT1 - Digital Compare A Event 1 status flag
* CDD_PWM_TZ_FLAG_DCAEVT2 - Digital Compare A Event 2 status flag
* CDD_PWM_TZ_FLAG_DCBEVT1 - Digital Compare B Event 1 status flag
* CDD_PWM_TZ_FLAG_DCBEVT2 - Digital Compare B Event 2 status flag
* CDD_PWM_TZ_FLAG_CAPEVT - Trip Zones Capture Event flag
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetCycleByCycleTripZoneFlagStatus
```
uint16 Cdd_Pwm_GetCycleByCycleTripZoneFlagStatus(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Gets the Trip Zone Cycle by Cycle flag status.
This function returns the specific Cycle by Cycle Trip Zone flag status.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: The function returns the following values:
* CDD_PWM_TZ_CBC_FLAG_1 - CBC 1 status flag
* CDD_PWM_TZ_CBC_FLAG_2 - CBC 2 status flag
* CDD_PWM_TZ_CBC_FLAG_3U - CBC 3U status flag
* CDD_PWM_TZ_CBC_FLAG_4 - CBC 4 status flag
* CDD_PWM_TZ_CBC_FLAG_5 - CBC 5 status flag
* CDD_PWM_TZ_CBC_FLAG_6 - CBC 6 status flag
* CDD_PWM_TZ_CBC_FLAG_DCAEVT2 - CBC status flag for Digital compare event A2
* CDD_PWM_TZ_CBC_FLAG_DCBEVT2 - CBC status flag for Digital compare event B2
* CDD_PWM_TZ_CBC_FLAG_CAPEVT - CBC status flag for capture event
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetOneShotTripZoneFlagStatus
```
uint16 Cdd_Pwm_GetOneShotTripZoneFlagStatus(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Gets the Trip Zone One Shot flag status.
This function returns the specific One Shot Trip Zone flag status.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: The function returns the bitwise OR of the following flags:
* CDD_PWM_TZ_OST_FLAG_OST1 - OST status flag for OST1
* CDD_PWM_TZ_OST_FLAG_OST2 - OST status flag for OST2
* CDD_PWM_TZ_OST_FLAG_OST3U - OST status flag for OST3U
* CDD_PWM_TZ_OST_FLAG_OST4 - OST status flag for OST4
* CDD_PWM_TZ_OST_FLAG_OST5 - OST status flag for OST5
* CDD_PWM_TZ_OST_FLAG_OST6 - OST status flag for OST6
* CDD_PWM_TZ_OST_FLAG_DCAEVT1 - OST status flag for Digital compare event A1
* CDD_PWM_TZ_OST_FLAG_DCBEVT1 - OST status flag for Digital compare event B1
* CDD_PWM_TZ_OST_FLAG_CAPEVT - OST status flag for capture event
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SelectCycleByCycleTripZoneClearEvent
```
void Cdd_Pwm_SelectCycleByCycleTripZoneClearEvent(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_CbcTripZoneClearModeType ClearEvent
)
```
**Brief**:
Set the Trip Zone CBC pulse clear event.
This function set the event which automatically clears the CBC (Cycle by Cycle) latch.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **ClearEvent** CBC trip zone clear event with valid values:
* CDD_PWM_TZ_CBC_PULSE_CLR_CNTR_ZERO - Clear CBC pulse when counter equals zero
* CDD_PWM_TZ_CBC_PULSE_CLR_CNTR_PERIOD - Clear CBC pulse when counter equals period
* CDD_PWM_TZ_CBC_PULSE_CLR_CNTR_ZERO_PERIOD - Clear CBC pulse when counter equals zero or period
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ClearTripZoneFlag
```
void Cdd_Pwm_ClearTripZoneFlag(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_TripZoneFlagType TzFlags
)
```
**Brief**:
Clear Trip Zone flag.
This function clears the Trip Zone flags.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **TzFlags** Trip Zone flags with valid values:
* CDD_PWM_TZ_INTERRUPT - Global Trip Zone interrupt flag
* CDD_PWM_TZ_FLAG_CBC - Trip Zones Cycle By Cycle flag
* CDD_PWM_TZ_FLAG_OST - Trip Zones One Shot flag
* CDD_PWM_TZ_FLAG_DCAEVT1 - Digital Compare A Event 1 flag
* CDD_PWM_TZ_FLAG_DCAEVT2 - Digital Compare A Event 2 flag
* CDD_PWM_TZ_FLAG_DCBEVT1 - Digital Compare B Event 1 flag
* CDD_PWM_TZ_FLAG_DCBEVT2 - Digital Compare B Event 2 flag
* CDD_PWM_TZ_FLAG_CAPEVT - Trip Zones Capture Event flag
**Return**: None
**Note**: A bitwise OR of the valid values can be passed as the TzFlags parameter.
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ClearCycleByCycleTripZoneFlag
```
void Cdd_Pwm_ClearCycleByCycleTripZoneFlag(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_CbcTzFlagType TzCbcFlags
)
```
**Brief**:
Clear the Trip Zone Cycle by Cycle flag.
This function clears the specific Cycle by Cycle Trip Zone flag.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **TzCbcFlags** CBC flag to be cleared with valid values:
* CDD_PWM_TZ_CBC_FLAG_1 - CBC 1 flag
* CDD_PWM_TZ_CBC_FLAG_2 - CBC 2 flag
* CDD_PWM_TZ_CBC_FLAG_3U - CBC 3U flag
* CDD_PWM_TZ_CBC_FLAG_4 - CBC 4 flag
* CDD_PWM_TZ_CBC_FLAG_5 - CBC 5 flag
* CDD_PWM_TZ_CBC_FLAG_6 - CBC 6 flag
* CDD_PWM_TZ_CBC_FLAG_DCAEVT2 - CBC flag Digital compare event A2
* CDD_PWM_TZ_CBC_FLAG_DCBEVT2 - CBC flag Digital compare event B2
* CDD_PWM_TZ_CBC_FLAG_CAPEVT - CBC flag capture event
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ClearOneShotTripZoneFlag
```
void Cdd_Pwm_ClearOneShotTripZoneFlag(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OneshotTzFlagType TzOstFlags
)
```
**Brief**:
Clear the Trip Zone One Shot flag.
This function clears the specific One Shot (OST) Trip Zone flag.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **TzOstFlags** OST flags to be cleared with valid values:
* CDD_PWM_TZ_OST_FLAG_OST1 - OST flag for OST1
* CDD_PWM_TZ_OST_FLAG_OST2 - OST flag for OST2
* CDD_PWM_TZ_OST_FLAG_OST3U - OST flag for OST3U
* CDD_PWM_TZ_OST_FLAG_OST4 - OST flag for OST4
* CDD_PWM_TZ_OST_FLAG_OST5 - OST flag for OST5
* CDD_PWM_TZ_OST_FLAG_OST6 - OST flag for OST6
* CDD_PWM_TZ_OST_FLAG_DCAEVT1 - OST flag for Digital compare event A1
* CDD_PWM_TZ_OST_FLAG_DCBEVT1 - OST flag for Digital compare event B1
* CDD_PWM_TZ_OST_FLAG_CAPEVT - OST flag capture event
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ForceTripZoneEvent
```
void Cdd_Pwm_ForceTripZoneEvent(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_TripZoneForceEventType TzForceEvent
)
```
**Brief**:
Force Trip Zone events.
This function forces a Trip Zone event.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **TzForceEvent** Forced Trip Zone event with valid values:
* CDD_PWM_TZ_FORCE_EVENT_CBC - Force Trip Zones Cycle By Cycle event
* CDD_PWM_TZ_FORCE_EVENT_OST - Force Trip Zones One Shot Event
* CDD_PWM_TZ_FORCE_EVENT_DCAEVT1 - Force Digital Compare A Event 1
* CDD_PWM_TZ_FORCE_EVENT_DCAEVT2 - Force Digital Compare A Event 2
* CDD_PWM_TZ_FORCE_EVENT_DCBEVT1 - Force Digital Compare B Event 1
* CDD_PWM_TZ_FORCE_EVENT_DCBEVT2 - Force Digital Compare B Event 2
* CDD_PWM_TZ_FORCE_EVENT_CAPEVT - Force Capture Event
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureTripOutSource
```
void Cdd_Pwm_ConfigureTripOutSource(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_SelectTripOutSourceType TzTripOut,
boolean Select
)
```
**Brief**:
Select TRIPOUT signals for the EPWM module.
This function selects the TRIPOUT signals for the EPWM module
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **TzTripOut** Trip zone event to be selected with valid values:
* CDD_PWM_TZ_TRIPOUT_CBC - CBC as TRIPOUT source
* CDD_PWM_TZ_TRIPOUT_OST - OST as TRIPOUT source
* CDD_PWM_TZ_TRIPOUT_TZ[1-6] - TZx as TRIPOUT source
* CDD_PWM_TZ_TRIPOUT_DCAEVT1 - DCAEVT1 as TRIPOUT source
* CDD_PWM_TZ_TRIPOUT_DCAEVT2 - DCAEVT2 as TRIPOUT source
* CDD_PWM_TZ_TRIPOUT_DCBEVT1 - DCBEVT1 as TRIPOUT source
* CDD_PWM_TZ_TRIPOUT_DCBEVT2 - DCBEVT2 as TRIPOUT source
* CDD_PWM_TZ_TRIPOUT_CAPEVT - Capture Event as TRIPOUT source
* **Select** Enable/Disable selection
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureInterrupt
```
void Cdd_Pwm_ConfigureInterrupt(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disable EPWM interrupt.
This function Enable/disables the EPWM interrupt.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Enable/Disable selection
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetInterruptSource
```
void Cdd_Pwm_SetInterruptSource(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_InterruptSourceType InterruptSource
)
```
**Brief**:
Sets the EPWM interrupt source.
This function sets the EPWM interrupt source
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **InterruptSource** EPWM interrupt source with valid values:
* CDD_PWM_INT_TBCTR_DISABLED - Time-base counter is disabled
* CDD_PWM_INT_TBCTR_ZERO - Time-base counter equal to zero
* CDD_PWM_INT_TBCTR_PERIOD - Time-base counter equal to period
* CDD_PWM_INT_TBCTR_ZERO_OR_PERIOD - Time-base counter equal to zero or period
* CDD_PWM_INT_TBCTR_ETINTMIX - Time-base counter based on mixed events (ETINTMIX)
* CDD_PWM_INT_TBCTR_U_CMPx - Where x is AU,BU,C or D Time-base counter equal to CMPAU, CMPBU, CMPC or CMPD (depending the value of x) when the timer is incrementing
* CDD_PWM_INT_TBCTR_D_CMPx - Where x is AU,BU,C or D Time-base counter equal to CMPAU, CMPBU, CMPC or CMPD (depending the value of x) when the timer is decrementing
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetEventTriggerInterruptStatus
```
boolean Cdd_Pwm_GetEventTriggerInterruptStatus(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Return the interrupt status.
This function returns the EPWM interrupt status.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: Returns true if EPWM interrupt was generated, false if no interrupt was generated
**Note**: This function doesn't return the Trip Zone status.
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ClearEventTriggerInterruptFlag
```
void Cdd_Pwm_ClearEventTriggerInterruptFlag(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Clear interrupt flag.
This function clears the EPWM interrupt flag.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureInterruptEventCountInit
```
void Cdd_Pwm_ConfigureInterruptEventCountInit(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disable Pre-interrupt count load.
This function Enable/disables the EPWM interrupt counter to be pre-interrupt loaded with a count value
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Enable/Disable selection
**Return**: None
**Note**: This is valid only for advanced/expanded interrupt mode
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ForceInterruptEventCountInit
```
void Cdd_Pwm_ForceInterruptEventCountInit(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Force a software pre interrupt event counter load.
This function forces the EPWM interrupt counter to be loaded with the contents set by Cdd_Pwm_SetPreInterruptEventCount().
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: None
**Note**: Make sure the Cdd_Pwm_EnablePreInterruptEventCountLoad() function is called before invoking this function.
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetInterruptEventCountInitValue
```
void Cdd_Pwm_SetInterruptEventCountInitValue(
Cdd_Pwm_InstanceType InstanceId,
uint16 EventCount
)
```
**Brief**:
Set interrupt count.
This function sets the EPWM interrupt count. eventCount is the value of the pre-interrupt value that is to be loaded. The maximum value of eventCount is 15.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **EventCount** The EPWM interrupt count value
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetInterruptEventCount
```
uint16 Cdd_Pwm_GetInterruptEventCount(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Get the interrupt count.
This function returns the EPWM interrupt event count.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: The interrupt event counts that have occurred
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ForceEventTriggerInterrupt
```
void Cdd_Pwm_ForceEventTriggerInterrupt(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Force EPWM interrupt.
This function forces an EPWM interrupt.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetMixEvtTriggerSource
```
void Cdd_Pwm_SetMixEvtTriggerSource(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_EtMixSignalSelectType EtMixSignal,
Cdd_Pwm_EvtMixTriggerSourceType InterruptSource
)
```
**Brief**:
Sets the mixed event trigger interrupt source.
This function sets the EPWM interrupt source
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **EtMixSignal** The module for which trigger needs to be enabled
* CDD_PWM_ETMIX_INTERRUPT - Mixed ET Interrupt signal
* CDD_PWM_ETMIX_SOCA - Mixed ET SOCA signal
* CDD_PWM_ETMIX_SOCB - Mixed ET SOCB signal
* **InterruptSource** The Mixed ET interrupt source
* CDD_PWM_ETMIX_TBCTR_ZERO - Time-base counter equal to zero
* CDD_PWM_ETMIX_TBCTR_PERIOD - Time-base counter equal to period
* CDD_PWM_ETMIX_TBCTR_U_CMPx - Where x is AU,BU,C or D Time-base counter equal to CMPAU, CMPBU, CMPC or CMPD (depending the value of x) when the timer is incrementing
* CDD_PWM_ETMIX_TBCTR_D_CMPx - Where x is AU,BU,C or D Time-base counter equal to CMPAU, CMPBU, CMPC or CMPD (depending the value of x) when the timer is decrementing
* CDD_PWM_ETMIX_DCAEVT1 - DCAEVT1 interrupt signal to trigger mixed ET interrupt
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureAdcTrigger
```
void Cdd_Pwm_ConfigureAdcTrigger(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_AdcStartOfConversionType AdcSocType,
boolean Select
)
```
**Brief**:
Enable/disable Adc SOC event.
This function Enable/disables the EPWM module to trigger an Adc SOC event.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **AdcSocType** The Adc SOC type
* CDD_PWM_SOC_A - SOC A
* CDD_PWM_SOC_B - SOC B
* **Select** Enable/Disable selection
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetAdcTriggerSource
```
void Cdd_Pwm_SetAdcTriggerSource(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_AdcStartOfConversionType AdcSocType,
Cdd_Pwm_AdcStartOfConversionSourceType SocSource
)
```
**Brief**:
Sets the EPWM SOC source.
This function sets the EPWM Adc SOC source
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **AdcSocType** The Adc SOC type
* CDD_PWM_SOC_A - SOC A
* CDD_PWM_SOC_B - SOC B
* **SocSource** The SOC source
* CDD_PWM_SOC_DCXEVT1 - Event is based on DCxEVT1
* CDD_PWM_SOC_TBCTR_ZERO - Time-base counter equal to zero
* CDD_PWM_SOC_TBCTR_PERIOD - Time-base counter equal to period
* CDD_PWM_SOC_TBCTR_ETSOCAMIX - Time-base counter based on mixed events (ETSOCAMIX)
* CDD_PWM_SOC_TBCTR_U_CMPx - Where x is AU,BU,C or D Time-base counter equal to CMPAU, CMPBU, CMPC or CMPD (depending the value of x) when the timer is incrementing
* CDD_PWM_SOC_TBCTR_D_CMPx - Where x is AU,BU,C or D Time-base counter equal to CMPAU, CMPBU, CMPC or CMPD (depending the value of x) when the timer is decrementing
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetAdcTriggerEventPrescale
```
void Cdd_Pwm_SetAdcTriggerEventPrescale(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_AdcStartOfConversionType AdcSocType,
uint16 PreScaleCount
)
```
**Brief**:
Sets the EPWM SOC event counts.
This function sets the SOC event count that determines the number of events that have to occur before an SOC is issued.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **AdcSocType** The Adc SOC type
* CDD_PWM_SOC_A - SOC A
* CDD_PWM_SOC_B - SOC B
* **PreScaleCount** The event count number
* [1 - 15] - Generate SOC pulse every preScaleCount up to 15 events
**Return**: None
**Note**: A PreScaleCount value of 0 disables the prescale
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetAdcTriggerFlagStatus
```
boolean Cdd_Pwm_GetAdcTriggerFlagStatus(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_AdcStartOfConversionType AdcSocType
)
```
**Brief**:
Return the SOC event status.
This function returns the EPWM SOC status.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **AdcSocType** The Adc SOC type
* CDD_PWM_SOC_A - SOC A
* CDD_PWM_SOC_B - SOC B
**Return**: Returns true if the selected AdcSocType SOC was generated. Returns false if the selected AdcSocType SOC was not generated.
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ClearAdcTriggerFlag
```
void Cdd_Pwm_ClearAdcTriggerFlag(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_AdcStartOfConversionType AdcSocType
)
```
**Brief**:
Clear SOC flag.
This function clears the EPWM SOC flag.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **AdcSocType** The Adc SOC type
* CDD_PWM_SOC_A - SOC A
* CDD_PWM_SOC_B - SOC B
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureAdcTriggerEventCountInit
```
void Cdd_Pwm_ConfigureAdcTriggerEventCountInit(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_AdcStartOfConversionType AdcSocType,
boolean Select
)
```
**Brief**:
Enable/disable Pre-SOC event count load.
This function Enable/disables the EPWM SOC event counter which is set by the Cdd_Pwm_SetAdcTriggerEventCountInitValue() function to be loaded before an SOC event.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **AdcSocType** The Adc SOC type
* CDD_PWM_SOC_A - SOC A
* CDD_PWM_SOC_B - SOC B
* **Select** Enable/Disable selection
**Return**: None
**Note**: This is valid only for advanced/expanded SOC mode
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ForceAdcTriggerEventCountInit
```
void Cdd_Pwm_ForceAdcTriggerEventCountInit(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_AdcStartOfConversionType AdcSocType
)
```
**Brief**:
Force a software pre SOC event counter load.
This function forces the EPWM SOC counter to be loaded with the contents set by Cdd_Pwm_SetPreAdcStartOfConversionEventCount().
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **AdcSocType** The Adc SOC type
**Return**: None
**Note**: Make sure the Cdd_Pwm_EnableAdcTriggerEventCountInit() function is called before invoking this function.
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetAdcTriggerEventCountInitValue
```
void Cdd_Pwm_SetAdcTriggerEventCountInitValue(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_AdcStartOfConversionType AdcSocType,
uint16 EventCount
)
```
**Brief**:
Set Adc Trigger count values.
This function sets the EPWM Adc Trigger count values.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **AdcSocType** The Adc SOC type
* CDD_PWM_SOC_A - SOC A
* CDD_PWM_SOC_B - SOC B
* **EventCount** The EPWM interrupt count value (maximum value is 15)
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetAdcTriggerEventCount
```
uint16 Cdd_Pwm_GetAdcTriggerEventCount(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_AdcStartOfConversionType AdcSocType
)
```
**Brief**:
Get the SOC event count.
This function returns the EPWM SOC event count.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **AdcSocType** The Adc SOC type
* CDD_PWM_SOC_A - SOC A
* CDD_PWM_SOC_B - SOC B
**Return**: The SOC event counts that have occurred
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ForceAdcTrigger
```
void Cdd_Pwm_ForceAdcTrigger(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_AdcStartOfConversionType AdcSocType
)
```
**Brief**:
Force SOC event.
This function forces an EPWM SOC event.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **AdcSocType** The Adc SOC type
* CDD_PWM_SOC_A - SOC A
* CDD_PWM_SOC_B - SOC B
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SelectDigitalCompareTripInput
```
void Cdd_Pwm_SelectDigitalCompareTripInput(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DigitalCompareTripInputType TripInput,
Cdd_Pwm_DigitalCompareType DcType
)
```
**Brief**:
Set the DC trip input.
This function sets the trip input to the Digital Compare (DC). For a given dcType The function sets the tripSource to be the input to the DC.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **TripInput** The trip source
* CDD_PWM_DC_TRIP_TRIPINx - Trip x, where x ranges from 1 to 15 excluding 13U
* CDD_PWM_DC_TRIP_COMBINATION - selects all the Trip signals whose input is enabled by the CDD_PWM_enableDigitalCompareTripCombinationInput() function
* **DcType** The Digital Compare type
* CDD_PWM_DC_TYPE_DCAH - Digital Compare A High
* CDD_PWM_DC_TYPE_DCAL - Digital Compare A Low
* CDD_PWM_DC_TYPE_DCBH - Digital Compare B High
* CDD_PWM_DC_TYPE_DCBL - Digital Compare B Low
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureDigitalCompareBlankingWindow
```
void Cdd_Pwm_ConfigureDigitalCompareBlankingWindow(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disable DC filter blanking window.
This function Enable/disables the DC filter blanking window.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Enable/Disable selection
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureDigitalCompareWindowInverseMode
```
void Cdd_Pwm_ConfigureDigitalCompareWindowInverseMode(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disable Digital Compare Window inverse mode.
This function Enable/disables the Digital Compare Window inverse mode This will invert the blanking window.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Enable/Disable selection
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDigitalCompareBlankingEvent
```
void Cdd_Pwm_SetDigitalCompareBlankingEvent(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DigitalCompareBlankingPulseType BlankingPulse
)
```
**Brief**:
Set the Digital Compare filter blanking pulse.
This function sets the input pulse that starts the Digital Compare blanking window.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **BlankingPulse** Pulse that starts blanking window
* CDD_PWM_DC_WINDOW_START_TBCTR_PERIOD - Time base counter equals period
* CDD_PWM_DC_WINDOW_START_TBCTR_ZERO - Time base counter equals zero
* CDD_PWM_DC_WINDOW_START_TBCTR_ZERO_PERIOD - Time base counter equals zero or period
* CDD_PWM_DC_WINDOW_START_BLANK_PULSE_MIX - Blanking pulse mix
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDigitalCompareFilterInput
```
void Cdd_Pwm_SetDigitalCompareFilterInput(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DigitalCompareFilterInputType FilterInput
)
```
**Brief**:
Set up the Digital Compare filter input.
This function sets the signal input source that will be filtered by the Digital Compare module
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **FilterInput** Digital Compare signal source
* CDD_PWM_DC_WINDOW_SOURCE_DCAEVT1 - DC filter signal source is DCAEVT1
* CDD_PWM_DC_WINDOW_SOURCE_DCAEVT2 - DC filter signal source is DCAEVT2
* CDD_PWM_DC_WINDOW_SOURCE_DCBEVT1 - DC filter signal source is DCBEVT1
* CDD_PWM_DC_WINDOW_SOURCE_DCBEVT2 - DC filter signal source is DCBEVT2
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureDigitalCompareEdgeFilter
```
void Cdd_Pwm_ConfigureDigitalCompareEdgeFilter(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disable Digital Compare Edge Filter.
This function Enable/disables the Digital Compare Edge filter to generate event after configured number of edges.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Enable/Disable selection
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDigitalCompareEdgeFilterMode
```
void Cdd_Pwm_SetDigitalCompareEdgeFilterMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DigitalCompareEdgeFilterModeType EdgeMode
)
```
**Brief**:
Set the Digital Compare Edge Filter Mode.
This function sets the Digital Compare Event filter mode
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **EdgeMode** Digital Compare Edge filter mode
* CDD_PWM_DC_EDGEFILT_MODE_RISING - DC edge filter mode is rising edge
* CDD_PWM_DC_EDGEFILT_MODE_FALLING - DC edge filter mode is falling edge
* CDD_PWM_DC_EDGEFILT_MODE_BOTH - DC edge filter mode is both edges
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDigitalCompareEdgeFilterEdgeCount
```
void Cdd_Pwm_SetDigitalCompareEdgeFilterEdgeCount(
Cdd_Pwm_InstanceType InstanceId,
uint16 EdgeCount
)
```
**Brief**:
Set the Digital Compare Edge Filter Edge Count.
This function sets the Digital Compare Event filter Edge Count to generate events.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **EdgeCount** Digital Compare event filter count
* CDD_PWM_DC_EDGEFILT_EDGECNT_0 - No edge is required to generate event
* CDD_PWM_DC_EDGEFILT_EDGECNT_1 - 1 edge is required for event generation
* CDD_PWM_DC_EDGEFILT_EDGECNT_2 - 2 edges are required for event generation
* CDD_PWM_DC_EDGEFILT_EDGECNT_3U - 3U edges are required for event generation
* CDD_PWM_DC_EDGEFILT_EDGECNT_4 - 4 edges are required for event generation
* CDD_PWM_DC_EDGEFILT_EDGECNT_5 - 5 edges are required for event generation
* CDD_PWM_DC_EDGEFILT_EDGECNT_6 - 6 edges are required for event generation
* CDD_PWM_DC_EDGEFILT_EDGECNT_7 - 7 edges are required for event generation
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetDigitalCompareEdgeFilterEdgeCount
```
uint16 Cdd_Pwm_GetDigitalCompareEdgeFilterEdgeCount(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Returns the Digital Compare Edge Filter Edge Count.
This function returns the configured Digital Compare Edge filter edge count required to generate events. It can return values from 0-7.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: Returns the configured DigitalCompare Edge filter edge count
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetDigitalCompareEdgeFilterEdgeStatus
```
uint16 Cdd_Pwm_GetDigitalCompareEdgeFilterEdgeStatus(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Returns the Digital Compare Edge filter captured edge count status.
This function returns the count of edges captured by Digital Compare Edge filter. It can return values from 0-7.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: Returns the count of captured edges
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDigitalCompareWindowOffset
```
void Cdd_Pwm_SetDigitalCompareWindowOffset(
Cdd_Pwm_InstanceType InstanceId,
uint16 WindowOffsetCount
)
```
**Brief**:
Set up the Digital Compare filter window offset.
This function sets the offset between window start pulse and blanking window in TBCLK count. The function takes a 16bit count value for the offset value
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **WindowOffsetCount** Blanking window offset length
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDigitalCompareWindowLength
```
void Cdd_Pwm_SetDigitalCompareWindowLength(
Cdd_Pwm_InstanceType InstanceId,
uint16 WindowLengthCount
)
```
**Brief**:
Set up the Digital Compare filter window length.
This function sets up the Digital Compare filter blanking window length in TBCLK count. The function takes a 16bit count value for the window length.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **WindowLengthCount** Blanking window length
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetDigitalCompareBlankingWindowOffsetCount
```
uint16 Cdd_Pwm_GetDigitalCompareBlankingWindowOffsetCount(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Return DC filter blanking window offset count.
This function returns DC filter blanking window offset count.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetDigitalCompareBlankingWindowLengthCount
```
uint16 Cdd_Pwm_GetDigitalCompareBlankingWindowLengthCount(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Return DC filter blanking window length count.
This function returns DC filter blanking window length count.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDigitalCompareEventSource
```
void Cdd_Pwm_SetDigitalCompareEventSource(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_DigitalCompareEventType DcEvent,
Cdd_Pwm_DigitalCompareEventSourceType DcEventSource
)
```
**Brief**:
Set up the Digital Compare Event source.
This function sets up the Digital Compare module Event sources.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Digital Compare module
* CDD_PWM_DC_MODULE_A: Digital Compare Module A
* CDD_PWM_DC_MODULE_B: Digital Compare Module B
* **DcEvent** Digital Compare Event number
* CDD_PWM_DC_EVENT_1: Digital Compare Event number 1
* CDD_PWM_DC_EVENT_2: Digital Compare Event number 2
* **DcEventSource** Digital Compare Event source
* CDD_PWM_DC_EVENT_SOURCE_FILT_SIGNAL: signal source is filtered
**Return**: None
**Note**: The signal source for this option is DCxEVTy, where the value of x is dependent on OutputChannel and the value of y is dependent on DcEvent. Possible signal sources are DCAEVT1U, DCBEVT1U, DCAEVT2 or DCBEVT2 depending on the value of both OutputChannel and DcEvent.
* CDD_PWM_DC_EVENT_SOURCE_ORIG_SIGNAL: signal source is unfiltered The signal source for this option is DCxEVTy.
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDigitalCompareEventSyncMode
```
void Cdd_Pwm_SetDigitalCompareEventSyncMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_DigitalCompareEventType DcEvent,
Cdd_Pwm_DigitalCompareSyncModeType SyncMode
)
```
**Brief**:
Set up the Digital Compare input sync mode.
This function sets up the Digital Compare module Event sources.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Digital Compare module
* CDD_PWM_DC_MODULE_A: Digital Compare Module A
* CDD_PWM_DC_MODULE_B: Digital Compare Module B
* **DcEvent** Digital Compare Event number
* CDD_PWM_DC_EVENT_1: Digital Compare Event number 1
* CDD_PWM_DC_EVENT_2: Digital Compare Event number 2
* **SyncMode** Digital Compare Event sync mode
* CDD_PWM_DC_EVENT_INPUT_SYNCED: DC input signal is synced with TBCLK
* CDD_PWM_DC_EVENT_INPUT_NOT SYNCED: DC input signal is not synced with TBCLK
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureDigitalCompareAdcTrigger
```
void Cdd_Pwm_ConfigureDigitalCompareAdcTrigger(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
boolean Select
)
```
**Brief**:
Enable/disable Digital Compare to generate Start of Conversion.
This function Enable/disables the Digital Compare Event 1 to generate Start of Conversion.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Digital Compare module
* CDD_PWM_DC_MODULE_A: Digital Compare Module A
* CDD_PWM_DC_MODULE_B: Digital Compare Module B
* **Select** Enable/disable selection
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureDigitalCompareSyncEvent
```
void Cdd_Pwm_ConfigureDigitalCompareSyncEvent(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
boolean Select
)
```
**Brief**:
Enable/disable Digital Compare to generate sync out pulse.
This function Enable/disables the Digital Compare Event 1 to generate sync out pulse
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Digital Compare module
* CDD_PWM_DC_MODULE_A: Digital Compare Module A
* CDD_PWM_DC_MODULE_B: Digital Compare Module B
* **Select** Enable/disable selection
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDigitalCompareCBCLatchMode
```
void Cdd_Pwm_SetDigitalCompareCBCLatchMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_DigitalCompareEventType DcEvent,
Cdd_Pwm_DigitalCompareCbcLatchModeType LatchMode
)
```
**Brief**:
Set up the Digital Compare CBC latch mode.
This function sets up the Digital Compare CBC latch mode
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Digital Compare module
* CDD_PWM_DC_MODULE_A: Digital Compare Module A
* CDD_PWM_DC_MODULE_B: Digital Compare Module B
* **DcEvent** Digital Compare Event number
* CDD_PWM_DC_EVENT_1: Digital Compare Event number 1
* CDD_PWM_DC_EVENT_2: Digital Compare Event number 2
* **LatchMode** Digital Compare CBC latch mode
* CDD_PWM_DC_CBC_LATCH_DISABLED: DC cycle-by-cycle(CBC) latch is disabled
* CDD_PWM_DC_CBC_LATCH_ENABLED: DC cycle-by-cycle(CBC) latch is enabled
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SelectDigitalCompareCBCLatchClearEvent
```
void Cdd_Pwm_SelectDigitalCompareCBCLatchClearEvent(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_DigitalCompareEventType DcEvent,
Cdd_Pwm_DigitalCompareCBCLatchClearEventType ClearEvent
)
```
**Brief**:
Sets the Digital Compare CBC latch clear event.
This function sets the Digital Compare CBC latch clear event.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Digital Compare module
* CDD_PWM_DC_MODULE_A: Digital Compare Module A
* CDD_PWM_DC_MODULE_B: Digital Compare Module B
* **DcEvent** Digital Compare Event number
* CDD_PWM_DC_EVENT_1: Digital Compare Event number 1
* CDD_PWM_DC_EVENT_2: Digital Compare Event number 2
* **ClearEvent** Digital Compare CBC latch clear event
* CDD_PWM_DC_CBC_LATCH_CLR_CNTR_ZERO: DC CBC latch is cleared when counter is zero
* CDD_PWM_DC_CBC_LATCH_CLR_ON_CNTR_PERIOD: DC CBC latch is cleared when counter is equal to period
* CDD_PWM_DC_CBC_LATCH_CLR_ON_CNTR_ZERO_PERIOD: DC CBC latch is cleared when either counter is zero or equal to period
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetDigitalCompareCBCLatchStatus
```
boolean Cdd_Pwm_GetDigitalCompareCBCLatchStatus(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_DigitalCompareEventType DcEvent
)
```
**Brief**:
Gets the Digital Compare CBC latch status.
This function returns the Digital Compare module cycle-by-cycle(CBC) latch status.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Digital Compare module
* CDD_PWM_DC_MODULE_A: Digital Compare Module A
* CDD_PWM_DC_MODULE_B: Digital Compare Module B
* **DcEvent** Digital Compare Event number
* CDD_PWM_DC_EVENT_1: Digital Compare Event number 1
* CDD_PWM_DC_EVENT_2: Digital Compare Event number 2
**Return**: Digital Compare CBC latch status
* true: CBC latch is enabled
* false: CBC latch is disabled
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureDigitalCompareCounterCapture
```
void Cdd_Pwm_ConfigureDigitalCompareCounterCapture(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disables the Time Base Counter Capture controller.
This function Enable/disables the time Base Counter Capture
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Enable/disable selection
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDigitalCompareCounterShadowMode
```
void Cdd_Pwm_SetDigitalCompareCounterShadowMode(
Cdd_Pwm_InstanceType InstanceId,
boolean EnableShadowMode
)
```
**Brief**:
Set the Time Base Counter Capture mode.
This function sets the mode the Time Base Counter value is read from. If EnableShadowMode is true, CPU reads of the DCCAP register will return the shadow register contents. If EnableShadowMode is false, CPU reads of the DCCAP register will return the active register contents.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **EnableShadowMode** Shadow read mode flag
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetDigitalCompareCaptureStatus
```
boolean Cdd_Pwm_GetDigitalCompareCaptureStatus(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Return the DC Capture event status.
This function returns the DC capture event status.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: DC capture event status
* true: A DC capture event has occurred
* false: No DC Capture event has occurred
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureDigitalCompareCounterCaptureMode
```
void Cdd_Pwm_ConfigureDigitalCompareCounterCaptureMode(
Cdd_Pwm_InstanceType InstanceId,
boolean DisableClearMode
)
```
**Brief**:
Configures DC capture operating mode.
This function is used to configure the DC capture operating mode If DisableClearMode is false, the TBCNT value is captured in active register on occurrence of DCEVTFILT event. The trip events are ignored until next PRD or ZRO event re-triggers the capture mechanism. If DisableClearMode is true, the TBCNT value is captured, CAPSTS flag is set and further trips are ignored until CAPSTS bit is cleared.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **DisableClearMode** Clear mode bit
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ClearDigitalCompareCaptureStatusFlag
```
void Cdd_Pwm_ClearDigitalCompareCaptureStatusFlag(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Clears DC capture latched status flag.
This function is used to clear the CAPSTS (set) condition.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetDigitalCompareCaptureCount
```
uint16 Cdd_Pwm_GetDigitalCompareCaptureCount(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Return the DC Time Base Counter capture value.
This function returns the DC Time Base Counter capture value The value read is determined by the mode as set in the Cdd_Pwm_SetTimeBaseCounterReadMode() function.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: DC Time Base Counter Capture count value
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureDigitalCompareTripCombinationInput
```
void Cdd_Pwm_ConfigureDigitalCompareTripCombinationInput(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DcTripInputType TripInput,
Cdd_Pwm_DigitalCompareType DcType,
boolean Select
)
```
**Brief**:
Enable/disable DC TRIP combinational input.
This function Enable/disables the specified Trip input.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **TripInput** Trip number
* CDD_PWM_DC_COMBINATIONAL_TRIPINx, where x is 1U,2U,...12U,14U,15
* **DcType** Digital Compare module
* CDD_PWM_DC_TYPE_DCAH: Digital Compare A High
* CDD_PWM_DC_TYPE_DCAL: Digital Compare A Low
* CDD_PWM_DC_TYPE_DCBH: Digital Compare B High
* CDD_PWM_DC_TYPE_DCBL: Digital Compare B Low
* **Select** Enable/disable selection
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureCaptureInEvent
```
void Cdd_Pwm_ConfigureCaptureInEvent(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disables the Capture event.
This function Enable/disables the CAPIN.sync on which the edge detection logic is performed.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Enable/disable selection
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigCaptureGateInputPolarity
```
void Cdd_Pwm_ConfigCaptureGateInputPolarity(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_SelectCaptureGateInputPolarityType PolaritySelect
)
```
**Brief**:
Polarity selection for capture gate input.
This function selects the input polarity for capture gate
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **PolaritySelect** Polarity to be selected for CAPGATE
* CDD_PWM_CAPGATE_INPUT_ALWAYS_ON: always on
* CDD_PWM_CAPGATE_INPUT_ALWAYS_OFF: always off
* CDD_PWM_CAPGATE_INPUT_SYNC: CAPGATE.sync
* CDD_PWM_CAPGATE_INPUT_SYNC_INVERT: CAPGATE.sync inverted
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_InvertCaptureInputPolarity
```
void Cdd_Pwm_InvertCaptureInputPolarity(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_SelectCaptureInputPolarityType PolaritySelect
)
```
**Brief**:
Polarity selection for capture input.
This function selects the input polarity for capture
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **PolaritySelect** Polarity to be selected for CAPIN
* CDD_PWM_CAPTURE_INPUT_CAPIN_SYNC: not inverted
* CDD_PWM_CAPTURE_INPUT_CAPIN_SYNC_INVERT: inverted
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureIndependentPulseLogic
```
void Cdd_Pwm_ConfigureIndependentPulseLogic(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disables independent pulse selection for Blanking and Capture Logic.
This function Enable/disables pulse selection determined by the CAPMIXSEL register.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Enable/disable selection
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ForceCaptureEventLoad
```
void Cdd_Pwm_ForceCaptureEventLoad(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Capture event force load.
This function forces a load to occur on DCCAP.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SelectCaptureTripInput
```
void Cdd_Pwm_SelectCaptureTripInput(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DigitalCompareTripInputType TripInput,
Cdd_Pwm_CaptureInputType DcType
)
```
**Brief**:
Set the capture trip input.
This function sets the trip input to the Digital Compare (DC). For a given dcType The function sets the tripSource to be the input to the DC.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **TripInput** Trip source
* CDD_PWM_DC_TRIP_TRIPINx: Trip x, where x ranges from 1 to 15 excluding 13U
* CDD_PWM_DC_TRIP_COMBINATION: selects all the Trip signals whose input is enabled by the CDD_PWM_enableCaptureTripCombinationInput() function
* **DcType** Digital Compare type
* CDD_PWM_CAPTURE_GATE
* CDD_PWM_CAPTURE_INPUT
**Return**: None
### function Cdd_Pwm_ConfigureCaptureTripCombinationInput
```
void Cdd_Pwm_ConfigureCaptureTripCombinationInput(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DcTripInputType TripInput,
Cdd_Pwm_CaptureInputType DcType,
boolean Select
)
```
**Brief**:
Enable/disable Capture TRIP combinational input.
This function Enable/disables the specified Trip input.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **TripInput** Trip number. Valid values:
* CDD_PWM_DC_COMBINATIONAL_TRIPINx, where x is 1U,2U,...12U,14U,15
* **DcType** Digital Compare module Valid values:
* CDD_PWM_CAPTURE_GATE
* CDD_PWM_CAPTURE_INPUT
* **Select** Boolean to enable/disable the trip input
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureValleyCapture
```
void Cdd_Pwm_ConfigureValleyCapture(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Valley switching.
Enable/disable valley capture mode
This function Enable/disables Valley Capture mode
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Boolean to enable/disable valley capture mode
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_StartValleyCapture
```
void Cdd_Pwm_StartValleyCapture(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Start valley capture mode.
This function starts Valley Capture sequence
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: None
**Precondition**: Make sure you invoke Cdd_Pwm_SetValleyTriggerSource with the trigger variable set to CDD_PWM_VALLEY_TRIGGER_EVENT_SOFTWARE before calling this function.
**Postcondition**: None
### function Cdd_Pwm_SetValleyTriggerSource
```
void Cdd_Pwm_SetValleyTriggerSource(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_ValleyTriggerSourceType Trigger
)
```
**Brief**:
Set valley capture trigger.
This function sets the trigger value that initiates Valley Capture sequence
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Trigger** Valley counter trigger
**Return**: None
**Precondition**: None
**Postcondition**: Set the number of Trigger source events for starting and stopping the valley capture using Cdd_Pwm_SetValleyTriggerEdgeCounts().
### function Cdd_Pwm_SetValleyTriggerEdgeCounts
```
void Cdd_Pwm_SetValleyTriggerEdgeCounts(
Cdd_Pwm_InstanceType InstanceId,
uint16 StartCount,
uint16 StopCount
)
```
**Brief**:
Set valley capture trigger source count.
This function sets the number of trigger events required to start and stop the valley capture count. Maximum values for both startCount and stopCount is 15 corresponding to the 15th edge of the trigger event.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **StartCount** Number of events to start the valley capture
* **StopCount** Number of events to stop the valley capture
**Return**: None
**Note**: A startCount value of 0 prevents starting the valley counter. A stopCount value of 0 prevents the valley counter from stopping.
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureValleyHwDelay
```
void Cdd_Pwm_ConfigureValleyHwDelay(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disable valley switching delay.
This function Enable/disables Valley switching delay.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Boolean to enable/disable valley switching delay
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetValleySwDelayValue
```
void Cdd_Pwm_SetValleySwDelayValue(
Cdd_Pwm_InstanceType InstanceId,
uint16 DelayOffsetValue
)
```
**Brief**:
Set Valley delay values.
This function sets the Valley delay value
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **DelayOffsetValue** Software defined delay offset value
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetValleyDelayDivider
```
void Cdd_Pwm_SetValleyDelayDivider(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_ValleyDelayModeType DelayMode
)
```
**Brief**:
Set Valley delay mode.
This function sets the Valley delay mode values.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **DelayMode** Valley delay mode
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetValleyEdgeStatus
```
boolean Cdd_Pwm_GetValleyEdgeStatus(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_ValleyCounterEdgeType Edge
)
```
**Brief**:
Get the valley edge status bit.
This function returns the status of the start or stop valley status depending on the value of edge If a start or stop edge has occurred, the function returns true, if not it returns false
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Edge** Start or stop edge
**Return**: Returns true if the specified edge has occurred, Returns false if the specified edge has not occurred
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetValleyCount
```
uint16 Cdd_Pwm_GetValleyCount(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Get the Valley Counter value.
This function returns the valley time base count value which is captured upon occurrence of the stop edge condition selected by Cdd_Pwm_SetValleyTriggerSource() and by the stopCount variable of the Cdd_Pwm_SetValleyTriggerEdgeCounts() function.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: Returns the valley base time count
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetValleyHwDelay
```
uint16 Cdd_Pwm_GetValleyHwDelay(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Get the Valley delay value.
This function returns the hardware valley delay count.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: Returns the valley delay count
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureGlobalLoad
```
void Cdd_Pwm_ConfigureGlobalLoad(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disable Global shadow load mode.
This function Enable/disables Global shadow to active load mode of registers. The trigger source for loading shadow to active is determined by Cdd_Pwm_SetGlobalLoadTrigger() function.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Boolean to enable/disable global shadow load mode
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetGlobalLoadTrigger
```
void Cdd_Pwm_SetGlobalLoadTrigger(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_GlobalLoadTriggerType LoadTrigger
)
```
**Brief**:
Set Global load trigger.
This function configures the global load trigger for the specified PWM instance
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **LoadTrigger** Global load trigger source
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetGlobalLoadEventPrescale
```
void Cdd_Pwm_SetGlobalLoadEventPrescale(
Cdd_Pwm_InstanceType InstanceId,
uint16 PrescalePulseCount
)
```
**Brief**:
Set the number of Global load pulse event counts.
This function sets the number of Global Load pulse events that have to occurred before a global load pulse is issued. Valid values for prescaleCount range from 0 to 7. 0 being no event (disables counter), and 7 representing 7 events.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **PrescalePulseCount** Pulse event counts
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetGlobalLoadEventCount
```
uint16 Cdd_Pwm_GetGlobalLoadEventCount(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Return the number of Global load pulse event counts.
This function returns the number of Global Load pulse events that have occurred. These pulse events are set by the Cdd_Pwm_SetGlobalLoadTrigger() function.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: Number of Global Load pulse events that have occurred
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureGlobalLoadOneShotMode
```
void Cdd_Pwm_ConfigureGlobalLoadOneShotMode(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disable One shot global shadow to active load.
This function Enable/disables a one time global shadow to active load. Register load happens every time the event set by the Cdd_Pwm_SetGlobalLoadTrigger() occurs.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Boolean to enable/disable one shot global shadow to active load
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetGlobalLoadOneShotLatch
```
void Cdd_Pwm_SetGlobalLoadOneShotLatch(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Enable One shot global shadow to active load.
This function enables a one time global shadow to active load. Register load happens every time the event set by the Cdd_Pwm_SetGlobalLoadTrigger() occurs.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ForceGlobalLoadOneShotEvent
```
void Cdd_Pwm_ForceGlobalLoadOneShotEvent(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Force a software One shot global shadow to active load pulse.
This function forces a software a one time global shadow to active load pulse
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureGlobalLoadRegisters
```
void Cdd_Pwm_ConfigureGlobalLoadRegisters(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_GlobalLoadType LoadRegister,
boolean Select
)
```
**Brief**:
Enable/disable a register to be loaded Globally.
This function Enable/disables the register specified by loadRegister to be globally loaded. Valid values for loadRegister are:
* CDD_PWM_GL_REGISTER_TBPRD_TBPRDHR - Register TBPRD:TBPRDHR
* CDD_PWM_GL_REGISTER_CMPA_CMPAHR - Register CMPA:CMPAHR
* CDD_PWM_GL_REGISTER_CMPB_CMPBHR - Register CMPB:CMPBHR
* CDD_PWM_GL_REGISTER_CMPC - Register CMPC
* CDD_PWM_GL_REGISTER_CMPD - Register CMPD
* CDD_PWM_GL_REGISTER_DBRED_DBREDHR - Register DBRED:DBREDHR
* CDD_PWM_GL_REGISTER_DBFED_DBFEDHR - Register DBFED:DBFEDHR
* CDD_PWM_GL_REGISTER_DBCTL - Register DBCTL
* CDD_PWM_GL_REGISTER_AQCTLA_AQCTLA2 - Register AQCTLA/A2
* CDD_PWM_GL_REGISTER_AQCTLB_AQCTLB2 - Register AQCTLB/B2
* CDD_PWM_GL_REGISTER_AQCSFRC - Register AQCSFRC
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **LoadRegister** Register to be globally loaded
* **Select** Boolean to enable/disable global loading for the register
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_LockRegisters
```
void Cdd_Pwm_LockRegisters(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_LockRegisterGroupType RegisterGroup
)
```
**Brief**:
Lock registers.
This function locks the specified register group.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **RegisterGroup** Register group to lock
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureXCmpMode
```
void Cdd_Pwm_ConfigureXCmpMode(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
XCMP related APIs.
Enable/disable EPWM XCMP mode
This function Enable/disables the EPWM XCMP mode
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Boolean to enable/disable XCMP mode
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureSplitXCmp
```
void Cdd_Pwm_ConfigureSplitXCmp(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disable EPWM XCMP Split.
This function splits 8 XCMP registers between CMPA and CMPB equally.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Boolean to enable/disable XCMP split
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_AllocAXCmp
```
void Cdd_Pwm_AllocAXCmp(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_XCmp_AllocCmpAType Alloctype
)
```
**Brief**:
Allocates XCMP registers to CMPA.
This function gives us choice to allocate range of XCMP registers to CMPA Valid values for alloctype are: CDD_PWM_XCMP_NONE_CMPA - Allocate 0 XCMP registers to CMPA CDD_PWM_XCMP_1_CMPA - Allocate XCMP1 register to CMPA CDD_PWM_XCMP_2_CMPA - Allocate XCMP1- XCMP2 registers to CMPA CDD_PWM_XCMP_3U_CMPA - Allocate XCMP1- XCMP3U register to CMPA CDD_PWM_XCMP_4_CMPA - Allocate XCMP1- XCMP4 registers to CMPA CDD_PWM_XCMP_5_CMPA - Allocate XCMP1- XCMP5 register to CMPA CDD_PWM_XCMP_6_CMPA - Allocate XCMP1- XCMP6 registers to CMPA CDD_PWM_XCMP_7_CMPA - Allocate XCMP1- XCMP7 register to CMPA CDD_PWM_XCMP_8_CMPA - Allocate XCMP1- XCMP8 register to CMPA
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Alloctype** Range of XCMP registers to be allocated to CMPA
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_AllocBXCmp
```
void Cdd_Pwm_AllocBXCmp(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_XCmp_AllocCmpBType Alloctype
)
```
**Brief**:
Allocates XCMP registers to CMPB.
This function gives us choice to allocate range of XCMP registers to CMPB Valid values for alloctype are: CDD_PWM_XCMP_1_CMPB - Allocate XCMP5 register to CMPB CDD_PWM_XCMP_2_CMPB - Allocate XCMP5- XCMP6 registers to CMPB CDD_PWM_XCMP_3U_CMPB - Allocate XCMP5- XCMP7 register to CMPB CDD_PWM_XCMP_4_CMPB - Allocate XCMP5- XCMP8 registers to CMPB
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Alloctype** Range of XCMP registers to be allocated to CMPB
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetXCmpRegValue
```
void Cdd_Pwm_SetXCmpRegValue(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_XCmpRegType XCmpReg,
uint16 XCmpValue
)
```
**Brief**:
Writes values to XCMP registers.
This function writes xcmpvalue to XCMP registers. Valid values for xcmpReg are: CDD_PWM_XCMP[1-8]_[ACTIVE/SHADOW1/SHADOW2/SHADOW3] -XCMP[1-8]_[ACTIVE/SHADOW1/SHADOW2/SHADOW3] CDD_PWM_XTBPRD_ACTIVE -XTBPRD_ACTIVE CDD_PWM_XTBPRD_SHADOW1 -XTBPRD_SHADOW1 CDD_PWM_XTBPRD_SHADOW2 -XTBPRD_SHADOW2 CDD_PWM_XTBPRD_SHADOW3 -XTBPRD_SHADOW3
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **XCmpReg** XCMP register offset
* **XCmpValue** Value to be written to XCMP registers
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetCmpShadowRegValue
```
void Cdd_Pwm_SetCmpShadowRegValue(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_XCompareRegType XCmpReg,
uint16 XCmpValue
)
```
**Brief**:
Writes values to CMPx Shadow registers.
This function writes cmpvalue to CMPC/D shadow registers. Valid values for cmpReg are: CDD_PWM_CMPC_SHADOW1 -CMPC_SHADOW1 CDD_PWM_CMPD_SHADOW1 -CMPD_SHADOW1 CDD_PWM_CMPC_SHADOW2 -CMPC_SHADOW2 CDD_PWM_CMPD_SHADOW2 -CMPD_SHADOW2 CDD_PWM_CMPC_SHADOW3 -CMPC_SHADOW3 CDD_PWM_CMPD_SHADOW3 -CMPD_SHADOW3
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **XCmpReg** CMP register offset
* **XCmpValue** Value to be written to CMPC/D shadow registers
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetXMinMaxRegValue
```
void Cdd_Pwm_SetXMinMaxRegValue(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_XMinMaxRegType XMinMaxReg,
uint16 XCmpValue
)
```
**Brief**:
Writes values to XMINMAX registers.
This function writes xcmpvalue to XCMP registers. Valid values for xminmaxReg are: CDD_PWM_XMIN_ACTIVE -XMIN_ACTIVE CDD_PWM_XMAX_ACTIVE -XMAX_ACTIVE CDD_PWM_XMIN_SHADOW1 -XMIN_SHADOW1 CDD_PWM_XMAX_SHADOW1 -XMAX_SHADOW1 CDD_PWM_XMIN_SHADOW2 -XMIN_SHADOW2 CDD_PWM_XMAX_SHADOW2 -XMAX_SHADOW2 CDD_PWM_XMIN_SHADOW3 -XMIN_SHADOW3 CDD_PWM_XMAX_SHADOW3 -XMAX_SHADOW3
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **XMinMaxReg** XCMP register offset
* **XCmpValue** Value to be written to XCMP registers
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetXCmpActionQualifierAction
```
void Cdd_Pwm_SetXCmpActionQualifierAction(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_XCmpShadowSetType ShadowSet,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_ActionQualifierOutputType Output,
Cdd_Pwm_XCmpAqOutputEventType Event
)
```
**Brief**:
Set up Action qualifier outputs based on XAQ registers.
This function sets up the Action Qualifier output on EPWM A or EPWMBU, depending on the value of EpwmOutput, to a value specified by outPut based on the input events - specified by event. The following are valid values for the parameters.
* EpwmOutput
* CDD_PWM_AQ_OUTPUT_A - EPWMxA output
* CDD_PWM_AQ_OUTPUT_B - EPWMxB output -shadowset
* CDD_PWM_XCMP_ACTIVE - XCMP set is Active
* CDD_PWM_XCMP_SHADOW1 - XCMP set is Shadow 1
* CDD_PWM_XCMP_SHADOW2 - XCMP set is Shadow 2
* CDD_PWM_XCMP_SHADOW3 - XCMP set is Shadow 3U
* output
* CDD_PWM_AQ_OUTPUT_NO_CHANGE - No change in the output pins
* CDD_PWM_AQ_OUTPUT_LOW - Set output pins to low
* CDD_PWM_AQ_OUTPUT_HIGH - Set output pins to High
* CDD_PWM_AQ_OUTPUT_TOGGLE - Toggle the output pins
* event CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_XCMP1 -Time base counter equals XCMP1 CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_XCMP2 -Time base counter equals XCMP2 CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_XCMP3U -Time base counter equals XCMP3U CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_XCMP4 -Time base counter equals XCMP4 CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_XCMP5 -Time base counter equals XCMP5 CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_XCMP6 -Time base counter equals XCMP6 CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_XCMP7 -Time base counter equals XCMP7 CDD_PWM_AQ_OUTPUT_ON_TIMEBASE_XCMP8 -Time base counter equals XCMP8
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** EPWM pin type
* **ShadowSet** Shadow set number or active set
* **Output** Action Qualifier output
* **Event** Event that causes a change in output
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_EnableXLoad
```
void Cdd_Pwm_EnableXLoad(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Enables EPWM XCMP reload event.
This function enables the EPWM XCMP reload event.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ForceXLoad
```
void Cdd_Pwm_ForceXLoad(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Forces register loading from shadow buffers.
This function is used for software force loading of the events in global load mode
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetXCmpLoadMode
```
void Cdd_Pwm_SetXCmpLoadMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_XCmpLoadModeType Mode
)
```
**Brief**:
Selects the mode for the XCMP Shadow registers.
This function gives us choice to select the mode for XCMP shadow registers Valid values for mode are: CDD_PWM_XCMP_LOADONCE - Load mode is LOADONCE CDD_PWM_XCMP_LOADMULTIPLE - Load mode is LOADMULTIPLE
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Mode** Load mode selection for XCMP Shadow registers
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetXCmpShadowLevel
```
void Cdd_Pwm_SetXCmpShadowLevel(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_XCmpShadowLevelType Level
)
```
**Brief**:
Selects the shadow register level allocation.
This function gives us choice to select the XCMP shadow registers level Valid values for alloctype are: CDD_PWM_XCMP_SHADOWLEVEL_0 - Only Active reg is available CDD_PWM_XCMP_SHADOWLEVEL_1 - SHDW1 and Active regs CDD_PWM_XCMP_SHADOWLEVEL_2 - SHDW2U, SHDW1 and Active regs CDD_PWM_XCMP_SHADOWLEVEL_3U - SHDW3U, SHDW2U, SHDW1 and Active regs
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Level** Shadow register level allocation options
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetXCmpShadowBufPtrLoadOnce
```
void Cdd_Pwm_SetXCmpShadowBufPtrLoadOnce(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_XCmpShadowBufPtrType Ptr
)
```
**Brief**:
Selects which shadow register set is in use.
This function gives us choice to select the shadow buffer to use currently. Valid values for alloctype are: CDD_PWM_XCMP_XLOADCTL_SHDWBUFPTR_NULL - No Shadow buffer is in use CDD_PWM_XCMP_XLOADCTL_SHDWBUFPTR_ONE - Shadow buffer 1 is in use CDD_PWM_XCMP_XLOADCTL_SHDWBUFPTR_TWO - Shadow buffer 2 is in use CDD_PWM_XCMP_XLOADCTL_SHDWBUFPTR_THREE - Shadow buffer 3U is in use
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Ptr** Current shadow buffer in use
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetXCmpShadowRepeatBufxCount
```
void Cdd_Pwm_SetXCmpShadowRepeatBufxCount(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_XCmpShadowSetType Bufferset,
uint32 Count
)
```
**Brief**:
Chooses how many times Shadow buffer 2 or 3U is applied.
This function gives us choice to select how many times shadow buffer 2 or 3U is applied. Max value is 7. count = 0 - 1 time count = 1 - 2 times ..... count = 7U - 8 times Valid values for bufferset are: CDD_PWM_XCMP_SHADOW2 - XCMP set is Shadow 2 CDD_PWM_XCMP_SHADOW3 - XCMP set is Shadow 3U
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Bufferset** Shadow set number
* **Count** Number of times Shadow Buffer 2 or 3U is applied
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureMinimumDeadBand
```
void Cdd_Pwm_ConfigureMinimumDeadBand(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
boolean Select
)
```
**Brief**:
Minimum Dead Band Module related APIs.
Enable/disable Minimum DeadBand module
This function Enable/disables the Minimum DeadBand module Valid values for the input variables are:
* block
* CDD_PWM_MINDBCFG_ENABLEA - EPWM output A
* CDD_PWM_MINDBCFG_ENABLEB - EPWM output B
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Minimum DeadBand Block to be enabled
* **Select** Boolean to enable/disable Minimum DeadBand module
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_InvertMinimumDeadBandSignal
```
void Cdd_Pwm_InvertMinimumDeadBandSignal(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
boolean Invert
)
```
**Brief**:
Invert the Minimum DeadBand Reference Signal.
This function configures the Minimum DeadBand module to invert reference signal which is used in the Minimum DeadBand module Valid values for the input variables are:
* block
* CDD_PWM_MINDB_BLOCK_A - EPWM output A
* CDD_PWM_MINDB_BLOCK_B - EPWM output B
* invert
* CDD_PWM_MINDB_REF_SIG - No inversion
* CDD_PWM_MINDB_REF_SIG_INVERT - Invert the signal
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Minimum DeadBand block to be configured
* **Invert** Specifies whether reference signal is to be inverted or not
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SelectMinimumDeadBandAndOrLogic
```
void Cdd_Pwm_SelectMinimumDeadBandAndOrLogic(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
boolean Logic
)
```
**Brief**:
Select signal for AND OR logic of Minimum DeadBand Module.
This function configures how the signal will be combined with the PWM output. The signal can be inverted and ANDed with PWM output or it can be ORed with the PWM output. Valid values for the input variables are:
* block
* CDD_PWM_MINDB_BLOCK_A - EPWM output A
* CDD_PWM_MINDB_BLOCK_B - EPWM output B
* logic
* TRUE - CDD_PWM_MINDB_POLSEL_INVERT_LOGICAL_AND - Invert and Logical AND
* FALSE - CDD_PWM_MINDB_POLSEL_LOGICAL_OR - Logical OR
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Minimum DeadBand block to be configured
* **Logic** Specifies how the signal will be combined
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SelectMinimumDeadBandBlockingSignal
```
void Cdd_Pwm_SelectMinimumDeadBandBlockingSignal(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
boolean BlockingSignal
)
```
**Brief**:
Select Minimum DeadBand Blocking Signal.
This function configures the blocking signal for Minimum DeadBand module Either of the Block A or Block B signal can be selected as blocking signal. Valid values for the input variables are:
* block
* CDD_PWM_MINDB_BLOCK_A - EPWM output A
* CDD_PWM_MINDB_BLOCK_B - EPWM output B
* blockSrc
* CDD_PWM_MINDB_BLOCKING_SIGNAL_BYPASS - Block Source same
* CDD_PWM_MINDB_BLOCKING_SIGNAL_SWAPBLOCK - Block Source different
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Minimum DeadBand block to be configured
* **BlockingSignal** Blocking signal to be used for a block
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SelectMinimumDeadBandReferenceSignal
```
void Cdd_Pwm_SelectMinimumDeadBandReferenceSignal(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_MindbReferenceSignalType ReferenceSignal
)
```
**Brief**:
Select Minimum DeadBand Reference Signal.
This function selects the reference signal for Minimum DeadBand module Valid values for the input variables are:
* block
* CDD_PWM_MINDB_BLOCK_A - EPWM output A
* CDD_PWM_MINDB_BLOCK_B - EPWM output B
* reference
* CDD_PWM_MINDB_DEPWM - Minimum Dead Band DE reference
* CDD_PWM_MINDB_SEL_OUTXBAR_OUTy - Output y from PWM Output XBAR ('y' can be from 1 to 15) ex. **CDD_PWM_MINDB_SEL_OUTXBAR_OUT1**
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Minimum DeadBand block to be configured
* **ReferenceSignal** Reference signal to be selected
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetMinDeadBandDelay
```
uint16 Cdd_Pwm_GetMinDeadBandDelay(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel
)
```
**Brief**:
Get Minimum DeadBand Delay Value.
This function returns the delay value for the Minimum DeadBand module Valid values for the input variables are:
* block
* CDD_PWM_MINDB_BLOCK_A - EPWM output A
* CDD_PWM_MINDB_BLOCK_B - EPWM output B
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Minimum DeadBand block whose value is needed
**Return**: Delay value of the Minimum DeadBand module
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetMinimumDeadBandDelay
```
void Cdd_Pwm_SetMinimumDeadBandDelay(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
uint16 Delay
)
```
**Brief**:
Set the Minimum DeadBand Delay Value.
This function configures the Minimum DeadBand delay value for the specified block. Valid values for the input variables are:
* block
* CDD_PWM_MINDB_BLOCK_A - EPWM output A
* CDD_PWM_MINDB_BLOCK_B - EPWM output B
* delay: Minimum dead band delay on EPWM in terms of SYSCLK cycles
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Minimum DeadBand block to be configured
* **Delay** Delay value to be programmed for the Minimum DeadBand
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureIllegalComboLogic
```
void Cdd_Pwm_ConfigureIllegalComboLogic(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
boolean Select
)
```
**Brief**:
Illegal Combo Logic.
Enable/disable Illegal Combo Logic
This function Enable/disables the Illegal Combo Logic block. Valid values for the input variables are:
* block
* CDD_PWM_MINDB_BLOCK_A - EPWM output A
* CDD_PWM_MINDB_BLOCK_B - EPWM output B
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Illegal Combo Logic block to be enabled
* **Select** Enable/disable selection for Illegal Combo Logic
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SelectXbarInput
```
void Cdd_Pwm_SelectXbarInput(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_XbarInputType XbarInput
)
```
**Brief**:
Select XBAR input for Illegal Combo Logic.
This function selects which Xbar signal feeds into the Illegal Combo Logic. Valid values for the input variables are:
* block
* CDD_PWM_MINDB_BLOCK_A - EPWM output A
* CDD_PWM_MINDB_BLOCK_B - EPWM output B
* xbarInput
* CDD_PWM_MINDB_ICL_XBAR_OUTy - Output y from ICL XBAR ('y' can be from 0 to 15) ex. **CDD_PWM_MINDB_ICL_XBAR_OUT1**
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Illegal Combo Logic block to be configured
* **XbarInput** Xbar signal to feed into the Illegal Combo Logic
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetLutDecX
```
void Cdd_Pwm_SetLutDecX(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_LutDecXType Decx,
boolean Force
)
```
**Brief**:
Force Decx values.
This function programs value in the Decx register fields of the Illegal Combo Logic module Valid values for the input variables are:
* block
* CDD_PWM_MINDB_BLOCK_A - EPWM output A
* CDD_PWM_MINDB_BLOCK_B - EPWM output B
* decx
* CDD_PWM_MINDB_ICL_LUT_DECx - 'x' can be from 0 to 7
* force
* value that can be forced can be either 0 or 1
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** Illegal Combo Logic block to be configured
* **Decx** Register to be programmed
* **Force** Value to be programmed in the register
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureDiodeEmulationMode
```
void Cdd_Pwm_ConfigureDiodeEmulationMode(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Diode Emulation logic related APIs.
Enable/disable EPWM diode emulation mode
This function Enable/disables the EPWM diode emulation mode
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Enable/disable selection for diode emulation mode
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDiodeEmulationMode
```
void Cdd_Pwm_SetDiodeEmulationMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DiodeEmulationModeType Mode
)
```
**Brief**:
Selects the mode for the Diode emulation mode.
This function gives us choice to select the mode for Diode emulation mode Valid values for input variables are:
* mode CDD_PWM_DIODE_EMULATION_CBC - Diode Emulation mode is Cycle by Cycle CDD_PWM_DIODE_EMULATION_OST - Diode Emulation mode is One Shot
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Mode** Load mode selection for Diode emulation mode
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDiodeEmulationReentryDelay
```
void Cdd_Pwm_SetDiodeEmulationReentryDelay(
Cdd_Pwm_InstanceType InstanceId,
uint8 Delay
)
```
**Brief**:
Set EPWM diode emulation re-entry delay.
This function determines the blocking window after DEACTIVE flag is cleared in which setting of DEACTIVE flag is prevented from being set.
Valid values for input variables are:
* delay: Max value of delay is 256.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Delay** Re-entry delay in terms of number of PWMSYNCOUT events
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureDiodeEmulationTripLowSources
```
void Cdd_Pwm_ConfigureDiodeEmulationTripLowSources(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DETripLowSourceType Source
)
```
**Brief**:
Set EPWM diode emulation trip source for TripL.
This function is used to configure the comparator whose trip sources will be used. Valid values for _source_ are: CDD_PWM_DE_TRIPL_SRC_INPUTXBAR_OUT[0-16] - INPUTXBAR out[0-16] signal CDD_PWM_DE_TRIPL_SRC_CLBINPUTXBAR_OUT[0-16] - CLBINPUTXBAR out[0-16] signal CDD_PWM_DE_TRIPL_SRC_CMPSSTRIPL[1-11] - CMPSSTRIPL[1-11] signal
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Source** Trip source
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureDiodeEmulationTripHighSources
```
void Cdd_Pwm_ConfigureDiodeEmulationTripHighSources(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DETripHighSourceType Source
)
```
**Brief**:
Set EPWM diode emulation trip source for TripH.
This function is used to configure the comparator whose trip sources will be used. Valid values for _source_ are: CDD_PWM_DE_TRIPH_SRC_INPUTXBAR_OUT[0-16] - INPUTXBAR out[0-16] signal CDD_PWM_DE_TRIPH_SRC_CLBINPUTXBAR_OUT[0-16] - CLBINPUTXBAR out[0-16] signal CDD_PWM_DE_TRIPH_SRC_CMPSSTRIPH[1-11] - CMPSSTRIPH[1-11] signal
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Source** Trip source
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SelectDiodeEmulationPwmSignal
```
void Cdd_Pwm_SelectDiodeEmulationPwmSignal(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_DiodeEmulationSignalType DiodeEmuationsignal
)
```
**Brief**:
Selects EPWM diode emulation pwm signal.
This function is used to select the pwm signal in DE mode Valid values for channel are: CDD_PWM_DE_CHANNEL_A - Diode emulation channel A CDD_PWM_DE_CHANNEL_B - Diode emulation channel B
Valid values for signal are: CDD_PWM_DE_SYNC_TRIPH_OR_TRIPL - synchronized version of TRIPH or TRIPL signal CDD_PWM_DE_SYNC_INV_TRIPH_OR_TRIPL - synchronized and inverted version of TRIPH or TRIPL signal CDD_PWM_DE_LOW - a constant low signal CDD_PWM_DE_HIGH - a constant high signal
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** EPWM output channel
* **DiodeEmuationsignal** Signal selected by the TRIPSEL[A/B]
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SelectDiodeEmulationTripSignal
```
void Cdd_Pwm_SelectDiodeEmulationTripSignal(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_DiodeEmulationTripSrcType TripSrc
)
```
**Brief**:
Selects between TRIPH and TRIPL for an epwm channel in DE mode.
This function is used to select between TRIPH and TRIPL for a channel in DE mode Valid values for channel are: CDD_PWM_DE_CHANNEL_A - Diode emulation channel A CDD_PWM_DE_CHANNEL_B - Diode emulation channel B
Valid values for signal are: 0 for TRIPH 1 for TRIPL
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** EPWM output channel
* **TripSrc** Diode Emulation trip sources signal
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_NoBypassDiodeEmulationLogic
```
void Cdd_Pwm_NoBypassDiodeEmulationLogic(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
PWMTRIP does not bypass the diode emulation logic.
This function is used to go through DEL.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ByPassDiodeEmulationLogic
```
void Cdd_Pwm_ByPassDiodeEmulationLogic(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
PWMTRIP bypasses the diode emulation PWM generation logic.
This function is used to bypass DEL.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ForceDiodeEmulationActive
```
void Cdd_Pwm_ForceDiodeEmulationActive(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Forces DEACTIVE flag to 1.
This function is used to force DEACTIVE flag to 1.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ConfigureDiodeEmulationMonitorModeControl
```
void Cdd_Pwm_ConfigureDiodeEmulationMonitorModeControl(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable/disables DE monitor control mode.
This function is used to Enable/disable the DE monitor counter function.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Enable/disable selection for DE monitor mode
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDiodeEmulationMonitorModeStep
```
void Cdd_Pwm_SetDiodeEmulationMonitorModeStep(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_DiodeEmulationDirectionType Direction,
uint8 StepSize
)
```
**Brief**:
Sets the DE monitor counter step size.
This function is used to set the DE monitor counter step size Valid values for _direction_ are: CDD_PWM_DE_COUNT_UP - Diode emulation count up step size CDD_PWM_DE_COUNT_DOWN - Diode emulation count down step size
Max value of stepsize is 256.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Direction** Direction of the monitor counter counting either UP or DOWN
* **StepSize** Amount by which the counter increments or decrements at each step
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_SetDiodeEmulationMonitorCounterThreshold
```
void Cdd_Pwm_SetDiodeEmulationMonitorCounterThreshold(
Cdd_Pwm_InstanceType InstanceId,
uint16 Threshold
)
```
**Brief**:
Sets the DE monitor counter threshold value.
This function is used to set the DE monitor counter threshold.
Max value of threshold is 2^16.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Threshold** Max value till which the monitor counter can count
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_ClearDiodeEmulationActiveFlag
```
void Cdd_Pwm_ClearDiodeEmulationActiveFlag(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Clears DE mode active flag.
This function is used to clear the DE mode active flag
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetPhaseShift
```
void Cdd_Pwm_HrpwmSetPhaseShift(
Cdd_Pwm_InstanceType InstanceId,
uint32 PhaseCount
)
```
**Brief**:
Sets the consolidated phase shift value in high resolution mode.
This function sets the consolidated phase shift value, that is, both TBPHS and TBPHSHR values are configured together.
Call Cdd_Pwm_EnablePhaseShiftLoad & HRPWM_enableHRPhaseShiftLoad() functions to enable loading of the phaseCount in high resolution mode
**Note:** phaseCount is a 24-bit value **Note:** For configuring TBPHS = 0x3C, TBPHSHR = 0x2; phaseCount = 0x3C02
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **PhaseCount** Consolidated phase shift count value
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetHiResPhaseShiftOnly
```
void Cdd_Pwm_HrpwmSetHiResPhaseShiftOnly(
Cdd_Pwm_InstanceType InstanceId,
uint16 HrPhaseCount
)
```
**Brief**:
Sets only the high resolution phase shift value.
This function sets only the high resolution phase shift(TBPHSHR) value Call the HRPWM_enableHRPhaseShiftLoad() function to enable loading of the hrPhaseCount.
**Note:** hrPhaseCount is an 8-bit value
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **HrPhaseCount** High resolution phase shift count value
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetTimeBasePeriod
```
void Cdd_Pwm_HrpwmSetTimeBasePeriod(
Cdd_Pwm_InstanceType InstanceId,
uint32 PeriodCount
)
```
**Brief**:
Sets the consolidated period of time base counter used in HR mode.
This function sets the consolidated period of time base counter value (TBPRD:TBPRDHR) required in high resolution mode
User should map the desired period or frequency of the waveform into the correct periodCount.
**Note:** periodCount is a 24 bit value **Note:** For configuring TBPRD = 0x3C, TBPRDHR = 0xA; periodCount = 0x3C0A
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **PeriodCount** Consolidated period count value
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetHiResTimeBasePeriodOnly
```
void Cdd_Pwm_HrpwmSetHiResTimeBasePeriodOnly(
Cdd_Pwm_InstanceType InstanceId,
uint16 HrPeriodCount
)
```
**Brief**:
Sets only the high resolution time base counter.
This function sets only the high resolution time base counter(TBPRDHR) value
User should map the desired period or frequency of the waveform into the correct hrPeriodCount.
**Note:** hrPeriodCount is an 8-bit value
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **HrPeriodCount** High resolution period count value
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmGetTimeBasePeriod
```
uint32 Cdd_Pwm_HrpwmGetTimeBasePeriod(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Gets the consolidated time base period count used in HR mode.
This function gets the consolidated time base period(TBPRD:TBPRDHR) value used in high resolution mode
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: The consolidated time base period count value
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmGetHiResTimeBasePeriodOnly
```
uint16 Cdd_Pwm_HrpwmGetHiResTimeBasePeriodOnly(
Cdd_Pwm_InstanceType InstanceId
)
```
**Brief**:
Gets only the high resolution time base period count.
This function gets only the high resolution time base period(TBPRDHR) value
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
**Return**: The high resolution time base period count value
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetMepEdgeSelect
```
void Cdd_Pwm_HrpwmSetMepEdgeSelect(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_HrpwmMepEdgeModeType MepEdgeMode
)
```
**Brief**:
Sets the high resolution edge controlled by MEP (Micro Edge Positioner)
This function sets the edge of the PWM that is controlled by MEP (Micro Edge Positioner). Valid values for the parameters are:
* OutputChannel
* HRPWM_CHANNEL_A - HRPWM A
* HRPWM_CHANNEL_B - HRPWM B
* MepEdgeMode
* HRPWM_MEP_CTRL_DISABLE - HRPWM is disabled
* HRPWM_MEP_CTRL_RISING_EDGE - MEP (Micro Edge Positioner) controls rising edge
* HRPWM_MEP_CTRL_FALLING_EDGE - MEP (Micro Edge Positioner) controls falling edge
* HRPWM_MEP_CTRL_RISING_AND_FALLING_EDGE - MEP (Micro Edge Positioner) controls both edges.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** High resolution period module
* **MepEdgeMode** Edge of the PWM that is controlled by MEP
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetMepControlMode
```
void Cdd_Pwm_HrpwmSetMepControlMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_HrpwmMepCtrlModeType MepCtrlMode
)
```
**Brief**:
Sets the MEP (Micro Edge Positioner) control mode.
This function sets the mode (register type) the MEP (Micro Edge Positioner) will control. Valid values for the parameters are:
* OutputChannel
* HRPWM_CHANNEL_A - HRPWM A
* HRPWM_CHANNEL_B - HRPWM B
* MepCtrlMode
* HRPWM_MEP_DUTY_PERIOD_CTRL - MEP (Micro Edge Positioner) is controlled by value of CMPAHR/ CMPBHR(depending on the value of
channel) or TBPRDHR.
* HRPWM_MEP_PHASE_CTRL - MEP (Micro Edge Positioner) is controlled by TBPHSHR.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** High resolution period module
* **MepCtrlMode** The MEP (Micro Edge Positioner) control mode
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetCounterCompareShadowLoadEvent
```
void Cdd_Pwm_HrpwmSetCounterCompareShadowLoadEvent(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
Cdd_Pwm_HrpwmLoadModeType LoadEvent
)
```
**Brief**:
Sets the high resolution comparator load mode.
This function sets the shadow load mode of the high resolution comparator. The function sets the COMPA or COMPB register depending on the OutputChannel variable Valid values for the parameters are:
* OutputChannel
* HRPWM_CHANNEL_A - HRPWM A
* HRPWM_CHANNEL_B - HRPWM B
* LoadEvent
* HRPWM_LOAD_ON_CNTR_ZERO - load when counter equals zero
* HRPWM_LOAD_ON_CNTR_PERIOD - load when counter equals period
* HRPWM_LOAD_ON_CNTR_ZERO_PERIOD - load when counter equals zero or period
* HRPWM_LOAD_ON_CMPx_EQ - load on translator event CMPA/B-3
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** High resolution period module
* **LoadEvent** The MEP (Micro Edge Positioner) control mode
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetOutputSwapMode
```
void Cdd_Pwm_HrpwmSetOutputSwapMode(
Cdd_Pwm_InstanceType InstanceId,
boolean EnableOutputSwap
)
```
**Brief**:
Sets the high resolution output swap mode.
This function sets the HRPWM output swap mode If EnableOutputSwap is true, EPWMxA signal appears on EPWMxB output and EPWMxB signal appears on EPWMxA output. If it is false EPWMxA and EPWMxB outputs are unchanged.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **EnableOutputSwap** The output swap flag
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetChannelBOutputPath
```
void Cdd_Pwm_HrpwmSetChannelBOutputPath(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_HrpwmChannelBOutputType OutputOnB
)
```
**Brief**:
Sets the high resolution output on EPWMxB.
This function sets the HRPWM output signal on EPWMxB. If OutputOnB is HRPWM_OUTPUT_ON_B_INV_A, EPWMxB output is an inverted version of EPWMxA. If OutputOnB is HRPWM_OUTPUT_ON_B_NORMAL, EPWMxB output is EPWMxB.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputOnB** The output signal on EPWMxB
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmConfigureAutoConversion
```
void Cdd_Pwm_HrpwmConfigureAutoConversion(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enables MEP (Micro Edge Positioner) automatic scale mode.
This function enables the MEP (Micro Edge Positioner) to automatically scale HRMSTEP.
The SFO library will calculate required MEP steps per coarse steps and feed it to HRMSTEP register. The MEP calibration module will use the value in HRMSTEP to determine appropriate number of MEP steps represented by fractional duty cycle
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Boolean to enable/disable automatic conversion
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmConfigurePeriodControl
```
void Cdd_Pwm_HrpwmConfigurePeriodControl(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable high resolution period feature.
This function enables the high resolution period feature
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Boolean to enable/disable period control
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmConfigurePhaseShiftLoad
```
void Cdd_Pwm_HrpwmConfigurePhaseShiftLoad(
Cdd_Pwm_InstanceType InstanceId,
boolean Select
)
```
**Brief**:
Enable high resolution phase load.
This function enables loading of high resolution phase shift value which is set by the function HRPWM_setPhaseShift().
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **Select** Boolean to enable/disable phase shift load
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetSyncPulseSource
```
void Cdd_Pwm_HrpwmSetSyncPulseSource(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_HrpwmSyncPulseSourceType SyncPulseSource
)
```
**Brief**:
Set high resolution PWMSYNC source.
This function sets the high resolution PWMSYNC pulse source Valid values for SyncPulseSource are:
* HRPWM_PWMSYNC_SOURCE_PERIOD - Counter equals Period.
* HRPWM_PWMSYNC_SOURCE_ZERO - Counter equals zero.
* HRPWM_PWMSYNC_SOURCE_COMPC_UP - Counter equals COMPC when counting up.
* HRPWM_PWMSYNC_SOURCE_COMPC_DOWN - Counter equals COMPC when counting down.
* HRPWM_PWMSYNC_SOURCE_COMPD_UP - Counter equals COMPD when counting up.
* HRPWM_PWMSYNC_SOURCE_COMPD_DOWN - Counter equals COMPD when counting down.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **SyncPulseSource** The PWMSYNC source
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetTranslatorRemainder
```
void Cdd_Pwm_HrpwmSetTranslatorRemainder(
Cdd_Pwm_InstanceType InstanceId,
uint16 TrRemVal
)
```
**Brief**:
Sets the Translator Remainder value.
This function sets the Translator Remainder value
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **TrRemVal** The translator remainder value
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetCounterCompareValue
```
void Cdd_Pwm_HrpwmSetCounterCompareValue(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
uint32 CompareCount
)
```
**Brief**:
Sets the consolidated counter compare values in HR mode.
This function sets the consolidated counter compare(CMPx:CMPxHR) value required in high resolution mode for counter compare registers. Valid values for OutputChannel are:
* HRPWM_COUNTER_COMPARE_A - counter compare A.
* HRPWM_COUNTER_COMPARE_B - counter compare B.
**Note:** CompareCount is a 24 bit value **Note:** For configuring CMPA = 0xB4U, CMPAHR = 0x64; value of CompareCount = 0xB464
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** The Counter Compare module
* **CompareCount** The consolidated counter compare count value
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetHiResCounterCompareValueOnly
```
void Cdd_Pwm_HrpwmSetHiResCounterCompareValueOnly(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel,
uint16 HrCompCount
)
```
**Brief**:
Sets only the high resolution counter compare value.
This function sets the high resolution counter compare value(CMPxHR) for counter compare registers. Valid values for OutputChannel are:
* HRPWM_COUNTER_COMPARE_A - counter compare A.
* HRPWM_COUNTER_COMPARE_B - counter compare B.
**Note:** HrCompCount is an 8-bit value
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** The Counter Compare module
* **HrCompCount** The high resolution counter compare count value
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmGetCounterCompareValue
```
uint32 Cdd_Pwm_HrpwmGetCounterCompareValue(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel
)
```
**Brief**:
Gets the consolidated counter compare values.
This function gets the consolidated counter compare(CMPx:CMPxHR) value used in high resolution for the counter compare module specified. Valid values for OutputChannel are:
* HRPWM_COUNTER_COMPARE_A - counter compare A.
* HRPWM_COUNTER_COMPARE_B - counter compare B.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** EPWM output channel
**Return**: The consolidated counter compare value
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_GetHiResCounterCompareValueOnly
```
uint16 Cdd_Pwm_GetHiResCounterCompareValueOnly(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_OutputChannelType OutputChannel
)
```
**Brief**:
Gets only the high resolution counter compare values.
This function gets only the high resolution counter compare(CMPxHR) value for the counter compare module specified. Valid values for OutputChannel are:
* HRPWM_COUNTER_COMPARE_A - counter compare A.
* HRPWM_COUNTER_COMPARE_B - counter compare B.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **OutputChannel** The Counter Compare module value
**Return**: The high resolution counter compare value
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetRisingEdgeDelay
```
void Cdd_Pwm_HrpwmSetRisingEdgeDelay(
Cdd_Pwm_InstanceType InstanceId,
uint32 RedCount
)
```
**Brief**:
Sets the consolidated RED count in high resolution mode.
This function sets the consolidated RED (Rising Edge Delay) count (DBRED:DBREDHR) value used in high resolution mode The value of RedCount should be less than 0x200000.
**Note:** RedCount is a 21 bit value **Note:** For configuring DBRED = 0x4U, DBREDHR = 0x1; value of RedCount = ((0x4 << 7) | 0x1) = 0x201
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **RedCount** The high resolution RED count
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetHiResRisingEdgeDelayOnly
```
void Cdd_Pwm_HrpwmSetHiResRisingEdgeDelayOnly(
Cdd_Pwm_InstanceType InstanceId,
uint16 HrRedCount
)
```
**Brief**:
Sets the high resolution RED count only.
This function sets only the high resolution RED (Rising Edge Delay) count(DBREDHR) value The value of HrRedCount should be less than 128.
**Note:** HrRedCount is a 7-bit value
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **HrRedCount** The high resolution RED count
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetFallingEdgeDelay
```
void Cdd_Pwm_HrpwmSetFallingEdgeDelay(
Cdd_Pwm_InstanceType InstanceId,
uint32 FedCount
)
```
**Brief**:
Sets the consolidated FED value in high resolution mode.
This function sets the consolidated FED (Falling Edge Delay) count (DBFED: DBFEDHR) value used in high resolution mode The value of FedCount should be less than 0x200000.
**Note:** FedCount is a 21 bit value **Note:** For configuring DBFED = 0x4U, DBFEDHR = 0x1; value of FedCount = ((0x4 << 7) | 0x1) = 0x201
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **FedCount** The high resolution FED count
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetHiResFallingEdgeDelayOnly
```
void Cdd_Pwm_HrpwmSetHiResFallingEdgeDelayOnly(
Cdd_Pwm_InstanceType InstanceId,
uint16 HrFedCount
)
```
**Brief**:
Sets the high resolution FED count only.
This function sets only the high resolution FED (Falling Edge Delay) count(DBREDHR) value The value of HrRedCount should be less than 128.
**Note:** HrRedCount is a 7-bit value
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **HrFedCount** The high resolution RED count
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetMepStep
```
void Cdd_Pwm_HrpwmSetMepStep(
Cdd_Pwm_HrpwmCalInstanceType InstanceId,
uint16 MepCount
)
```
**Brief**:
Set high resolution MEP (Micro Edge Positioner) step.
This function sets the high resolution MEP (Micro Edge Positioner) step count. The maximum value for the MEP count step is 255.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **MepCount** The high resolution MEP (Micro Edge Positioner) step count
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetDeadbandMepEdgeSelect
```
void Cdd_Pwm_HrpwmSetDeadbandMepEdgeSelect(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_HrpwmMepDeadBandEdgeModeType MepDbEdge
)
```
**Brief**:
Set high resolution Dead Band MEP (Micro Edge Positioner) control.
This function sets the high resolution Dead Band edge that the MEP (Micro Edge Positioner) controls. Valid values for MepDbEdge are:
* HRPWM_DB_MEP_CTRL_DISABLE - HRPWM is disabled
* HRPWM_DB_MEP_CTRL_RED - MEP (Micro Edge Positioner) controls Rising Edge Delay
* HRPWM_DB_MEP_CTRL_FED - MEP (Micro Edge Positioner) controls Falling Edge Delay
* HRPWM_DB_MEP_CTRL_RED_FED - MEP (Micro Edge Positioner) controls both Falling and Rising edge delays
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **MepDbEdge** The high resolution MEP (Micro Edge Positioner) control edge
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetRisingEdgeDelayLoadMode
```
void Cdd_Pwm_HrpwmSetRisingEdgeDelayLoadMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_HrpwmLoadModeType LoadEvent
)
```
**Brief**:
Set the high resolution Dead Band RED load mode.
This function sets the high resolution Rising Edge Delay(RED)Dead Band count load mode Valid values for LoadEvent are:
* HRPWM_LOAD_ON_CNTR_ZERO - load when counter equals zero
* HRPWM_LOAD_ON_CNTR_PERIOD - load when counter equals period
* HRPWM_LOAD_ON_CNTR_ZERO_PERIOD - load when counter equals zero or period
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **LoadEvent** The shadow to active load event
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetFallingEdgeDelayLoadMode
```
void Cdd_Pwm_HrpwmSetFallingEdgeDelayLoadMode(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_HrpwmLoadModeType LoadEvent
)
```
**Brief**:
Set the high resolution Dead Band FED load mode.
This function sets the high resolution Falling Edge Delay(FED) Dead Band count load mode Valid values for LoadEvent are:
* HRPWM_LOAD_ON_CNTR_ZERO - load when counter equals zero
* HRPWM_LOAD_ON_CNTR_PERIOD - load when counter equals period
* HRPWM_LOAD_ON_CNTR_ZERO_PERIOD - load when counter equals zero or period
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **LoadEvent** The shadow to active load event
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmLockRegisters
```
void Cdd_Pwm_HrpwmLockRegisters(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_HrpwmLockRegisterGroupType RegisterGroup
)
```
**Brief**:
Lock HRPWM registers.
This function locks the specified HRPWM register group.
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **RegisterGroup** The register group to lock
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetXCmpRegValue
```
void Cdd_Pwm_HrpwmSetXCmpRegValue(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_XCmpRegType XCmpReg,
uint32 XCmpValue
)
```
**Brief**:
Sets the consolidated XCMP values in HR mode.
This function sets the consolidated counter compare(XCMPx:XCMPxHR) value required in high resolution mode for XCMP registers. Valid values for XCmpReg are: CDD_PWM_XCMP[1-8]_[ACTIVE/SHADOW1/SHADOW2/SHADOW3] -XCMP[1-8]_[ACTIVE/SHADOW1/SHADOW2/SHADOW3] CDD_PWM_XTBPRD_ACTIVE -XTBPRD_ACTIVE CDD_PWM_XTBPRD_SHADOW1 -XTBPRD_SHADOW1 CDD_PWM_XTBPRD_SHADOW2 -XTBPRD_SHADOW2 CDD_PWM_XTBPRD_SHADOW3 -XTBPRD_SHADOW3
**Note:** For configuring XCMPx = 0x3E8, XCMPxHR = 0x64; value of XCmpValue = 0x03E80064
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **XCmpReg** The XCMP register offset
* **XCmpValue** The consolidated value to be written to XCMP registers
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_HrpwmSetHiResXCmpRegValueOnly
```
void Cdd_Pwm_HrpwmSetHiResXCmpRegValueOnly(
Cdd_Pwm_InstanceType InstanceId,
Cdd_Pwm_XCmpRegType XCmpReg,
uint16 HrXCmpValue
)
```
**Brief**:
Sets only the high resolution XCMP value.
This function sets the high resolution counter compare value(XCMPx_HR) for XCMP registers. Valid values for XCmpReg are: CDD_PWM_XCMP[1-8]_[ACTIVE/SHADOW1/SHADOW2/SHADOW3] -XCMP[1-8]_[ACTIVE/SHADOW1/SHADOW2/SHADOW3] CDD_PWM_XTBPRD_ACTIVE -XTBPRD_ACTIVE CDD_PWM_XTBPRD_SHADOW1 -XTBPRD_SHADOW1 CDD_PWM_XTBPRD_SHADOW2 -XTBPRD_SHADOW2 CDD_PWM_XTBPRD_SHADOW3 -XTBPRD_SHADOW3
**Parameters**:
* **InstanceId** Numeric ID of the requested PWM instance
* **XCmpReg** The XCMP register offset
* **HrXCmpValue** The HR value to be written to XCMP registers
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Pwm_Sfo
```
Cdd_Pwm_SfoStatusType Cdd_Pwm_Sfo(
Cdd_Pwm_HrpwmCalInstanceType Cdd_Pwm_HrpwmCalId
)
```
**Brief**:
SFO V8 Calibration Function.
This function performs calibration for the SFO.
**Parameters**:
* **Cdd_Pwm_HrpwmCalId** Numeric ID of the requested HRPWM CAL instance
**Return**: Calibration status
**Precondition**: None
**Postcondition**: None
---
title: Cdd_Sent API GUIDE Header file
---
# CDD_SENT
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Cdd_SentInstance](../Modules/group__CDD__SENT.md#enum-cdd_sentinstance)** | Type for Cdd_Sent Instance. |
|enum| **[Cdd_Sent_DataNumber](../Modules/group__CDD__SENT.md#enum-cdd_sent_datanumber)** | Type for Receiver Data. |
|enum| **[Cdd_SentNibbleNumber](../Modules/group__CDD__SENT.md#enum-cdd_sentnibblenumber)** | Type for Receiver Data Nibble Number. |
|enum| **[Cdd_SentNibble](../Modules/group__CDD__SENT.md#enum-cdd_sentnibble)** | Type for Receiver Data Nibble. |
|enum| **[Cdd_SentCRCType](../Modules/group__CDD__SENT.md#enum-cdd_sentcrctype)** | Type for SENT CRC Type. |
|enum| **[Cdd_SentCRCWidth](../Modules/group__CDD__SENT.md#enum-cdd_sentcrcwidth)** | Type for SENT CRC Width. |
|enum| **[Cdd_SentFIFOMode](../Modules/group__CDD__SENT.md#enum-cdd_sentfifomode)** | Sent Data mode type. |
|enum| **[Cdd_SentTriggerLevel](../Modules/group__CDD__SENT.md#enum-cdd_senttriggerlevel)** | Type for Trigger Level. |
|enum| **[Cdd_SentCRCWithStatus](../Modules/group__CDD__SENT.md#enum-cdd_sentcrcwithstatus)** | Type for SENT CRC includes status or not. |
|enum| **[Cdd_SentDataNibblesCount](../Modules/group__CDD__SENT.md#enum-cdd_sentdatanibblescount)** | Type for SENT number of data nibbles count. |
|enum| **[Cdd_SentSensorType](../Modules/group__CDD__SENT.md#enum-cdd_sentsensortype)** | Type for SENT Sensor type. |
|enum| **[Cdd_SentChannelType](../Modules/group__CDD__SENT.md#enum-cdd_sentchanneltype)** | Sent Channel Type. |
|typedef uint32 | **[CddSent_ValueType](../Modules/group__CDD__SENT.md#typedef-cddsent_valuetype)** | Type for reading and setting the channel index. |
|typedef void(*)(PduIdType id, const PduInfoType *PduInfoPtr) | **[Cdd_Sent_NotifyType](../Modules/group__CDD__SENT.md#typedef-cdd_sent_notifytype)** | Notification callback function pointer. |
|typedef void(*)(void) | **[Cdd_Sent_ErrorNotifyType](../Modules/group__CDD__SENT.md#typedef-cdd_sent_errornotifytype)** | Error Notification callback function pointer. |
### enum Cdd_SentInstance
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_SENT_INSTANCE_SENT1 | | SENT instance 1. |
| CDD_SENT_INSTANCE_SENT2 | | SENT instance 2. |
| CDD_SENT_INSTANCE_SENT3 | | SENT instance 3. |
| CDD_SENT_INSTANCE_SENT4 | | SENT instance 4. |
| CDD_SENT_INSTANCE_SENT5 | | SENT instance 5. |
| CDD_SENT_INSTANCE_SENT6 | | SENT instance 6. |
**Brief**:
Type for Cdd_Sent Instance.
### enum Cdd_Sent_DataNumber
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_SENT_RECEIVER_DATA0 | 0x0U| Receiver Data 0. |
| CDD_SENT_RECEIVER_DATA1 | 0x1U| Receiver Data 1. |
**Brief**:
Type for Receiver Data.
### enum Cdd_SentNibbleNumber
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_SENT_DATAX_NIB0 | 0x0U| DataX Nibble Number 0. |
| CDD_SENT_DATAX_NIB1 | 0x1U| DataX Nibble Number 1. |
| CDD_SENT_DATAX_NIB2 | 0x2U| DataX Nibble Number 2. |
| CDD_SENT_DATAX_NIB3 | 0x3U| DataX Nibble Number 3. |
| CDD_SENT_DATAX_NIB4 | 0x4U| DataX Nibble Number 4. |
| CDD_SENT_DATAX_NIB5 | 0x5U| DataX Nibble Number 5. |
| CDD_SENT_DATAX_NIB6 | 0x6U| DataX Nibble Number 6. |
| CDD_SENT_DATAX_NIB7 | 0x7U| DataX Nibble Number 7. |
**Brief**:
Type for Receiver Data Nibble Number.
### enum Cdd_SentNibble
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_SENT_NO_NIBBLE | 0x0U| No Nibble Selected. |
| CDD_SENT_DATA_NIBBLE1 | 0x1U| Data Nibble 1. |
| CDD_SENT_DATA_NIBBLE2 | 0x2U| Data Nibble 2. |
| CDD_SENT_DATA_NIBBLE3 | 0x3U| Data Nibble 3. |
| CDD_SENT_DATA_NIBBLE4 | 0x4U| Data Nibble 4. |
| CDD_SENT_DATA_NIBBLE5 | 0x5U| Data Nibble 5. |
| CDD_SENT_DATA_NIBBLE6 | 0x6U| Data Nibble 6. |
| CDD_SENT_DATA_NIBBLE7 | 0x7U| Data Nibble 7. |
| CDD_SENT_DATA_NIBBLE8 | 0x8U| Data Nibble 8. |
| CDD_SENT_CRC_NIBBLE1 | 0xAU| Crc Nibble 1. |
| CDD_SENT_CRC_NIBBLE2 | 0xBU| Crc Nibble 2. |
| CDD_SENT_STATUS_NIBBLE | 0xFU| status Nibble |
**Brief**:
Type for Receiver Data Nibble.
### enum Cdd_SentCRCType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_SENT_CRC_LEGACY_2007 | 0x800U| legacy CRC 2007 |
| CDD_SENT_CRC_RECOMENDED_2010 | 0x000U| Recommended CRC 2010. |
| CDD_SENT_CRC_NONE | 0xFFFU| CRC Disable. |
**Brief**:
Type for SENT CRC Type.
### enum Cdd_SentCRCWidth
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_SENT_CRC_4_BIT | 0| 4 Bit CRC |
| CDD_SENT_CRC_6_BIT | 1| 6 Bit CRC |
| CDD_SENT_CRC_8_BIT | 2| 8 Bit CRC |
**Brief**:
Type for SENT CRC Width.
### enum Cdd_SentFIFOMode
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| SENT_DIRECT_MEMMAPPED | 0U| Direct Mapping Mode. |
| CDD_SENT_FIFOMODE_FIFO | 1U| Fifo Mode. |
**Brief**:
Sent Data mode type.
### enum Cdd_SentTriggerLevel
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_SENT_TRIGDISABLE | 0U| Trigger disable. |
| CDD_SENT_TRIGLEV3 | 3U| Trigger level 3. |
| CDD_SENT_TRIGLEV4 | 4U| Trigger level 4. |
| CDD_SENT_TRIGLEV5 | 5U| Trigger level 5. |
| CDD_SENT_TRIGLEV6 | 6U| Trigger level 6. |
| CDD_SENT_TRIGLEV7 | 7U| Trigger level 7. |
| CDD_SENT_TRIGLEV8 | 8U| Trigger level 8. |
| CDD_SENT_TRIGLEV9 | 9U| Trigger level 9. |
| CDD_SENT_TRIGLEV10 | 10| Trigger level 10. |
| CDD_SENT_TRIGLEV11 | 11U| Trigger level 11. |
| CDD_SENT_TRIGLEV12 | 12U| Trigger level 12. |
| CDD_SENT_TRIGLEV13 | 13U| Trigger level 13. |
| CDD_SENT_TRIGLEV14 | 14U| Trigger level 14. |
| CDD_SENT_TRIGLEV15 | 15U| Trigger level 15. |
| CDD_SENT_TRIGLEV16 | 16U| Trigger level 16. |
**Brief**:
Type for Trigger Level.
### enum Cdd_SentCRCWithStatus
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_SENT_CRC_WITH_STATUS | 0x400| Calculation of CRC includes Status nibble. |
| CDD_SENT_CRC_WITHOUT_STATUS | 0x000| Calculation of CRC excludes Status nibble. |
**Brief**:
Type for SENT CRC includes status or not.
### enum Cdd_SentDataNibblesCount
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_SENT_1_DATA_NIBBLES | 1| 1 data nibble per-frame |
| CDD_SENT_2_DATA_NIBBLES | 2| 2 data nibble per-frame |
| CDD_SENT_3_DATA_NIBBLES | 3| 3 data nibble per-frame |
| CDD_SENT_4_DATA_NIBBLES | 4| 4 data nibble per-frame |
| CDD_SENT_5_DATA_NIBBLES | 5| 5 data nibble per-frame |
| CDD_SENT_6_DATA_NIBBLES | 6| 6 data nibble per-frame |
| CDD_SENT_7_DATA_NIBBLES | 7| 7 data nibble per-frame |
| CDD_SENT_8_DATA_NIBBLES | 8| 8 data nibble per-frame |
**Brief**:
Type for SENT number of data nibbles count.
### enum Cdd_SentSensorType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_SENT_CHANNEL_BROADCAST | | Broadcast sensor trigger. |
| CDD_SENT_CHANNEL_SENSOR_1 | | sensor trigger 1 |
| CDD_SENT_CHANNEL_SENSOR_2 | | sensor trigger 2 |
| CDD_SENT_CHANNEL_SENSOR_3 | | sensor trigger 3 |
| CDD_SENT_CHANNEL_SENSOR_4 | | sensor trigger 4 |
| CDD_SENT_CHANNEL_STANDARD_SENSOR | | Standard sensor trigger |
**Brief**:
Type for SENT Sensor type.
### enum Cdd_SentChannelType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_SENT_CHANNEL_STANDARD_SENSOR_FAST_CHANNEL | | Fast channel for Stanadard sensor. |
| CDD_SENT_CHANNEL_SENSOR_1_FAST_CHANNEL | | Fast channel for sensor 1. |
| CDD_SENT_CHANNEL_SENSOR_2_FAST_CHANNEL | | Fast channel for sensor 2. |
| CDD_SENT_CHANNEL_SENSOR_3_FAST_CHANNEL | | Fast channel for sensor 3. |
| CDD_SENT_CHANNEL_SENSOR_4_FAST_CHANNEL | | Fast channel for sensor 4. |
| SHORT_SERIAL_ENHANCED_SERIAL_12BIT_SLOW_CHANNEL | | Short serial and Enhanced serial 12 slow channel. |
| ENHANCED_SERIAL_16BIT_SLOW_CHANNEL | | enhanced serial 16 bit slowc channel |
**Brief**:
Sent Channel Type.
### typedef CddSent_ValueType
```
typedef uint32 CddSent_ValueType;
```
**Brief**:
Type for reading and setting the channel index.
### typedef Cdd_Sent_NotifyType
```
typedef void(* Cdd_Sent_NotifyType) (PduIdType id, const PduInfoType *PduInfoPtr);
```
**Brief**:
Notification callback function pointer.
### typedef Cdd_Sent_ErrorNotifyType
```
typedef void(* Cdd_Sent_ErrorNotifyType) (void);
```
**Brief**:
Error Notification callback function pointer.
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Cdd_Sent_Data_Buffer](../Classes/structCdd__Sent__Data__Buffer.md)** | Sent Data Buffer. |
| **[Cdd_Sent_MTPConfigType](../Classes/structCdd__Sent__MTPConfigType.md)** | Configuration per HW unit. |
| **[Cdd_Sent_ChannelConfigType](../Classes/structCdd__Sent__ChannelConfigType.md)** | Configuration per HW unit. |
| **[Cdd_Sent_HWUnitType](../Classes/structCdd__Sent__HWUnitType.md)** | Configuration per HW unit. |
| **[Cdd_Sent_ConfigType](../Classes/structCdd__Sent__ConfigType.md)** | Configuration per HW unit. |
| **[Cdd_Sent_DriverObjType](../Classes/structCdd__Sent__DriverObjType.md)** | Cdd_Sent driver object type structure. |
## Defines
| Name | Brief |
| -------------- | ---------- |
| CDD_SENT_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| CDD_SENT_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| CDD_SENT_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| CDD_SENT_AR_RELEASE_MAJOR_VERSION | AUTOSAR major version specification implemented by Cdd_Sent Driver. |
| CDD_SENT_AR_RELEASE_MINOR_VERSION | AUTOSAR minor version specification implemented by Cdd_Sent Driver. |
| CDD_SENT_AR_RELEASE_REVISION_VERSION | AUTOSAR Patch version specification implemented by Cdd_Sent Driver. |
| CDD_SENT_VENDOR_ID | Texas Instruments Vendor ID. |
| CDD_SENT_MODULE_ID | Cdd_Sent Driver Module ID. |
| CDD_SENT_INSTANCE_ID | Cdd_Sent Driver Instance ID. |
| CDD_SENT_E_PARAM_POINTER | API parameter checking: invalid pointer. |
| CDD_SENT_E_PARAM_CHANNEL | API parameter checking: invalid value. |
| CDD_SENT_E_ALREADY_INITIALIZED | API service for initialization called when already initialized. |
| CDD_SENT_E_UNINIT | API service called without module initialization. |
| CDD_SENT_SID_GET_VERSION_INFO | Cdd_Sent_GetVersionInfo(). |
| CDD_SENT_SID_INIT | Cdd_Sent_Init(). |
| CDD_SENT_SID_DEINIT | Cdd_Sent_Deinit(). |
| CDD_SENT_SID_TRANSMIT | Cdd_Sent_Transmit(). |
| CDD_SENT_SID_ENABLE_INTERRUPT | Cdd_Sent_Enable_Interrupts(). |
| CDD_SENT_SID_DISABLE_INTERRUPT | Cdd_Sent_Disable_Interrupts(). |
| TIMESTAMP_MEMDATA | TIMESTAMP MEMDATA. |
| DATA0_MEMDATA | DATA0 MEMDATA. |
| SENT_DATAXMAP_STEP | Data offsent for data1 and data 0. |
| SENT_MTP_SWTR_STEP | software trigger step |
| SENT_MTP_TIMEOUT_STEP | Mtp Timeout step. |
| MAXIMUM_NUMBER_OF_SENSORS | maximum number of sensors |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Cdd_Sent_GetVersionInfo](../Modules/group__CDD__SENT.md#function-cdd_sent_getversioninfo)**(Std_VersionInfoType * VersionInfoPtr)| Cdd_Sent_GetVersionInfo : Returns the Cdd sent Version Info. |
| void | **[Cdd_Sent_Init](../Modules/group__CDD__SENT.md#function-cdd_sent_init)**(const [Cdd_Sent_ConfigType](../Classes/structCdd__Sent__ConfigType.md) * ConfigPtr)| Cdd_Sent_Init : Initializes the CDD_SENT module. |
| void | **[Cdd_Sent_Deinit](../Modules/group__CDD__SENT.md#function-cdd_sent_deinit)**(void )| Cdd_Sent_Deinit : De-initializes the CDD_SENT module. |
| Std_ReturnType | **[Cdd_Sent_Transmit](../Modules/group__CDD__SENT.md#function-cdd_sent_transmit)**(const PduInfoType * PduInfoPtr, PduIdType TxPduId)| Cdd_Sent_Transmit : Triggers the MTP. |
| void | **[Cdd_Sent_Enable_Interrupts](../Modules/group__CDD__SENT.md#function-cdd_sent_enable_interrupts)**([Cdd_SentInstance](../Modules/group__CDD__SENT.md#enum-cdd_sentinstance) SentInstance)| Cdd_Sent_Enable_Interrupts : Enable Interrupts. |
| void | **[Cdd_Sent_Disable_Interrupts](../Modules/group__CDD__SENT.md#function-cdd_sent_disable_interrupts)**([Cdd_SentInstance](../Modules/group__CDD__SENT.md#enum-cdd_sentinstance) SentInstance)| Cdd_Sent_Disable_Interrupts : Disable Interrupts. |
### function Cdd_Sent_GetVersionInfo
```
void Cdd_Sent_GetVersionInfo(
Std_VersionInfoType * VersionInfoPtr
)
```
**Brief**:
Cdd_Sent_GetVersionInfo : Returns the Cdd sent Version Info.
This service returns the version information of this module.
**Parameters**:
* **VersionInfoPtr**
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Sent_Init
```
void Cdd_Sent_Init(
const Cdd_Sent_ConfigType * ConfigPtr
)
```
**Brief**:
Cdd_Sent_Init : Initializes the CDD_SENT module.
This service initializes the configured HW units.
**Parameters**:
* **ConfigPtr** Pointer to CDD_SENT driver configuration set
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Sent_Deinit
```
void Cdd_Sent_Deinit(
void
)
```
**Brief**:
Cdd_Sent_Deinit : De-initializes the CDD_SENT module.
This service deinitialize the CDD_SENT driver
**Returns**:
* **None**
**Return**: None
**Precondition**: Cdd_Sent_Init should be called first before calling this service.
**Postcondition**: None
### function Cdd_Sent_Transmit
```
Std_ReturnType Cdd_Sent_Transmit(
const PduInfoType * PduInfoPtr,
PduIdType TxPduId
)
```
**Brief**:
Cdd_Sent_Transmit : Triggers the MTP.
**Parameters**:
* **PduInfoPtr** Pointer to PDU Information. If PduInfoPtr->SduDataPtr[0] is 0, Will disbale HW trigger If PduInfoPtr->SduDataPtr[0] is 1, Will configure HW trigger to configuration value If PduInfoPtr->SduDataPtr[0] is 2, Will trigger SW trigger
* **TxPduId** : When Cdd Sent is integrated with Autosar Com stack, this TxPduId parameter is a Pdu identifier used to address the respective sensor. When Cdd Sent is not integrated with Autosar Com stack, this TxPduId parameter is a device identifier used to address the respective sensor.
**Returns**:
* **E_OK** command has been accepted
* **E_NOT_OK** command has not been accepted
**Return**: Std_ReturnType
**Precondition**: Cdd_Sent_Init should be called first before calling this service.
**Postcondition**: None
### function Cdd_Sent_Enable_Interrupts
```
void Cdd_Sent_Enable_Interrupts(
Cdd_SentInstance SentInstance
)
```
**Brief**:
Cdd_Sent_Enable_Interrupts : Enable Interrupts.
This service will enable interrupts.
**Parameters**:
* **SentInstance** id of Sent HW unit.
**Returns**:
* **None**
**Return**: None
**Precondition**: Cdd_Sent_Init should be called first before calling this service.
**Postcondition**: None
### function Cdd_Sent_Disable_Interrupts
```
void Cdd_Sent_Disable_Interrupts(
Cdd_SentInstance SentInstance
)
```
**Brief**:
Cdd_Sent_Disable_Interrupts : Disable Interrupts.
This service will Disable interrupts and ignore any received data as there is no polling API for Cdd_Sent.
**Parameters**:
* **SentInstance** id of Sent HW unit.
**Returns**:
* **None**
**Return**: None
**Precondition**: Cdd_Sent_Init should be called first before calling this service.
**Postcondition**: None
---
title: Cdd Uart
---
# CDD_UART
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Cdd_Uart_Instance](../Modules/group__CDD__UART.md#enum-cdd_uart_instance)** | Uart Configuration Instance ID. |
|enum| **[Cdd_Uart_WordLength](../Modules/group__CDD__UART.md#enum-cdd_uart_wordlength)** | UART Word Length. |
|enum| **[Cdd_Uart_StopBits](../Modules/group__CDD__UART.md#enum-cdd_uart_stopbits)** | UART Stop Bits. |
|enum| **[Cdd_Uart_Mode](../Modules/group__CDD__UART.md#enum-cdd_uart_mode)** | UART Mode. |
|enum| **[Cdd_Uart_FifoLevel](../Modules/group__CDD__UART.md#enum-cdd_uart_fifolevel)** | UART FIFO Level. |
|typedef void(*)(void) | **[Cdd_Uart_CallbackType](../Modules/group__CDD__UART.md#typedef-cdd_uart_callbacktype)** | Cdd Uart Callback type. |
|typedef uint8 | **[Cdd_Uart_DataBufferType](../Modules/group__CDD__UART.md#typedef-cdd_uart_databuffertype)** | Typedef for the data buffer elements. |
### enum Cdd_Uart_Instance
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_UART_INSTANCE_UARTA | 0U| UARTA Config Instance. |
| CDD_UART_INSTANCE_UARTB | 1U| UARTB Config Instance. |
| CDD_UART_INSTANCE_UARTC | 2U| UARTC Config Instance. |
| CDD_UART_INSTANCE_UARTD | 3U| UARTD Config Instance. |
| CDD_UART_INSTANCE_UARTE | 4U| UARTE Config Instance. |
| CDD_UART_INSTANCE_UARTF | 5U| UARTF Config Instance. |
**Brief**:
Uart Configuration Instance ID.
### enum Cdd_Uart_WordLength
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_UART_WORD_LENGTH_5 | 0U| UART Word Length 5 bits. |
| CDD_UART_WORD_LENGTH_6 | 1U| UART Word Length 6 bits. |
| CDD_UART_WORD_LENGTH_7 | 2U| UART Word Length 7 bits. |
| CDD_UART_WORD_LENGTH_8 | 3U| UART Word Length 8 bits. |
**Brief**:
UART Word Length.
### enum Cdd_Uart_StopBits
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_UART_STOP_BITS_1 | 0U| UART Stop Bits 1 bit. |
| CDD_UART_STOP_BITS_2 | 1U| UART Stop Bits 2 bits. |
**Brief**:
UART Stop Bits.
### enum Cdd_Uart_Mode
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_UART_MODE_POLLING | 0U| UART Mode Polling. |
| CDD_UART_MODE_INTERRUPT | 1U| UART Mode Interrupt. |
**Brief**:
UART Mode.
### enum Cdd_Uart_FifoLevel
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_UART_FIFO_LEVEL_1_8 | 0U| UART FIFO Level 1/8. |
| CDD_UART_FIFO_LEVEL_1_4 | 1U| UART FIFO Level 1/4. |
| CDD_UART_FIFO_LEVEL_1_2 | 2U| UART FIFO Level 1/2. |
| CDD_UART_FIFO_LEVEL_3_4 | 3U| UART FIFO Level 3/4. |
| CDD_UART_FIFO_LEVEL_7_8 | 4U| UART FIFO Level 7/8. |
**Brief**:
UART FIFO Level.
### typedef Cdd_Uart_CallbackType
```
typedef void(* Cdd_Uart_CallbackType) (void);
```
**Brief**:
Cdd Uart Callback type.
### typedef Cdd_Uart_DataBufferType
```
typedef uint8 Cdd_Uart_DataBufferType;
```
**Brief**:
Typedef for the data buffer elements.
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Cdd_Uart_CfgType](../Classes/structCdd__Uart__CfgType.md)** | UART configuration data structure for a channel. |
| **[Cdd_Uart_ConfigType](../Classes/structCdd__Uart__ConfigType.md)** | UART configuration structure for all channels in use. |
| **[Cdd_Uart_WriteStatusType](../Classes/structCdd__Uart__WriteStatusType.md)** | Typedef for the Write Status. |
| **[Cdd_Uart_ReadStatusType](../Classes/structCdd__Uart__ReadStatusType.md)** | Typedef for the Read Status. |
## Defines
| Name | Brief |
| -------------- | ---------- |
| CDD_UART_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| CDD_UART_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| CDD_UART_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| CDD_UART_AR_RELEASE_MAJOR_VERSION | AUTOSAR Major version specification implemented by CDD_UART Driver. |
| CDD_UART_AR_RELEASE_MINOR_VERSION | AUTOSAR Minor version specification implemented by CDD_UART Driver. |
| CDD_UART_AR_RELEASE_REVISION_VERSION | AUTOSAR Patch version specification implemented by CDD_UART Driver. |
| CDD_UART_VENDOR_ID | Texas Instruments Vendor ID. |
| CDD_UART_MODULE_ID | CDD UART Driver Module ID. |
| CDD_UART_INSTANCE_ID | CDD UART Instance ID. |
| CDD_UART_E_UNINIT | API service used without module initialization. |
| CDD_UART_E_ALREADY_INITIALIZED | API Cdd_Uart_Init service called while the UART driver has already been initialized. |
| CDD_UART_E_PARAM_VALUE | API service called with invalid parameter value. |
| CDD_UART_E_PARAM_POINTER | API service called with invalid data buffer pointer. |
| CDD_UART_E_PARAM_HWINDEX | API service called with invalid hardware index. |
| CDD_UART_E_BUSY | |
| CDD_UART_NO_ERROR | |
| CDD_UART_SID_GET_VERSION_INFO | Cdd_Uart_GetVersionInfo API Service ID. |
| CDD_UART_SID_INIT | Cdd_Uart_Init() API Service ID. |
| CDD_UART_SID_DEINIT | Cdd_Uart_DeInit() API Service ID. |
| CDD_UART_SID_WRITE | Cdd_Uart_Write() API Service ID. |
| CDD_UART_SID_READ | Cdd_Uart_Read() API Service ID. |
| CDD_UART_SID_CANCEL_WRITE | Cdd_Uart_CancelWrite() API Service ID. |
| CDD_UART_SID_CANCEL_READ | Cdd_Uart_CancelRead() API Service ID. |
| CDD_UART_SID_GET_WRITE_STATUS | Cdd_Uart_GetWriteStatus() API Service ID. |
| CDD_UART_SID_GET_READ_STATUS | Cdd_Uart_GetReadStatus() API Service ID. |
| CDD_UART_SID_MAIN_FUN_WRITE | Cdd_Uart_MainFunction_Write() API Service ID. |
| CDD_UART_SID_POLL_READ | Cdd_Uart_Poll_Read() API Service ID. |
| CDD_UART_SID_ERROR_STATUS | Cdd_Uart_GetErrorStatus() API Service ID. |
| CDD_UART_SID_FLUSH_READ_BUFFER | Cdd_Uart_FlushReadFIFO() API Service ID. |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Cdd_Uart_GetVersionInfo](../Modules/group__CDD__UART.md#function-cdd_uart_getversioninfo)**(Std_VersionInfoType * VersionInfoPtr)| Service to provide the version information of Cdd Uart module. |
| void | **[Cdd_Uart_Init](../Modules/group__CDD__UART.md#function-cdd_uart_init)**(const [Cdd_Uart_ConfigType](../Classes/structCdd__Uart__ConfigType.md) * ConfigPtr)| Cdd_Uart_Init : Initializes the CDD_UART module. |
| void | **[Cdd_Uart_Deinit](../Modules/group__CDD__UART.md#function-cdd_uart_deinit)**(void )| Cdd_Uart_Deinit : De-initializes the CDD_UART module. |
| Std_ReturnType | **[Cdd_Uart_Write](../Modules/group__CDD__UART.md#function-cdd_uart_write)**(uint8 HwUnitId, const [Cdd_Uart_DataBufferType](../Modules/group__CDD__UART.md#typedef-cdd_uart_databuffertype) * SrcBufferPtr, uint32 Count)| Service to transmit data. |
| Std_ReturnType | **[Cdd_Uart_Read](../Modules/group__CDD__UART.md#function-cdd_uart_read)**(uint8 HwUnitId, [Cdd_Uart_DataBufferType](../Modules/group__CDD__UART.md#typedef-cdd_uart_databuffertype) * DestBufferPtr, uint32 Count)| Service to reception of data. |
| Std_ReturnType | **[Cdd_Uart_CancelWrite](../Modules/group__CDD__UART.md#function-cdd_uart_cancelwrite)**(uint8 HwUnitId)| Service to cancel the ongoing transmission. |
| Std_ReturnType | **[Cdd_Uart_CancelRead](../Modules/group__CDD__UART.md#function-cdd_uart_cancelread)**(uint8 HwUnitId)| Service to cancel the ongoing transmission. |
| Std_ReturnType | **[Cdd_Uart_GetWriteStatus](../Modules/group__CDD__UART.md#function-cdd_uart_getwritestatus)**(uint8 HwUnitId, [Cdd_Uart_WriteStatusType](../Classes/structCdd__Uart__WriteStatusType.md) * WriteStatus)| Service to get the status of the ongoing transmission. |
| Std_ReturnType | **[Cdd_Uart_GetReadStatus](../Modules/group__CDD__UART.md#function-cdd_uart_getreadstatus)**(uint8 HwUnitId, [Cdd_Uart_ReadStatusType](../Classes/structCdd__Uart__ReadStatusType.md) * ReadStatus)| Service to get the status of the ongoing transmission. |
| void | **[Cdd_Uart_MainFunction_Write](../Modules/group__CDD__UART.md#function-cdd_uart_mainfunction_write)**(void )| Service to auto perform the polling of configured UART Write channel. |
| void | **[Cdd_Uart_Poll_Read](../Modules/group__CDD__UART.md#function-cdd_uart_poll_read)**(void )| Service to perform the polling of confgured UART Read channel by user. |
| Std_ReturnType | **[Cdd_Uart_GetErrorStatus](../Modules/group__CDD__UART.md#function-cdd_uart_geterrorstatus)**(uint8 HwUnitId, uint8 * ErrorStatus)| Service to get the status of the Uart error. User can use this service in the Error callback implementation to fetch the exact Uart Error. |
| void | **[Cdd_Uart_FlushReadFIFO](../Modules/group__CDD__UART.md#function-cdd_uart_flushreadfifo)**(uint8 HwUnitId)| Service to flush the read buffer. User can use this service to flush the readbuffer incase of any unread data after any Uart Error. |
### function Cdd_Uart_GetVersionInfo
```
void Cdd_Uart_GetVersionInfo(
Std_VersionInfoType * VersionInfoPtr
)
```
**Brief**:
Service to provide the version information of Cdd Uart module.
**Parameters**:
* **VersionInfoPtr** is the pointer to CDD UART driver version information
**Returns**:
* **None**
**Return**: None
**Precondition**: This API is available only if CDD_UART_GET_VERSION_INFO_API is STD_ON
**Postcondition**: None
### function Cdd_Uart_Init
```
void Cdd_Uart_Init(
const Cdd_Uart_ConfigType * ConfigPtr
)
```
**Brief**:
Cdd_Uart_Init : Initializes the CDD_UART module.
This service initialize the CDD_UART driver
**Parameters**:
* **ConfigPtr** Pointer to CDD_UART driver configuration set
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Uart_Deinit
```
void Cdd_Uart_Deinit(
void
)
```
**Brief**:
Cdd_Uart_Deinit : De-initializes the CDD_UART module.
This service deinitialize the CDD_UART driver
**Returns**:
* **None**
**Return**: None
**Precondition**: Cdd_Uart_Init should be called first, before calling this service.
**Postcondition**: None
### function Cdd_Uart_Write
```
Std_ReturnType Cdd_Uart_Write(
uint8 HwUnitId,
const Cdd_Uart_DataBufferType * SrcBufferPtr,
uint32 Count
)
```
**Brief**:
Service to transmit data.
**Parameters**:
* **HwUnitId** number to be used for writing data
* **SrcBufferPtr** - Pointer to source data buffer
* **Count** - number of data elements to be transmitted from SrcBufferPtr
**Returns**:
* **E_OK** Write request has been accepted.
* **E_NOT_OK** Write request has not been accepted.
**Return**: Cdd_Uart_Write request is accepted or not
**Precondition**: None
**Postcondition**: None
### function Cdd_Uart_Read
```
Std_ReturnType Cdd_Uart_Read(
uint8 HwUnitId,
Cdd_Uart_DataBufferType * DestBufferPtr,
uint32 Count
)
```
**Brief**:
Service to reception of data.
**Parameters**:
* **HwUnitId** number to be used for writing data
* **DestBufferPtr** - Pointer to dest data buffer
* **Count** - number of data elements to be read into DestBufferPtr
**Returns**:
* **E_OK** Read request has been accepted.
* **E_NOT_OK** Read request has not been accepted.
**Return**: Cdd_Uart_Read request is accepted or not
**Precondition**: None
**Postcondition**: None
### function Cdd_Uart_CancelWrite
```
Std_ReturnType Cdd_Uart_CancelWrite(
uint8 HwUnitId
)
```
**Brief**:
Service to cancel the ongoing transmission.
**Parameters**:
* **HwUnitId** number to be used for cancellation of Write
**Returns**:
* **E_OK** CancelWrite request has been accepted.
* **E_NOT_OK** CancelWrite request has not been accepted.
**Return**: Cdd_Uart_CancelWrite request is accepted or not
**Precondition**: None
**Postcondition**: None
### function Cdd_Uart_CancelRead
```
Std_ReturnType Cdd_Uart_CancelRead(
uint8 HwUnitId
)
```
**Brief**:
Service to cancel the ongoing transmission.
**Parameters**:
* **HwUnitId** number to be used for cancellation of Write
**Returns**:
* **E_OK** CancelRead request has been accepted.
* **E_NOT_OK** CancelRead request has not been accepted.
**Return**: Cdd_Uart_CancelRead request is accepted or not
**Precondition**: None
**Postcondition**: None
### function Cdd_Uart_GetWriteStatus
```
Std_ReturnType Cdd_Uart_GetWriteStatus(
uint8 HwUnitId,
Cdd_Uart_WriteStatusType * WriteStatus
)
```
**Brief**:
Service to get the status of the ongoing transmission.
**Parameters**:
* **HwUnitId** hw id to be used for status of Write
* **WriteStatus** pointer to Cdd_Uart_WriteStatusType
**Returns**:
* **E_OK** GetWriteStatus request has been accepted.
* **E_NOT_OK** GetWriteStatus request has not been accepted.
**Return**: Cdd_Uart_GetWriteStatus request is accepted or not
**Precondition**: None
**Postcondition**: None
### function Cdd_Uart_GetReadStatus
```
Std_ReturnType Cdd_Uart_GetReadStatus(
uint8 HwUnitId,
Cdd_Uart_ReadStatusType * ReadStatus
)
```
**Brief**:
Service to get the status of the ongoing transmission.
**Parameters**:
* **HwUnitId** hw id to be used for status of Read
* **ReadStatus** pointer to Cdd_Uart_ReadStatusType
**Returns**:
* **E_OK** GetReadStatus request has been accepted.
* **E_NOT_OK** GetReadStatus request has not been accepted.
**Return**: Cdd_Uart_GetReadStatus request is accepted or not
**Precondition**: None
**Postcondition**: None
### function Cdd_Uart_MainFunction_Write
```
void Cdd_Uart_MainFunction_Write(
void
)
```
**Brief**:
Service to auto perform the polling of configured UART Write channel.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Uart_Poll_Read
```
void Cdd_Uart_Poll_Read(
void
)
```
**Brief**:
Service to perform the polling of confgured UART Read channel by user.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Cdd_Uart_GetErrorStatus
```
Std_ReturnType Cdd_Uart_GetErrorStatus(
uint8 HwUnitId,
uint8 * ErrorStatus
)
```
**Brief**:
Service to get the status of the Uart error. User can use this service in the Error callback implementation to fetch the exact Uart Error.
**Parameters**:
* **HwUnitId** hw id to be used for status of Error
* **ErrorStatus** pointer to Cdd_Uart_Error type
**Returns**:
* **E_OK** Error status request has been accepted
* **E_NOT_OK** Error status request has not been accepted
**Return**: Uart error : PE,OE,BE,FE
**Precondition**: None
**Postcondition**: None
### function Cdd_Uart_FlushReadFIFO
```
void Cdd_Uart_FlushReadFIFO(
uint8 HwUnitId
)
```
**Brief**:
Service to flush the read buffer. User can use this service to flush the readbuffer incase of any unread data after any Uart Error.
**Parameters**:
* **HwUnitId** hw id to be used to flush the read buffer
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
---
title: Cdd_Xbar
---
# CDD_XBAR
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Cdd_Xbar_TickStretchType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_tickstretchtype)** | CDD Xbar Tick Stretch Type. |
|enum| **[Cdd_Xbar_OutFlagInitType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_outflaginittype)** | CDD Xbar output flag initialization type. |
|enum| **[Cdd_Xbar_InputGroupType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_inputgrouptype)** | CDD Xbar Input Group Type. |
|enum| **[Cdd_Xbar_Output_Xbar_Input_LinesType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_output_xbar_input_linestype)** | Output Crossbar Input Lines. |
|enum| **[Cdd_Xbar_Epwm_Xbar_Input_LinesType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_epwm_xbar_input_linestype)** | EPWM Crossbar Input Lines. |
|enum| **[Cdd_Xbar_Clb_Xbar_Input_LinesType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_clb_xbar_input_linestype)** | CLB Crossbar Input Lines. |
|enum| **[Cdd_Xbar_Mindb_Xbar_Input_LinesType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_mindb_xbar_input_linestype)** | MinDB Crossbar Input Lines. |
|enum| **[Cdd_Xbar_Icl_Xbar_Input_LinesType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_icl_xbar_input_linestype)** | ICL Crossbar Input Lines. |
|enum| **[Cdd_Xbar_InputFlagType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_inputflagtype)** | Crossbar input flags. |
|enum| **[Cdd_Xbar_IntType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_inttype)** | External input type. |
|enum| **[Cdd_Xbar_ExternalIntNum](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_externalintnum)** | External interrupt type. |
|typedef uint16 | **[Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type)** | Type for symbolic name of CDD XBAR instances. |
|typedef uint8 | **[Cdd_Xbar_OutputlevelType](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_outputleveltype)** | These are the possible levels an output crossbar output can have. |
### enum Cdd_Xbar_TickStretchType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_XBAR_SYSTICKS_STRETCH_OFF | 0U| Output Stretching OFF |
| CDD_XBAR_SYSTICKS_16 | 16U| 16 SYSCLK Stretching |
| CDD_XBAR_SYSTICKS_32 | 32U| 32 SYSCLK Stretching |
**Brief**:
CDD Xbar Tick Stretch Type.
### enum Cdd_Xbar_OutFlagInitType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_XBAR_OUTPUTDEFAULT | 0U| Latch flag in default state |
| CDD_XBAR_OUTPUTCLEARFLAG | 1U| Latch flag cleared |
| CDD_XBAR_OUTPUTFORCEFLAG | 2U| Latch flag forced |
**Brief**:
CDD Xbar output flag initialization type.
### enum Cdd_Xbar_InputGroupType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_XBAR_INPUT_GROUP_0 | 0U| Input Group 0 |
| CDD_XBAR_INPUT_GROUP_1 | 1U| Input Group 1 |
| CDD_XBAR_INPUT_GROUP_2 | 2U| Input Group 2 |
| CDD_XBAR_INPUT_GROUP_3 | 3U| Input Group 3 |
| CDD_XBAR_INPUT_GROUP_4 | 4U| Input Group 4 |
| CDD_XBAR_INPUT_GROUP_5 | 5U| Input Group 5 |
| CDD_XBAR_INPUT_GROUP_6 | 6U| Input Group 6 |
| CDD_XBAR_INPUT_GROUP_7 | 7U| Input Group 7 |
| CDD_XBAR_INPUT_GROUP_8 | 8U| Input Group 8 |
| CDD_XBAR_INPUT_GROUP_9 | 9U| Input Group 9 |
**Brief**:
CDD Xbar Input Group Type.
### enum Cdd_Xbar_Output_Xbar_Input_LinesType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_XBAR_OUT_CMPSS1_CTRIPOUTH | 0X0000| CMPSS1_CTRIPOUTH |
| CDD_XBAR_OUT_CMPSS1_CTRIPOUTL | 0X0001| CMPSS1_CTRIPOUTL |
| CDD_XBAR_OUT_CMPSS2_CTRIPOUTH | 0X0002| CMPSS2_CTRIPOUH |
| CDD_XBAR_OUT_CMPSS2_CTRIPOUTL | 0X0003| CMPSS2_CTRIPOUTL |
| CDD_XBAR_OUT_CMPSS3_CTRIPOUTH | 0X0004| CMPSS3_CTRIPOUTH |
| CDD_XBAR_OUT_CMPSS3_CTRIPOUTL | 0X0005| CMPSS3_CTRIPOUTL |
| CDD_XBAR_OUT_CMPSS4_CTRIPOUTH | 0X0006| CMPSS4_CTRIPOUTH |
| CDD_XBAR_OUT_CMPSS4_CTRIPOUTL | 0X0007| CMPSS4_CTRIPOUTL |
| CDD_XBAR_OUT_CMPSS5_CTRIPOUTH | 0X0008| CMPSS5_CTRIPOUTH |
| CDD_XBAR_OUT_CMPSS5_CTRIPOUTL | 0X0009| CMPSS5_CTRIPOUTL |
| CDD_XBAR_OUT_CMPSS6_CTRIPOUTH | 0X000A| CMPSS6_CTRIPOUTH |
| CDD_XBAR_OUT_CMPSS6_CTRIPOUTL | 0X000B| CMPSS6_CTRIPOUTL |
| CDD_XBAR_OUT_CMPSS7_CTRIPOUTH | 0X000C| CMPSS7_CTRIPOUTH |
| CDD_XBAR_OUT_CMPSS7_CTRIPOUTL | 0X000D| CMPSS7_CTRIPOUTL |
| CDD_XBAR_OUT_CMPSS8_CTRIPOUTH | 0X000E| CMPSS8_CTRIPOUTH |
| CDD_XBAR_OUT_CMPSS8_CTRIPOUTL | 0X000F| CMPSS8_CTRIPOUTL |
| CDD_XBAR_OUT_CMPSS9_CTRIPOUTH | 0X0010| CMPSS9_CTRIPOUTH |
| CDD_XBAR_OUT_CMPSS9_CTRIPOUTL | 0X0011| CMPSS9_CTRIPOUTL |
| CDD_XBAR_OUT_CMPSS10_CTRIPOUTH | 0X0012| CMPSS10_CTRIPOUTH |
| CDD_XBAR_OUT_CMPSS10_CTRIPOUTL | 0X0013| CMPSS10_CTRIPOUTL |
| CDD_XBAR_OUT_CMPSS11_CTRIPOUTH | 0X0014| CMPSS11_CTRIPOUTH |
| CDD_XBAR_OUT_CMPSS11_CTRIPOUTL | 0X0015| CMPSS11_CTRIPOUTL |
| CDD_XBAR_OUT_CMPSS12_CTRIPOUTH | 0X0016| CMPSS12_CTRIPOUTH |
| CDD_XBAR_OUT_CMPSS12_CTRIPOUTL | 0X0017| CMPSS13_CTRIPOUTL |
| CDD_XBAR_OUT_SD1FLT1_COMPH | 0X0100| SD1FLT1_COMPH |
| CDD_XBAR_OUT_SD1FLT1_COMPL | 0X0101| SD1FLT1_COMPH |
| CDD_XBAR_OUT_SD1FLT2_COMPH | 0X0102| SD1FLT2_COMPH |
| CDD_XBAR_OUT_SD1FLT2_COMPL | 0X0103| SD1FLT2_COMPH |
| CDD_XBAR_OUT_SD1FLT3_COMPH | 0X0104| SD1FLT3_COMPH |
| CDD_XBAR_OUT_SD1FLT3_COMPL | 0X0105| SD1FLT3_COMPH |
| CDD_XBAR_OUT_SD1FLT4_COMPH | 0X0106| SD1FLT4_COMPH |
| CDD_XBAR_OUT_SD1FLT4_COMPL | 0X0107| SD1FLT4_COMPH |
| CDD_XBAR_OUT_SD2FLT1_COMPH | 0X0108| SD2FLT1_COMPH |
| CDD_XBAR_OUT_SD2FLT1_COMPL | 0X0109| SD2FLT1_COMPH |
| CDD_XBAR_OUT_SD2FLT2_COMPH | 0X010A| SD2FLT2_COMPH |
| CDD_XBAR_OUT_SD2FLT2_COMPL | 0X010B| SD2FLT2_COMPH |
| CDD_XBAR_OUT_SD2FLT3_COMPH | 0X010C| SD2FLT3_COMPH |
| CDD_XBAR_OUT_SD2FLT3_COMPL | 0X010D| SD2FLT3_COMPH |
| CDD_XBAR_OUT_SD2FLT4_COMPH | 0X010E| SD2FLT4_COMPH |
| CDD_XBAR_OUT_SD2FLT4_COMPL | 0X010F| SD2FLT4_COMPH |
| CDD_XBAR_OUT_SD3FLT1_COMPH | 0X0110| SD3FLT1_COMPH |
| CDD_XBAR_OUT_SD3FLT1_COMPL | 0X0111| SD3FLT1_COMPH |
| CDD_XBAR_OUT_SD3FLT2_COMPH | 0X0112| SD3FLT2_COMPH |
| CDD_XBAR_OUT_SD3FLT2_COMPL | 0X0113| SD3FLT2_COMPH |
| CDD_XBAR_OUT_SD3FLT3_COMPH | 0X0114| SD3FLT3_COMPH |
| CDD_XBAR_OUT_SD3FLT3_COMPL | 0X0115| SD3FLT3_COMPH |
| CDD_XBAR_OUT_SD3FLT4_COMPH | 0X0116| SD3FLT4_COMPH |
| CDD_XBAR_OUT_SD3FLT4_COMPL | 0X0117| SD3FLT4_COMPH |
| CDD_XBAR_OUT_SD4FLT1_COMPH | 0X0118| SD4FLT1_COMPH |
| CDD_XBAR_OUT_SD4FLT1_COMPL | 0X0119| SD4FLT1_COMPH |
| CDD_XBAR_OUT_SD4FLT2_COMPH | 0X011A| SD4FLT2_COMPH |
| CDD_XBAR_OUT_SD4FLT2_COMPL | 0X011B| SD4FLT2_COMPH |
| CDD_XBAR_OUT_SD4FLT3_COMPH | 0X011C| SD4FLT3_COMPH |
| CDD_XBAR_OUT_SD4FLT3_COMPL | 0X011D| SD4FLT3_COMPH |
| CDD_XBAR_OUT_SD4FLT4_COMPH | 0X011E| SD4FLT4_COMPH |
| CDD_XBAR_OUT_SD4FLT4_COMPL | 0X011F| SD4FLT4_COMPH |
| CDD_XBAR_OUT_ADCAEVT1 | 0X0200| ADCAEVT1 |
| CDD_XBAR_OUT_ADCAEVT2 | 0X0201| ADCAEVT2 |
| CDD_XBAR_OUT_ADCAEVT3 | 0X0202| ADCAEVT3 |
| CDD_XBAR_OUT_ADCAEVT4 | 0X0203| ADCAEVT4 |
| CDD_XBAR_OUT_ADCBEVT1 | 0X0204| ADCBEVT1 |
| CDD_XBAR_OUT_ADCBEVT2 | 0X0205| ADCBEVT2 |
| CDD_XBAR_OUT_ADCBEVT3 | 0X0206| ADCBEVT3 |
| CDD_XBAR_OUT_ADCBEVT4 | 0X0207| ADCBEVT4 |
| CDD_XBAR_OUT_ADCCEVT1 | 0X0208| ADCCEVT1 |
| CDD_XBAR_OUT_ADCCEVT2 | 0X0209| ADCCEVT2 |
| CDD_XBAR_OUT_ADCCEVT3 | 0X020A| ADCCEVT3 |
| CDD_XBAR_OUT_ADCCEVT4 | 0X020B| ADCCEVT4 |
| CDD_XBAR_OUT_ADCDEVT1 | 0X020C| ADCDEVT1 |
| CDD_XBAR_OUT_ADCDEVT2 | 0X020D| ADCDEVT2 |
| CDD_XBAR_OUT_ADCDEVT3 | 0X020E| ADCDEVT3 |
| CDD_XBAR_OUT_ADCDEVT4 | 0X020F| ADCDEVT4 |
| CDD_XBAR_OUT_ADCEEVT1 | 0X0210| ADCEEVT1 |
| CDD_XBAR_OUT_ADCEEVT2 | 0X0211| ADCEEVT2 |
| CDD_XBAR_OUT_ADCEEVT3 | 0X0212| ADCEEVT3 |
| CDD_XBAR_OUT_ADCEEVT4 | 0X0213| ADCEEVT4 |
| CDD_XBAR_OUT_CPU1_ADCCHECKEVT1 | 0X0214| CPU1_ADCCHECKEVT1 |
| CDD_XBAR_OUT_CPU1_ADCCHECKEVT2 | 0X0215| CPU1_ADCCHECKEVT2 |
| CDD_XBAR_OUT_CPU1_ADCCHECKEVT3 | 0X0216| CPU1_ADCCHECKEVT2 |
| CDD_XBAR_OUT_CPU1_ADCCHECKEVT4 | 0X0217| CPU1_ADCCHECKEVT4 |
| CDD_XBAR_OUT_CPU2_ADCCHECKEVT1 | 0X0218| CPU2_ADCCHECKEVT1 |
| CDD_XBAR_OUT_CPU2_ADCCHECKEVT2 | 0X0219| CPU2_ADCCHECKEVT2 |
| CDD_XBAR_OUT_CPU2_ADCCHECKEVT3 | 0X021A| CPU2_ADCCHECKEVT3 |
| CDD_XBAR_OUT_CPU2_ADCCHECKEVT4 | 0X021B| CPU2_ADCCHECKEVT4 |
| CDD_XBAR_OUT_CPU3_ADCCHECKEVT1 | 0X021C| CPU3_ADCCHECKEVT1 |
| CDD_XBAR_OUT_CPU3_ADCCHECKEVT2 | 0X021D| CPU3_ADCCHECKEVT2 |
| CDD_XBAR_OUT_CPU3_ADCCHECKEVT3 | 0X021E| CPU3_ADCCHECKEVT3 |
| CDD_XBAR_OUT_CPU3_ADCCHECKEVT4 | 0X021F| CPU3_ADCCHECKEVT4 |
| CDD_XBAR_OUT_INPUTXBAR1 | 0X0300| INPUTXBAR1 |
| CDD_XBAR_OUT_INPUTXBAR2 | 0X0301| INPUTXBAR2 |
| CDD_XBAR_OUT_INPUTXBAR3 | 0X0302| INPUTXBAR3 |
| CDD_XBAR_OUT_INPUTXBAR4 | 0X0303| INPUTXBAR4 |
| CDD_XBAR_OUT_INPUTXBAR5 | 0X0304| INPUTXBAR5 |
| CDD_XBAR_OUT_INPUTXBAR6 | 0X0305| INPUTXBAR6 |
| CDD_XBAR_OUT_INPUTXBAR7 | 0X0306| INPUTXBAR7 |
| CDD_XBAR_OUT_INPUTXBAR8 | 0X0307| INPUTXBAR8 |
| CDD_XBAR_OUT_EQEP1_INDEX_SYNCOUT | 0X0400| EQEP1_INDEX_SYNCOUT |
| CDD_XBAR_OUT_EQEP1_STROBE_SYNCOUT | 0X0401| EQEP1_STROBE_SYNCOUT |
| CDD_XBAR_OUT_EQEP2_INDEX_SYNCOUT | 0X0402| EQEP2_INDEX_SYNCOUT |
| CDD_XBAR_OUT_EQEP2_STROBE_SYNCOUT | 0X0403| EQEP2_STROBE_SYNCOUT |
| CDD_XBAR_OUT_EQEP3_INDEX_SYNCOUT | 0X0404| EQEP3_INDEX_SYNCOUT |
| CDD_XBAR_OUT_EQEP3_STROBE_SYNCOUT | 0X0405| EQEP3_STROBE_SYNCOUT |
| CDD_XBAR_OUT_EQEP4_INDEX_SYNCOUT | 0X0406| EQEP4_INDEX_SYNCOUT |
| CDD_XBAR_OUT_EQEP4_STROBE_SYNCOUT | 0X0407| EQEP4_STROBE_SYNCOUT |
| CDD_XBAR_OUT_EQEP5_INDEX_SYNCOUT | 0X0408| EQEP5_INDEX_SYNCOUT |
| CDD_XBAR_OUT_EQEP5_STROBE_SYNCOUT | 0X0409| EQEP5_STROBE_SYNCOUT |
| CDD_XBAR_OUT_EQEP6_INDEX_SYNCOUT | 0X040A| EQEP6_INDEX_SYNCOUT |
| CDD_XBAR_OUT_EQEP6_STROBE_SYNCOUT | 0X040B| EQEP6_STROBE_SYNCOUT |
| CDD_XBAR_OUT_FSIRXA_TRIG1 | 0X0410| FSIRXA_TRIG1 |
| CDD_XBAR_OUT_FSIRXB_TRIG1 | 0X0411| FSIRXB_TRIG1 |
| CDD_XBAR_OUT_FSIRXC_TRIG1 | 0X0412| FSIRXC_TRIG1 |
| CDD_XBAR_OUT_FSIRXD_TRIG1 | 0X0413| FSIRXD_TRIG1 |
| CDD_XBAR_OUT_FSIRXA_TRIG2 | 0X0414| FSIRXA_TRIG2 |
| CDD_XBAR_OUT_FSIRXB_TRIG2 | 0X0415| FSIRXB_TRIG2 |
| CDD_XBAR_OUT_FSIRXC_TRIG2 | 0X0416| FSIRXC_TRIG2 |
| CDD_XBAR_OUT_FSIRXD_TRIG2 | 0X0417| FSIRXD_TRIG2 |
| CDD_XBAR_OUT_FSIRXA_TRIG3 | 0X0418| FSIRXA_TRIG3 |
| CDD_XBAR_OUT_FSIRXB_TRIG3 | 0X0419| FSIRXB_TRIG3 |
| CDD_XBAR_OUT_FSIRXC_TRIG3 | 0X041A| FSIRXC_TRIG3 |
| CDD_XBAR_OUT_FSIRXD_TRIG3 | 0X041B| FSIRXD_TRIG3 |
| CDD_XBAR_OUT_XCLKOUT | 0X041D| XCLKOUT |
| CDD_XBAR_OUT_ECAT_SYNC0 | 0X041E| ECAT_SYNC0 |
| CDD_XBAR_OUT_ECAT_SYNC1 | 0X041F| ECAT_SYNC1 |
| CDD_XBAR_OUT_ECAP1_OUT | 0X0500| ECAP1_OUT |
| CDD_XBAR_OUT_ECAP2_OUT | 0X0501| ECAP2_OUT |
| CDD_XBAR_OUT_ECAP3_OUT | 0X0502| ECAP3_OUT |
| CDD_XBAR_OUT_ECAP4_OUT | 0X0503| ECAP4_OUT |
| CDD_XBAR_OUT_ECAP5_OUT | 0X0504| ECAP5_OUT |
| CDD_XBAR_OUT_ECAP6_OUT | 0X0505| ECAP6_OUT |
| CDD_XBAR_OUT_ECAP1_TRIPOUT | 0X0508| ECAP1_TRIPOUT |
| CDD_XBAR_OUT_ECAP2_TRIPOUT | 0X0509| ECAP2_TRIPOUT |
| CDD_XBAR_OUT_ECAP3_TRIPOUT | 0X050A| ECAP3_TRIPOUT |
| CDD_XBAR_OUT_ECAP4_TRIPOUT | 0X050B| ECAP4_TRIPOUT |
| CDD_XBAR_OUT_ECAP5_TRIPOUT | 0X050C| ECAP5_TRIPOUT |
| CDD_XBAR_OUT_ECAP6_TRIPOUT | 0X050D| ECAP6_TRIPOUT |
| CDD_XBAR_OUT_ADCSOCA | 0X0510| ADCSOCA |
| CDD_XBAR_OUT_ADCSOCB | 0X0511| ADCSOCB |
| CDD_XBAR_OUT_ESM_GEN_EVENT | 0X0512| ESM_GEN_EVENT |
| CDD_XBAR_OUT_EXTSYNCOUT | 0X0513| EXTSYNCOUT |
| CDD_XBAR_OUT_EPG1OUT0 | 0X0514| EPG1OUT0 |
| CDD_XBAR_OUT_EPG1OUT1 | 0X0515| EPG1OUT1 |
| CDD_XBAR_OUT_EPG1OUT2 | 0X0516| EPG1OUT2 |
| CDD_XBAR_OUT_EPG1OUT3 | 0X0517| EPG1OUT3 |
| CDD_XBAR_OUT_WADI1OUT0 | 0X0518| WADI1OUT0 |
| CDD_XBAR_OUT_WADI1OUT1 | 0X0519| WADI1OUT1 |
| CDD_XBAR_OUT_WADI1OUT2 | 0X051A| WADI1OUT2 |
| CDD_XBAR_OUT_WADI1OUT3 | 0X051B| WADI1OUT3 |
| CDD_XBAR_OUT_WADI1OUT4 | 0X051C| WADI1OUT4 |
| CDD_XBAR_OUT_WADI1OUT5 | 0X051D| WADI1OUT5 |
| CDD_XBAR_OUT_WADI1OUT6 | 0X051E| WADI1OUT6 |
| CDD_XBAR_OUT_WADI1OUT7 | 0X051F| WADI1OUT7 |
| CDD_XBAR_OUT_MCANA_FEVT0 | 0X0600| MCANA_FEVT0 |
| CDD_XBAR_OUT_MCANA_FEVT1 | 0X0601| MCANA_FEVT1 |
| CDD_XBAR_OUT_MCANA_FEVT2 | 0X0602| MCANA_FEVT2 |
| CDD_XBAR_OUT_MCANB_FEVT0 | 0X0603| MCANB_FEVT0 |
| CDD_XBAR_OUT_MCANB_FEVT1 | 0X0604| MCANB_FEVT1 |
| CDD_XBAR_OUT_MCANB_FEVT2 | 0X0605| MCANB_FEVT2 |
| CDD_XBAR_OUT_MCANC_FEVT0 | 0X0606| MCANC_FEVT0 |
| CDD_XBAR_OUT_MCANC_FEVT1 | 0X0607| MCANC_FEVT1 |
| CDD_XBAR_OUT_MCANC_FEVT2 | 0X0608| MCANC_FEVT2 |
| CDD_XBAR_OUT_MCAND_FEVT0 | 0X0609| MCAND_FEVT0 |
| CDD_XBAR_OUT_MCAND_FEVT1 | 0X060A| MCAND_FEVT1 |
| CDD_XBAR_OUT_MCAND_FEVT2 | 0X060B| MCAND_FEVT2 |
| CDD_XBAR_OUT_MCANE_FEVT0 | 0X060C| MCANE_FEVT0 |
| CDD_XBAR_OUT_MCANE_FEVT1 | 0X060D| MCANE_FEVT1 |
| CDD_XBAR_OUT_MCANE_FEVT2 | 0X060E| MCANE_FEVT2 |
| CDD_XBAR_OUT_MCANF_FEVT0 | 0X060F| MCANF_FEVT0 |
| CDD_XBAR_OUT_MCANF_FEVT1 | 0X0610| MCANF_FEVT1 |
| CDD_XBAR_OUT_MCANF_FEVT2 | 0X0611| MCANF_FEVT2 |
| CDD_XBAR_OUT_WADI2OUT0 | 0X0618| WADI2OUT0 |
| CDD_XBAR_OUT_WADI2OUT1 | 0X0619| WADI2OUT1 |
| CDD_XBAR_OUT_WADI2OUT2 | 0X061A| WADI2OUT2 |
| CDD_XBAR_OUT_WADI2OUT3 | 0X061B| WADI2OUT3 |
| CDD_XBAR_OUT_WADI2OUT4 | 0X061C| WADI2OUT4 |
| CDD_XBAR_OUT_WADI2OUT5 | 0X061D| WADI2OUT5 |
| CDD_XBAR_OUT_WADI2OUT6 | 0X061E| WADI2OUT6 |
| CDD_XBAR_OUT_WADI2OUT7 | 0X061F| WADI2OUT7 |
| CDD_XBAR_OUT_CLB1_OUT0 | 0X0700| CLB1_OUT0 |
| CDD_XBAR_OUT_CLB1_OUT1 | 0X0701| CLB1_OUT1 |
| CDD_XBAR_OUT_CLB1_OUT2 | 0X0702| CLB1_OUT2 |
| CDD_XBAR_OUT_CLB1_OUT3 | 0X0703| CLB1_OUT3 |
| CDD_XBAR_OUT_CLB1_OUT4 | 0X0704| CLB1_OUT4 |
| CDD_XBAR_OUT_CLB1_OUT5 | 0X0705| CLB1_OUT5 |
| CDD_XBAR_OUT_CLB1_OUT6 | 0X0706| CLB1_OUT6 |
| CDD_XBAR_OUT_CLB1_OUT7 | 0X0707| CLB1_OUT7 |
| CDD_XBAR_OUT_CLB2_OUT0 | 0X0708| CLB2_OUT0 |
| CDD_XBAR_OUT_CLB2_OUT1 | 0X0709| CLB2_OUT1 |
| CDD_XBAR_OUT_CLB2_OUT2 | 0X070A| CLB2_OUT2 |
| CDD_XBAR_OUT_CLB2_OUT3 | 0X070B| CLB2_OUT3 |
| CDD_XBAR_OUT_CLB2_OUT4 | 0X070C| CLB2_OUT4 |
| CDD_XBAR_OUT_CLB2_OUT5 | 0X070D| CLB2_OUT5 |
| CDD_XBAR_OUT_CLB2_OUT6 | 0X070E| CLB2_OUT6 |
| CDD_XBAR_OUT_CLB2_OUT7 | 0X070F| CLB2_OUT7 |
| CDD_XBAR_OUT_CLB3_OUT0 | 0X0710| CLB3_OUT0 |
| CDD_XBAR_OUT_CLB3_OUT1 | 0X0711| CLB3_OUT1 |
| CDD_XBAR_OUT_CLB3_OUT2 | 0X0712| CLB3_OUT2 |
| CDD_XBAR_OUT_CLB3_OUT3 | 0X0713| CLB3_OUT3 |
| CDD_XBAR_OUT_CLB3_OUT4 | 0X0714| CLB3_OUT4 |
| CDD_XBAR_OUT_CLB3_OUT5 | 0X0715| CLB3_OUT5 |
| CDD_XBAR_OUT_CLB3_OUT6 | 0X0716| CLB3_OUT6 |
| CDD_XBAR_OUT_CLB3_OUT7 | 0X0717| CLB3_OUT7 |
| CDD_XBAR_OUT_CLB4_OUT0 | 0X0718| CLB4_OUT0 |
| CDD_XBAR_OUT_CLB4_OUT1 | 0X0719| CLB4_OUT1 |
| CDD_XBAR_OUT_CLB4_OUT2 | 0X071A| CLB4_OUT2 |
| CDD_XBAR_OUT_CLB4_OUT3 | 0X071B| CLB4_OUT3 |
| CDD_XBAR_OUT_CLB4_OUT4 | 0X071C| CLB4_OUT4 |
| CDD_XBAR_OUT_CLB4_OUT5 | 0X071D| CLB4_OUT5 |
| CDD_XBAR_OUT_CLB4_OUT6 | 0X071E| CLB4_OUT6 |
| CDD_XBAR_OUT_CLB4_OUT7 | 0X071F| CLB4_OUT7 |
| CDD_XBAR_OUT_CLB5_OUT0 | 0X0800| CLB5_OUT0 |
| CDD_XBAR_OUT_CLB5_OUT1 | 0X0801| CLB5_OUT1 |
| CDD_XBAR_OUT_CLB5_OUT2 | 0X0802| CLB5_OUT2 |
| CDD_XBAR_OUT_CLB5_OUT3 | 0X0803| CLB5_OUT3 |
| CDD_XBAR_OUT_CLB5_OUT4 | 0X0804| CLB5_OUT4 |
| CDD_XBAR_OUT_CLB5_OUT5 | 0X0805| CLB5_OUT5 |
| CDD_XBAR_OUT_CLB5_OUT6 | 0X0806| CLB5_OUT6 |
| CDD_XBAR_OUT_CLB5_OUT7 | 0X0807| CLB5_OUT7 |
| CDD_XBAR_OUT_CLB6_OUT0 | 0X0808| CLB6_OUT0 |
| CDD_XBAR_OUT_CLB6_OUT1 | 0X0809| CLB6_OUT1 |
| CDD_XBAR_OUT_CLB6_OUT2 | 0X080A| CLB6_OUT2 |
| CDD_XBAR_OUT_CLB6_OUT3 | 0X080B| CLB6_OUT3 |
| CDD_XBAR_OUT_CLB6_OUT4 | 0X080C| CLB6_OUT4 |
| CDD_XBAR_OUT_CLB6_OUT5 | 0X080D| CLB6_OUT5 |
| CDD_XBAR_OUT_CLB6_OUT6 | 0X080E| CLB6_OUT6 |
| CDD_XBAR_OUT_CLB6_OUT7 | 0X080F| CLB6_OUT7 |
| CDD_XBAR_OUT_CLBXBAR1 | 0X0900| CLBXBAR1 |
| CDD_XBAR_OUT_CLBXBAR2 | 0X0901| CLBXBAR2 |
| CDD_XBAR_OUT_CLBXBAR3 | 0X0902| CLBXBAR3 |
| CDD_XBAR_OUT_CLBXBAR4 | 0X0903| CLBXBAR4 |
| CDD_XBAR_OUT_CLBXBAR5 | 0X0904| CLBXBAR5 |
| CDD_XBAR_OUT_CLBXBAR6 | 0X0905| CLBXBAR6 |
| CDD_XBAR_OUT_CLBXBAR7 | 0X0906| CLBXBAR7 |
| CDD_XBAR_OUT_CLBXBAR8 | 0X0907| CLBXBAR8 |
| CDD_XBAR_OUT_ADCA_EXTMUXSEL0 | 0X0908| ADCA_EXTMUXSEL0 |
| CDD_XBAR_OUT_ADCA_EXTMUXSEL1 | 0X0909| ADCA_EXTMUXSEL1 |
| CDD_XBAR_OUT_ADCA_EXTMUXSEL2 | 0X090A| ADCA_EXTMUXSEL2 |
| CDD_XBAR_OUT_ADCA_EXTMUXSEL3 | 0X090B| ADCA_EXTMUXSEL3 |
| CDD_XBAR_OUT_ADCB_EXTMUXSEL0 | 0X090C| ADCB_EXTMUXSEL0 |
| CDD_XBAR_OUT_ADCB_EXTMUXSEL1 | 0X090D| ADCB_EXTMUXSEL1 |
| CDD_XBAR_OUT_ADCB_EXTMUXSEL2 | 0X090E| ADCB_EXTMUXSEL2 |
| CDD_XBAR_OUT_ADCB_EXTMUXSEL3 | 0X090F| ADCB_EXTMUXSEL3 |
| CDD_XBAR_OUT_ADCC_EXTMUXSEL0 | 0X0910| ADCC_EXTMUXSEL0 |
| CDD_XBAR_OUT_ADCC_EXTMUXSEL1 | 0X0911| ADCC_EXTMUXSEL1 |
| CDD_XBAR_OUT_ADCC_EXTMUXSEL2 | 0X0912| ADCC_EXTMUXSEL2 |
| CDD_XBAR_OUT_ADCC_EXTMUXSEL3 | 0X0913| ADCC_EXTMUXSEL3 |
| CDD_XBAR_OUT_ADCD_EXTMUXSEL0 | 0X0914| ADCD_EXTMUXSEL0 |
| CDD_XBAR_OUT_ADCD_EXTMUXSEL1 | 0X0915| ADCD_EXTMUXSEL1 |
| CDD_XBAR_OUT_ADCD_EXTMUXSEL2 | 0X0916| ADCD_EXTMUXSEL2 |
| CDD_XBAR_OUT_ADCD_EXTMUXSEL3 | 0X0917| ADCD_EXTMUXSEL3 |
| CDD_XBAR_OUT_ADCE_EXTMUXSEL0 | 0X0918| ADCE_EXTMUXSEL0 |
| CDD_XBAR_OUT_ADCE_EXTMUXSEL1 | 0X0919| ADCE_EXTMUXSEL1 |
| CDD_XBAR_OUT_ADCE_EXTMUXSEL2 | 0X091A| ADCE_EXTMUXSEL2 |
| CDD_XBAR_OUT_ADCE_EXTMUXSEL3 | 0X091B| ADCE_EXTMUXSEL3 |
**Brief**:
Output Crossbar Input Lines.
### enum Cdd_Xbar_Epwm_Xbar_Input_LinesType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_XBAR_EPWM_CMPSS1_CTRIPH | 0X0000| CMPSS1_CTRIPH |
| CDD_XBAR_EPWM_CMPSS1_CTRIPL | 0X0001| CMPSS1_CTRIPL |
| CDD_XBAR_EPWM_CMPSS2_CTRIPH | 0X0002| CMPSS2_CTRIPH |
| CDD_XBAR_EPWM_CMPSS2_CTRIPL | 0X0003| CMPSS2_CTRIPL |
| CDD_XBAR_EPWM_CMPSS3_CTRIPH | 0X0004| CMPSS3_CTRIPH |
| CDD_XBAR_EPWM_CMPSS3_CTRIPL | 0X0005| CMPSS3_CTRIPL |
| CDD_XBAR_EPWM_CMPSS4_CTRIPH | 0X0006| CMPSS4_CTRIPH |
| CDD_XBAR_EPWM_CMPSS4_CTRIPL | 0X0007| CMPSS4_CTRIPL |
| CDD_XBAR_EPWM_CMPSS5_CTRIPH | 0X0008| CMPSS5_CTRIPH |
| CDD_XBAR_EPWM_CMPSS5_CTRIPL | 0X0009| CMPSS5_CTRIPL |
| CDD_XBAR_EPWM_CMPSS6_CTRIPH | 0X000A| CMPSS6_CTRIPH |
| CDD_XBAR_EPWM_CMPSS6_CTRIPL | 0X000B| CMPSS6_CTRIPL |
| CDD_XBAR_EPWM_CMPSS7_CTRIPH | 0X000C| CMPSS7_CTRIPH |
| CDD_XBAR_EPWM_CMPSS7_CTRIPL | 0X000D| CMPSS7_CTRIPL |
| CDD_XBAR_EPWM_CMPSS8_CTRIPH | 0X000E| CMPSS8_CTRIPH |
| CDD_XBAR_EPWM_CMPSS8_CTRIPL | 0X000F| CMPSS8_CTRIPL |
| CDD_XBAR_EPWM_CMPSS9_CTRIPH | 0X0010| CMPSS9_CTRIPH |
| CDD_XBAR_EPWM_CMPSS9_CTRIPL | 0X0011| CMPSS9_CTRIPL |
| CDD_XBAR_EPWM_CMPSS10_CTRIPH | 0X0012| CMPSS10_CTRIPH |
| CDD_XBAR_EPWM_CMPSS10_CTRIPL | 0X0013| CMPSS10_CTRIPL |
| CDD_XBAR_EPWM_CMPSS11_CTRIPH | 0X0014| CMPSS11_CTRIPH |
| CDD_XBAR_EPWM_CMPSS11_CTRIPL | 0X0015| CMPSS11_CTRIPL |
| CDD_XBAR_EPWM_CMPSS12_CTRIPH | 0X0016| CMPSS12_CTRIPH |
| CDD_XBAR_EPWM_CMPSS12_CTRIPL | 0X0017| CMPSS12_CTRIPL |
| CDD_XBAR_EPWM_SD1FLT1_COMPH | 0X0100| SD1FLT1_COMPH |
| CDD_XBAR_EPWM_SD1FLT1_COMPL | 0X0101| SD1FLT1_COMPL |
| CDD_XBAR_EPWM_SD1FLT2_COMPH | 0X0102| SD1FLT2_COMPH |
| CDD_XBAR_EPWM_SD1FLT2_COMPL | 0X0103| SD1FLT2_COMPL |
| CDD_XBAR_EPWM_SD1FLT3_COMPH | 0X0104| SD1FLT3_COMPH |
| CDD_XBAR_EPWM_SD1FLT3_COMPL | 0X0105| SD1FLT3_COMPL |
| CDD_XBAR_EPWM_SD1FLT4_COMPH | 0X0106| SD1FLT4_COMPH |
| CDD_XBAR_EPWM_SD1FLT4_COMPL | 0X0107| SD1FLT4_COMPL |
| CDD_XBAR_EPWM_SD2FLT1_COMPH | 0X0108| SD2FLT1_COMPH |
| CDD_XBAR_EPWM_SD2FLT1_COMPL | 0X0109| SD2FLT1_COMPL |
| CDD_XBAR_EPWM_SD2FLT2_COMPH | 0X010A| SD2FLT2_COMPH |
| CDD_XBAR_EPWM_SD2FLT2_COMPL | 0X010B| SD2FLT2_COMPL |
| CDD_XBAR_EPWM_SD2FLT3_COMPH | 0X010C| SD2FLT3_COMPH |
| CDD_XBAR_EPWM_SD2FLT3_COMPL | 0X010D| SD2FLT2_COMPL |
| CDD_XBAR_EPWM_SD2FLT4_COMPH | 0X010E| SD2FLT4_COMPH |
| CDD_XBAR_EPWM_SD2FLT4_COMPL | 0X010F| SD2FLT4_COMPL |
| CDD_XBAR_EPWM_SD3FLT1_COMPH | 0X0110| SD3FLT1_COMPH |
| CDD_XBAR_EPWM_SD3FLT1_COMPL | 0X0111| SD3FLT1_COMPL |
| CDD_XBAR_EPWM_SD3FLT2_COMPH | 0X0112| SD3FLT2_COMPH |
| CDD_XBAR_EPWM_SD3FLT2_COMPL | 0X0113| SD3FLT2_COMPL |
| CDD_XBAR_EPWM_SD3FLT3_COMPH | 0X0114| SD3FLT3_COMPH |
| CDD_XBAR_EPWM_SD3FLT3_COMPL | 0X0115| SD3FLT3_COMPL |
| CDD_XBAR_EPWM_SD3FLT4_COMPH | 0X0116| SD3FLT4_COMPH |
| CDD_XBAR_EPWM_SD3FLT4_COMPL | 0X0117| SD3FLT4_COMPL |
| CDD_XBAR_EPWM_SD4FLT1_COMPH | 0X0118| SD4FLT1_COMPH |
| CDD_XBAR_EPWM_SD4FLT1_COMPL | 0X0119| SD4FLT1_COMPL |
| CDD_XBAR_EPWM_SD4FLT2_COMPH | 0X011A| SD4FLT2_COMPH |
| CDD_XBAR_EPWM_SD4FLT2_COMPL | 0X011B| SD4FLT2_COMPL |
| CDD_XBAR_EPWM_SD4FLT3_COMPH | 0X011C| SD4FLT3_COMPH |
| CDD_XBAR_EPWM_SD4FLT3_COMPL | 0X011D| SD4FLT3_COMPL |
| CDD_XBAR_EPWM_SD4FLT4_COMPH | 0X011E| SD4FLT4_COMPH |
| CDD_XBAR_EPWM_SD4FLT4_COMPL | 0X011F| SD4FLT4_COMPL |
| CDD_XBAR_EPWM_ADCAEVT1 | 0X0200| ADCAEVT1 |
| CDD_XBAR_EPWM_ADCAEVT2 | 0X0201| ADCAEVT2 |
| CDD_XBAR_EPWM_ADCAEVT3 | 0X0202| ADCAEVT3 |
| CDD_XBAR_EPWM_ADCAEVT4 | 0X0203| ADCAEVT4 |
| CDD_XBAR_EPWM_ADCBEVT1 | 0X0204| ADCBEVT1 |
| CDD_XBAR_EPWM_ADCBEVT2 | 0X0205| ADCBEVT2 |
| CDD_XBAR_EPWM_ADCBEVT3 | 0X0206| ADCBEVT3 |
| CDD_XBAR_EPWM_ADCBEVT4 | 0X0207| ADCBEVT4 |
| CDD_XBAR_EPWM_ADCCEVT1 | 0X0208| ADCCEVT1 |
| CDD_XBAR_EPWM_ADCCEVT2 | 0X0209| ADCCEVT2 |
| CDD_XBAR_EPWM_ADCCEVT3 | 0X020A| ADCCEVT3 |
| CDD_XBAR_EPWM_ADCCEVT4 | 0X020B| ADCCEVT4 |
| CDD_XBAR_EPWM_ADCDEVT1 | 0X020C| ADCDEVT1 |
| CDD_XBAR_EPWM_ADCDEVT2 | 0X020D| ADCDEVT2 |
| CDD_XBAR_EPWM_ADCDEVT3 | 0X020E| ADCDEVT3 |
| CDD_XBAR_EPWM_ADCDEVT4 | 0X020F| ADCDEVT4 |
| CDD_XBAR_EPWM_ADCEEVT1 | 0X0210| ADCEEVT1 |
| CDD_XBAR_EPWM_ADCEEVT2 | 0X0211| ADCEEVT2 |
| CDD_XBAR_EPWM_ADCEEVT3 | 0X0212| ADCEEVT3 |
| CDD_XBAR_EPWM_ADCEEVT4 | 0X0213| ADCEEVT4 |
| CDD_XBAR_EPWM_CPU1_ADCCHECKEVT1 | 0X0214| CPU1_ADCCHECKEVT1 |
| CDD_XBAR_EPWM_CPU1_ADCCHECKEVT2 | 0X0215| CPU1_ADCCHECKEVT2 |
| CDD_XBAR_EPWM_CPU1_ADCCHECKEVT3 | 0X0216| CPU1_ADCCHECKEVT3 |
| CDD_XBAR_EPWM_CPU1_ADCCHECKEVT4 | 0X0217| CPU1_ADCCHECKEVT4 |
| CDD_XBAR_EPWM_CPU2_ADCCHECKEVT1 | 0X0218| CPU2_ADCCHECKEVT1 |
| CDD_XBAR_EPWM_CPU2_ADCCHECKEVT2 | 0X0219| CPU2_ADCCHECKEVT2 |
| CDD_XBAR_EPWM_CPU2_ADCCHECKEVT3 | 0X021A| CPU2_ADCCHECKEVT3 |
| CDD_XBAR_EPWM_CPU2_ADCCHECKEVT4 | 0X021B| CPU2_ADCCHECKEVT4 |
| CDD_XBAR_EPWM_CPU3_ADCCHECKEVT1 | 0X021C| CPU3_ADCCHECKEVT1 |
| CDD_XBAR_EPWM_CPU3_ADCCHECKEVT2 | 0X021D| CPU3_ADCCHECKEVT2 |
| CDD_XBAR_EPWM_CPU3_ADCCHECKEVT3 | 0X021E| CPU3_ADCCHECKEVT3 |
| CDD_XBAR_EPWM_CPU3_ADCCHECKEVT4 | 0X021F| CPU3_ADCCHECKEVT4 |
| CDD_XBAR_EPWM_INPUTXBAR1 | 0X0300| INPUTXBAR1 |
| CDD_XBAR_EPWM_INPUTXBAR2 | 0X0301| INPUTXBAR2 |
| CDD_XBAR_EPWM_INPUTXBAR3 | 0X0302| INPUTXBAR3 |
| CDD_XBAR_EPWM_INPUTXBAR4 | 0X0303| INPUTXBAR4 |
| CDD_XBAR_EPWM_INPUTXBAR5 | 0X0304| INPUTXBAR5 |
| CDD_XBAR_EPWM_INPUTXBAR6 | 0X0305| INPUTXBAR6 |
| CDD_XBAR_EPWM_INPUTXBAR7 | 0X0306| INPUTXBAR7 |
| CDD_XBAR_EPWM_INPUTXBAR8 | 0X0307| INPUTXBAR8 |
| CDD_XBAR_EPWM_INPUTXBAR9 | 0X0308| INPUTXBAR9 |
| CDD_XBAR_EPWM_INPUTXBAR10 | 0X0309| INPUTXBAR10 |
| CDD_XBAR_EPWM_INPUTXBAR11 | 0X030A| INPUTXBAR11 |
| CDD_XBAR_EPWM_INPUTXBAR12 | 0X030B| INPUTXBAR12 |
| CDD_XBAR_EPWM_INPUTXBAR13 | 0X030C| INPUTXBAR13 |
| CDD_XBAR_EPWM_INPUTXBAR14 | 0X030D| INPUTXBAR14 |
| CDD_XBAR_EPWM_INPUTXBAR15 | 0X030E| INPUTXBAR15 |
| CDD_XBAR_EPWM_INPUTXBAR16 | 0X030F| INPUTXBAR16 |
| CDD_XBAR_EPWM_INPUTXBAR17 | 0X0310| INPUTXBAR17 |
| CDD_XBAR_EPWM_INPUTXBAR18 | 0X0311| INPUTXBAR18 |
| CDD_XBAR_EPWM_INPUTXBAR19 | 0X0312| INPUTXBAR19 |
| CDD_XBAR_EPWM_INPUTXBAR20 | 0X0313| INPUTXBAR20 |
| CDD_XBAR_EPWM_INPUTXBAR21 | 0X0314| INPUTXBAR21. |
| CDD_XBAR_EPWM_INPUTXBAR22 | 0X0315| INPUTXBAR22 |
| CDD_XBAR_EPWM_INPUTXBAR23 | 0X0316| INPUTXBAR23 |
| CDD_XBAR_EPWM_INPUTXBAR24 | 0X0317| INPUTXBAR24 |
| CDD_XBAR_EPWM_INPUTXBAR25 | 0X0318| INPUTXBAR25 |
| CDD_XBAR_EPWM_INPUTXBAR26 | 0X0319| INPUTXBAR26 |
| CDD_XBAR_EPWM_INPUTXBAR27 | 0X031A| INPUTXBAR27 |
| CDD_XBAR_EPWM_INPUTXBAR28 | 0X031B| INPUTXBAR28 |
| CDD_XBAR_EPWM_INPUTXBAR29 | 0X031C| INPUTXBAR29 |
| CDD_XBAR_EPWM_INPUTXBAR30 | 0X031D| INPUTXBAR30 |
| CDD_XBAR_EPWM_INPUTXBAR31 | 0X031E| INPUTXBAR31 |
| CDD_XBAR_EPWM_INPUTXBAR32 | 0X031F| INPUTXBAR32 |
| CDD_XBAR_EPWM_CLB1_OUT4 | 0X0400| CLB1_OUT4 |
| CDD_XBAR_EPWM_CLB1_OUT5 | 0X0401| CLB1_OUT5 |
| CDD_XBAR_EPWM_CLB2_OUT4 | 0X0402| CLB2_OUT4 |
| CDD_XBAR_EPWM_CLB2_OUT5 | 0X0403| CLB2_OUT5 |
| CDD_XBAR_EPWM_CLB3_OUT4 | 0X0404| CLB3_OUT4 |
| CDD_XBAR_EPWM_CLB3_OUT5 | 0X0405| CLB3_OUT5 |
| CDD_XBAR_EPWM_CLB4_OUT4 | 0X0406| CLB4_OUT4 |
| CDD_XBAR_EPWM_CLB4_OUT5 | 0X0407| CLB4_OUT5 |
| CDD_XBAR_EPWM_CLB5_OUT4 | 0X0408| CLB5_OUT4 |
| CDD_XBAR_EPWM_CLB5_OUT5 | 0X0409| CLB5_OUT5 |
| CDD_XBAR_EPWM_CLB6_OUT4 | 0X040A| CLB6_OUT4 |
| CDD_XBAR_EPWM_CLB6_OUT5 | 0X040B| CLB6_OUT5 |
| CDD_XBAR_EPWM_FSIRXA_TRIG1 | 0X0410| FSIRXA_TRIG1 |
| CDD_XBAR_EPWM_FSIRXB_TRIG1 | 0X0411| FSIRXB_TRIG1 |
| CDD_XBAR_EPWM_FSIRXC_TRIG1 | 0X0412| FSIRXC_TRIG1 |
| CDD_XBAR_EPWM_FSIRXD_TRIG1 | 0X0413| FSIRXD_TRIG1 |
| CDD_XBAR_EPWM_ECAT_SYNC0 | 0X041E| ECAT_SYNC0 |
| CDD_XBAR_EPWM_ECAT_SYNC1 | 0X041F| ECAT_SYNC1 |
| CDD_XBAR_EPWM_ECAP1_OUT | 0X0500| ECAP1_OUT |
| CDD_XBAR_EPWM_ECAP2_OUT | 0X0501| ECAP2_OUT |
| CDD_XBAR_EPWM_ECAP3_OUT | 0X0502| ECAP3_OUT |
| CDD_XBAR_EPWM_ECAP4_OUT | 0X0503| ECAP4_OUT |
| CDD_XBAR_EPWM_ECAP5_OUT | 0X0504| ECAP5_OUT |
| CDD_XBAR_EPWM_ECAP6_OUT | 0X0505| ECAP6_OUT |
| CDD_XBAR_EPWM_ECAP1_TRIPOUT | 0X0508| ECAP1_TRIPOUT |
| CDD_XBAR_EPWM_ECAP2_TRIPOUT | 0X0509| ECAP2_TRIPOUT |
| CDD_XBAR_EPWM_ECAP3_TRIPOUT | 0X050A| ECAP3_TRIPOUT |
| CDD_XBAR_EPWM_ECAP4_TRIPOUT | 0X050B| ECAP4_TRIPOUT |
| CDD_XBAR_EPWM_ECAP5_TRIPOUT | 0X050C| ECAP5_TRIPOUT |
| CDD_XBAR_EPWM_ECAP6_TRIPOUT | 0X050D| ECAP6_TRIPOUT |
| CDD_XBAR_EPWM_ADCSOCA | 0X0510| ADCSOCA |
| CDD_XBAR_EPWM_ADCSOCB | 0X0511| ADCSOCB |
| CDD_XBAR_EPWM_ESM_GEN_EVENT | 0X0512| ESM_GEN_EVENT |
| CDD_XBAR_EPWM_EXTSYNCOUT | 0X0513| EXTSYNCOUT |
| CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_0 | 0X0514| WADI1_ERROR_BUS_O_0 |
| CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_1 | 0X0515| WADI1_ERROR_BUS_O_1 |
| CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_2 | 0X0516| WADI1_ERROR_BUS_O_2 |
| CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_3 | 0X0517| WADI1_ERROR_BUS_O_3 |
| CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_4 | 0X0518| WADI1_ERROR_BUS_O_4 |
| CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_5 | 0X0519| WADI1_ERROR_BUS_O_5 |
| CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_6 | 0X051A| WADI1_ERROR_BUS_O_6 |
| CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_7 | 0X051B| WADI1_ERROR_BUS_O_7 |
| CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_8 | 0X051C| WADI1_ERROR_BUS_O_8 |
| CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_9 | 0X051D| WADI1_ERROR_BUS_O_9 |
| CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_10 | 0X051E| WADI1_ERROR_BUS_O_10 |
| CDD_XBAR_EPWM_WADI1_ERROR_BUS_O_11 | 0X051F| WADI1_ERROR_BUS_O_11 |
| CDD_XBAR_EPWM_MCANA_FEVT0 | 0X0600| MCANA_FEVT0 |
| CDD_XBAR_EPWM_MCANA_FEVT1 | 0X0601| MCANA_FEVT1 |
| CDD_XBAR_EPWM_MCANA_FEVT2 | 0X0602| MCANA_FEVT2 |
| CDD_XBAR_EPWM_MCANB_FEVT0 | 0X0603| MCANB_FEVT0 |
| CDD_XBAR_EPWM_MCANB_FEVT1 | 0X0604| MCANB_FEVT1 |
| CDD_XBAR_EPWM_MCANB_FEVT2 | 0X0605| MCANB_FEVT2 |
| CDD_XBAR_EPWM_MCANC_FEVT0 | 0X0606| MCANC_FEVT0 |
| CDD_XBAR_EPWM_MCANC_FEVT1 | 0X0607| MCANC_FEVT1 |
| CDD_XBAR_EPWM_MCANC_FEVT2 | 0X0608| MCANC_FEVT2 |
| CDD_XBAR_EPWM_MCAND_FEVT0 | 0X0609| MCAND_FEVT0 |
| CDD_XBAR_EPWM_MCAND_FEVT1 | 0X060A| MCAND_FEVT1 |
| CDD_XBAR_EPWM_MCAND_FEVT2 | 0X060B| MCAND_FEVT2 |
| CDD_XBAR_EPWM_MCANE_FEVT0 | 0X060C| MCANE_FEVT0 |
| CDD_XBAR_EPWM_MCANE_FEVT1 | 0X060D| MCANE_FEVT1 |
| CDD_XBAR_EPWM_MCANE_FEVT2 | 0X060E| MCANE_FEVT2 |
| CDD_XBAR_EPWM_MCANF_FEVT0 | 0X060F| MCANF_FEVT0 |
| CDD_XBAR_EPWM_MCANF_FEVT1 | 0X0610| MCANF_FEVT1 |
| CDD_XBAR_EPWM_MCANF_FEVT2 | 0X0611| MCANF_FEVT3 |
| CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_0 | 0X0614| WADI2_ERROR_BUS_O_0 |
| CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_1 | 0X0615| WADI2_ERROR_BUS_O_1 |
| CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_2 | 0X0616| WADI2_ERROR_BUS_O_2 |
| CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_3 | 0X0617| WADI2_ERROR_BUS_O_3 |
| CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_4 | 0X0618| WADI2_ERROR_BUS_O_4 |
| CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_5 | 0X0619| WADI2_ERROR_BUS_O_5 |
| CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_6 | 0X061A| WADI2_ERROR_BUS_O_6 |
| CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_7 | 0X061B| WADI2_ERROR_BUS_O_7 |
| CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_8 | 0X061C| WADI2_ERROR_BUS_O_8 |
| CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_9 | 0X061D| WADI2_ERROR_BUS_O_9 |
| CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_10 | 0X061E| WADI2_ERROR_BUS_O_10 |
| CDD_XBAR_EPWM_WADI2_ERROR_BUS_O_11 | 0X061F| WADI2_ERROR_BUS_O_11 |
| CDD_XBAR_EPWM_EPWM1_TRIPOUT | 0X0700| EPWM1_TRIPOUT |
| CDD_XBAR_EPWM_EPWM2_TRIPOUT | 0X0701| EPWM2_TRIPOUT |
| CDD_XBAR_EPWM_EPWM3_TRIPOUT | 0X0702| EPWM3_TRIPOUT |
| CDD_XBAR_EPWM_EPWM4_TRIPOUT | 0X0703| EPWM4_TRIPOUT |
| CDD_XBAR_EPWM_EPWM5_TRIPOUT | 0X0704| EPWM5_TRIPOUT |
| CDD_XBAR_EPWM_EPWM6_TRIPOUT | 0X0705| EPWM6_TRIPOUT |
| CDD_XBAR_EPWM_EPWM7_TRIPOUT | 0X0706| EPWM7_TRIPOUT |
| CDD_XBAR_EPWM_EPWM8_TRIPOUT | 0X0707| EPWM8_TRIPOUT |
| CDD_XBAR_EPWM_EPWM9_TRIPOUT | 0X0708| EPWM9_TRIPOUT |
| CDD_XBAR_EPWM_EPWM10_TRIPOUT | 0X0709| EPWM10_TRIPOUT |
| CDD_XBAR_EPWM_EPWM11_TRIPOUT | 0X070A| EPWM11_TRIPOUT |
| CDD_XBAR_EPWM_EPWM12_TRIPOUT | 0X070B| EPWM12_TRIPOUT |
| CDD_XBAR_EPWM_EPWM13_TRIPOUT | 0X070C| EPWM13_TRIPOUT |
| CDD_XBAR_EPWM_EPWM14_TRIPOUT | 0X070D| EPWM14_TRIPOUT |
| CDD_XBAR_EPWM_EPWM15_TRIPOUT | 0X070E| EPWM15_TRIPOUT |
| CDD_XBAR_EPWM_EPWM16_TRIPOUT | 0X070F| EPWM16_TRIPOUT |
| CDD_XBAR_EPWM_EPWM17_TRIPOUT | 0X0710| EPWM17_TRIPOUT |
| CDD_XBAR_EPWM_EPWM18_TRIPOUT | 0X0711| EPWM18_TRIPOUT |
| CDD_XBAR_EPWM_EPWM1_DE_DEMONTRIP | 0X0800| EPWM1_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM2_DE_DEMONTRIP | 0X0801| EPWM2_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM3_DE_DEMONTRIP | 0X0802| EPWM3_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM4_DE_DEMONTRIP | 0X0803| EPWM4_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM5_DE_DEMONTRIP | 0X0804| EPWM5_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM6_DE_DEMONTRIP | 0X0805| EPWM6_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM7_DE_DEMONTRIP | 0X0806| EPWM7_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM8_DE_DEMONTRIP | 0X0807| EPWM8_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM9_DE_DEMONTRIP | 0X0808| EPWM9_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM10_DE_DEMONTRIP | 0X0809| EPWM10_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM11_DE_DEMONTRIP | 0X080A| EPWM11_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM12_DE_DEMONTRIP | 0X080B| EPWM12_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM13_DE_DEMONTRIP | 0X080C| EPWM13_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM14_DE_DEMONTRIP | 0X080D| EPWM14_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM15_DE_DEMONTRIP | 0X080E| EPWM15_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM16_DE_DEMONTRIP | 0X080F| EPWM16_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM17_DE_DEMONTRIP | 0X0810| EPWM17_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM18_DE_DEMONTRIP | 0X0811| EPWM18_DE_DEMONTRIP |
| CDD_XBAR_EPWM_EPWM1_DE_ACTIVE | 0X0900| EPWM1_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM2_DE_ACTIVE | 0X0901| EPWM2_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM3_DE_ACTIVE | 0X0902| EPWM3_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM4_DE_ACTIVE | 0X0903| EPWM4_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM5_DE_ACTIVE | 0X0904| EPWM5_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM6_DE_ACTIVE | 0X0905| EPWM6_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM7_DE_ACTIVE | 0X0906| EPWM7_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM8_DE_ACTIVE | 0X0907| EPWM8_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM9_DE_ACTIVE | 0X0908| EPWM9_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM10_DE_ACTIVE | 0X0909| EPWM10_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM11_DE_ACTIVE | 0X090A| EPWM11_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM12_DE_ACTIVE | 0X090B| EPWM12_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM13_DE_ACTIVE | 0X090C| EPWM13_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM14_DE_ACTIVE | 0X090D| EPWM14_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM15_DE_ACTIVE | 0X090E| EPWM15_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM16_DE_ACTIVE | 0X090F| EPWM16_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM17_DE_ACTIVE | 0X0910| EPWM17_DE_ACTIVE |
| CDD_XBAR_EPWM_EPWM18_DE_ACTIVE | 0X0911| EPWM18_DE_ACTIVE |
**Brief**:
EPWM Crossbar Input Lines.
### enum Cdd_Xbar_Clb_Xbar_Input_LinesType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_XBAR_CLB_CMPSS1_CTRIPH | 0X0000| CMPSS1_CTRIPH |
| CDD_XBAR_CLB_CMPSS1_CTRIPL | 0X0001| CMPSS1_CTRIPL |
| CDD_XBAR_CLB_CMPSS2_CTRIPH | 0X0002| CMPSS2_CTRIPH |
| CDD_XBAR_CLB_CMPSS2_CTRIPL | 0X0003| CMPSS2_CTRIPL |
| CDD_XBAR_CLB_CMPSS3_CTRIPH | 0X0004| CMPSS3_CTRIPH |
| CDD_XBAR_CLB_CMPSS3_CTRIPL | 0X0005| CMPSS3_CTRIPL |
| CDD_XBAR_CLB_CMPSS4_CTRIPH | 0X0006| CMPSS4_CTRIPH |
| CDD_XBAR_CLB_CMPSS4_CTRIPL | 0X0007| CMPSS4_CTRIPL |
| CDD_XBAR_CLB_CMPSS5_CTRIPH | 0X0008| CMPSS5_CTRIPH |
| CDD_XBAR_CLB_CMPSS5_CTRIPL | 0X0009| CMPSS5_CTRIPL |
| CDD_XBAR_CLB_CMPSS6_CTRIPH | 0X000A| CMPSS6_CTRIPH |
| CDD_XBAR_CLB_CMPSS6_CTRIPL | 0X000B| CMPSS6_CTRIPL |
| CDD_XBAR_CLB_CMPSS7_CTRIPH | 0X000C| CMPSS7_CTRIPH |
| CDD_XBAR_CLB_CMPSS7_CTRIPL | 0X000D| CMPSS7_CTRIPL |
| CDD_XBAR_CLB_CMPSS8_CTRIPH | 0X000E| CMPSS8_CTRIPH |
| CDD_XBAR_CLB_CMPSS8_CTRIPL | 0X000F| CMPSS8_CTRIPL |
| CDD_XBAR_CLB_CMPSS9_CTRIPH | 0X0010| CMPSS9_CTRIPH |
| CDD_XBAR_CLB_CMPSS9_CTRIPL | 0X0011| CMPSS9_CTRIPL |
| CDD_XBAR_CLB_CMPSS10_CTRIPH | 0X0012| CMPSS10_CTRIPH |
| CDD_XBAR_CLB_CMPSS10_CTRIPL | 0X0013| CMPSS10_CTRIPL |
| CDD_XBAR_CLB_CMPSS11_CTRIPH | 0X0014| CMPSS11_CTRIPH |
| CDD_XBAR_CLB_CMPSS11_CTRIPL | 0X0015| CMPSS11_CTRIPL |
| CDD_XBAR_CLB_CMPSS12_CTRIPH | 0X0016| CMPSS12_CTRIPH |
| CDD_XBAR_CLB_CMPSS12_CTRIPL | 0X0017| CMPSS12_CTRIPL |
| CDD_XBAR_CLB_SD1FLT1_COMPH | 0X0100| SD1FLT1_COMPH |
| CDD_XBAR_CLB_SD1FLT1_COMPL | 0X0101| SD1FLT1_COMPL |
| CDD_XBAR_CLB_SD1FLT2_COMPH | 0X0102| SD1FLT2_COMPH |
| CDD_XBAR_CLB_SD1FLT2_COMPL | 0X0103| SD1FLT2_COMPL |
| CDD_XBAR_CLB_SD1FLT3_COMPH | 0X0104| SD1FLT3_COMPH |
| CDD_XBAR_CLB_SD1FLT3_COMPL | 0X0105| SD1FLT3_COMPL |
| CDD_XBAR_CLB_SD1FLT4_COMPH | 0X0106| SD1FLT4_COMPH |
| CDD_XBAR_CLB_SD1FLT4_COMPL | 0X0107| SD1FLT4_COMPL |
| CDD_XBAR_CLB_SD2FLT1_COMPH | 0X0108| SD2FLT1_COMPH |
| CDD_XBAR_CLB_SD2FLT1_COMPL | 0X0109| SD2FLT1_COMPL |
| CDD_XBAR_CLB_SD2FLT2_COMPH | 0X010A| SD2FLT2_COMPH |
| CDD_XBAR_CLB_SD2FLT2_COMPL | 0X010B| SD2FLT2_COMPL |
| CDD_XBAR_CLB_SD2FLT3_COMPH | 0X010C| SD2FLT3_COMPH |
| CDD_XBAR_CLB_SD2FLT3_COMPL | 0X010D| SD2FLT3_COMPL |
| CDD_XBAR_CLB_SD2FLT4_COMPH | 0X010E| SD2FLT4_COMPH |
| CDD_XBAR_CLB_SD2FLT4_COMPL | 0X010F| SD2FLT4_COMPL |
| CDD_XBAR_CLB_SD3FLT1_COMPH | 0X0110| SD3FLT1_COMPH |
| CDD_XBAR_CLB_SD3FLT1_COMPL | 0X0111| SD3FLT1_COMPL |
| CDD_XBAR_CLB_SD3FLT2_COMPH | 0X0112| SD3FLT2_COMPH |
| CDD_XBAR_CLB_SD3FLT2_COMPL | 0X0113| SD3FLT2_COMPL |
| CDD_XBAR_CLB_SD3FLT3_COMPH | 0X0114| SD3FLT3_COMPH |
| CDD_XBAR_CLB_SD3FLT3_COMPL | 0X0115| SD3FLT3_COMPL |
| CDD_XBAR_CLB_SD3FLT4_COMPH | 0X0116| SD3FLT4_COMPH |
| CDD_XBAR_CLB_SD3FLT4_COMPL | 0X0117| SD3FLT4_COMPL |
| CDD_XBAR_CLB_SD4FLT1_COMPH | 0X0118| SD4FLT1_COMPH |
| CDD_XBAR_CLB_SD4FLT1_COMPL | 0X0119| SD4FLT1_COMPL |
| CDD_XBAR_CLB_SD4FLT2_COMPH | 0X011A| SD4FLT2_COMPH |
| CDD_XBAR_CLB_SD4FLT2_COMPL | 0X011B| SD4FLT2_COMPL |
| CDD_XBAR_CLB_SD4FLT3_COMPH | 0X011C| SD4FLT3_COMPH |
| CDD_XBAR_CLB_SD4FLT3_COMPL | 0X011D| SD4FLT3_COMPL |
| CDD_XBAR_CLB_SD4FLT4_COMPH | 0X011E| SD4FLT4_COMPH |
| CDD_XBAR_CLB_SD4FLT4_COMPL | 0X011F| SD4FLT4_COMPL |
| CDD_XBAR_CLB_ADCAEVT1 | 0X0200| ADCAEVT1 |
| CDD_XBAR_CLB_ADCAEVT2 | 0X0201| ADCAEVT2 |
| CDD_XBAR_CLB_ADCAEVT3 | 0X0202| ADCAEVT3 |
| CDD_XBAR_CLB_ADCAEVT4 | 0X0203| ADCAEVT4 |
| CDD_XBAR_CLB_ADCBEVT1 | 0X0204| ADCBEVT1 |
| CDD_XBAR_CLB_ADCBEVT2 | 0X0205| ADCBEVT2 |
| CDD_XBAR_CLB_ADCBEVT3 | 0X0206| ADCBEVT3 |
| CDD_XBAR_CLB_ADCBEVT4 | 0X0207| ADCBEVT4 |
| CDD_XBAR_CLB_ADCCEVT1 | 0X0208| ADCCEVT1 |
| CDD_XBAR_CLB_ADCCEVT2 | 0X0209| ADCCEVT2 |
| CDD_XBAR_CLB_ADCCEVT3 | 0X020A| ADCCEVT3 |
| CDD_XBAR_CLB_ADCCEVT4 | 0X020B| ADCCEVT4 |
| CDD_XBAR_CLB_ADCDEVT1 | 0X020C| ADCDEVT1 |
| CDD_XBAR_CLB_ADCDEVT2 | 0X020D| ADCDEVT2 |
| CDD_XBAR_CLB_ADCDEVT3 | 0X020E| ADCDEVT3 |
| CDD_XBAR_CLB_ADCDEVT4 | 0X020F| ADCDEVT4 |
| CDD_XBAR_CLB_ADCEEVT1 | 0X0210| ADCEEVT1 |
| CDD_XBAR_CLB_ADCEEVT2 | 0X0211| ADCEEVT2 |
| CDD_XBAR_CLB_ADCEEVT3 | 0X0212| ADCEEVT3 |
| CDD_XBAR_CLB_ADCEEVT4 | 0X0213| ADCEEVT4 |
| CDD_XBAR_CLB_CPU1_ADCCHECKEVT1 | 0X0214| CPU1_ADCCHECKEVT1 |
| CDD_XBAR_CLB_CPU1_ADCCHECKEVT2 | 0X0215| CPU1_ADCCHECKEVT2 |
| CDD_XBAR_CLB_CPU1_ADCCHECKEVT3 | 0X0216| CPU1_ADCCHECKEVT3 |
| CDD_XBAR_CLB_CPU1_ADCCHECKEVT4 | 0X0217| CPU1_ADCCHECKEVT4 |
| CDD_XBAR_CLB_CPU2_ADCCHECKEVT1 | 0X0218| CPU2_ADCCHECKEVT1 |
| CDD_XBAR_CLB_CPU2_ADCCHECKEVT2 | 0X0219| CPU2_ADCCHECKEVT2 |
| CDD_XBAR_CLB_CPU2_ADCCHECKEVT3 | 0X021A| CPU2_ADCCHECKEVT3 |
| CDD_XBAR_CLB_CPU2_ADCCHECKEVT4 | 0X021B| CPU2_ADCCHECKEVT4 |
| CDD_XBAR_CLB_CPU3_ADCCHECKEVT1 | 0X021C| CPU3_ADCCHECKEVT1 |
| CDD_XBAR_CLB_CPU3_ADCCHECKEVT2 | 0X021D| CPU3_ADCCHECKEVT2 |
| CDD_XBAR_CLB_CPU3_ADCCHECKEVT3 | 0X021E| CPU3_ADCCHECKEVT3 |
| CDD_XBAR_CLB_CPU3_ADCCHECKEVT4 | 0X021F| CPU3_ADCCHECKEVT4 |
| CDD_XBAR_CLB_INPUTXBAR1 | 0X0300| INPUTXBAR1 |
| CDD_XBAR_CLB_INPUTXBAR2 | 0X0301| INPUTXBAR2 |
| CDD_XBAR_CLB_INPUTXBAR3 | 0X0302| INPUTXBAR3 |
| CDD_XBAR_CLB_INPUTXBAR4 | 0X0303| INPUTXBAR4 |
| CDD_XBAR_CLB_INPUTXBAR5 | 0X0304| INPUTXBAR5 |
| CDD_XBAR_CLB_INPUTXBAR6 | 0X0305| INPUTXBAR6 |
| CDD_XBAR_CLB_INPUTXBAR7 | 0X0306| INPUTXBAR7 |
| CDD_XBAR_CLB_INPUTXBAR8 | 0X0307| INPUTXBAR8 |
| CDD_XBAR_CLB_INPUTXBAR9 | 0X0308| INPUTXBAR9 |
| CDD_XBAR_CLB_INPUTXBAR10 | 0X0309| INPUTXBAR10 |
| CDD_XBAR_CLB_INPUTXBAR11 | 0X030A| INPUTXBAR11 |
| CDD_XBAR_CLB_INPUTXBAR12 | 0X030B| INPUTXBAR12 |
| CDD_XBAR_CLB_INPUTXBAR13 | 0X030C| INPUTXBAR13 |
| CDD_XBAR_CLB_INPUTXBAR14 | 0X030D| INPUTXBAR14 |
| CDD_XBAR_CLB_INPUTXBAR15 | 0X030E| INPUTXBAR15 |
| CDD_XBAR_CLB_INPUTXBAR16 | 0X030F| INPUTXBAR16 |
| CDD_XBAR_CLB_INPUTXBAR17 | 0X0310| INPUTXBAR17 |
| CDD_XBAR_CLB_INPUTXBAR18 | 0X0311| INPUTXBAR18 |
| CDD_XBAR_CLB_INPUTXBAR19 | 0X0312| INPUTXBAR19 |
| CDD_XBAR_CLB_INPUTXBAR20 | 0X0313| INPUTXBAR20 |
| CDD_XBAR_CLB_INPUTXBAR21 | 0X0314| INPUTXBAR21 |
| CDD_XBAR_CLB_INPUTXBAR22 | 0X0315| INPUTXBAR22 |
| CDD_XBAR_CLB_INPUTXBAR23 | 0X0316| INPUTXBAR23 |
| CDD_XBAR_CLB_INPUTXBAR24 | 0X0317| INPUTXBAR24 |
| CDD_XBAR_CLB_INPUTXBAR25 | 0X0318| INPUTXBAR25 |
| CDD_XBAR_CLB_INPUTXBAR26 | 0X0319| INPUTXBAR26 |
| CDD_XBAR_CLB_INPUTXBAR27 | 0X031A| INPUTXBAR27 |
| CDD_XBAR_CLB_INPUTXBAR28 | 0X031B| INPUTXBAR28 |
| CDD_XBAR_CLB_INPUTXBAR29 | 0X031C| INPUTXBAR29 |
| CDD_XBAR_CLB_INPUTXBAR30 | 0X031D| INPUTXBAR30 |
| CDD_XBAR_CLB_INPUTXBAR31 | 0X031E| INPUTXBAR31 |
| CDD_XBAR_CLB_INPUTXBAR32 | 0X031F| INPUTXBAR32 |
| CDD_XBAR_CLB_CLB1_OUT12 | 0X0400| CLB1_OUT12 |
| CDD_XBAR_CLB_CLB1_OUT13 | 0X0401| CLB1_OUT13 |
| CDD_XBAR_CLB_CLB2_OUT12 | 0X0402| CLB2_OUT12 |
| CDD_XBAR_CLB_CLB2_OUT13 | 0X0403| CLB2_OUT13 |
| CDD_XBAR_CLB_CLB3_OUT12 | 0X0404| CLB3_OUT12 |
| CDD_XBAR_CLB_CLB3_OUT13 | 0X0405| CLB3_OUT13 |
| CDD_XBAR_CLB_CLB4_OUT12 | 0X0406| CLB4_OUT12 |
| CDD_XBAR_CLB_CLB4_OUT13 | 0X0407| CLB4_OUT13 |
| CDD_XBAR_CLB_CLB5_OUT12 | 0X0408| CLB5_OUT12 |
| CDD_XBAR_CLB_CLB5_OUT13 | 0X0409| CLB5_OUT13 |
| CDD_XBAR_CLB_CLB6_OUT12 | 0X040A| CLB6_OUT12 |
| CDD_XBAR_CLB_CLB6_OUT13 | 0X040B| CLB6_OUT13 |
| CDD_XBAR_CLB_FSIRXA_TRIG1 | 0X0410| FSIRXA_TRIG1 |
| CDD_XBAR_CLB_FSIRXB_TRIG1 | 0X0411| FSIRXB_TRIG1 |
| CDD_XBAR_CLB_FSIRXC_TRIG1 | 0X0412| FSIRXC_TRIG1 |
| CDD_XBAR_CLB_FSIRXD_TRIG1 | 0X0413| FSIRXD_TRIG1 |
| CDD_XBAR_CLB_FSIRXA_TRIG2 | 0X0414| FSIRXA_TRIG2 |
| CDD_XBAR_CLB_FSIRXB_TRIG2 | 0X0415| FSIRXB_TRIG2 |
| CDD_XBAR_CLB_FSIRXC_TRIG2 | 0X0416| FSIRXC_TRIG2 |
| CDD_XBAR_CLB_FSIRXD_TRIG2 | 0X0417| FSIRXD_TRIG2 |
| CDD_XBAR_CLB_FSIRXA_TRIG3 | 0X0418| FSIRXA_TRIG3 |
| CDD_XBAR_CLB_FSIRXB_TRIG3 | 0X0419| FSIRXB_TRIG3 |
| CDD_XBAR_CLB_FSIRXC_TRIG3 | 0X041A| FSIRXC_TRIG3 |
| CDD_XBAR_CLB_FSIRXD_TRIG3 | 0X041B| FSIRXD_TRIG3 |
| CDD_XBAR_CLB_ECAT_SYNC0 | 0X041E| ECAT_SYNC0 |
| CDD_XBAR_CLB_ECAT_SYNC1 | 0X041F| ECAT_SYNC1 |
| CDD_XBAR_CLB_ECAP1_OUT | 0X0500| ECAP1_OUT |
| CDD_XBAR_CLB_ECAP2_OUT | 0X0501| ECAP2_OUT |
| CDD_XBAR_CLB_ECAP3_OUT | 0X0502| ECAP3_OUT |
| CDD_XBAR_CLB_ECAP4_OUT | 0X0503| ECAP4_OUT |
| CDD_XBAR_CLB_ECAP5_OUT | 0X0504| ECAP5_OUT |
| CDD_XBAR_CLB_ECAP6_OUT | 0X0505| ECAP6_OUT |
| CDD_XBAR_CLB_ECAP1_TRIPOUT | 0X0508| ECAP1_TRIPOUT |
| CDD_XBAR_CLB_ECAP2_TRIPOUT | 0X0509| ECAP2_TRIPOUT |
| CDD_XBAR_CLB_ECAP3_TRIPOUT | 0X050A| ECAP3_TRIPOUT |
| CDD_XBAR_CLB_ECAP4_TRIPOUT | 0X050B| ECAP4_TRIPOUT |
| CDD_XBAR_CLB_ECAP5_TRIPOUT | 0X050C| ECAP5_TRIPOUT |
| CDD_XBAR_CLB_ECAP6_TRIPOUT | 0X050D| ECAP6_TRIPOUT |
| CDD_XBAR_CLB_ADCSOCA | 0X0510| ADCSOCA |
| CDD_XBAR_CLB_ADCSOCB | 0X0511| ADCSOCB |
| CDD_XBAR_CLB_ESM_GEN_EVENT | 0X0512| ESM_GEN_EVENT |
| CDD_XBAR_CLB_EXTSYNCOUT | 0X0513| EXTSYNCOUT |
| CDD_XBAR_CLB_MCANA_FEVT0 | 0X0600| MCANA_FEVT0 |
| CDD_XBAR_CLB_MCANA_FEVT1 | 0X0601| MCANA_FEVT1 |
| CDD_XBAR_CLB_MCANA_FEVT2 | 0X0602| MCANA_FEVT2 |
| CDD_XBAR_CLB_MCANB_FEVT0 | 0X0603| MCANB_FEVT0 |
| CDD_XBAR_CLB_MCANB_FEVT1 | 0X0604| MCANB_FEVT1 |
| CDD_XBAR_CLB_MCANB_FEVT2 | 0X0605| MCANB_FEVT2 |
| CDD_XBAR_CLB_MCANC_FEVT0 | 0X0606| MCANC_FEVT0 |
| CDD_XBAR_CLB_MCANC_FEVT1 | 0X0607| MCANC_FEVT1 |
| CDD_XBAR_CLB_MCANC_FEVT2 | 0X0608| MCANC_FEVT2 |
| CDD_XBAR_CLB_MCAND_FEVT0 | 0X0609| MCAND_FEVT0 |
| CDD_XBAR_CLB_MCAND_FEVT1 | 0X060A| MCAND_FEVT1 |
| CDD_XBAR_CLB_MCAND_FEVT2 | 0X060B| MCAND_FEVT2 |
| CDD_XBAR_CLB_MCANE_FEVT0 | 0X060C| MCANE_FEVT0 |
| CDD_XBAR_CLB_MCANE_FEVT1 | 0X060D| MCANE_FEVT1 |
| CDD_XBAR_CLB_MCANE_FEVT2 | 0X060E| MCANE_FEVT2 |
| CDD_XBAR_CLB_MCANF_FEVT0 | 0X060F| MCANF_FEVT0 |
| CDD_XBAR_CLB_MCANF_FEVT1 | 0X0610| MCANF_FEVT1 |
| CDD_XBAR_CLB_MCANF_FEVT2 | 0X0611| MCANF_FEVT2 |
| CDD_XBAR_CLB_CPU1_ERAD_EVT8 | 0X0614| CPU1_ERAD_EVT8 |
| CDD_XBAR_CLB_CPU1_ERAD_EVT9 | 0X0615| CPU1_ERAD_EVT9 |
| CDD_XBAR_CLB_CPU1_ERAD_EVT10 | 0X0616| CPU1_ERAD_EVT10 |
| CDD_XBAR_CLB_CPU1_ERAD_EVT11 | 0X0617| CPU1_ERAD_EVT11 |
| CDD_XBAR_CLB_CPU2_ERAD_EVT8 | 0X0618| CPU2_ERAD_EVT8 |
| CDD_XBAR_CLB_CPU2_ERAD_EVT9 | 0X0619| CPU2_ERAD_EVT9 |
| CDD_XBAR_CLB_CPU2_ERAD_EVT10 | 0X061A| CPU2_ERAD_EVT10 |
| CDD_XBAR_CLB_CPU2_ERAD_EVT11 | 0X061B| CPU2_ERAD_EVT11 |
| CDD_XBAR_CLB_CPU3_ERAD_EVT8 | 0X061C| CPU3_ERAD_EVT8 |
| CDD_XBAR_CLB_CPU3_ERAD_EVT9 | 0X061D| CPU3_ERAD_EVT9 |
| CDD_XBAR_CLB_CPU3_ERAD_EVT10 | 0X061E| CPU3_ERAD_EVT10 |
| CDD_XBAR_CLB_CPU3_ERAD_EVT11 | 0X061F| CPU3_ERAD_EVT11 |
| CDD_XBAR_CLB_WADI1OUT0 | 0X0700| WADI1OUT0 |
| CDD_XBAR_CLB_WADI1OUT1 | 0X0701| WADI1OUT1 |
| CDD_XBAR_CLB_WADI1OUT2 | 0X0702| WADI1OUT2 |
| CDD_XBAR_CLB_WADI1OUT3 | 0X0703| WADI1OUT3 |
| CDD_XBAR_CLB_WADI1OUT4 | 0X0704| WADI1OUT4 |
| CDD_XBAR_CLB_WADI1OUT5 | 0X0705| WADI1OUT5 |
| CDD_XBAR_CLB_WADI1OUT6 | 0X0706| WADI1OUT6 |
| CDD_XBAR_CLB_WADI1OUT7 | 0X0707| WADI1OUT7 |
| CDD_XBAR_CLB_WADI2OUT0 | 0X0708| WADI1OUT0 |
| CDD_XBAR_CLB_WADI2OUT1 | 0X0709| WADI1OUT1 |
| CDD_XBAR_CLB_WADI2OUT2 | 0X070A| WADI1OUT2 |
| CDD_XBAR_CLB_WADI2OUT3 | 0X070B| WADI1OUT3 |
| CDD_XBAR_CLB_WADI2OUT4 | 0X070C| WADI1OUT4 |
| CDD_XBAR_CLB_WADI2OUT5 | 0X070D| WADI1OUT5 |
| CDD_XBAR_CLB_WADI2OUT6 | 0X070E| WADI1OUT6 |
| CDD_XBAR_CLB_WADI2OUT7 | 0X070F| WADI1OUT7 |
**Brief**:
CLB Crossbar Input Lines.
### enum Cdd_Xbar_Mindb_Xbar_Input_LinesType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_XBAR_MINDB_EPWM1A_DB_NO_HR | 0X0000| EPWM1A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM2A_DB_NO_HR | 0X0001| EPWM2A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM3A_DB_NO_HR | 0X0002| EPWM3A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM4A_DB_NO_HR | 0X0003| EPWM4A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM5A_DB_NO_HR | 0X0004| EPWM5A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM6A_DB_NO_HR | 0X0005| EPWM6A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM7A_DB_NO_HR | 0X0006| EPWM7A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM8A_DB_NO_HR | 0X0007| EPWM8A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM9A_DB_NO_HR | 0X0008| EPWM9A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM10A_DB_NO_HR | 0X0009| EPWM10A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM11A_DB_NO_HR | 0X000A| EPWM11A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM12A_DB_NO_HR | 0X000B| EPWM12A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM13A_DB_NO_HR | 0X000C| EPWM13A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM14A_DB_NO_HR | 0X000D| EPWM14A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM15A_DB_NO_HR | 0X000E| EPWM15A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM16A_DB_NO_HR | 0X000F| EPWM16A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM17A_DB_NO_HR | 0X0010| EPWM17A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM18A_DB_NO_HR | 0X0011| EPWM18A_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM1B_DB_NO_HR | 0X0100| EPWM1B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM2B_DB_NO_HR | 0X0101| EPWM2B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM3B_DB_NO_HR | 0X0102| EPWM3B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM4B_DB_NO_HR | 0X0103| EPWM4B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM5B_DB_NO_HR | 0X0104| EPWM5B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM6B_DB_NO_HR | 0X0105| EPWM6B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM7B_DB_NO_HR | 0X0106| EPWM7B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM8B_DB_NO_HR | 0X0107| EPWM8B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM9B_DB_NO_HR | 0X0108| EPWM9B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM10B_DB_NO_HR | 0X0109| EPWM10B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM11B_DB_NO_HR | 0X010A| EPWM11B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM12B_DB_NO_HR | 0X010B| EPWM12B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM13B_DB_NO_HR | 0X010C| EPWM13B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM14B_DB_NO_HR | 0X010D| EPWM14B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM15B_DB_NO_HR | 0X010E| EPWM15B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM16B_DB_NO_HR | 0X010F| EPWM16B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM17B_DB_NO_HR | 0X0110| EPWM17B_DB_NO_HR |
| CDD_XBAR_MINDB_EPWM18B_DB_NO_HR | 0X0111| EPWM18B_DB_NO_HR |
| CDD_XBAR_MINDB_CLB1_OUT12 | 0X0200| CLB1_OUT12 |
| CDD_XBAR_MINDB_CLB1_OUT13 | 0X0201| CLB1_OUT13 |
| CDD_XBAR_MINDB_CLB2_OUT12 | 0X0202| CLB2_OUT12 |
| CDD_XBAR_MINDB_CLB2_OUT13 | 0X0203| CLB2_OUT13 |
| CDD_XBAR_MINDB_CLB3_OUT12 | 0X0204| CLB3_OUT12 |
| CDD_XBAR_MINDB_CLB3_OUT13 | 0X0205| CLB3_OUT13 |
| CDD_XBAR_MINDB_CLB4_OUT12 | 0X0206| CLB4_OUT12 |
| CDD_XBAR_MINDB_CLB4_OUT13 | 0X0207| CLB4_OUT13 |
| CDD_XBAR_MINDB_CLB5_OUT12 | 0X0208| CLB5_OUT12 |
| CDD_XBAR_MINDB_CLB5_OUT13 | 0X0209| CLB5_OUT13 |
| CDD_XBAR_MINDB_CLB6_OUT12 | 0X020A| CLB6_OUT12 |
| CDD_XBAR_MINDB_CLB6_OUT13 | 0X020B| CLB6_OUT13 |
**Brief**:
MinDB Crossbar Input Lines.
### enum Cdd_Xbar_Icl_Xbar_Input_LinesType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_XBAR_ICL_EPWM1A_MINDB | 0X0000| EPWM1A_MINDB |
| CDD_XBAR_ICL_EPWM2A_MINDB | 0X0001| EPWM2A_MINDB |
| CDD_XBAR_ICL_EPWM3A_MINDB | 0X0002| EPWM3A_MINDB |
| CDD_XBAR_ICL_EPWM4A_MINDB | 0X0003| EPWM4A_MINDB |
| CDD_XBAR_ICL_EPWM5A_MINDB | 0X0004| EPWM5A_MINDB |
| CDD_XBAR_ICL_EPWM6A_MINDB | 0X0005| EPWM6A_MINDB |
| CDD_XBAR_ICL_EPWM7A_MINDB | 0X0006| EPWM7A_MINDB |
| CDD_XBAR_ICL_EPWM8A_MINDB | 0X0007| EPWM8A_MINDB |
| CDD_XBAR_ICL_EPWM9A_MINDB | 0X0008| EPWM9A_MINDB |
| CDD_XBAR_ICL_EPWM10A_MINDB | 0X0009| EPWM10A_MINDB |
| CDD_XBAR_ICL_EPWM11A_MINDB | 0X000A| EPWM11A_MINDB |
| CDD_XBAR_ICL_EPWM12A_MINDB | 0X000B| EPWM12A_MINDB |
| CDD_XBAR_ICL_EPWM13A_MINDB | 0X000C| EPWM13A_MINDB |
| CDD_XBAR_ICL_EPWM14A_MINDB | 0X000D| EPWM14A_MINDB |
| CDD_XBAR_ICL_EPWM15A_MINDB | 0X000E| EPWM15A_MINDB |
| CDD_XBAR_ICL_EPWM16A_MINDB | 0X000F| EPWM16A_MINDB |
| CDD_XBAR_ICL_EPWM17A_MINDB | 0X0010| EPWM17A_MINDB |
| CDD_XBAR_ICL_EPWM18A_MINDB | 0X0011| EPWM18A_MINDB |
| CDD_XBAR_ICL_EPWM1B_MINDB | 0X0100| EPWM1B_MINDB |
| CDD_XBAR_ICL_EPWM2B_MINDB | 0X0101| EPWM2B_MINDB |
| CDD_XBAR_ICL_EPWM3B_MINDB | 0X0102| EPWM3B_MINDB |
| CDD_XBAR_ICL_EPWM4B_MINDB | 0X0103| EPWM4B_MINDB |
| CDD_XBAR_ICL_EPWM5B_MINDB | 0X0104| EPWM5B_MINDB |
| CDD_XBAR_ICL_EPWM6B_MINDB | 0X0105| EPWM6B_MINDB |
| CDD_XBAR_ICL_EPWM7B_MINDB | 0X0106| EPWM7B_MINDB |
| CDD_XBAR_ICL_EPWM8B_MINDB | 0X0107| EPWM8B_MINDB |
| CDD_XBAR_ICL_EPWM9B_MINDB | 0X0108| EPWM9B_MINDB |
| CDD_XBAR_ICL_EPWM10B_MINDB | 0X0109| EPWM10B_MINDB |
| CDD_XBAR_ICL_EPWM11B_MINDB | 0X010A| EPWM11B_MINDB |
| CDD_XBAR_ICL_EPWM12B_MINDB | 0X010B| EPWM12B_MINDB |
| CDD_XBAR_ICL_EPWM13B_MINDB | 0X010C| EPWM13B_MINDB |
| CDD_XBAR_ICL_EPWM14B_MINDB | 0X010D| EPWM14B_MINDB |
| CDD_XBAR_ICL_EPWM15B_MINDB | 0X010E| EPWM15B_MINDB |
| CDD_XBAR_ICL_EPWM16B_MINDB | 0X010F| EPWM16B_MINDB |
| CDD_XBAR_ICL_EPWM17B_MINDB | 0X0110| EPWM17B_MINDB |
| CDD_XBAR_ICL_EPWM18B_MINDB | 0X0111| EPWM18B_MINDB |
| CDD_XBAR_ICL_CLB1_OUT12 | 0X0200| CLB1_OUT12 |
| CDD_XBAR_ICL_CLB1_OUT13 | 0X0201| CLB1_OUT13 |
| CDD_XBAR_ICL_CLB2_OUT12 | 0X0202| CLB2_OUT12 |
| CDD_XBAR_ICL_CLB2_OUT13 | 0X0203| CLB2_OUT13 |
| CDD_XBAR_ICL_CLB3_OUT12 | 0X0204| CLB3_OUT12 |
| CDD_XBAR_ICL_CLB3_OUT13 | 0X0205| CLB3_OUT13 |
| CDD_XBAR_ICL_CLB4_OUT12 | 0X0206| CLB4_OUT12 |
| CDD_XBAR_ICL_CLB4_OUT13 | 0X0207| CLB4_OUT13 |
| CDD_XBAR_ICL_CLB5_OUT12 | 0X0208| CLB5_OUT12 |
| CDD_XBAR_ICL_CLB5_OUT13 | 0X0209| CLB5_OUT13 |
| CDD_XBAR_ICL_CLB6_OUT12 | 0X020A| CLB6_OUT12 |
| CDD_XBAR_ICL_CLB6_OUT13 | 0X020B| CLB6_OUT13 |
**Brief**:
ICL Crossbar Input Lines.
### enum Cdd_Xbar_InputFlagType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_XBAR_INPUT_FLG_CMPSS1_CTRIPL | 0x0100U| CMPSS1_CTRIPL |
| CDD_XBAR_INPUT_FLG_CMPSS1_CTRIPH | 0x0101U| CMPSS1_CTRIPH |
| CDD_XBAR_INPUT_FLG_CMPSS2_CTRIPL | 0x0102U| CMPSS2_CTRIPL |
| CDD_XBAR_INPUT_FLG_CMPSS2_CTRIPH | 0x0103U| CMPSS2_CTRIPH |
| CDD_XBAR_INPUT_FLG_CMPSS3_CTRIPL | 0x0104U| CMPSS3_CTRIPL |
| CDD_XBAR_INPUT_FLG_CMPSS3_CTRIPH | 0x0105U| CMPSS3_CTRIPH |
| CDD_XBAR_INPUT_FLG_CMPSS4_CTRIPL | 0x0106U| CMPSS4_CTRIPL |
| CDD_XBAR_INPUT_FLG_CMPSS4_CTRIPH | 0x0107U| CMPSS4_CTRIPH |
| CDD_XBAR_INPUT_FLG_CMPSS5_CTRIPL | 0x0108U| CMPSS5_CTRIPL |
| CDD_XBAR_INPUT_FLG_CMPSS5_CTRIPH | 0x0109U| CMPSS5_CTRIPH |
| CDD_XBAR_INPUT_FLG_CMPSS6_CTRIPL | 0x010AU| CMPSS6_CTRIPL |
| CDD_XBAR_INPUT_FLG_CMPSS6_CTRIPH | 0x010BU| CMPSS6_CTRIPH |
| CDD_XBAR_INPUT_FLG_CMPSS7_CTRIPL | 0x010CU| CMPSS7_CTRIPL |
| CDD_XBAR_INPUT_FLG_CMPSS7_CTRIPH | 0x010DU| CMPSS7_CTRIPH |
| CDD_XBAR_INPUT_FLG_CMPSS8_CTRIPL | 0x010EU| CMPSS8_CTRIPL |
| CDD_XBAR_INPUT_FLG_CMPSS8_CTRIPH | 0x010FU| CMPSS8_CTRIPH |
| CDD_XBAR_INPUT_FLG_CMPSS9_CTRIPH | 0x0110U| CMPSS9_CTRIPH |
| CDD_XBAR_INPUT_FLG_CMPSS9_CTRIPL | 0x0111U| CMPSS9_CTRIPL |
| CDD_XBAR_INPUT_FLG_CMPSS10_CTRIPH | 0x0112U| CMPSS10_CTRIPH |
| CDD_XBAR_INPUT_FLG_CMPSS10_CTRIPL | 0x0113U| CMPSS10_CTRIPL |
| CDD_XBAR_INPUT_FLG_CMPSS11_CTRIPH | 0x0114U| CMPSS11_CTRIPH |
| CDD_XBAR_INPUT_FLG_CMPSS11_CTRIPL | 0x0115U| CMPSS11_CTRIPL |
| CDD_XBAR_INPUT_FLG_CMPSS12_CTRIPH | 0x0116U| CMPSS12_CTRIPH |
| CDD_XBAR_INPUT_FLG_CMPSS12_CTRIPL | 0x0117U| CMPSS12_CTRIPL |
| CDD_XBAR_INPUT_FLG_CMPSS1_CTRIPOUTL | 0x0200U| CMPSS1_CTRIPOUTL |
| CDD_XBAR_INPUT_FLG_CMPSS1_CTRIPOUTH | 0x0201U| CMPSS1_CTRIPOUTH |
| CDD_XBAR_INPUT_FLG_CMPSS2_CTRIPOUTL | 0x0202U| CMPSS2_CTRIPOUTL |
| CDD_XBAR_INPUT_FLG_CMPSS2_CTRIPOUTH | 0x0203U| CMPSS2_CTRIPOUTH |
| CDD_XBAR_INPUT_FLG_CMPSS3_CTRIPOUTL | 0x0204U| CMPSS3_CTRIPOUTL |
| CDD_XBAR_INPUT_FLG_CMPSS3_CTRIPOUTH | 0x0205U| CMPSS3_CTRIPOUTH |
| CDD_XBAR_INPUT_FLG_CMPSS4_CTRIPOUTL | 0x0206U| CMPSS4_CTRIPOUTL |
| CDD_XBAR_INPUT_FLG_CMPSS4_CTRIPOUTH | 0x0207U| CMPSS4_CTRIPOUTH |
| CDD_XBAR_INPUT_FLG_CMPSS5_CTRIPOUTL | 0x0208U| CMPSS5_CTRIPOUTL |
| CDD_XBAR_INPUT_FLG_CMPSS5_CTRIPOUTH | 0x0209U| CMPSS5_CTRIPOUTH |
| CDD_XBAR_INPUT_FLG_CMPSS6_CTRIPOUTL | 0x020AU| CMPSS6_CTRIPOUTL |
| CDD_XBAR_INPUT_FLG_CMPSS6_CTRIPOUTH | 0x020BU| CMPSS6_CTRIPOUTH |
| CDD_XBAR_INPUT_FLG_CMPSS7_CTRIPOUTL | 0x020CU| CMPSS7_CTRIPOUTL |
| CDD_XBAR_INPUT_FLG_CMPSS7_CTRIPOUTH | 0x020DU| CMPSS7_CTRIPOUTH |
| CDD_XBAR_INPUT_FLG_CMPSS8_CTRIPOUTL | 0x020EU| CMPSS8_CTRIPOUTL |
| CDD_XBAR_INPUT_FLG_CMPSS8_CTRIPOUTH | 0x020FU| CMPSS8_CTRIPOUTH |
| CDD_XBAR_INPUT_FLG_CMPSS9_CTRIPOUTH | 0x0210U| CMPSS9_CTRIPOUTH |
| CDD_XBAR_INPUT_FLG_CMPSS9_CTRIPOUTL | 0x0211U| CMPSS9_CTRIPOUTL |
| CDD_XBAR_INPUT_FLG_CMPSS10_CTRIPOUTH | 0x0212U| CMPSS10_CTRIPOUTH |
| CDD_XBAR_INPUT_FLG_CMPSS10_CTRIPOUTL | 0x0213U| CMPSS10_CTRIPOUTL |
| CDD_XBAR_INPUT_FLG_CMPSS11_CTRIPOUTH | 0x0214U| CMPSS11_CTRIPOUTH |
| CDD_XBAR_INPUT_FLG_CMPSS11_CTRIPOUTL | 0x0215U| CMPSS11_CTRIPOUTL |
| CDD_XBAR_INPUT_FLG_CMPSS12_CTRIPOUTH | 0x0216U| CMPSS12_CTRIPOUTH |
| CDD_XBAR_INPUT_FLG_CMPSS12_CTRIPOUTL | 0x0217U| CMPSS12_CTRIPOUTL |
| CDD_XBAR_INPUT_FLG_SD1FLT1_COMPL | 0x0300U| SD1FLT1_COMPL |
| CDD_XBAR_INPUT_FLG_SD1FLT1_COMPH | 0x0301U| SD1FLT1_COMPH |
| CDD_XBAR_INPUT_FLG_SD1FLT2_COMPL | 0x0302U| SD1FLT2_COMPL |
| CDD_XBAR_INPUT_FLG_SD1FLT2_COMPH | 0x0303U| SD1FLT2_COMPH |
| CDD_XBAR_INPUT_FLG_SD1FLT3_COMPL | 0x0304U| SD1FLT3_COMPL |
| CDD_XBAR_INPUT_FLG_SD1FLT3_COMPH | 0x0305U| SD1FLT3_COMPH |
| CDD_XBAR_INPUT_FLG_SD1FLT4_COMPL | 0x0306U| SD1FLT4_COMPL |
| CDD_XBAR_INPUT_FLG_SD1FLT4_COMPH | 0x0307U| SD1FLT4_COMPH |
| CDD_XBAR_INPUT_FLG_SD2FLT1_COMPL | 0x0308U| SD2FLT1_COMPL |
| CDD_XBAR_INPUT_FLG_SD2FLT1_COMPH | 0x0309U| SD2FLT1_COMPH |
| CDD_XBAR_INPUT_FLG_SD2FLT2_COMPL | 0x030AU| SD2FLT2_COMPL |
| CDD_XBAR_INPUT_FLG_SD2FLT2_COMPH | 0x030BU| SD2FLT2_COMPH |
| CDD_XBAR_INPUT_FLG_SD2FLT3_COMPL | 0x030CU| SD2FLT3_COMPL |
| CDD_XBAR_INPUT_FLG_SD2FLT3_COMPH | 0x030DU| SD2FLT2_COMPH |
| CDD_XBAR_INPUT_FLG_SD2FLT4_COMPL | 0x030EU| SD2FLT4_COMPL |
| CDD_XBAR_INPUT_FLG_SD2FLT4_COMPH | 0x030FU| SD2FLT4_COMPH |
| CDD_XBAR_INPUT_FLG_SD3FLT1_COMPH | 0x0310U| SD3FLT1_COMPH |
| CDD_XBAR_INPUT_FLG_SD3FLT1_COMPL | 0x0311U| SD3FLT1_COMPL |
| CDD_XBAR_INPUT_FLG_SD3FLT2_COMPH | 0x0312U| SD3FLT2_COMPH |
| CDD_XBAR_INPUT_FLG_SD3FLT2_COMPL | 0x0313U| SD3FLT2_COMPL |
| CDD_XBAR_INPUT_FLG_SD3FLT3_COMPH | 0x0314U| SD3FLT3_COMPH |
| CDD_XBAR_INPUT_FLG_SD3FLT3_COMPL | 0x0315U| SD3FLT3_COMPL |
| CDD_XBAR_INPUT_FLG_SD3FLT4_COMPH | 0x0316U| SD3FLT4_COMPH |
| CDD_XBAR_INPUT_FLG_SD3FLT4_COMPL | 0x0317U| SD3FLT4_COMPL |
| CDD_XBAR_INPUT_FLG_SD4FLT1_COMPH | 0x0318U| SD4FLT1_COMPH |
| CDD_XBAR_INPUT_FLG_SD4FLT1_COMPL | 0x0319U| SD4FLT1_COMPL |
| CDD_XBAR_INPUT_FLG_SD4FLT2_COMPH | 0x031AU| SD4FLT2_COMPH |
| CDD_XBAR_INPUT_FLG_SD4FLT2_COMPL | 0x031BU| SD4FLT1_COMPL |
| CDD_XBAR_INPUT_FLG_SD4FLT3_COMPH | 0x031CU| SD4FLT3_COMPH |
| CDD_XBAR_INPUT_FLG_SD4FLT3_COMPL | 0x031DU| SD4FLT3_COMPL |
| CDD_XBAR_INPUT_FLG_SD4FLT4_COMPH | 0x031EU| SD4FLT4_COMPH |
| CDD_XBAR_INPUT_FLG_SD4FLT4_COMPL | 0x031FU| SD4FLT4_COMPL |
| CDD_XBAR_INPUT_FLG_INPUT1 | 0x0400U| INPUT1 |
| CDD_XBAR_INPUT_FLG_INPUT2 | 0x0401U| INPUT2 |
| CDD_XBAR_INPUT_FLG_INPUT3 | 0x0402U| INPUT3 |
| CDD_XBAR_INPUT_FLG_INPUT4 | 0x0403U| INPUT4 |
| CDD_XBAR_INPUT_FLG_INPUT5 | 0x0404U| INPUT5 |
| CDD_XBAR_INPUT_FLG_INPUT6 | 0x0405U| INPUT6 |
| CDD_XBAR_INPUT_FLG_INPUT7 | 0x0406U| INPUT7 |
| CDD_XBAR_INPUT_FLG_INPUT8 | 0x0407U| INPUT8 |
| CDD_XBAR_INPUT_FLG_INPUT9 | 0x0408U| INPUT9 |
| CDD_XBAR_INPUT_FLG_INPUT10 | 0x0409U| INPUT10 |
| CDD_XBAR_INPUT_FLG_INPUT11 | 0x040AU| INPUT11 |
| CDD_XBAR_INPUT_FLG_INPUT12 | 0x040BU| INPUT12 |
| CDD_XBAR_INPUT_FLG_INPUT13 | 0x040CU| INPUT13 |
| CDD_XBAR_INPUT_FLG_INPUT14 | 0x040DU| INPUT14 |
| CDD_XBAR_INPUT_FLG_INPUT15 | 0x040EU| INPUT15 |
| CDD_XBAR_INPUT_FLG_INPUT16 | 0x040FU| INPUT16 |
| CDD_XBAR_INPUT_FLG_INPUT17 | 0x0410U| INPUT17 |
| CDD_XBAR_INPUT_FLG_INPUT18 | 0x0411U| INPUT18 |
| CDD_XBAR_INPUT_FLG_INPUT19 | 0x0412U| INPUT19 |
| CDD_XBAR_INPUT_FLG_INPUT20 | 0x0413U| INPUT20 |
| CDD_XBAR_INPUT_FLG_INPUT21 | 0x0414U| INPUT21 |
| CDD_XBAR_INPUT_FLG_INPUT22 | 0x0415U| INPUT22 |
| CDD_XBAR_INPUT_FLG_INPUT23 | 0x0416U| INPUT23 |
| CDD_XBAR_INPUT_FLG_INPUT24 | 0x0417U| INPUT24 |
| CDD_XBAR_INPUT_FLG_INPUT25 | 0x0418U| INPUT25 |
| CDD_XBAR_INPUT_FLG_INPUT26 | 0x0419U| INPUT26 |
| CDD_XBAR_INPUT_FLG_INPUT27 | 0x041AU| INPUT27 |
| CDD_XBAR_INPUT_FLG_INPUT28 | 0x041BU| INPUT28 |
| CDD_XBAR_INPUT_FLG_INPUT29 | 0x041CU| INPUT29 |
| CDD_XBAR_INPUT_FLG_INPUT30 | 0x041DU| INPUT30 |
| CDD_XBAR_INPUT_FLG_INPUT31 | 0x041EU| INPUT31 |
| CDD_XBAR_INPUT_FLG_INPUT32 | 0x041FU| INPUT32 |
| CDD_XBAR_INPUT_FLG_ADCAEVT1 | 0x0500U| ADCAEVT1 |
| CDD_XBAR_INPUT_FLG_ADCAEVT2 | 0x0501U| ADCAEVT2 |
| CDD_XBAR_INPUT_FLG_ADCAEVT3 | 0x0502U| ADCAEVT3 |
| CDD_XBAR_INPUT_FLG_ADCAEVT4 | 0x0503U| ADCAEVT4 |
| CDD_XBAR_INPUT_FLG_ADCBEVT1 | 0x0504U| ADCBEVT1 |
| CDD_XBAR_INPUT_FLG_ADCBEVT2 | 0x0505U| ADCBEVT2 |
| CDD_XBAR_INPUT_FLG_ADCBEVT3 | 0x0506U| ADCBEVT3 |
| CDD_XBAR_INPUT_FLG_ADCBEVT4 | 0x0507U| ADCBEVT4 |
| CDD_XBAR_INPUT_FLG_ADCCEVT1 | 0x0508U| ADCCEVT1 |
| CDD_XBAR_INPUT_FLG_ADCCEVT2 | 0x0509U| ADCCEVT2 |
| CDD_XBAR_INPUT_FLG_ADCCEVT3 | 0x050AU| ADCCEVT3 |
| CDD_XBAR_INPUT_FLG_ADCCEVT4 | 0x050BU| ADCCEVT4 |
| CDD_XBAR_INPUT_FLG_ADCDEVT1 | 0x050CU| ADCDEVT1 |
| CDD_XBAR_INPUT_FLG_ADCDEVT2 | 0x050DU| ADCDEVT2 |
| CDD_XBAR_INPUT_FLG_ADCDEVT3 | 0x050EU| ADCDEVT3 |
| CDD_XBAR_INPUT_FLG_ADCDEVT4 | 0x050FU| ADCDEVT4 |
| CDD_XBAR_INPUT_FLG_ADCEEVT1 | 0x0510U| ADCEEVT1 |
| CDD_XBAR_INPUT_FLG_ADCEEVT2 | 0x0511U| ADCEEVT2 |
| CDD_XBAR_INPUT_FLG_ADCEEVT3 | 0x0512U| ADCEEVT3 |
| CDD_XBAR_INPUT_FLG_ADCEEVT4 | 0x0513U| ADCEEVT4 |
| CDD_XBAR_INPUT_FLG_CPU1_ADCCHECKEVT1 | 0x0514U| CPU1_ADCCHECKEVT1 |
| CDD_XBAR_INPUT_FLG_CPU1_ADCCHECKEVT2 | 0x0515U| CPU1_ADCCHECKEVT2 |
| CDD_XBAR_INPUT_FLG_CPU1_ADCCHECKEVT3 | 0x0516U| CPU1_ADCCHECKEVT3 |
| CDD_XBAR_INPUT_FLG_CPU1_ADCCHECKEVT4 | 0x0517U| CPU1_ADCCHECKEVT4 |
| CDD_XBAR_INPUT_FLG_CPU2_ADCCHECKEVT1 | 0x0518U| CPU2_ADCCHECKEVT1 |
| CDD_XBAR_INPUT_FLG_CPU2_ADCCHECKEVT2 | 0x0519U| CPU2_ADCCHECKEVT2 |
| CDD_XBAR_INPUT_FLG_CPU2_ADCCHECKEVT3 | 0x051AU| CPU2_ADCCHECKEVT3 |
| CDD_XBAR_INPUT_FLG_CPU2_ADCCHECKEVT4 | 0x051BU| CPU2_ADCCHECKEVT4 |
| CDD_XBAR_INPUT_FLG_CPU3_ADCCHECKEVT1 | 0x051CU| CPU3_ADCCHECKEVT1 |
| CDD_XBAR_INPUT_FLG_CPU3_ADCCHECKEVT2 | 0x051DU| CPU3_ADCCHECKEVT2 |
| CDD_XBAR_INPUT_FLG_CPU3_ADCCHECKEVT3 | 0x051EU| CPU3_ADCCHECKEVT3 |
| CDD_XBAR_INPUT_FLG_CPU3_ADCCHECKEVT4 | 0x051FU| CPU3_ADCCHECKEVT4 |
| CDD_XBAR_INPUT_FLG_CLB1_OUT4 | 0x0600U| CLB1_OUT4 |
| CDD_XBAR_INPUT_FLG_CLB1_OUT5 | 0x0601U| CLB1_OUT5 |
| CDD_XBAR_INPUT_FLG_CLB2_OUT4 | 0x0602U| CLB2_OUT4 |
| CDD_XBAR_INPUT_FLG_CLB2_OUT5 | 0x0603U| CLB2_OUT5 |
| CDD_XBAR_INPUT_FLG_CLB3_OUT4 | 0x0604U| CLB3_OUT4 |
| CDD_XBAR_INPUT_FLG_CLB3_OUT5 | 0x0605U| CLB3_OUT5 |
| CDD_XBAR_INPUT_FLG_CLB4_OUT4 | 0x0606U| CLB4_OUT4 |
| CDD_XBAR_INPUT_FLG_CLB4_OUT5 | 0x0607U| CLB4_OUT5 |
| CDD_XBAR_INPUT_FLG_CLB5_OUT4 | 0x0608U| CLB5_OUT4 |
| CDD_XBAR_INPUT_FLG_CLB5_OUT5 | 0x0609U| CLB5_OUT5 |
| CDD_XBAR_INPUT_FLG_CLB6_OUT4 | 0x060AU| CLB6_OUT4 |
| CDD_XBAR_INPUT_FLG_CLB6_OUT5 | 0x060BU| CLB6_OUT5 |
| CDD_XBAR_INPUT_FLG_FSIA_RX_TRIG1 | 0x0610U| FSIA_RX_TRIG1 |
| CDD_XBAR_INPUT_FLG_FSIB_RX_TRIG1 | 0x0611U| FSIB_RX_TRIG1 |
| CDD_XBAR_INPUT_FLG_FSIC_RX_TRIG1 | 0x0612U| FSIC_RX_TRIG1 |
| CDD_XBAR_INPUT_FLG_FSID_RX_TRIG1 | 0x0613U| FSID_RX_TRIG1 |
| CDD_XBAR_INPUT_FLG_WADI1OUT0 | 0x0616U| WADI1OUT0 |
| CDD_XBAR_INPUT_FLG_WADI1OUT1 | 0x0617U| WADI1OUT1 |
| CDD_XBAR_INPUT_FLG_WADI1OUT2 | 0x0618U| WADI1OUT2 |
| CDD_XBAR_INPUT_FLG_WADI1OUT3 | 0x0619U| WADI1OUT3 |
| CDD_XBAR_INPUT_FLG_WADI1OUT4 | 0x061AU| WADI1OUT4 |
| CDD_XBAR_INPUT_FLG_WADI1OUT5 | 0x061BU| WADI1OUT5 |
| CDD_XBAR_INPUT_FLG_WADI1OUT6 | 0x061CU| WADI1OUT6 |
| CDD_XBAR_INPUT_FLG_WADI1OUT7 | 0x061DU| WADI1OUT7 |
| CDD_XBAR_INPUT_FLG_ECATSYNC0 | 0x061EU| ECATSYNC0 |
| CDD_XBAR_INPUT_FLG_ECATSYNC1 | 0x061FU| ECATSYNC1 |
| CDD_XBAR_INPUT_FLG_ECAP1_OUT | 0x0700U| ECAP1_OUT |
| CDD_XBAR_INPUT_FLG_ECAP2_OUT | 0x0701U| ECAP2_OUT |
| CDD_XBAR_INPUT_FLG_ECAP3_OUT | 0x0702U| ECAP3_OUT |
| CDD_XBAR_INPUT_FLG_ECAP4_OUT | 0x0703U| ECAP4_OUT |
| CDD_XBAR_INPUT_FLG_ECAP5_OUT | 0x0704U| ECAP5_OUT |
| CDD_XBAR_INPUT_FLG_ECAP6_OUT | 0x0705U| ECAP6_OUT |
| CDD_XBAR_INPUT_FLG_ECAP1_TRIPOUT | 0x0708U| ECAP1_TRIPOUT |
| CDD_XBAR_INPUT_FLG_ECAP2_TRIPOUT | 0x0709U| ECAP2_TRIPOUT |
| CDD_XBAR_INPUT_FLG_ECAP3_TRIPOUT | 0x070AU| ECAP3_TRIPOUT |
| CDD_XBAR_INPUT_FLG_ECAP4_TRIPOUT | 0x070BU| ECAP4_TRIPOUT |
| CDD_XBAR_INPUT_FLG_ECAP5_TRIPOUT | 0x070CU| ECAP5_TRIPOUT |
| CDD_XBAR_INPUT_FLG_ECAP6_TRIPOUT | 0x070DU| ECAP6_TRIPOUT |
| CDD_XBAR_INPUT_FLG_ADCSOCA | 0x0710U| ADCSOCA |
| CDD_XBAR_INPUT_FLG_ADCSOCB | 0x0711U| ADCSOCB |
| CDD_XBAR_INPUT_FLG_ESMGENEVT | 0x0712U| ESMGENEVT |
| CDD_XBAR_INPUT_FLG_EXTSYNCOUT | 0x0713U| EXTSYNCOUT |
| CDD_XBAR_INPUT_FLG_WADI2OUT0 | 0x0718U| WADI2OUT0 |
| CDD_XBAR_INPUT_FLG_WADI2OUT1 | 0x0719U| WADI2OUT1 |
| CDD_XBAR_INPUT_FLG_WADI2OUT2 | 0x071AU| WADI2OUT2 |
| CDD_XBAR_INPUT_FLG_WADI2OUT3 | 0x071BU| WADI2OUT3 |
| CDD_XBAR_INPUT_FLG_WADI2OUT4 | 0x071CU| WADI2OUT4 |
| CDD_XBAR_INPUT_FLG_WADI2OUT5 | 0x071DU| WADI2OUT5 |
| CDD_XBAR_INPUT_FLG_WADI2OUT6 | 0x071EU| WADI2OUT6 |
| CDD_XBAR_INPUT_FLG_WADI2OUT7 | 0x071FU| WADI2OUT7 |
| CDD_XBAR_INPUT_FLG_EPWM1_TRIPOUT | 0x0800U| EPWM1_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM2_TRIPOUT | 0x0801U| EPWM2_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM3_TRIPOUT | 0x0802U| EPWM3_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM4_TRIPOUT | 0x0803U| EPWM4_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM5_TRIPOUT | 0x0804U| EPWM5_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM6_TRIPOUT | 0x0805U| EPWM6_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM7_TRIPOUT | 0x0806U| EPWM7_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM8_TRIPOUT | 0x0807U| EPWM8_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM9_TRIPOUT | 0x0808U| EPWM9_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM10_TRIPOUT | 0x0809U| EPWM10_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM11_TRIPOUT | 0x080AU| EPWM11_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM12_TRIPOUT | 0x080BU| EPWM12_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM13_TRIPOUT | 0x080CU| EPWM13_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM14_TRIPOUT | 0x080DU| EPWM14_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM15_TRIPOUT | 0x080EU| EPWM15_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM16_TRIPOUT | 0x080FU| EPWM16_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM17_TRIPOUT | 0x0810U| EPWM17_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM18_TRIPOUT | 0x0811U| EPWM18_TRIPOUT |
| CDD_XBAR_INPUT_FLG_EPWM1_DEL_TRIP | 0x0900U| EPWM1_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM2_DEL_TRIP | 0x0901U| EPWM2_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM3_DEL_TRIP | 0x0902U| EPWM3_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM4_DEL_TRIP | 0x0903U| EPWM4_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM5_DEL_TRIP | 0x0904U| EPWM5_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM6_DEL_TRIP | 0x0905U| EPWM6_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM7_DEL_TRIP | 0x0906U| EPWM7_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM8_DEL_TRIP | 0x0907U| EPWM8_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM9_DEL_TRIP | 0x0908U| EPWM9_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM10_DEL_TRIP | 0x0909U| EPWM10_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM11_DEL_TRIP | 0x090AU| EPWM11_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM12_DEL_TRIP | 0x090BU| EPWM12_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM13_DEL_TRIP | 0x090CU| EPWM13_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM14_DEL_TRIP | 0x090DU| EPWM14_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM15_DEL_TRIP | 0x090EU| EPWM15_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM16_DEL_TRIP | 0x090FU| EPWM16_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM17_DEL_TRIP | 0x0910U| EPWM17_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM18_DEL_TRIP | 0x0911U| EPWM18_DEL_TRIP |
| CDD_XBAR_INPUT_FLG_EPWM1_DEL_ACTIVE | 0x0A00U| EPWM1_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM2_DEL_ACTIVE | 0x0A01U| EPWM2_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM3_DEL_ACTIVE | 0x0A02U| EPWM3_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM4_DEL_ACTIVE | 0x0A03U| EPWM4_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM5_DEL_ACTIVE | 0x0A04U| EPWM5_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM6_DEL_ACTIVE | 0x0A05U| EPWM6_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM7_DEL_ACTIVE | 0x0A06U| EPWM7_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM8_DEL_ACTIVE | 0x0A07U| EPWM8_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM9_DEL_ACTIVE | 0x0A08U| EPWM9_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM10_DEL_ACTIVE | 0x0A09U| EPWM10_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM11_DEL_ACTIVE | 0x0A0AU| EPWM11_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM12_DEL_ACTIVE | 0x0A0BU| EPWM12_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM13_DEL_ACTIVE | 0x0A0CU| EPWM13_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM14_DEL_ACTIVE | 0x0A0DU| EPWM14_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM15_DEL_ACTIVE | 0x0A0EU| EPWM15_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM16_DEL_ACTIVE | 0x0A0FU| EPWM16_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM17_DEL_ACTIVE | 0x0A10U| EPWM17_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM18_DEL_ACTIVE | 0x0A11U| EPWM18_DEL_ACTIVE |
| CDD_XBAR_INPUT_FLG_EPWM1_A0_SCLK | 0x0B00U| EPWM1_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM1_B0_SCLK | 0x0B01U| EPWM1_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM2_A0_SCLK | 0x0B02U| EPWM2_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM2_B0_SCLK | 0x0B03U| EPWM2_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM3_A0_SCLK | 0x0B04U| EPWM3_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM3_B0_SCLK | 0x0B05U| EPWM3_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM4_A0_SCLK | 0x0B06U| EPWM4_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM4_B0_SCLK | 0x0B07U| EPWM4_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM5_A0_SCLK | 0x0B08U| EPWM5_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM5_B0_SCLK | 0x0B09U| EPWM5_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM6_A0_SCLK | 0x0B0AU| EPWM6_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM6_B0_SCLK | 0x0B0BU| EPWM6_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM7_A0_SCLK | 0x0B0CU| EPWM7_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM7_B0_SCLK | 0x0B0DU| EPWM7_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM8_A0_SCLK | 0x0B0EU| EPWM8_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM8_B0_SCLK | 0x0B0FU| EPWM8_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM9_A0_SCLK | 0x0B10U| EPWM9_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM9_B0_SCLK | 0x0B11U| EPWM9_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM10_A0_SCLK | 0x0B12U| EPWM10_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM10_B0_SCLK | 0x0B13U| EPWM10_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM11_A0_SCLK | 0x0B14U| EPWM11_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM11_B0_SCLK | 0x0B15U| EPWM11_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM12_A0_SCLK | 0x0B16U| EPWM12_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM12_B0_SCLK | 0x0B17U| EPWM12_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM13_A0_SCLK | 0x0B18U| EPWM13_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM13_B0_SCLK | 0x0B19U| EPWM13_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM14_A0_SCLK | 0x0B1AU| EPWM14_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM14_B0_SCLK | 0x0B1BU| EPWM14_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM15_A0_SCLK | 0x0B1CU| EPWM15_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM15_B0_SCLK | 0x0B1DU| EPWM15_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM16_A0_SCLK | 0x0B1EU| EPWM16_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM16_B0_SCLK | 0x0B1FU| EPWM16_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM17_A0_SCLK | 0x0C00U| EPWM17_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM17_B0_SCLK | 0x0C01U| EPWM17_B0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM18_A0_SCLK | 0x0C02U| EPWM18_A0_SCLK |
| CDD_XBAR_INPUT_FLG_EPWM18_B0_SCLK | 0x0C03U| EPWM18_B0_SCLK |
| CDD_XBAR_INPUT_FLG_MDL1_OUTA | 0x0D00U| MDL1_OUTA |
| CDD_XBAR_INPUT_FLG_MDL1_OUTB | 0x0D01U| MDL1_OUTB |
| CDD_XBAR_INPUT_FLG_MDL2_OUTA | 0x0D02U| MDL2_OUTA |
| CDD_XBAR_INPUT_FLG_MDL2_OUTB | 0x0D03U| MDL2_OUTB |
| CDD_XBAR_INPUT_FLG_MDL3_OUTA | 0x0D04U| MDL3_OUTA |
| CDD_XBAR_INPUT_FLG_MDL3_OUTB | 0x0D05U| MDL3_OUTB |
| CDD_XBAR_INPUT_FLG_MDL4_OUTA | 0x0D06U| MDL4_OUTA |
| CDD_XBAR_INPUT_FLG_MDL4_OUTB | 0x0D07U| MDL4_OUTB |
| CDD_XBAR_INPUT_FLG_MDL5_OUTA | 0x0D08U| MDL5_OUTA |
| CDD_XBAR_INPUT_FLG_MDL5_OUTB | 0x0D09U| MDL5_OUTB |
| CDD_XBAR_INPUT_FLG_MDL6_OUTA | 0x0D0AU| MDL6_OUTA |
| CDD_XBAR_INPUT_FLG_MDL6_OUTB | 0x0D0BU| MDL6_OUTB |
| CDD_XBAR_INPUT_FLG_MDL7_OUTA | 0x0D0CU| MDL7_OUTA |
| CDD_XBAR_INPUT_FLG_MDL7_OUTB | 0x0D0DU| MDL7_OUTB |
| CDD_XBAR_INPUT_FLG_MDL8_OUTA | 0x0D0EU| MDL8_OUTA |
| CDD_XBAR_INPUT_FLG_MDL8_OUTB | 0x0D0FU| MDL8_OUTB |
| CDD_XBAR_INPUT_FLG_MDL9_OUTA | 0x0D10U| MDL9_OUTA |
| CDD_XBAR_INPUT_FLG_MDL9_OUTB | 0x0D11U| MDL9_OUTB |
| CDD_XBAR_INPUT_FLG_MDL10_OUTA | 0x0D12U| MDL10_OUTA |
| CDD_XBAR_INPUT_FLG_MDL10_OUTB | 0x0D13U| MDL10_OUTB |
| CDD_XBAR_INPUT_FLG_MDL11_OUTA | 0x0D14U| MDL11_OUTA |
| CDD_XBAR_INPUT_FLG_MDL11_OUTB | 0x0D15U| MDL11_OUTB |
| CDD_XBAR_INPUT_FLG_MDL12_OUTA | 0x0D16U| MDL12_OUTA |
| CDD_XBAR_INPUT_FLG_MDL12_OUTB | 0x0D17U| MDL12_OUTB |
| CDD_XBAR_INPUT_FLG_MDL13_OUTA | 0x0D18U| MDL13_OUTA |
| CDD_XBAR_INPUT_FLG_MDL13_OUTB | 0x0D19U| MDL13_OUTB |
| CDD_XBAR_INPUT_FLG_MDL14_OUTA | 0x0D1AU| MDL14_OUTA |
| CDD_XBAR_INPUT_FLG_MDL14_OUTB | 0x0D1BU| MDL14_OUTB |
| CDD_XBAR_INPUT_FLG_MDL15_OUTA | 0x0D1CU| MDL15_OUTA |
| CDD_XBAR_INPUT_FLG_MDL15_OUTB | 0x0D1DU| MDL15_OUTB |
| CDD_XBAR_INPUT_FLG_MDL16_OUTA | 0x0D1EU| MDL16_OUTA |
| CDD_XBAR_INPUT_FLG_MDL16_OUTB | 0x0D1FU| MDL16_OUTB |
| CDD_XBAR_INPUT_FLG_MDL17_OUTA | 0x0E00U| MDL17_OUTA |
| CDD_XBAR_INPUT_FLG_MDL17_OUTB | 0x0E01U| MDL17_OUTB |
| CDD_XBAR_INPUT_FLG_MDL18_OUTA | 0x0E02U| MDL18_OUTA |
| CDD_XBAR_INPUT_FLG_MDL18_OUTB | 0x0E03U| MDL18_OUTB |
| CDD_XBAR_INPUT_FLG_CLB1_OUT0 | 0x0F00U| CLB1_OUT0 |
| CDD_XBAR_INPUT_FLG_CLB1_OUT1 | 0x0F01U| CLB1_OUT1 |
| CDD_XBAR_INPUT_FLG_CLB1_OUT2 | 0x0F02U| CLB1_OUT2 |
| CDD_XBAR_INPUT_FLG_CLB1_OUT3 | 0x0F03U| CLB1_OUT3 |
| CDD_XBAR_INPUT_FLG_CLB1_OUT6 | 0x0F04U| CLB1_OUT6 |
| CDD_XBAR_INPUT_FLG_CLB1_OUT7 | 0x0F05U| CLB1_OUT7 |
| CDD_XBAR_INPUT_FLG_CLB2_OUT0 | 0x0F06U| CLB2_OUT0 |
| CDD_XBAR_INPUT_FLG_CLB2_OUT1 | 0x0F07U| CLB2_OUT1 |
| CDD_XBAR_INPUT_FLG_CLB2_OUT2 | 0x0F08U| CLB2_OUT2 |
| CDD_XBAR_INPUT_FLG_CLB2_OUT3 | 0x0F09U| CLB2_OUT3 |
| CDD_XBAR_INPUT_FLG_CLB2_OUT6 | 0x0F0AU| CLB2_OUT6 |
| CDD_XBAR_INPUT_FLG_CLB2_OUT7 | 0x0F0BU| CLB2_OUT7 |
| CDD_XBAR_INPUT_FLG_CLB3_OUT0 | 0x0F0CU| CLB3_OUT0 |
| CDD_XBAR_INPUT_FLG_CLB3_OUT1 | 0x0F0DU| CLB3_OUT1 |
| CDD_XBAR_INPUT_FLG_CLB3_OUT2 | 0x0F0EU| CLB3_OUT2 |
| CDD_XBAR_INPUT_FLG_CLB3_OUT3 | 0x0F0FU| CLB3_OUT3 |
| CDD_XBAR_INPUT_FLG_CLB3_OUT6 | 0x0F10U| CLB3_OUT6 |
| CDD_XBAR_INPUT_FLG_CLB3_OUT7 | 0x0F11U| CLB3_OUT7 |
| CDD_XBAR_INPUT_FLG_CLB4_OUT0 | 0x0F12U| CLB4_OUT0 |
| CDD_XBAR_INPUT_FLG_CLB4_OUT1 | 0x0F13U| CLB4_OUT1 |
| CDD_XBAR_INPUT_FLG_CLB4_OUT2 | 0x0F14U| CLB4_OUT2 |
| CDD_XBAR_INPUT_FLG_CLB4_OUT3 | 0x0F15U| CLB4_OUT3 |
| CDD_XBAR_INPUT_FLG_CLB4_OUT6 | 0x0F16U| CLB4_OUT6 |
| CDD_XBAR_INPUT_FLG_CLB4_OUT7 | 0x0F17U| CLB4_OUT7 |
| CDD_XBAR_INPUT_FLG_CLB5_OUT0 | 0x0F18U| CLB5_OUT0 |
| CDD_XBAR_INPUT_FLG_CLB5_OUT1 | 0x0F19U| CLB5_OUT1 |
| CDD_XBAR_INPUT_FLG_CLB5_OUT2 | 0x0F1AU| CLB5_OUT2 |
| CDD_XBAR_INPUT_FLG_CLB5_OUT3 | 0x0F1BU| CLB5_OUT3 |
| CDD_XBAR_INPUT_FLG_CLB5_OUT6 | 0x0F1CU| CLB5_OUT6 |
| CDD_XBAR_INPUT_FLG_CLB5_OUT7 | 0x0F1DU| CLB5_OUT7 |
| CDD_XBAR_INPUT_FLG_CLB6_OUT0 | 0x0F1EU| CLB6_OUT0 |
| CDD_XBAR_INPUT_FLG_CLB6_OUT1 | 0x0F1FU| CLB6_OUT1 |
| CDD_XBAR_INPUT_FLG_CLB6_OUT2 | 0x1000U| CLB6_OUT2 |
| CDD_XBAR_INPUT_FLG_CLB6_OUT3 | 0x1001U| CLB6_OUT3 |
| CDD_XBAR_INPUT_FLG_CLB6_OUT6 | 0x1002U| CLB6_OUT6 |
| CDD_XBAR_INPUT_FLG_CLB6_OUT7 | 0x1003U| CLB6_OUT7 |
| CDD_XBAR_INPUT_FLG_ADCA_EXTMUXSEL0 | 0x1004U| ADCA_EXTMUXSEL0 |
| CDD_XBAR_INPUT_FLG_ADCA_EXTMUXSEL1 | 0x1005U| ADCA_EXTMUXSEL1 |
| CDD_XBAR_INPUT_FLG_ADCA_EXTMUXSEL2 | 0x1006U| ADCA_EXTMUXSEL2 |
| CDD_XBAR_INPUT_FLG_ADCA_EXTMUXSEL3 | 0x1007U| ADCA_EXTMUXSEL3 |
| CDD_XBAR_INPUT_FLG_ADCB_EXTMUXSEL0 | 0x1008U| ADCB_EXTMUXSEL0 |
| CDD_XBAR_INPUT_FLG_ADCB_EXTMUXSEL1 | 0x1009U| ADCB_EXTMUXSEL1 |
| CDD_XBAR_INPUT_FLG_ADCB_EXTMUXSEL2 | 0x100AU| ADCB_EXTMUXSEL2 |
| CDD_XBAR_INPUT_FLG_ADCB_EXTMUXSEL3 | 0x100BU| ADCB_EXTMUXSEL3 |
| CDD_XBAR_INPUT_FLG_ADCC_EXTMUXSEL0 | 0x100CU| ADCC_EXTMUXSEL0 |
| CDD_XBAR_INPUT_FLG_ADCC_EXTMUXSEL1 | 0x100DU| ADCC_EXTMUXSEL1 |
| CDD_XBAR_INPUT_FLG_ADCC_EXTMUXSEL2 | 0x100EU| ADCC_EXTMUXSEL2 |
| CDD_XBAR_INPUT_FLG_ADCC_EXTMUXSEL3 | 0x100FU| ADCC_EXTMUXSEL3 |
| CDD_XBAR_INPUT_FLG_ADCD_EXTMUXSEL0 | 0x1010U| ADCD_EXTMUXSEL0 |
| CDD_XBAR_INPUT_FLG_ADCD_EXTMUXSEL1 | 0x1011U| ADCD_EXTMUXSEL1 |
| CDD_XBAR_INPUT_FLG_ADCD_EXTMUXSEL2 | 0x1012U| ADCD_EXTMUXSEL2 |
| CDD_XBAR_INPUT_FLG_ADCD_EXTMUXSEL3 | 0x1013U| ADCD_EXTMUXSEL3 |
| CDD_XBAR_INPUT_FLG_ADCE_EXTMUXSEL0 | 0x1014U| ADCE_EXTMUXSEL0 |
| CDD_XBAR_INPUT_FLG_ADCE_EXTMUXSEL1 | 0x1015U| ADCE_EXTMUXSEL1 |
| CDD_XBAR_INPUT_FLG_ADCE_EXTMUXSEL2 | 0x1016U| ADCE_EXTMUXSEL2 |
| CDD_XBAR_INPUT_FLG_ADCE_EXTMUXSEL3 | 0x1017U| ADCE_EXTMUXSEL3 |
| CDD_XBAR_INPUT_FLG_EPG1_EPGOUT0 | 0x101CU| EPG1_EPGOUT0 |
| CDD_XBAR_INPUT_FLG_EPG1_EPGOUT1 | 0x101DU| EPG1_EPGOUT1 |
| CDD_XBAR_INPUT_FLG_EPG1_EPGOUT2 | 0x101EU| EPG1_EPGOUT2 |
| CDD_XBAR_INPUT_FLG_EPG1_EPGOUT3 | 0x101FU| EPG1_EPGOUT3 |
| CDD_XBAR_INPUT_FLG_MCANA_FEVT0 | 0x1100U| MCANA_FEVT0 |
| CDD_XBAR_INPUT_FLG_MCANA_FEVT1 | 0x1101U| MCANA_FEVT1 |
| CDD_XBAR_INPUT_FLG_MCANA_FEVT2 | 0x1102U| MCANA_FEVT2 |
| CDD_XBAR_INPUT_FLG_MCANB_FEVT0 | 0x1103U| MCANB_FEVT0 |
| CDD_XBAR_INPUT_FLG_MCANB_FEVT1 | 0x1104U| MCANB_FEVT1 |
| CDD_XBAR_INPUT_FLG_MCANB_FEVT2 | 0x1105U| MCANB_FEVT2 |
| CDD_XBAR_INPUT_FLG_MCANC_FEVT0 | 0x1106U| MCANC_FEVT0 |
| CDD_XBAR_INPUT_FLG_MCANC_FEVT1 | 0x1107U| MCANC_FEVT1 |
| CDD_XBAR_INPUT_FLG_MCANC_FEVT2 | 0x1108U| MCANC_FEVT2 |
| CDD_XBAR_INPUT_FLG_MCAND_FEVT0 | 0x1109U| MCAND_FEVT0 |
| CDD_XBAR_INPUT_FLG_MCAND_FEVT1 | 0x110AU| MCAND_FEVT1 |
| CDD_XBAR_INPUT_FLG_MCAND_FEVT2 | 0x110BU| MCAND_FEVT2 |
| CDD_XBAR_INPUT_FLG_MCANE_FEVT0 | 0x110CU| MCANE_FEVT0 |
| CDD_XBAR_INPUT_FLG_MCANE_FEVT1 | 0x110DU| MCANE_FEVT1 |
| CDD_XBAR_INPUT_FLG_MCANE_FEVT2 | 0x110EU| MCANE_FEVT2 |
| CDD_XBAR_INPUT_FLG_MCANF_FEVT0 | 0x110FU| MCANF_FEVT0 |
| CDD_XBAR_INPUT_FLG_MCANF_FEVT1 | 0x1110U| MCANF_FEVT1 |
| CDD_XBAR_INPUT_FLG_MCANF_FEVT2 | 0x1111U| MCANF_FEVT2 |
| CDD_XBAR_INPUT_FLG_FSIRXA_TRIG_2 | 0x1200U| FSIRXA_TRIG_2 |
| CDD_XBAR_INPUT_FLG_FSIRXA_TRIG_3 | 0x1201U| FSIRXA_TRIG_3 |
| CDD_XBAR_INPUT_FLG_FSIRXB_TRIG_2 | 0x1202U| FSIRXB_TRIG_2 |
| CDD_XBAR_INPUT_FLG_FSIRXB_TRIG_3 | 0x1203U| FSIRXB_TRIG_3 |
| CDD_XBAR_INPUT_FLG_FSIRXC_TRIG_2 | 0x1204U| FSIRXC_TRIG_2 |
| CDD_XBAR_INPUT_FLG_FSIRXC_TRIG_3 | 0x1205U| FSIRXC_TRIG_3 |
| CDD_XBAR_INPUT_FLG_FSIRXD_TRIG_2 | 0x1206U| FSIRXD_TRIG_2 |
| CDD_XBAR_INPUT_FLG_FSIRXD_TRIG_3 | 0x1207U| FSIRXD_TRIG_3 |
| CDD_XBAR_INPUT_FLG_CPU1ERADEVT8 | 0x1208U| CPU1ERADEVT8 |
| CDD_XBAR_INPUT_FLG_CPU1ERADEVT9 | 0x1209U| CPU1ERADEVT9 |
| CDD_XBAR_INPUT_FLG_CPU1ERADEVT10 | 0x120AU| CPU1ERADEVT10 |
| CDD_XBAR_INPUT_FLG_CPU1ERADEVT11 | 0x120BU| CPU1ERADEVT11 |
| CDD_XBAR_INPUT_FLG_CPU2ERADEVT8 | 0x120CU| CPU2ERADEVT8 |
| CDD_XBAR_INPUT_FLG_CPU2ERADEVT9 | 0x120DU| CPU2ERADEVT9 |
| CDD_XBAR_INPUT_FLG_CPU2ERADEVT10 | 0x120EU| CPU2ERADEVT10 |
| CDD_XBAR_INPUT_FLG_CPU2ERADEVT11 | 0x120FU| CPU2ERADEVT11 |
| CDD_XBAR_INPUT_FLG_CPU3ERADEVT8 | 0x1210U| CPU2ERADEVT8 |
| CDD_XBAR_INPUT_FLG_CPU3ERADEVT9 | 0x1211U| CPU2ERADEVT9 |
| CDD_XBAR_INPUT_FLG_CPU3ERADEVT10 | 0x1212U| CPU2ERADEVT10 |
| CDD_XBAR_INPUT_FLG_CPU3ERADEVT11 | 0x1213U| CPU2ERADEVT11 |
**Brief**:
Crossbar input flags.
### enum Cdd_Xbar_IntType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_XBAR_INT_TYPE_NEGATIVE_EDGE | 0x00| Interrupt on negative edge |
| CDD_XBAR_INT_TYPE_POSITIVE_EDGE | 0x04| Interrupt on positive edge |
| CDD_XBAR_INT_TYPE_BOTH_EDGES | 0x0C| Interrupt on both edges |
| CDD_XBAR_INT_TYPE_DISABLED | 0xFF| Interrupt disabled |
**Brief**:
External input type.
### enum Cdd_Xbar_ExternalIntNum
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CDD_XBAR_XINT1 | 0| External Interrupt 1 |
| CDD_XBAR_XINT2 | 2| External Interrupt 2 |
| CDD_XBAR_XINT3 | 4| External Interrupt 3 |
| CDD_XBAR_XINT4 | 6| External Interrupt 4 |
| CDD_XBAR_XINT5 | 8| External Interrupt 5 |
| CDD_XBAR_XINT_DISABLED | 0xFF| External Interrupt disabled |
**Brief**:
External interrupt type.
### typedef Cdd_Xbar_Type
```
typedef uint16 Cdd_Xbar_Type;
```
**Brief**:
Type for symbolic name of CDD XBAR instances.
### typedef Cdd_Xbar_OutputlevelType
```
typedef uint8 Cdd_Xbar_OutputlevelType;
```
**Brief**:
These are the possible levels an output crossbar output can have.
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Cdd_Xbar_InXbarCfgType](../Classes/structCdd__Xbar__InXbarCfgType.md)** | Input Crossbar configuration. |
| **[Cdd_Xbar_OutXbarCfgType](../Classes/structCdd__Xbar__OutXbarCfgType.md)** | Output Crossbar configuration. |
| **[Cdd_Xbar_EPWMXbarCfgType](../Classes/structCdd__Xbar__EPWMXbarCfgType.md)** | EPWM Crossbar configuration. |
| **[Cdd_Xbar_CLBXbarCfgType](../Classes/structCdd__Xbar__CLBXbarCfgType.md)** | CLB Crossbar configuration. |
| **[Cdd_Xbar_MINDBXbarCfgType](../Classes/structCdd__Xbar__MINDBXbarCfgType.md)** | MINDB Crossbar configuration. |
| **[Cdd_Xbar_ICLXbarCfgType](../Classes/structCdd__Xbar__ICLXbarCfgType.md)** | ICL Crossbar configuration. |
| **[Cdd_Xbar_ConfigType](../Classes/structCdd__Xbar__ConfigType.md)** | CDD XBar configuration. |
## Defines
| Name | Brief |
| -------------- | ---------- |
| CDD_XBAR_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| CDD_XBAR_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| CDD_XBAR_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| CDD_XBAR_AR_RELEASE_MAJOR_VERSION | AUTOSAR Release Spec. Major Version. |
| CDD_XBAR_AR_RELEASE_MINOR_VERSION | AUTOSAR Release Spec. Minor Version. |
| CDD_XBAR_AR_RELEASE_REVISION_VERSION | AUTOSAR Release Spec. Revision Version. |
| CDD_XBAR_VENDOR_ID | Texas Instruments Vendor ID. |
| CDD_XBAR_MODULE_ID | CDD XBar Module ID. |
| CDD_XBAR_INSTANCE_ID | CDD XBar Instance ID. |
| CDD_XBAR_E_INIT_ALREADY | API called for reinitialization of already initialized crossbars. |
| CDD_XBAR_E_PARAM_VALUE | API called with invaid parameter. |
| CDD_XBAR_E_PARAM_POINTER | API called with invaid parameter pointer. |
| CDD_XBAR_E_LOCK | API called with invaid operations on a locked crossbar. |
| CDD_XBAR_E_UNINIT | API called with uninitialized driver. |
| CDD_XBAR_SID_GET_VERSION_INFO | Cdd_Xbar_GetVersionInfo() |
| CDD_XBAR_SID_INIT | Cdd_Xbar_Init() |
| CDD_XBAR_SID_SELECT_INPUT | Cdd_Xbar_SelectInput() |
| CDD_XBAR_SID_OUT_LATCH_SELECT | Cdd_Xbar_OutLatchSelect() |
| CDD_XBAR_SID_OUT_LATCH_SELECT_STS | Cdd_Xbar_OutLatchSelectSts() |
| CDD_XBAR_SID_OUT_LATCH_FLAG_STATUS | Cdd_Xbar_OutLatchFlagStatus() |
| CDD_XBAR_SID_OUT_LATCH_FLAG_FORCE | Cdd_Xbar_OutLatchFlagForce() |
| CDD_XBAR_SID_OUT_LATCH_FLAG_CLEAR | Cdd_Xbar_OutLatchFlagClear() |
| CDD_XBAR_SID_OUT_INV_BEFORE_LATCH | Cdd_Xbar_OutInvBeforeLatch() |
| CDD_XBAR_SID_OUT_INV_CHECK_BEFORE_LATCH | Cdd_Xbar_OutInvCheckBeforeLatch() |
| CDD_XBAR_SID_OUT_OUTPUT_SIGNAL | Cdd_Xbar_OutOutputSignal() |
| CDD_XBAR_SID_OUT_STRETCH_PULSE | Cdd_Xbar_OutStretchPulse() |
| CDD_XBAR_SID_OUT_STRETCH_PULSE_CLEAR | Cdd_Xbar_OutStretchPulseClear() |
| CDD_XBAR_SID_OUT_STRETCH_PULSE_CHECK | Cdd_Xbar_OutStretchPulseCheck() |
| CDD_XBAR_SID_SELECT_OUTPUT_INVERSION | Cdd_Xbar_SelectOutputInversion() |
| CDD_XBAR_SID_CHECK_OUTPUT_INVERSION | Cdd_Xbar_CheckOutputInversion() |
| CDD_XBAR_SID_LOCK | Cdd_Xbar_Lock() |
| CDD_XBAR_SID_LOCKSTATUS | Cdd_Xbar_LockStatus() |
| CDD_XBAR_SID_INPUTFLAGSTATUS | Cdd_Xbar_InputFlagStatus() |
| CDD_XBAR_SID_INPUTFLAGCLEAR | Cdd_Xbar_InputFlagClear() |
| CDD_XBAR_SID_SET_EXTERNAL_INTERRUPT_TYPE | Cdd_Xbar_SetExternalInterruptType() |
| CDD_XBAR_SID_SET_EXTERNAL_INTERRUPT_STATE | Cdd_Xbar_SetExternalInterruptState() |
| CDD_XBAR_SID_GET_EXTERNAL_INTERRUPT_COUNTER | Cdd_Xbar_GetExternalInterruptCounter() |
| CDD_XBAR_CFG_MAJOR_VERSION | CDD XBar configuration Major Version. |
| CDD_XBAR_CFG_MINOR_VERSION | CDD XBar configuration Minor Version. |
| CDD_XBAR_CFG_PATCH_VERSION | CDD XBar configuration Patch Version. |
| CDD_XBAR_INPUT_SELECT_COUNT | Number of input crossbar output lines. |
| CDD_XBAR_OUTPUT_XBAR_OUTPUT_COUNT | Number of output crossbar output lines. |
| CDD_XBAR_EPWM_XBAR_OUTPUT_COUNT | Number of EPWM crossbar output lines. |
| CDD_XBAR_CLB_XBAR_OUTPUT_COUNT | Number of CLB crossbar output lines. |
| CDD_XBAR_MINDB_XBAR_OUTPUT_COUNT | Number of MinDB crossbar output lines. |
| CDD_XBAR_ICL_XBAR_OUTPUT_COUNT | Number of ICL crossbar output lines. |
| CDD_XBAR_PRE_COMPILE_VARIANT | Switches the pre compile variant ON or OFF. |
| CDD_XBAR_PRE_COMPILE_VARIANT_CONFIG | Pre compile variant configuration. |
| CDD_XBAR_OUTPUT_XBAR_MAX_GROUP | Number of output crossbar input groups. |
| CDD_XBAR_EPWM_XBAR_MAX_GROUP | Number of EPWM crossbar input groups. |
| CDD_XBAR_CLB_XBAR_MAX_GROUP | Number of CLB crossbar input groups. |
| CDD_XBAR_MINDB_XBAR_MAX_GROUP | Number of MINDB crossbar input groups. |
| CDD_XBAR_ICL_XBAR_MAX_GROUP | Number of ICL crossbar input groups. |
| CDD_XBAR_MAX_INPUT_LINES | Number of input lines in each group in a crossbar. |
| CDD_XBAR_INPUT1 | CDD Xbar input Xbar output Type. |
| CDD_XBAR_INPUT2 | INPUT2 of the Input X-BAR. |
| CDD_XBAR_INPUT3 | INPUT3 of the Input X-BAR. |
| CDD_XBAR_INPUT4 | INPUT4 of the Input X-BAR. |
| CDD_XBAR_INPUT5 | INPUT5 of the Input X-BAR. |
| CDD_XBAR_INPUT6 | INPUT6 of the Input X-BAR. |
| CDD_XBAR_INPUT7 | INPUT7 of the Input X-BAR. |
| CDD_XBAR_INPUT8 | INPUT8 of the Input X-BAR. |
| CDD_XBAR_INPUT9 | INPUT9 of the Input X-BAR. |
| CDD_XBAR_INPUT10 | INPUT10 of the Input X-BAR. |
| CDD_XBAR_INPUT11 | INPUT11 of the Input X-BAR. |
| CDD_XBAR_INPUT12 | INPUT12 of the Input X-BAR. |
| CDD_XBAR_INPUT13 | INPUT13 of the Input X-BAR. |
| CDD_XBAR_INPUT14 | INPUT14 of the Input X-BAR. |
| CDD_XBAR_INPUT15 | INPUT15 of the Input X-BAR. |
| CDD_XBAR_INPUT16 | INPUT16 of the Input X-BAR. |
| CDD_XBAR_INPUT17 | INPUT17 of the Input X-BAR. |
| CDD_XBAR_INPUT18 | INPUT18 of the Input X-BAR. |
| CDD_XBAR_INPUT19 | INPUT19 of the Input X-BAR. |
| CDD_XBAR_INPUT20 | INPUT20 of the Input X-BAR. |
| CDD_XBAR_INPUT21 | INPUT21 of the Input X-BAR. |
| CDD_XBAR_INPUT22 | INPUT22 of the Input X-BAR. |
| CDD_XBAR_INPUT23 | INPUT23 of the Input X-BAR. |
| CDD_XBAR_INPUT24 | INPUT24 of the Input X-BAR. |
| CDD_XBAR_INPUT25 | INPUT25 of the Input X-BAR. |
| CDD_XBAR_INPUT26 | INPUT26 of the Input X-BAR. |
| CDD_XBAR_INPUT27 | INPUT27 of the Input X-BAR. |
| CDD_XBAR_INPUT28 | INPUT28 of the Input X-BAR. |
| CDD_XBAR_INPUT29 | INPUT29 of the Input X-BAR. |
| CDD_XBAR_INPUT30 | INPUT30 of the Input X-BAR. |
| CDD_XBAR_INPUT31 | INPUT31 of the Input X-BAR. |
| CDD_XBAR_INPUT32 | INPUT32 of the Input X-BAR. |
| CDD_XBAR_INPUT33 | INPUT33 of the Input X-BAR. |
| CDD_XBAR_INPUT34 | INPUT34 of the Input X-BAR. |
| CDD_XBAR_INPUT35 | INPUT35 of the Input X-BAR. |
| CDD_XBAR_INPUT36 | INPUT36 of the Input X-BAR. |
| CDD_XBAR_INPUT37 | INPUT37 of the Input X-BAR. |
| CDD_XBAR_INPUT38 | INPUT38 of the Input X-BAR. |
| CDD_XBAR_INPUT39 | INPUT39 of the Input X-BAR. |
| CDD_XBAR_INPUT40 | INPUT40 of the Input X-BAR. |
| CDD_XBAR_INPUT41 | INPUT41 of the Input X-BAR. |
| CDD_XBAR_INPUT42 | INPUT42 of the Input X-BAR. |
| CDD_XBAR_INPUT43 | INPUT43 of the Input X-BAR. |
| CDD_XBAR_INPUT44 | INPUT44 of the Input X-BAR. |
| CDD_XBAR_INPUT45 | INPUT45 of the Input X-BAR. |
| CDD_XBAR_INPUT46 | INPUT46 of the Input X-BAR. |
| CDD_XBAR_INPUT47 | INPUT47 of the Input X-BAR. |
| CDD_XBAR_INPUT48 | INPUT48 of the Input X-BAR. |
| CDD_XBAR_INPUT49 | INPUT49 of the Input X-BAR. |
| CDD_XBAR_INPUT50 | INPUT50 of the Input X-BAR. |
| CDD_XBAR_INPUT51 | INPUT51 of the Input X-BAR. |
| CDD_XBAR_INPUT52 | INPUT52 of the Input X-BAR. |
| CDD_XBAR_INPUT53 | INPUT53 of the Input X-BAR. |
| CDD_XBAR_INPUT54 | INPUT54 of the Input X-BAR. |
| CDD_XBAR_INPUT55 | INPUT55 of the Input X-BAR. |
| CDD_XBAR_INPUT56 | INPUT56 of the Input X-BAR. |
| CDD_XBAR_INPUT57 | INPUT57 of the Input X-BAR. |
| CDD_XBAR_INPUT58 | INPUT58 of the Input X-BAR. |
| CDD_XBAR_INPUT59 | INPUT59 of the Input X-BAR. |
| CDD_XBAR_INPUT60 | INPUT60 of the Input X-BAR. |
| CDD_XBAR_INPUT61 | INPUT61 of the Input X-BAR. |
| CDD_XBAR_INPUT62 | INPUT62 of the Input X-BAR. |
| CDD_XBAR_INPUT63 | INPUT63 of the Input X-BAR. |
| CDD_XBAR_INPUT64 | INPUT64 of the Input X-BAR. |
| CDD_XBAR_OUTPUT1 | Output crossbar output type. |
| CDD_XBAR_OUTPUT2 | OUTPUT2 of the Output X-BAR. |
| CDD_XBAR_OUTPUT3 | OUTPUT3 of the Output X-BAR. |
| CDD_XBAR_OUTPUT4 | OUTPUT4 of the Output X-BAR. |
| CDD_XBAR_OUTPUT5 | OUTPUT5 of the Output X-BAR. |
| CDD_XBAR_OUTPUT6 | OUTPUT6 of the Output X-BAR. |
| CDD_XBAR_OUTPUT7 | OUTPUT7 of the Output X-BAR. |
| CDD_XBAR_OUTPUT8 | OUTPUT8 of the Output X-BAR. |
| CDD_XBAR_OUTPUT9 | OUTPUT9 of the Output X-BAR. |
| CDD_XBAR_OUTPUT10 | OUTPUT10 of the Output X-BAR. |
| CDD_XBAR_OUTPUT11 | OUTPUT11 of the Output X-BAR. |
| CDD_XBAR_OUTPUT12 | OUTPUT12 of the Output X-BAR. |
| CDD_XBAR_OUTPUT13 | OUTPUT13 of the Output X-BAR. |
| CDD_XBAR_OUTPUT14 | OUTPUT14 of the Output X-BAR. |
| CDD_XBAR_OUTPUT15 | OUTPUT15 of the Output X-BAR. |
| CDD_XBAR_OUTPUT16 | OUTPUT16 of the Output X-BAR. |
| CDD_XBAR_TRIP1 | EPWM crossbar output type. |
| CDD_XBAR_TRIP2 | TRIP2 of the EPWM X-BAR. |
| CDD_XBAR_TRIP3 | TRIP3 of the EPWM X-BAR. |
| CDD_XBAR_TRIP4 | TRIP4 of the EPWM X-BAR. |
| CDD_XBAR_TRIP5 | TRIP5 of the EPWM X-BAR. |
| CDD_XBAR_TRIP6 | TRIP6 of the EPWM X-BAR. |
| CDD_XBAR_TRIP7 | TRIP7 of the EPWM X-BAR. |
| CDD_XBAR_TRIP8 | TRIP8 of the EPWM X-BAR. |
| CDD_XBAR_TRIP9 | TRIP9 of the EPWM X-BAR. |
| CDD_XBAR_TRIP10 | TRIP10 of the EPWM X-BAR. |
| CDD_XBAR_TRIP11 | TRIP11 of the EPWM X-BAR. |
| CDD_XBAR_TRIP12 | TRIP12 of the EPWM X-BAR. |
| CDD_XBAR_TRIP13 | TRIP13 of the EPWM X-BAR. |
| CDD_XBAR_TRIP14 | TRIP14 of the EPWM X-BAR. |
| CDD_XBAR_TRIP15 | TRIP15 of the EPWM X-BAR. |
| CDD_XBAR_TRIP16 | TRIP16 of the EPWM X-BAR. |
| CDD_XBAR_MINDBXBAR1 | MINDB crossbar output type. |
| CDD_XBAR_MINDBXBAR2 | MINDBXBAR2 of the MINDB X-BAR. |
| CDD_XBAR_MINDBXBAR3 | MINDBXBAR3 of the MINDB X-BAR. |
| CDD_XBAR_MINDBXBAR4 | MINDBXBAR4 of the MINDB X-BAR. |
| CDD_XBAR_MINDBXBAR5 | MINDBXBAR5 of the MINDB X-BAR. |
| CDD_XBAR_MINDBXBAR6 | MINDBXBAR6 of the MINDB X-BAR. |
| CDD_XBAR_MINDBXBAR7 | MINDBXBAR7 of the MINDB X-BAR. |
| CDD_XBAR_MINDBXBAR8 | MINDBXBAR8 of the MINDB X-BAR. |
| CDD_XBAR_MINDBXBAR9 | MINDBXBAR9 of the MINDB X-BAR. |
| CDD_XBAR_MINDBXBAR10 | MINDBXBAR10 of the MINDB X-BAR. |
| CDD_XBAR_MINDBXBAR11 | MINDBXBAR11 of the MINDB X-BAR. |
| CDD_XBAR_MINDBXBAR12 | MINDBXBAR12 of the MINDB X-BAR. |
| CDD_XBAR_MINDBXBAR13 | MINDBXBAR13 of the MINDB X-BAR. |
| CDD_XBAR_MINDBXBAR14 | MINDBXBAR14 of the MINDB X-BAR. |
| CDD_XBAR_MINDBXBAR15 | MINDBXBAR15 of the MINDB X-BAR. |
| CDD_XBAR_MINDBXBAR16 | MINDBXBAR16 of the MINDB X-BAR. |
| CDD_XBAR_ICLXBAR1 | ICL crossbar output type. |
| CDD_XBAR_ICLXBAR2 | ICLXBAR2 of the ICL X-BAR. |
| CDD_XBAR_ICLXBAR3 | ICLXBAR3 of the ICL X-BAR. |
| CDD_XBAR_ICLXBAR4 | ICLXBAR4 of the ICL X-BAR. |
| CDD_XBAR_ICLXBAR5 | ICLXBAR5 of the ICL X-BAR. |
| CDD_XBAR_ICLXBAR6 | ICLXBAR6 of the ICL X-BAR. |
| CDD_XBAR_ICLXBAR7 | ICLXBAR7 of the ICL X-BAR. |
| CDD_XBAR_ICLXBAR8 | ICLXBAR8 of the ICL X-BAR. |
| CDD_XBAR_ICLXBAR9 | ICLXBAR9 of the ICL X-BAR. |
| CDD_XBAR_ICLXBAR10 | ICLXBAR10 of the ICL X-BAR. |
| CDD_XBAR_ICLXBAR11 | ICLXBAR11 of the ICL X-BAR. |
| CDD_XBAR_ICLXBAR12 | ICLXBAR12 of the ICL X-BAR. |
| CDD_XBAR_ICLXBAR13 | ICLXBAR13 of the ICL X-BAR. |
| CDD_XBAR_ICLXBAR14 | ICLXBAR14 of the ICL X-BAR. |
| CDD_XBAR_ICLXBAR15 | ICLXBAR15 of the ICL X-BAR. |
| CDD_XBAR_ICLXBAR16 | ICLXBAR16 of the ICL X-BAR. |
| CDD_XBAR_AUXSIG1 | CLB crossbar output type. |
| CDD_XBAR_AUXSIG2 | AUXSIG2 of the CLB X-BAR. |
| CDD_XBAR_AUXSIG3 | AUXSIG3 of the CLB X-BAR. |
| CDD_XBAR_AUXSIG4 | AUXSIG4 of the CLB X-BAR. |
| CDD_XBAR_AUXSIG5 | AUXSIG5 of the CLB X-BAR. |
| CDD_XBAR_AUXSIG6 | AUXSIG6 of the CLB X-BAR. |
| CDD_XBAR_AUXSIG7 | AUXSIG7 of the CLB X-BAR. |
| CDD_XBAR_AUXSIG8 | AUXSIG8 of the CLB X-BAR. |
| CddXbarConf_CddXbarInputXbar | Symbolic name for InputXbar. |
| CddXbarConf_CddXbarOutputXbar | Symbolic name for OutputXbar. |
| CddXbarConf_CddXbarEpwmXbar | Symbolic name for EpwmXbar. |
| CddXbarConf_CddXbarClbXbar | Symbolic name for ClbXbar. |
| CddXbarConf_CddXbarMindbXbar | Symbolic name for MindbXbar. |
| CddXbarConf_CddXbarIclXbar | Symbolic name for IclXbar. |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Cdd_Xbar_GetVersionInfo](../Modules/group__CDD__XBAR.md#function-cdd_xbar_getversioninfo)**(Std_VersionInfoType * VersionInfoPtr)| Service for getting CDD crossbar driver version information. |
| void | **[Cdd_Xbar_Init](../Modules/group__CDD__XBAR.md#function-cdd_xbar_init)**(const [Cdd_Xbar_ConfigType](../Classes/structCdd__Xbar__ConfigType.md) * ConfigPtr)| Service to initialize CDD Crossbar driver. |
| Std_ReturnType | **[Cdd_Xbar_SelectInput](../Modules/group__CDD__XBAR.md#function-cdd_xbar_selectinput)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit, uint16 InputLine, boolean Selection)| Service for selecting available inputs for a given Crossbar Module. |
| Std_ReturnType | **[Cdd_Xbar_OutLatchSelect](../Modules/group__CDD__XBAR.md#function-cdd_xbar_outlatchselect)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit, boolean LatchEnable)| Service for enabling or disabling the output latch to drive the output of the selected output crossbar instance. |
| boolean | **[Cdd_Xbar_OutLatchSelectSts](../Modules/group__CDD__XBAR.md#function-cdd_xbar_outlatchselectsts)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit)| Service for checking the status of enabling the latched event as output of any output crossbar instance. |
| boolean | **[Cdd_Xbar_OutLatchFlagStatus](../Modules/group__CDD__XBAR.md#function-cdd_xbar_outlatchflagstatus)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit)| Service for fetching latch status of output crossbar instance. |
| Std_ReturnType | **[Cdd_Xbar_OutLatchFlagForce](../Modules/group__CDD__XBAR.md#function-cdd_xbar_outlatchflagforce)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit)| Service for setting the respective Output X-BAR output signal latch. |
| Std_ReturnType | **[Cdd_Xbar_OutLatchFlagClear](../Modules/group__CDD__XBAR.md#function-cdd_xbar_outlatchflagclear)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit)| Service for clearing the respective Output X-BAR output signal latch. |
| Std_ReturnType | **[Cdd_Xbar_OutInvBeforeLatch](../Modules/group__CDD__XBAR.md#function-cdd_xbar_outinvbeforelatch)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit, boolean Selection)| Service for setting and restoring output line inversion before latch for a chosen output crossbar instance. |
| boolean | **[Cdd_Xbar_OutInvCheckBeforeLatch](../Modules/group__CDD__XBAR.md#function-cdd_xbar_outinvcheckbeforelatch)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit)| Service to check inversion before latching for an output line of the given output crossbar instance. |
| [Cdd_Xbar_OutputlevelType](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_outputleveltype) | **[Cdd_Xbar_OutOutputSignal](../Modules/group__CDD__XBAR.md#function-cdd_xbar_outoutputsignal)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit)| Service for finding the signal on a output of an output crossbar instance. |
| Std_ReturnType | **[Cdd_Xbar_OutStretchPulse](../Modules/group__CDD__XBAR.md#function-cdd_xbar_outstretchpulse)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit, [Cdd_Xbar_TickStretchType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_tickstretchtype) TickStretch)| Service for selecting 16 or 32-bit stretched pulse selection at the output of an output crossbar instance. |
| Std_ReturnType | **[Cdd_Xbar_OutStretchPulseClear](../Modules/group__CDD__XBAR.md#function-cdd_xbar_outstretchpulseclear)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit)| Service for clearing a stretched pulse selection as output crossbar instance. |
| [Cdd_Xbar_TickStretchType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_tickstretchtype) | **[Cdd_Xbar_OutStretchPulseCheck](../Modules/group__CDD__XBAR.md#function-cdd_xbar_outstretchpulsecheck)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit)| Service for checking a stretched pulse selection of output of output crossbar instance. |
| Std_ReturnType | **[Cdd_Xbar_SelectOutputInversion](../Modules/group__CDD__XBAR.md#function-cdd_xbar_selectoutputinversion)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit, boolean Selection)| Service for inverting and restoring inversion of an output crossbar instance. |
| boolean | **[Cdd_Xbar_CheckOutputInversion](../Modules/group__CDD__XBAR.md#function-cdd_xbar_checkoutputinversion)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit)| Service for getting the current status of inversion on the output line of a crossbar instance in a given Crossbar Entity. |
| Std_ReturnType | **[Cdd_Xbar_Lock](../Modules/group__CDD__XBAR.md#function-cdd_xbar_lock)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit)| Service for locking the given Crossbar entity for freezing the inputs and output inversion unless reset. |
| boolean | **[Cdd_Xbar_LockStatus](../Modules/group__CDD__XBAR.md#function-cdd_xbar_lockstatus)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit)| Service for checking lock status on a given Crossbar Unit. |
| boolean | **[Cdd_Xbar_InputFlagStatus](../Modules/group__CDD__XBAR.md#function-cdd_xbar_inputflagstatus)**([Cdd_Xbar_InputFlagType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_inputflagtype) InputFlag)| Service for checking status of a crossbar input flag. |
| Std_ReturnType | **[Cdd_Xbar_InputFlagClear](../Modules/group__CDD__XBAR.md#function-cdd_xbar_inputflagclear)**([Cdd_Xbar_InputFlagType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_inputflagtype) InputFlag)| Service for clearing a crossbar input flag. |
| Std_ReturnType | **[Cdd_Xbar_SetExternalInterruptType](../Modules/group__CDD__XBAR.md#function-cdd_xbar_setexternalinterrupttype)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit, [Cdd_Xbar_IntType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_inttype) IntType)| Sets the interrupt type for the specified input crossbar instance. |
| Std_ReturnType | **[Cdd_Xbar_SetExternalInterruptState](../Modules/group__CDD__XBAR.md#function-cdd_xbar_setexternalinterruptstate)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit, boolean Enable)| Sets the external interrupt state (enable/disable) for the specified input crossbar instance. |
| Std_ReturnType | **[Cdd_Xbar_GetExternalInterruptCounter](../Modules/group__CDD__XBAR.md#function-cdd_xbar_getexternalinterruptcounter)**([Cdd_Xbar_Type](../Modules/group__CDD__XBAR.md#typedef-cdd_xbar_type) CrossbarUnit, uint16 * CounterValue)| Gets external interrupt counter value. |
| uint32 | **[Cdd_Xbar_Input_Selection_Mask](../Modules/group__CDD__XBAR.md#function-cdd_xbar_input_selection_mask)**(uint32 InputLine)| Get Line Number selection mask. |
| uint8 | **[Cdd_Xbar_GetGroupNumber](../Modules/group__CDD__XBAR.md#function-cdd_xbar_getgroupnumber)**(uint16 InputLine)| Get group number for a given input line. |
| uint8 | **[Cdd_Xbar_GetXbarType](../Modules/group__CDD__XBAR.md#function-cdd_xbar_getxbartype)**(uint16 xbar)| Get crossbar type. |
| uint8 | **[Cdd_Xbar_GetXbarInstance](../Modules/group__CDD__XBAR.md#function-cdd_xbar_getxbarinstance)**(uint16 xbar)| Get crossbar instance. |
| uint16 | **[Cdd_Xbar_GetInputFlagNumber](../Modules/group__CDD__XBAR.md#function-cdd_xbar_getinputflagnumber)**([Cdd_Xbar_InputFlagType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_inputflagtype) InputFlag)| Get input flag number for a given input flag. |
| uint16 | **[Cdd_Xbar_GetInputFlagBit](../Modules/group__CDD__XBAR.md#function-cdd_xbar_getinputflagbit)**([Cdd_Xbar_InputFlagType](../Modules/group__CDD__XBAR.md#enum-cdd_xbar_inputflagtype) InputFlag)| Get the bit corresponding to the input in the input flag. |
### function Cdd_Xbar_GetVersionInfo
```
void Cdd_Xbar_GetVersionInfo(
Std_VersionInfoType * VersionInfoPtr
)
```
**Brief**:
Service for getting CDD crossbar driver version information.
Loads the corresponding vendor ID, module ID and software release version information for CDD Crossbar module.
**Parameters**:
* **VersionInfoPtr** is the pointer to a Std_VersionInfoType struct.
**Return**: None
**Precondition**: Preconditions - None
**Postcondition**: Postconditions - None
### function Cdd_Xbar_Init
```
void Cdd_Xbar_Init(
const Cdd_Xbar_ConfigType * ConfigPtr
)
```
**Brief**:
Service to initialize CDD Crossbar driver.
Initializes crossbar driver for usage with the configured settings and enabling its other functionalities offered.
**Parameters**:
* **ConfigPtr** is the configuration pointer pointing to a generated configuration variant from plugin.
**Return**: None
**Precondition**: Preconditions - Driver not already initialized.
**Postcondition**: Postconditions - Driver in initialized state.
### function Cdd_Xbar_SelectInput
```
Std_ReturnType Cdd_Xbar_SelectInput(
Cdd_Xbar_Type CrossbarUnit,
uint16 InputLine,
boolean Selection
)
```
**Brief**:
Service for selecting available inputs for a given Crossbar Module.
Selection of one input line at a time from a group to enable or disable their signal route to the output lines if selectable (i.e., not in a locked state).
**Parameters**:
* **CrossbarUnit** is the symbolic name of the crossbar instance.
* **InputLine** is the crossbar input. In case of Input Xbar: PortPinId. In case of other Xbars, enumerations available in Cdd_Xbar_Output_Xbar_Input_LinesType, Cdd_Xbar_Epwm_Xbar_Input_LinesType, Cdd_Xbar_Clb_Xbar_Input_LinesType, Cdd_Xbar_Mindb_Xbar_Input_LinesType or Cdd_Xbar_Icl_Xbar_Input_LinesType.
* **Selection** is the selection updation for the identified inputs, TRUE or FALSE.
**Returns**:
* **E_OK** if inputs selected.
* **E_NOT_OK** if input selection failed.
**Return**: Status of input selection.
**Note**: Lock granularity differs by crossbar type:
* For Input Xbar: each instance has an independent lock bit in the INPUTSELECTLOCK register. Only the specific Input Xbar instance that has been locked will reject input selection; all other Input Xbar instances remain configurable independently.
* For all other crossbar types (Output Xbar, EPWM Xbar, CLB Xbar, MINDB Xbar, ICL Xbar): a single LOCK bit covers the entire crossbar type. Once any instance of these types is locked, input selection is rejected for ALL instances of that crossbar type.
**Precondition**: Preconditions - Driver is already initialized but not locked.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_OutLatchSelect
```
Std_ReturnType Cdd_Xbar_OutLatchSelect(
Cdd_Xbar_Type CrossbarUnit,
boolean LatchEnable
)
```
**Brief**:
Service for enabling or disabling the output latch to drive the output of the selected output crossbar instance.
Enables/Disables the latched output for the given output crossbar instance.
**Parameters**:
* **CrossbarUnit** is the symbolic name of the crossbar instance.
* **LatchEnable** is the parameter to determines whether or not to select latch, to drive the output of output crossbar instance., TRUE or FALSE.
**Returns**:
* **E_OK** on enabling/disabling as per LatchEnable.
* **E_NOT_OK** on failure to enable/disable as per LatchEnable.
**Return**: Enablement status of output latch.
**Precondition**: Preconditions - Driver is already initialized but not locked.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_OutLatchSelectSts
```
boolean Cdd_Xbar_OutLatchSelectSts(
Cdd_Xbar_Type CrossbarUnit
)
```
**Brief**:
Service for checking the status of enabling the latched event as output of any output crossbar instance.
Fetches Output Latch enablement status of the given output crossbar instance.
**Parameters**:
* **CrossbarUnit** is the symbolic name of the crossbar instance.
**Returns**:
* **TRUE** if latched event selected as output.
* **FALSE** if latch event not selected as output.
**Return**: Enablement status of setting latched event as output.
**Precondition**: Preconditions - Driver is already initialized.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_OutLatchFlagStatus
```
boolean Cdd_Xbar_OutLatchFlagStatus(
Cdd_Xbar_Type CrossbarUnit
)
```
**Brief**:
Service for fetching latch status of output crossbar instance.
Fetches Output Latch status on the given output crossbar instance.
**Parameters**:
* **CrossbarUnit** is the symbolic name of the crossbar instance.
**Returns**:
* **True** if there is a latched event.
* **False** if latched event is not present.
**Return**: Latch status of the output crossbar instance.
**Precondition**: Preconditions - Driver is already initialized.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_OutLatchFlagForce
```
Std_ReturnType Cdd_Xbar_OutLatchFlagForce(
Cdd_Xbar_Type CrossbarUnit
)
```
**Brief**:
Service for setting the respective Output X-BAR output signal latch.
Forces the output latch of the given output crossbar instance.
**Parameters**:
* **CrossbarUnit** is the symbolic name of the crossbar instance.
**Returns**:
* **E_OK** if latch setting is successful.
* **E_NOT_OK** if latch setting failed.
**Return**: Status of the setting the latch of output LineNumber of output crossbar.
**Precondition**: Preconditions - Driver is already initialized.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_OutLatchFlagClear
```
Std_ReturnType Cdd_Xbar_OutLatchFlagClear(
Cdd_Xbar_Type CrossbarUnit
)
```
**Brief**:
Service for clearing the respective Output X-BAR output signal latch.
Cleares the output latch of the given output crossbar instance.
**Parameters**:
* **CrossbarUnit** is the symbolic name of the crossbar instance.
**Returns**:
* **E_OK** if latch clearing is successful.
* **E_NOT_OK** if latch clearing failed.
**Return**: Status of clearing the latch of output crossbar instance.
**Precondition**: Preconditions - Driver is already initialized.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_OutInvBeforeLatch
```
Std_ReturnType Cdd_Xbar_OutInvBeforeLatch(
Cdd_Xbar_Type CrossbarUnit,
boolean Selection
)
```
**Brief**:
Service for setting and restoring output line inversion before latch for a chosen output crossbar instance.
Sets and restores output line inversion before latch for a chosen output crossbar instance.
**Parameters**:
* **CrossbarUnit** is the symbolic name of the crossbar instance.
* **Selection** is the selection for inversion enablement, TRUE or FALSE.
**Returns**:
* **E_OK** if setting and resetting is successful.
* **E_NOT_OK** if setting and resetting failed.
**Return**: Status of the setting and resetting the output line inversion before latch of output crossbar instance.
**Precondition**: Preconditions - Driver is already initialized but not locked.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_OutInvCheckBeforeLatch
```
boolean Cdd_Xbar_OutInvCheckBeforeLatch(
Cdd_Xbar_Type CrossbarUnit
)
```
**Brief**:
Service to check inversion before latching for an output line of the given output crossbar instance.
Returns status of output line inversion before latch for a chosen output crossbar instance.
**Parameters**:
* **CrossbarUnit** is the symbolic name of the crossbar instance.
**Returns**:
* **TRUE** if inverted.
* **FALSE** if uninverted.
**Return**: Status of inversion set before latch.
**Precondition**: Preconditions - Driver is already initialized.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_OutOutputSignal
```
Cdd_Xbar_OutputlevelType Cdd_Xbar_OutOutputSignal(
Cdd_Xbar_Type CrossbarUnit
)
```
**Brief**:
Service for finding the signal on a output of an output crossbar instance.
Getting signal value as high or low as output of output crossbar instance.
**Parameters**:
* **CrossbarUnit** is the symbolic name of the crossbar instance.
**Returns**:
* **STD_HIGH** if Logic High (1).
* **STD_LOW** if Logic Low (0).
**Return**: Output Polarity.
**Precondition**: Preconditions - Driver is already initialized.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_OutStretchPulse
```
Std_ReturnType Cdd_Xbar_OutStretchPulse(
Cdd_Xbar_Type CrossbarUnit,
Cdd_Xbar_TickStretchType TickStretch
)
```
**Brief**:
Service for selecting 16 or 32-bit stretched pulse selection at the output of an output crossbar instance.
Selects or de-selects stretched pulse at the given output line of an output crossbar instance.
**Parameters**:
* **CrossbarUnit** is the symbolic name of the crossbar instance.
* **TickStretch** is the stretch in ticks as available with enumeration.
**Returns**:
* **E_OK** if stretched or unstretched as per Ticks.
* **E_NOT_OK** if not stretched or unstretched as per Ticks.
**Return**: Status whether Output XBar out stretch pulse was set or not.
**Precondition**: Preconditions - Driver is already initialized but not locked.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_OutStretchPulseClear
```
Std_ReturnType Cdd_Xbar_OutStretchPulseClear(
Cdd_Xbar_Type CrossbarUnit
)
```
**Brief**:
Service for clearing a stretched pulse selection as output crossbar instance.
Clears output line stretched pulse selection for output crossbar instance.
**Parameters**:
* **CrossbarUnit** is the symbolic name of the crossbar instance.
**Returns**:
* **E_OK** if unstretched.
* **E_NOT_OK** if not stretched.
**Return**: Status of output stretched pulse selection clearance.
**Precondition**: Preconditions - Driver is already initialized but not locked.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_OutStretchPulseCheck
```
Cdd_Xbar_TickStretchType Cdd_Xbar_OutStretchPulseCheck(
Cdd_Xbar_Type CrossbarUnit
)
```
**Brief**:
Service for checking a stretched pulse selection of output of output crossbar instance.
Checks for output line stretched pulse selection of an output crossbar instance.
**Parameters**:
* **CrossbarUnit** is the symbolic name of the crossbar instance.
**Returns**:
* **CDD_XBAR_SYSTICKS_16** or CDD_XBAR_SYSTICKS_32 stretch as per stretch, CDD_XBAR_SYSTICKS_STRETCH_OFF otherwise.
**Return**: Output stretched pulse selection in Sys Ticks.
**Precondition**: Preconditions - Driver is already initialized.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_SelectOutputInversion
```
Std_ReturnType Cdd_Xbar_SelectOutputInversion(
Cdd_Xbar_Type CrossbarUnit,
boolean Selection
)
```
**Brief**:
Service for inverting and restoring inversion of an output crossbar instance.
Sets and restores output line inversion for a chosen output crossbar instance.
**Parameters**:
* **CrossbarUnit** is the symbolic name of the crossbar instance.
* **Selection** is the selection for inversion enablement.
**Returns**:
* **E_OK** if inverted.
* **E_NOT_OK** if not inverted.
**Return**: Status of output inversion.
**Precondition**: Preconditions - Driver is already initialized but not locked.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_CheckOutputInversion
```
boolean Cdd_Xbar_CheckOutputInversion(
Cdd_Xbar_Type CrossbarUnit
)
```
**Brief**:
Service for getting the current status of inversion on the output line of a crossbar instance in a given Crossbar Entity.
Checks whether any given Output Line of a Crossbar type has been set for inversion of its output signal or not, and returns the inversion.
**Parameters**:
* **CrossbarUnit** is the symbolic name of the crossbar instance.
**Returns**:
* **TRUE** if inverted.
* **FALSE** if not inverted.
**Return**: Output inversion status.
**Precondition**: Preconditions - Driver is already initialized.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_Lock
```
Std_ReturnType Cdd_Xbar_Lock(
Cdd_Xbar_Type CrossbarUnit
)
```
**Brief**:
Service for locking the given Crossbar entity for freezing the inputs and output inversion unless reset.
Locks a given Crossbar Entity or its Input Select instance as per the case if it is not already in a locked state for preventing any further modification to input selection and output inversion. Please mind that once a unit is locked, it can not unlock until system reset.
**Parameters**:
* **CrossbarUnit** is the symbolic name of the crossbar instance.
**Returns**:
* **E_OK** if the unlocked crossbar passed becomes locked, E_NOT_OK otherwise.
* **E_NOT_OK** if the unlocked crossbar not locked.
**Return**: Locking attempt status.
**Note**: Lock granularity differs by crossbar type:
* For Input Xbar: each instance has an independent lock bit in the INPUTSELECTLOCK register (one bit per input instance, all R/WSonce). Calling this API locks only the specific Input Xbar instance identified by CrossbarUnit; all other Input Xbar instances remain unlocked and independently configurable.
* For all other crossbar types (Output Xbar, EPWM Xbar, CLB Xbar, MINDB Xbar, ICL Xbar): the hardware provides a single LOCK bit for the entire crossbar type (e.g., OUTPUTXBARLock.LOCK, PWMXBARLock.LOCK). Calling this API on any instance of these types locks ALL instances of that crossbar type simultaneously.
**Precondition**: Preconditions - Driver is already initialized but not locked.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_LockStatus
```
boolean Cdd_Xbar_LockStatus(
Cdd_Xbar_Type CrossbarUnit
)
```
**Brief**:
Service for checking lock status on a given Crossbar Unit.
Tells whether the given Crossbar or its given Input Select line is locked or not.
**Parameters**:
* **CrossbarUnit** is the symbolic name of the crossbar instance.
**Returns**:
* **TRUE** if locked.
* **FALSE** if not locked.
**Return**: Status of crossbar lock.
**Note**: Lock status granularity differs by crossbar type:
* For Input Xbar: each instance has an independent lock bit. This API returns the lock status of the specific Input Xbar instance identified by CrossbarUnit only; other Input Xbar instances may have a different lock status.
* For all other crossbar types (Output Xbar, EPWM Xbar, CLB Xbar, MINDB Xbar, ICL Xbar): a single LOCK bit covers the entire crossbar type. This API returns the shared lock status for the whole crossbar type, regardless of which specific instance is passed as CrossbarUnit.
**Precondition**: Preconditions - Driver is already initialized.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_InputFlagStatus
```
boolean Cdd_Xbar_InputFlagStatus(
Cdd_Xbar_InputFlagType InputFlag
)
```
**Brief**:
Service for checking status of a crossbar input flag.
Returns whether the input flag is triggerred or not. This is used to flag the inputs of the X-Bars to provide software knowledge of the input sources which got triggered. Cdd_Xbar_InputFlagType can be used as an argument to check the input flag status.
**Parameters**:
* **InputFlag** is the crossbar input flag type.
**Returns**:
* **TRUE** if input flag is triggerred.
* **FALSE** if input flag is not triggerred.
**Return**: Status of input flag.
**Precondition**: Preconditions - Driver is already initialized.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_InputFlagClear
```
Std_ReturnType Cdd_Xbar_InputFlagClear(
Cdd_Xbar_InputFlagType InputFlag
)
```
**Brief**:
Service for clearing a crossbar input flag.
Clears the XBAR input flags.Cdd_Xbar_InputFlagType can be used as an argument to clear the input flag.
**Parameters**:
* **InputFlag** is the crossbar input flag type.
**Returns**:
* **TRUE** if input flag is cleared.
* **FALSE** if input flag is not cleared.
**Return**: Status of clearing input flag.
**Precondition**: Preconditions - Driver is already initialized.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_SetExternalInterruptType
```
Std_ReturnType Cdd_Xbar_SetExternalInterruptType(
Cdd_Xbar_Type CrossbarUnit,
Cdd_Xbar_IntType IntType
)
```
**Brief**:
Sets the interrupt type for the specified input crossbar instance.
This function sets up the various interrupt trigger mechanisms for the external interrupt connected to the specified input XBAR instance.
**Parameters**:
* **CrossbarUnit** specifies the symbolic name of the input crossbar instance.
* **IntType** specifies the type of interrupt trigger mechanism.
**Returns**:
* **E_OK** if external interrupt type is set.
* **E_NOT_OK** if external interrupt type is not set.
**Return**: Status of setting external interrupt type.
**Precondition**: Preconditions - Driver is already initialized. Input crossbar must be configured with external interrupt enabled.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_SetExternalInterruptState
```
Std_ReturnType Cdd_Xbar_SetExternalInterruptState(
Cdd_Xbar_Type CrossbarUnit,
boolean Enable
)
```
**Brief**:
Sets the external interrupt state (enable/disable) for the specified input crossbar instance.
This function enables or disables the external interrupt for the specified input crossbar instance. When Enable = TRUE, enables the external interrupt. When Enable = FALSE, disables the external interrupt.
**Parameters**:
* **CrossbarUnit** specifies the symbolic name of the input crossbar instance.
* **Enable** TRUE to enable the interrupt, FALSE to disable the interrupt.
**Returns**:
* **E_OK** if external interrupt state is set.
* **E_NOT_OK** if external interrupt state is not set.
**Return**: Status of setting external interrupt state.
**Precondition**: Preconditions - Driver is already initialized. Input crossbar must be configured with external interrupt enabled.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_GetExternalInterruptCounter
```
Std_ReturnType Cdd_Xbar_GetExternalInterruptCounter(
Cdd_Xbar_Type CrossbarUnit,
uint16 * CounterValue
)
```
**Brief**:
Gets external interrupt counter value.
This function retrieves the counter value for the specified external interrupt. This is a free running 16-bit up-counter clocked at SYSCLK and is only available for XINT1, XINT2, and XINT3. XINT4 and XINT5 do not have counter registers. The counter value is reset to 0x0000 when a valid interrupt edge is detected and then continues counting until the next valid interrupt edge is detected. The counter is a free-running counter and will wrap around to zero when the max value is reached
**Parameters**:
* **CrossbarUnit** - External interrupt crossbar unit (CDD_XBAR_XINT1, CDD_XBAR_XINT2, or CDD_XBAR_XINT3)
* **CounterValue** - Pointer to store the counter value (16-bit)
**Returns**:
* **E_OK** if counter value is retrieved successfully.
* **E_NOT_OK** if counter value retrieval failed (invalid parameters or counter not available).
**Return**: Status of getting external interrupt counter.
**Precondition**: Preconditions - Cdd_Xbar_Init() must be called before this function.
**Postcondition**: Postconditions - None.
### function Cdd_Xbar_Input_Selection_Mask
```
static inline uint32 Cdd_Xbar_Input_Selection_Mask(
uint32 InputLine
)
```
**Brief**:
Get Line Number selection mask.
Returns the line number selection mask for an input line.
**Parameters**:
* **InputLine** is the crossbar input.
**Return**: Line Number selection mask.
**Precondition**: None
**Postcondition**: None
### function Cdd_Xbar_GetGroupNumber
```
static inline uint8 Cdd_Xbar_GetGroupNumber(
uint16 InputLine
)
```
**Brief**:
Get group number for a given input line.
Returns the group number extracted from an input line value.
**Parameters**:
* **InputLine** is the crossbar input line.
**Return**: Group number (high byte of InputLine).
**Precondition**: None
**Postcondition**: None
### function Cdd_Xbar_GetXbarType
```
static inline uint8 Cdd_Xbar_GetXbarType(
uint16 xbar
)
```
**Brief**:
Get crossbar type.
Returns the crossbar type extracted from a crossbar value.
**Parameters**:
* **xbar** is the crossbar identifier.
**Return**: Crossbar type (high byte of xbar).
**Precondition**: None
**Postcondition**: None
### function Cdd_Xbar_GetXbarInstance
```
static inline uint8 Cdd_Xbar_GetXbarInstance(
uint16 xbar
)
```
**Brief**:
Get crossbar instance.
Returns the crossbar instance extracted from a crossbar value.
**Parameters**:
* **xbar** is the crossbar identifier.
**Return**: Crossbar instance (low byte of xbar).
**Precondition**: None
**Postcondition**: None
### function Cdd_Xbar_GetInputFlagNumber
```
static inline uint16 Cdd_Xbar_GetInputFlagNumber(
Cdd_Xbar_InputFlagType InputFlag
)
```
**Brief**:
Get input flag number for a given input flag.
Returns the input flag number extracted from an input flag value.
**Parameters**:
* **InputFlag** is the crossbar input flag.
**Return**: Input flag number (high byte of InputFlag).
**Precondition**: None
**Postcondition**: None
### function Cdd_Xbar_GetInputFlagBit
```
static inline uint16 Cdd_Xbar_GetInputFlagBit(
Cdd_Xbar_InputFlagType InputFlag
)
```
**Brief**:
Get the bit corresponding to the input in the input flag.
Returns the input flag bit extracted from an input flag value.
**Parameters**:
* **InputFlag** is the crossbar input flag.
**Return**: Input flag bit (low byte of InputFlag).
**Precondition**: None
**Postcondition**: None
---
title: Dio API GUIDE Header file
---
# DIO
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|typedef uint32 | **[Dio_ChannelType](../Modules/group__DIO.md#typedef-dio_channeltype)** | Numeric ID of a DIO channel. |
|typedef uint32 | **[Dio_PortType](../Modules/group__DIO.md#typedef-dio_porttype)** | Numeric ID of a DIO port. |
|typedef uint8 | **[Dio_LevelType](../Modules/group__DIO.md#typedef-dio_leveltype)** | These are the possible levels a DIO channel can have (input or output). |
|typedef uint32 | **[Dio_PortLevelType](../Modules/group__DIO.md#typedef-dio_portleveltype)** | If the uC owns ports of different port widths Dio_PortLevelType inherits the size of the largest port. |
### typedef Dio_ChannelType
```
typedef uint32 Dio_ChannelType;
```
**Brief**:
Numeric ID of a DIO channel.
### typedef Dio_PortType
```
typedef uint32 Dio_PortType;
```
**Brief**:
Numeric ID of a DIO port.
### typedef Dio_LevelType
```
typedef uint8 Dio_LevelType;
```
**Brief**:
These are the possible levels a DIO channel can have (input or output).
### typedef Dio_PortLevelType
```
typedef uint32 Dio_PortLevelType;
```
**Brief**:
If the uC owns ports of different port widths Dio_PortLevelType inherits the size of the largest port.
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Dio_ChannelGroupType](../Classes/structDio__ChannelGroupType.md)** | Type definition for identifying channel groups (meaning a set of pins in one port). |
## Defines
| Name | Brief |
| -------------- | ---------- |
| DIO_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| DIO_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| DIO_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| DIO_AR_RELEASE_MAJOR_VERSION | AUTOSAR Major version specification implemented by DIO Driver. |
| DIO_AR_RELEASE_MINOR_VERSION | AUTOSAR Minor version specification implemented by DIO Driver. |
| DIO_AR_RELEASE_REVISION_VERSION | AUTOSAR Patch version specification implemented by DIO Driver. |
| DIO_VENDOR_ID | Texas Instruments Vendor ID. |
| DIO_MODULE_ID | DIO Driver Module ID. |
| DIO_INSTANCE_ID | DIO Driver Instance ID. |
| DIO_E_PARAM_INVALID_CHANNEL_ID | API service called with invalid channel ID. |
| DIO_E_PARAM_INVALID_PORT_ID | API service called with invalid port ID. |
| DIO_E_PARAM_INVALID_GROUP | API service called with invalid channel group ID. |
| DIO_E_PARAM_POINTER | Dio_GetVersionInfo() called with NULL_PTR as parameter. |
| DIO_SID_READ_CHANNEL | Dio_ReadChannel() |
| DIO_SID_WRITE_CHANNEL | Dio_WriteChannel() |
| DIO_SID_READ_PORT | Dio_ReadPort() |
| DIO_SID_WRITE_PORT | Dio_WritePort() |
| DIO_SID_READ_CHANNEL_GROUP | Dio_ReadChannelGroup() |
| DIO_SID_WRITE_CHANNEL_GROUP | Dio_WriteChannelGroup() |
| DIO_SID_FLIP_CHANNEL | Dio_FlipChannel() |
| DIO_SID_GET_VERSION_INFO | Dio_GetVersionInfo() |
| DIO_PORT_A | GPIO PORT A identifier. |
| DIO_PORT_B | GPIO PORT B identifier. |
| DIO_PORT_C | GPIO PORT C identifier. |
| DIO_PORT_D | GPIO PORT D identifier. |
| DIO_PORT_E | GPIO PORT E identifier. |
| DIO_PORT_F | GPIO PORT F identifier. |
| DIO_PORT_G | GPIO PORT G identifier. |
| DIO_PORT_H | GPIO PORT H identifier. |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Dio_GetVersionInfo](../Modules/group__DIO.md#function-dio_getversioninfo)**(Std_VersionInfoType * Versioninfo)| Service to get the version information of the module. |
| [Dio_LevelType](../Modules/group__DIO.md#typedef-dio_leveltype) | **[Dio_ReadChannel](../Modules/group__DIO.md#function-dio_readchannel)**([Dio_ChannelType](../Modules/group__DIO.md#typedef-dio_channeltype) ChannelId)| Returns the value of the specified DIO channel. |
| void | **[Dio_WriteChannel](../Modules/group__DIO.md#function-dio_writechannel)**([Dio_ChannelType](../Modules/group__DIO.md#typedef-dio_channeltype) ChannelId, [Dio_LevelType](../Modules/group__DIO.md#typedef-dio_leveltype) Level)| Service to set a level of a channel. |
| [Dio_PortLevelType](../Modules/group__DIO.md#typedef-dio_portleveltype) | **[Dio_ReadPort](../Modules/group__DIO.md#function-dio_readport)**([Dio_PortType](../Modules/group__DIO.md#typedef-dio_porttype) PortId)| Returns the level of all channels of that port. |
| void | **[Dio_WritePort](../Modules/group__DIO.md#function-dio_writeport)**([Dio_PortType](../Modules/group__DIO.md#typedef-dio_porttype) PortId, [Dio_PortLevelType](../Modules/group__DIO.md#typedef-dio_portleveltype) Level)| Service to set a value of the port. |
| [Dio_PortLevelType](../Modules/group__DIO.md#typedef-dio_portleveltype) | **[Dio_ReadChannelGroup](../Modules/group__DIO.md#function-dio_readchannelgroup)**(const [Dio_ChannelGroupType](../Classes/structDio__ChannelGroupType.md) * ChannelGroupIdPtr)| This Service reads a subset of the adjoining bits of a port. |
| void | **[Dio_WriteChannelGroup](../Modules/group__DIO.md#function-dio_writechannelgroup)**(const [Dio_ChannelGroupType](../Classes/structDio__ChannelGroupType.md) * ChannelGroupIdPtr, [Dio_PortLevelType](../Modules/group__DIO.md#typedef-dio_portleveltype) Level)| Service to set a subset of the adjoining bits of a port to a specified level. |
| [Dio_LevelType](../Modules/group__DIO.md#typedef-dio_leveltype) | **[Dio_FlipChannel](../Modules/group__DIO.md#function-dio_flipchannel)**([Dio_ChannelType](../Modules/group__DIO.md#typedef-dio_channeltype) ChannelId)| Service to flip the value of a DIO channel. |
### function Dio_GetVersionInfo
```
void Dio_GetVersionInfo(
Std_VersionInfoType * Versioninfo
)
```
**Brief**:
Service to get the version information of the module.
This service writes the version information of this module into the data structure referenced by the parameter. If this parameter references NULL_PTR, a development error is reported to Det. This service is only available if the pre-compile configuration parameter DIO_VERSION_INFO_API is enabled.
**Parameters**:
* **Versioninfo** structure that contains the version information parameters.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Dio_ReadChannel
```
Dio_LevelType Dio_ReadChannel(
Dio_ChannelType ChannelId
)
```
**Brief**:
Returns the value of the specified DIO channel.
This service is to read from a specified DIO channel. If the channel specified is not valid, a development error is reported to Det. The value for the DIO channel is read and returned.
**Parameters**:
* **ChannelId** specifies the ID of the general-purpose digital input/output pin.
**Returns**:
* **STD_HIGH** logic level 1
* **STD_LOW** logic level 0
**Return**: Returns the logic level(value) on a specified DIO pin of type Dio_LevelType.
**Precondition**: None
**Postcondition**: None
### function Dio_WriteChannel
```
void Dio_WriteChannel(
Dio_ChannelType ChannelId,
Dio_LevelType Level
)
```
**Brief**:
Service to set a level of a channel.
This service is to set a specified level of a particular DIO channel. If the channel specified is not valid, a development error is reported to Det. The value is written to the specified DIO channel.
**Parameters**:
* **ChannelId** specifies the ID of the general-purpose digital input/output pin.
* **Level** specifies the value to be written to the channel. Value can be STD_HIGH or STD_LOW.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Dio_ReadPort
```
Dio_PortLevelType Dio_ReadPort(
Dio_PortType PortId
)
```
**Brief**:
Returns the level of all channels of that port.
This service reads the value of a DIO port. If the port is not enabled, a development error is reported to Det. The value of the port of which the ID is specified is read and returned.
**Parameters**:
* **PortId** specifies the ID of the grouped Input/Output channels.
**Returns**:
* **Value** of type Dio_PortLevelType
**Return**: level of all the channels of the specified port
**Precondition**: None
**Postcondition**: None
### function Dio_WritePort
```
void Dio_WritePort(
Dio_PortType PortId,
Dio_PortLevelType Level
)
```
**Brief**:
Service to set a value of the port.
This service sets a specified value of a DIO port. If the port is not enabled, a development error is reported to Det. The value is written to the specified DIO port.
**Parameters**:
* **PortId** specifies the ID of the grouped Input/Output channels.
* **Level** Value consisting of level of all the channels of the specified port.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Dio_ReadChannelGroup
```
Dio_PortLevelType Dio_ReadChannelGroup(
const Dio_ChannelGroupType * ChannelGroupIdPtr
)
```
**Brief**:
This Service reads a subset of the adjoining bits of a port.
This service reads the value of the subset of the bits of a port. If this parameter references NULL_PTR, a development error is reported to Det. The value of the level of the channel group is read and returned.
**Parameters**:
* **ChannelGroupIdPtr** for referencing channel group structures.
**Returns**:
* **value** of type Dio_PortLevelType
**Return**: levels of the specified channel group.
**Precondition**: None
**Postcondition**: None
### function Dio_WriteChannelGroup
```
void Dio_WriteChannelGroup(
const Dio_ChannelGroupType * ChannelGroupIdPtr,
Dio_PortLevelType Level
)
```
**Brief**:
Service to set a subset of the adjoining bits of a port to a specified level.
This service writes the specified value to a subset of the bits of a port. If this parameter references NULL_PTR, a development error is reported to Det. The information of the channel group is in the referenced channel group structure.The data is then written to the port.
**Parameters**:
* **ChannelGroupIdPtr** for referencing channel group structures.
* **Level** Value consisting of levels of the specified channel group.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Dio_FlipChannel
```
Dio_LevelType Dio_FlipChannel(
Dio_ChannelType ChannelId
)
```
**Brief**:
Service to flip the value of a DIO channel.
This service is to change the value of the corresponding DIO channel.If the channel specified is not valid, a development error is reported to Det. The value of the specified channel is flipped.This service is only available if the pre-compile configuration parameter DIO_FLIP_CHANNEL_API is enabled.
**Parameters**:
* **ChannelId** specifies the ID of the general-purpose digital input/output pin.
**Returns**:
* **STD_HIGH** logic level 1 STD_LOW: logic level 0
**Return**: Value consisting of level of the specified channel after flip of type Dio_LevelType.
**Precondition**: None
**Postcondition**: None
---
title: Fls API GUIDE Header file
---
# FLS
[More...](#detailed-description)
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Fls_EraseType](../Modules/group__FLS.md#enum-fls_erasetype)** | ENUM for erase type names. |
|typedef uint32 | **[Fls_AddressType](../Modules/group__FLS.md#typedef-fls_addresstype)** | Type of address type. |
|typedef uint32 | **[Fls_LengthType](../Modules/group__FLS.md#typedef-fls_lengthtype)** | Type of length type. |
### enum Fls_EraseType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| FLS_SECTOR_ERASE | 0U| Erase sector. |
| FLS_BANK_ERASE | 1U| Erase bank. |
**Brief**:
ENUM for erase type names.
### typedef Fls_AddressType
```
typedef uint32 Fls_AddressType;
```
**Brief**:
Type of address type.
### typedef Fls_LengthType
```
typedef uint32 Fls_LengthType;
```
**Brief**:
Type of length type.
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Fls_SectorType](../Classes/structFls__SectorType.md)** | FLS Module Flashable Sectors and pages. |
| **[Fls_ConfigType](../Classes/structFls__ConfigType.md)** | |
## Defines
| Name | Brief |
| -------------- | ---------- |
| FLS_SW_MAJOR_VERSION | Defines for FLS Driver version used for compatibility checks. |
| FLS_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| FLS_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| FLS_AR_RELEASE_MAJOR_VERSION | Defines for FLS Driver AUTOSAR version used for compatibility checks. |
| FLS_AR_RELEASE_MINOR_VERSION | AUTOSAR Minor version specification implemented by FLS Driver. |
| FLS_AR_RELEASE_REVISION_VERSION | AUTOSAR Patch version specification implemented by FLS Driver. |
| FLS_VENDOR_ID | FLS Driver ID Info. |
| FLS_MODULE_ID | FLS Driver Module ID. |
| FLS_INSTANCE_ID | FLS Driver Instance ID. |
| FLS_BASE_ADDRESS_REQ | |
| FLS_WRITE_ADDRESS_ALIGNMENT | Flash base address requirement. |
| FLS_E_PARAM_CONFIG | Flash write address alignment. |
| FLS_E_PARAM_ADDRESS | API service called with wrong parameter. |
| FLS_E_PARAM_LENGTH | API service called with wrong parameter. |
| FLS_E_PARAM_DATA | API service called with wrong parameter. |
| FLS_E_UNINIT | API service used without module initialization. |
| FLS_E_BUSY | APIs called when module is busy. |
| FLS_E_PARAM_POINTER | APIs called with a Null Pointer. |
| FLS_E_PARAM_ALIGNMENT | API service called with wrong parameter. |
| FLS_E_VERIFY_ERASE_FAILED | Runtime Errors WITH HW. |
| FLS_E_VERIFY_WRITE_FAILED | APIs serice Write Verification (Compare) failed. |
| FLS_E_TIMEOUT | APIs Timeout Exceeded. |
| FLS_E_ERASE_FAILED | TRANSIENT FAULTS WITH HW. |
| FLS_E_WRITE_FAILED | Flash Write Failed in HW. |
| FLS_E_READ_FAILED | Flash Read Failed in HW. |
| FLS_E_COMPARE_FAILED | Flash Compare Failediin HW. |
| FLS_E_UNEXPECTED_FLASH_ID | Expected HW ID not matched. |
| FLS_E_BLANK_CHECK_FAILED | Flash Blank Check Failediin HW. |
| FLS_SID_INIT | The Service Id is one of the argument to Det_ReportError function and is used to identify the source of the error. |
| FLS_SID_ERASE | FLS_Erase() API Service ID. |
| FLS_SID_WRITE | FLS_Write() API Service ID. |
| FLS_SID_CANCEL | FLS_Cancel() API Service ID. |
| FLS_SID_GET_STATUS | FLS_GetStatus() API Service ID. |
| FLS_SID_GET_JOB_RESULT | Fls_GetJobResult() API Service ID. |
| FLS_SID_READ | FLS_Read() API Service ID. |
| FLS_SID_COMPARE | FLS_Compare() API Service ID. |
| FLS_SID_SET_MODE | FLS_SetMode() API Service ID. |
| FLS_SID_GET_VERSION_INFO | Fls_GetVersionInfo() API Service ID. |
| FLS_SID_BLANK_CHECK | FLS_BlankCheck() API Service ID. |
| FLS_SID_MAIN_FUNCTION | FLS_MainFunction() API Service ID. |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Fls_Init](../Modules/group__FLS.md#function-fls_init)**(const Fls_ConfigType * ConfigPtr)| Initializes the Flash Driver. |
| Std_ReturnType | **[Fls_Erase](../Modules/group__FLS.md#function-fls_erase)**([Fls_AddressType](../Modules/group__FLS.md#typedef-fls_addresstype) TargetAddress, [Fls_LengthType](../Modules/group__FLS.md#typedef-fls_lengthtype) Length)| Erases flash sector(s). |
| Std_ReturnType | **[Fls_Write](../Modules/group__FLS.md#function-fls_write)**([Fls_AddressType](../Modules/group__FLS.md#typedef-fls_addresstype) TargetAddress, const uint8 * SourceAddressPtr, [Fls_LengthType](../Modules/group__FLS.md#typedef-fls_lengthtype) Length)| Writes one or more complete flash pages. |
| Std_ReturnType | **[Fls_Read](../Modules/group__FLS.md#function-fls_read)**([Fls_AddressType](../Modules/group__FLS.md#typedef-fls_addresstype) SourceAddress, uint8 * TargetAddressPtr, [Fls_LengthType](../Modules/group__FLS.md#typedef-fls_lengthtype) Length)| Reads from flash memory. |
| Std_ReturnType | **[Fls_Compare](../Modules/group__FLS.md#function-fls_compare)**([Fls_AddressType](../Modules/group__FLS.md#typedef-fls_addresstype) SourceAddress, const uint8 * TargetAddressPtr, [Fls_LengthType](../Modules/group__FLS.md#typedef-fls_lengthtype) Length)| Compares the contents of an area of flash memory with that of an application data buffer. |
| Std_ReturnType | **[Fls_BlankCheck](../Modules/group__FLS.md#function-fls_blankcheck)**([Fls_AddressType](../Modules/group__FLS.md#typedef-fls_addresstype) TargetAddress, [Fls_LengthType](../Modules/group__FLS.md#typedef-fls_lengthtype) Length)| The function Fls_BlankCheck shall verify, whether a given memory area has been erased but not (yet) programmed. |
| MemIf_StatusType | **[Fls_GetStatus](../Modules/group__FLS.md#function-fls_getstatus)**(void )| Returns the driver state. |
| Std_ReturnType | **[Fls_GetVersionInfo](../Modules/group__FLS.md#function-fls_getversioninfo)**(Std_VersionInfoType * versioninfo)| Returns the version information of this module. |
| MemIf_JobResultType | **[Fls_GetJobResult](../Modules/group__FLS.md#function-fls_getjobresult)**(void )| Returns the result of the last job. |
| void | **[Fls_MainFunction](../Modules/group__FLS.md#function-fls_mainfunction)**(void )| Performs the processing of jobs. |
| void | **[Fls_Cancel](../Modules/group__FLS.md#function-fls_cancel)**(void )| Cancels an ongoing job. |
| void | **[Fls_SetMode](../Modules/group__FLS.md#function-fls_setmode)**(MemIf_ModeType Mode)| Sets the flash driver's operation mode. This is a dummy API which is not supported and added for integration purposes. |
| uint32 | **[Fls_SetEraseType](../Modules/group__FLS.md#function-fls_seterasetype)**([Fls_EraseType](../Modules/group__FLS.md#enum-fls_erasetype) erasetype)| Sets the parameters required in application, based on the erase type parameter passed to this function while calling from Application. |
### function Fls_Init
```
void Fls_Init(
const Fls_ConfigType * ConfigPtr
)
```
**Brief**:
Initializes the Flash Driver.
**Parameters**:
* **ConfigPtr** : Pointer to flash driver configuration set
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Fls_Erase
```
Std_ReturnType Fls_Erase(
Fls_AddressType TargetAddress,
Fls_LengthType Length
)
```
**Brief**:
Erases flash sector(s).
**Parameters**:
* **TargetAddress** Target address in flash memory. This address offset will be added to the flash memory base address.
* **Length** - Number of bytes to erase
**Returns**:
* **E_OK** erase command has been accepted
* **E_NOT_OK** erase command has not been accepted
**Return**: return_value
**Precondition**: Preconditions - Driver not already initialized
**Postcondition**: Postconditions - Driver in initialized state
fsm ready ?
fsm ready ?
fsm ready ?
fsm ready ?
### function Fls_Write
```
Std_ReturnType Fls_Write(
Fls_AddressType TargetAddress,
const uint8 * SourceAddressPtr,
Fls_LengthType Length
)
```
**Brief**:
Writes one or more complete flash pages.
**Parameters**:
* **TargetAddress** Target address in flash memory. This address offset will be added to the flash memory base address.
* **SourceAddressPtr** Pointer to source address
* **Length** - Number of bytes to write
**Returns**:
* **E_OK** write command has been accepted
* **E_NOT_OK** write command has not been accepted
**Return**: Std_ReturnType
**Precondition**: Preconditions - Driver not already initialized
**Postcondition**: Postconditions - Driver in initialized state
fsm ready ?
fsm ready ?
### function Fls_Read
```
Std_ReturnType Fls_Read(
Fls_AddressType SourceAddress,
uint8 * TargetAddressPtr,
Fls_LengthType Length
)
```
**Brief**:
Reads from flash memory.
**Parameters**:
* **SourceAddress** Source address
* **Length** - Number of bytes to read
* **TargetAddressPtr** Pointer to target data buffer
**Returns**:
* **E_OK** read command has been accepted
* **E_NOT_OK** read command has not been accepted
**Return**: Std_ReturnType
**Precondition**: Preconditions - Driver not already initialized
**Postcondition**: Postconditions - Driver in initialized state
### function Fls_Compare
```
Std_ReturnType Fls_Compare(
Fls_AddressType SourceAddress,
const uint8 * TargetAddressPtr,
Fls_LengthType Length
)
```
**Brief**:
Compares the contents of an area of flash memory with that of an application data buffer.
**Parameters**:
* **SourceAddress** Target address in flash memory. This address offset will be added to the flash memory base address.
* **TargetAddressPtr** Pointer to target data buffer
* **Length** - Number of bytes to compare
**Returns**:
* **E_OK** compare command has been accepted
* **E_NOT_OK** compare command has not been accepted
**Return**: Std_ReturnType
**Precondition**: Preconditions - Driver not already initialized
**Postcondition**: Postconditions - Driver in initialized state
### function Fls_BlankCheck
```
Std_ReturnType Fls_BlankCheck(
Fls_AddressType TargetAddress,
Fls_LengthType Length
)
```
**Brief**:
The function Fls_BlankCheck shall verify, whether a given memory area has been erased but not (yet) programmed.
**Parameters**:
* **TargetAddress** Address in flash memory from which the blank check should be started.
* **Length** - Number of bytes to be checked for erase pattern
**Returns**:
* **E_OK** request for blank checking has been accepted by the module
* **E_NOT_OK** request for blank checking has not been accepted by the module
**Return**: Std_ReturnType
**Precondition**: Preconditions - Driver not already initialized
**Postcondition**: Postconditions - Driver in initialized state
### function Fls_GetStatus
```
MemIf_StatusType Fls_GetStatus(
void
)
```
**Brief**:
Returns the driver state.
**Return**: MemIf_StatusType
**Precondition**: Preconditions - Driver not already initialized
**Postcondition**: Postconditions - Driver in initialized state
### function Fls_GetVersionInfo
```
Std_ReturnType Fls_GetVersionInfo(
Std_VersionInfoType * versioninfo
)
```
**Brief**:
Returns the version information of this module.
**Parameters**:
* **versioninfo** Pointer to where to store the version information of this module.
**Return**: None
**Precondition**: Preconditions - None
**Postcondition**: Postconditions - None
### function Fls_GetJobResult
```
MemIf_JobResultType Fls_GetJobResult(
void
)
```
**Brief**:
Returns the result of the last job.
**Return**: MemIf_JobResultType
**Precondition**: Preconditions - None
**Postcondition**: Postconditions - None
### function Fls_MainFunction
```
void Fls_MainFunction(
void
)
```
**Brief**:
Performs the processing of jobs.
**Return**: None
**Precondition**: Preconditions - None
**Postcondition**: Postconditions - None
### function Fls_Cancel
```
void Fls_Cancel(
void
)
```
**Brief**:
Cancels an ongoing job.
**Return**: None
**Precondition**: Preconditions - None
**Postcondition**: Postconditions - None
### function Fls_SetMode
```
void Fls_SetMode(
MemIf_ModeType Mode
)
```
**Brief**:
Sets the flash driver's operation mode. This is a dummy API which is not supported and added for integration purposes.
**Return**: None
**Precondition**: Preconditions - None
**Postcondition**: Postconditions - None
### function Fls_SetEraseType
```
uint32 Fls_SetEraseType(
Fls_EraseType erasetype
)
```
**Brief**:
Sets the parameters required in application, based on the erase type parameter passed to this function while calling from Application.
**Parameters**:
* **erasetype**
**Return**: Sector or bank size
**Precondition**: Preconditions - None
**Postcondition**: Postconditions - None
## Detailed Description
This files defines FLS MCAL configuration structures
---
title: Gpt API GUIDE Header file
---
# GPT
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Gpt_PredefTimerType](../Modules/group__GPT.md#enum-gpt_predeftimertype)** | Type for GPT Predef Timers. |
|enum| **[Gpt_ChannelModeType](../Modules/group__GPT.md#enum-gpt_channelmodetype)** | GPT channel mode macro. |
|enum| **[Gpt_SimStatusType](../Modules/group__GPT.md#enum-gpt_simstatustype)** | GPT Simulation enabled/disabled. |
|enum| **[Gpt_SimModeType](../Modules/group__GPT.md#enum-gpt_simmodetype)** | GPT Simulation Behaviour Hard/Soft stop upon GPT simulation enabled. |
|enum| **[Gpt_ModeType](../Modules/group__GPT.md#enum-gpt_modetype)** | GPT Operation Mode. |
|typedef uint8 | **[Gpt_ChannelType](../Modules/group__GPT.md#typedef-gpt_channeltype)** | Numeric ID of a GPT channel. |
|typedef uint32 | **[Gpt_ChannelBaseAddrType](../Modules/group__GPT.md#typedef-gpt_channelbaseaddrtype)** | Base address of a GPT channel. |
|typedef uint32 | **[Gpt_ValueType](../Modules/group__GPT.md#typedef-gpt_valuetype)** | Type for reading and setting the timer values(in number of ticks). |
|typedef uint16 | **[Gpt_PrescaleValueType](../Modules/group__GPT.md#typedef-gpt_prescalevaluetype)** | Prescale value for General purpose timer channels. |
|typedef void(*)(void) | **[Gpt_NotifyType](../Modules/group__GPT.md#typedef-gpt_notifytype)** | Notification callback function pointer. |
### enum Gpt_PredefTimerType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| GPT_PREDEF_TIMER_1US_16BIT | 0U| GPT Predef Timer with tick duration 1µs and range 16bit. |
| GPT_PREDEF_TIMER_1US_24BIT | 1U| GPT Predef Timer with tick duration 1µs and range 24bit. |
| GPT_PREDEF_TIMER_1US_32BIT | 2U| GPT Predef Timer with tick duration 1µs and range 32bit. |
| GPT_PREDEF_TIMER_100US_32BIT | 3U| GPT Predef Timer with tick duration 100µs and range 32bit. |
**Brief**:
Type for GPT Predef Timers.
### enum Gpt_ChannelModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| GPT_CH_MODE_CONTINUOUS | | Timer will continue to running with the specified time period when target time reached. |
| GPT_CH_MODE_ONESHOT | | Timer will stop after running once when target time reached. |
**Brief**:
GPT channel mode macro.
### enum Gpt_SimStatusType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| GPT_SIM_DISABLE | | Timer is free-running. |
| GPT_SIM_ENABLE | | Timer is not free-running. Gpt_SimMode decides mode of operation. |
**Brief**:
GPT Simulation enabled/disabled.
### enum Gpt_SimModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| GPT_SIM_STOP_TIMER_AT_NEXT_COUNTER_DEC | | Timer stops at next decrement (HARD STOP) |
| GPT_SIM_STOP_TIMER_AT_NEXT_TIMER_ELAPSE | | Timer stops at the next timer elapsed (SOFT STOP) |
**Brief**:
GPT Simulation Behaviour Hard/Soft stop upon GPT simulation enabled.
### enum Gpt_ModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| GPT_MODE_NORMAL | 0x0U| Normal Mode. |
| GPT_MODE_SLEEP | 0x1U| Sleep Mode. |
**Brief**:
GPT Operation Mode.
### typedef Gpt_ChannelType
```
typedef uint8 Gpt_ChannelType;
```
**Brief**:
Numeric ID of a GPT channel.
### typedef Gpt_ChannelBaseAddrType
```
typedef uint32 Gpt_ChannelBaseAddrType;
```
**Brief**:
Base address of a GPT channel.
### typedef Gpt_ValueType
```
typedef uint32 Gpt_ValueType;
```
**Brief**:
Type for reading and setting the timer values(in number of ticks).
### typedef Gpt_PrescaleValueType
```
typedef uint16 Gpt_PrescaleValueType;
```
**Brief**:
Prescale value for General purpose timer channels.
### typedef Gpt_NotifyType
```
typedef void(* Gpt_NotifyType) (void);
```
**Brief**:
Notification callback function pointer.
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Gpt_ChannelConfigType](../Classes/structGpt__ChannelConfigType.md)** | Configuration per channel. |
| **[Gpt_ConfigType](../Classes/structGpt__ConfigType.md)** | global configuration of the driver. |
## Defines
| Name | Brief |
| -------------- | ---------- |
| GPT_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| GPT_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| GPT_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| GPT_AR_RELEASE_MAJOR_VERSION | AUTOSAR major version specification implemented by GPT Driver. |
| GPT_AR_RELEASE_MINOR_VERSION | AUTOSAR minor version specification implemented by GPT Driver. |
| GPT_AR_RELEASE_REVISION_VERSION | AUTOSAR patch version specification implemented by GPT Driver. |
| GPT_VENDOR_ID | Texas Instruments Vendor ID. |
| GPT_MODULE_ID | GPT Driver Module ID. |
| GPT_E_UNINIT | API service called without module initialization. |
| GPT_E_BUSY | API service called when timer channel is still busy (running). |
| GPT_E_MODE | API service called when driver is in wrong mode. |
| GPT_E_ALREADY_INITIALIZED | API service for initialization called when already initialized. |
| GPT_E_INIT_FAILED | API error return code: Init function failed. |
| GPT_E_PARAM_CHANNEL | API parameter checking: invalid channel. |
| GPT_E_PARAM_VALUE | API parameter checking: invalid value. |
| GPT_E_PARAM_POINTER | API parameter checking: invalid pointer. |
| GPT_E_PARAM_PREDEF_TIMER | API parameter checking: invalid pointer. |
| GPT_E_PARAM_MODE | API parameter checking: invalid mode. |
| GPT_SID_GET_VERSION_INFO | Gpt_GetVersionInfo(). |
| GPT_SID_INIT | Gpt_Init(). |
| GPT_SID_DEINIT | Gpt_DeInit(). |
| GPT_SID_GET_TIME_ELAPSED | Gpt_GetTimeElapsed(). |
| GPT_SID_GET_TIME_REMAINING | Gpt_GetTimeRemaining(). |
| GPT_SID_START_TIMER | Gpt_StartTimer(). |
| GPT_SID_STOP_TIMER | Gpt_StopTimer(). |
| GPT_SID_ENABLE_NOTIFY | Gpt_EnableNotification(). |
| GPT_SID_DISABLE_NOTIFY | Gpt_DisableNotification(). |
| GPT_SID_SET_MODE | Gpt_SetMode(). |
| GPT_SID_DISABLE_WAKEUP | Gpt_DisableWakeup(). |
| GPT_SID_ENABLE_WAKEUP | Gpt_EnableWakeup(). |
| GPT_SID_CHECK_WAKEUP | Gpt_CheckWakeup(). |
| GPT_SID_GET_TIME_PREDEF | Gpt_GetPredefTimerValue(). |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Gpt_GetVersionInfo](../Modules/group__GPT.md#function-gpt_getversioninfo)**(Std_VersionInfoType * VersionInfoPtr)| Gpt_GetVersionInfo : Returns the Gpt Version Info. |
| void | **[Gpt_Init](../Modules/group__GPT.md#function-gpt_init)**(const [Gpt_ConfigType](../Classes/structGpt__ConfigType.md) * ConfigPtr)| Gpt_Init : Initializes the Gpt module. |
| void | **[Gpt_DeInit](../Modules/group__GPT.md#function-gpt_deinit)**(void )| Gpt_DeInit : De-initializes the GPT module. |
| [Gpt_ValueType](../Modules/group__GPT.md#typedef-gpt_valuetype) | **[Gpt_GetTimeElapsed](../Modules/group__GPT.md#function-gpt_gettimeelapsed)**([Gpt_ChannelType](../Modules/group__GPT.md#typedef-gpt_channeltype) Channel)| Gpt_GetTimeElapsed : Returns the time elapsed for a given channel. |
| [Gpt_ValueType](../Modules/group__GPT.md#typedef-gpt_valuetype) | **[Gpt_GetTimeRemaining](../Modules/group__GPT.md#function-gpt_gettimeremaining)**([Gpt_ChannelType](../Modules/group__GPT.md#typedef-gpt_channeltype) Channel)| Gpt_GetTimeRemaining : Returns the time remaining for a given channel. |
| void | **[Gpt_StartTimer](../Modules/group__GPT.md#function-gpt_starttimer)**([Gpt_ChannelType](../Modules/group__GPT.md#typedef-gpt_channeltype) Channel, [Gpt_ValueType](../Modules/group__GPT.md#typedef-gpt_valuetype) Value)| Gpt_StartTimer : Starts a timer channel. |
| void | **[Gpt_StopTimer](../Modules/group__GPT.md#function-gpt_stoptimer)**([Gpt_ChannelType](../Modules/group__GPT.md#typedef-gpt_channeltype) Channel)| Gpt_StopTimer : Stops a timer channel. |
| void | **[Gpt_EnableNotification](../Modules/group__GPT.md#function-gpt_enablenotification)**([Gpt_ChannelType](../Modules/group__GPT.md#typedef-gpt_channeltype) Channel)| Gpt_EnableNotification : Enables the interrupt notification for a channel (relevant in normal mode). |
| void | **[Gpt_DisableNotification](../Modules/group__GPT.md#function-gpt_disablenotification)**([Gpt_ChannelType](../Modules/group__GPT.md#typedef-gpt_channeltype) Channel)| Gpt_DisableNotification : Disables the interrupt notification for a channel (relevant in normal mode). |
| void | **[Gpt_SetMode](../Modules/group__GPT.md#function-gpt_setmode)**([Gpt_ModeType](../Modules/group__GPT.md#enum-gpt_modetype) Mode)| Gpt_SetMode : Sets the operation mode of the GPT. |
| void | **[Gpt_DisableWakeup](../Modules/group__GPT.md#function-gpt_disablewakeup)**([Gpt_ChannelType](../Modules/group__GPT.md#typedef-gpt_channeltype) Channel)| Gpt_DisableWakeup : Disables the wakeup interrupt of a channel (relevant in sleep mode). |
| void | **[Gpt_EnableWakeup](../Modules/group__GPT.md#function-gpt_enablewakeup)**([Gpt_ChannelType](../Modules/group__GPT.md#typedef-gpt_channeltype) Channel)| Gpt_EnableWakeup : Enables the wakeup interrupt of a channel (relevant in sleep mode). |
| void | **[Gpt_CheckWakeup](../Modules/group__GPT.md#function-gpt_checkwakeup)**(EcuM_WakeupSourceType WakeupSource)| Gpt_CheckWakeup : Checks if a wakeup capable GPT channel is the source for a wakeup event and calls the ECU state manager service EcuM_SetWakeupEvent in case of a valid GPT channel wakeup event. |
### function Gpt_GetVersionInfo
```
void Gpt_GetVersionInfo(
Std_VersionInfoType * VersionInfoPtr
)
```
**Brief**:
Gpt_GetVersionInfo : Returns the Gpt Version Info.
This service returns the version information of this module.
**Parameters**:
* **VersionInfoPtr** Pointer to where to store the version information of this module.
**Returns**:
* **None**
**Return**: None
**Precondition**: VersionInfoPtr should not be NULL
**Postcondition**: None
### function Gpt_Init
```
void Gpt_Init(
const Gpt_ConfigType * ConfigPtr
)
```
**Brief**:
Gpt_Init : Initializes the Gpt module.
This service initializes all the configured Gpt channels. This will set the state of the each channel to "Initialized".
**Parameters**:
* **ConfigPtr**
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Gpt_DeInit
```
void Gpt_DeInit(
void
)
```
**Brief**:
Gpt_DeInit : De-initializes the GPT module.
This service deinitializes the Gpt driver to the power on reset state. The Gpt driver state is changed to "Uninitialized" state". All the configuration registers are cleared to stop the timer channels. API will disable all interrupts.
**Returns**:
* **None**
**Return**: None
**Precondition**: Gpt_Init should be called first before calling this service.
**Postcondition**: None
### function Gpt_GetTimeElapsed
```
Gpt_ValueType Gpt_GetTimeElapsed(
Gpt_ChannelType Channel
)
```
**Brief**:
Gpt_GetTimeElapsed : Returns the time elapsed for a given channel.
This service will return the time elapsed for the referenced channel. The user can configure the channel in two modes, One-shot and Continuous mode. In one shot mode, if the timer is in stopped state, the function will return time value at the moment of stopping. If the timer is expired, the function will return the target time configured for the channel. If the timer has not expired/stopped in one shot mode, it will return the value of time elapsed, relative to the time of starting. In Continuous Mode - The elapsed time value will be the value relative to last occurrence of start/restart, that is for current iteration only.
**Parameters**:
* **Channel** Numeric identifier of the GPT channel.
**Returns**:
* **Value** of the type Gpt_ValueType
**Return**: Returns the time already elapsed.
**Precondition**: Gpt Driver must be initialized.
**Postcondition**: None
### function Gpt_GetTimeRemaining
```
Gpt_ValueType Gpt_GetTimeRemaining(
Gpt_ChannelType Channel
)
```
**Brief**:
Gpt_GetTimeRemaining : Returns the time remaining for a given channel.
Gpt_GetTimeRemaining will return the timer value remaining until the target time will be reached next time. The remaining time is the absolute difference of the target time and time already elapsed. In one shot mode, if the timer is in stopped state, the function will return remaining time value at the moment of stopping. If the timer is expired, the function will return 0. In continuous mode, the return value will be the time remaining in the current iteration only.
**Parameters**:
* **Channel** Numeric identifier of the GPT channel.
**Returns**:
* **Value** of the type Gpt_ValueType
**Return**: Returns the time remaining until the target time is reached.
**Precondition**: Gpt Driver must be initialized.
**Postcondition**: None
### function Gpt_StartTimer
```
void Gpt_StartTimer(
Gpt_ChannelType Channel,
Gpt_ValueType Value
)
```
**Brief**:
Gpt_StartTimer : Starts a timer channel.
Gpt_StartTimer will start the selected timer channel with defined target time. If the timer channel is enabled for interrupt notification, then interrupt notification will be triggered after expiration of the selected timer channel. In one shot mode, if the timer is expired then the channel will be stopped in interrupt subroutine. The selected channel will be moved to "Running" state after calling this function.
**Parameters**:
* **Channel** Numeric identifier of the GPT channel.
* **Value** Target time in number of ticks.
**Returns**:
* **None**
**Return**: None
**Precondition**: Gpt Driver must be initialized.
**Postcondition**: Postconditions
### function Gpt_StopTimer
```
void Gpt_StopTimer(
Gpt_ChannelType Channel
)
```
**Brief**:
Gpt_StopTimer : Stops a timer channel.
Gpt_StopTimer will stop the selected timer channel.This will clear all the registers corresponding to the selected channel. The state of the timer channel will be changed to "Stopped".If the channel is in state "Initialized","Expired","Stopped" before calling this function,the function will be left without any action.
**Parameters**:
* **Channel** Numeric identifier of the GPT channel.
**Returns**:
* **None**
**Return**: None
**Precondition**: Gpt Driver must be initialized.
**Postcondition**: None
### function Gpt_EnableNotification
```
void Gpt_EnableNotification(
Gpt_ChannelType Channel
)
```
**Brief**:
Gpt_EnableNotification : Enables the interrupt notification for a channel (relevant in normal mode).
This service will enable the interrupt notification for the selected channel. The TIE bit in TCR register will be Set to enable the interrupt. The interrupt is triggered when counter value decrements to zero.
**Parameters**:
* **Channel** Numeric identifier of the GPT channel.
**Returns**:
* **None**
**Return**: None
**Precondition**: Gpt Driver must be initialized.
**Postcondition**: None
### function Gpt_DisableNotification
```
void Gpt_DisableNotification(
Gpt_ChannelType Channel
)
```
**Brief**:
Gpt_DisableNotification : Disables the interrupt notification for a channel (relevant in normal mode).
Gpt_DisableNotification will disable the compare interrupt notification for the selected channel. The TIE bit in TCR register will be cleared to disable the interrupt.
**Parameters**:
* **Channel** Numeric identifier of the GPT channel.
**Returns**:
* **None**
**Return**: None
**Precondition**: Gpt Driver must be initialized.
**Postcondition**: None
### function Gpt_SetMode
```
void Gpt_SetMode(
Gpt_ModeType Mode
)
```
**Brief**:
Gpt_SetMode : Sets the operation mode of the GPT.
### function Gpt_DisableWakeup
```
void Gpt_DisableWakeup(
Gpt_ChannelType Channel
)
```
**Brief**:
Gpt_DisableWakeup : Disables the wakeup interrupt of a channel (relevant in sleep mode).
### function Gpt_EnableWakeup
```
void Gpt_EnableWakeup(
Gpt_ChannelType Channel
)
```
**Brief**:
Gpt_EnableWakeup : Enables the wakeup interrupt of a channel (relevant in sleep mode).
### function Gpt_CheckWakeup
```
void Gpt_CheckWakeup(
EcuM_WakeupSourceType WakeupSource
)
```
**Brief**:
Gpt_CheckWakeup : Checks if a wakeup capable GPT channel is the source for a wakeup event and calls the ECU state manager service EcuM_SetWakeupEvent in case of a valid GPT channel wakeup event.
---
title: Lin API GUIDE Header file
---
# LIN
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Lin_InterruptLineNum](../Modules/group__LIN.md#enum-lin_interruptlinenum)** | Enum of Lin Interrupt line number, 0 or 1. |
|enum| **[Lin_LoopbackModeType](../Modules/group__LIN.md#enum-lin_loopbackmodetype)** | Enum of Lin Loopbackmode, Internal/External/Disabled Type selection. |
### enum Lin_InterruptLineNum
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| LIN_INTERRUPT_LINE_NUM_0 | 0x0U| Use Interrupt Line 0. |
| LIN_INTERRUPT_LINE_NUM_1 | 0x1U| Use Interrupt Line 1. |
**Brief**:
Enum of Lin Interrupt line number, 0 or 1.
### enum Lin_LoopbackModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| LIN_LOOPBACK_DISABLED | | Loopback disabled. |
| LIN_LOOPBACK_INTERNAL | | Loopback internal. |
| LIN_LOOPBACK_EXTERNAL | | Loopback external. |
**Brief**:
Enum of Lin Loopbackmode, Internal/External/Disabled Type selection.
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Lin_ChannelType](../Classes/structLin__ChannelType.md)** | Lin Channel type structure. |
| **[Lin_ConfigType](../Classes/structLin__ConfigType.md)** | LIN Channel Configuration structure. |
| **[Lin_ControllerType](../Classes/structLin__ControllerType.md)** | Lin Controller Configuration structure. |
| **[Lin_BaudRateConfigType](../Classes/structLin__BaudRateConfigType.md)** | Lin Controller BaudRate Configuration. |
## Defines
| Name | Brief |
| -------------- | ---------- |
| LIN_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| LIN_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| LIN_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| LIN_AR_RELEASE_MAJOR_VERSION | AUTOSAR Major version specification implemented by LIN Driver. |
| LIN_AR_RELEASE_MINOR_VERSION | AUTOSAR Minor version specification implemented by LIN Driver. |
| LIN_AR_RELEASE_REVISION_VERSION | AUTOSAR Patch version specification implemented by LIN Driver. |
| LIN_VENDOR_ID | Texas Instruments Vendor ID. |
| LIN_MODULE_ID | LIN Driver Module ID. |
| LIN_INSTANCE_ID | LIN Driver Instance ID. |
| LIN_E_UNINIT | API service used without module initialization. |
| LIN_E_INVALID_CHANNEL | API service used with an invalid or inactive channel parameter. |
| LIN_E_INVALID_POINTER | API service called with invalid configuration pointer. |
| LIN_E_STATE_TRANSITION | Invalid state transition for the current state. |
| LIN_E_PARAM_POINTER | API service called with a NULL pointer. |
| LIN_SID_INIT | Service ID - Lin_Init(). |
| LIN_SID_GET_VERSION_INFO | Service ID - Lin_GetVersionInfo(). |
| LIN_SID_SEND_FRAME | Service ID - Lin_SendFrame(). |
| LIN_SID_GOTO_SLEEP | Service ID - Lin_GoToSleep(). |
| LIN_SID_WAKEUP | Service ID - Lin_Wakeup(). |
| LIN_SID_GET_STATUS | Service ID - Lin_GetStatus(). |
| LIN_SID_GOTO_SLEEP_INTERNAL | Service ID - Lin_GoToSleepInternal(). |
| LIN_SID_CHECK_WAKEUP | Service ID - Lin_CheckWakeup(). |
| LIN_SID_WAKEUP_INTERNAL | Service ID - Lin_WakeupInternal(). |
| LIN_ISR_CAT1_RTINT | Category 1 RT ISR type. |
| LIN_ISR_CAT1_INT | Category 1 ISR type. |
| LIN_ISR_CAT2 | Category 2 ISR type. |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Lin_GetVersionInfo](../Modules/group__LIN.md#function-lin_getversioninfo)**(Std_VersionInfoType * versioninfo)| Service to get the version information of the module. |
| void | **[Lin_Init](../Modules/group__LIN.md#function-lin_init)**(const [Lin_ConfigType](../Classes/structLin__ConfigType.md) * Config)| Lin_Init - Initializes the LIN module. |
| Std_ReturnType | **[Lin_CheckWakeup](../Modules/group__LIN.md#function-lin_checkwakeup)**(uint8 Channel)| Lin_CheckWakeup - This function checks if a wakeup has occurred on the addressed LIN channel. |
| Std_ReturnType | **[Lin_SendFrame](../Modules/group__LIN.md#function-lin_sendframe)**(uint8 Channel, const Lin_PduType * PduInfoPtr)| Lin_SendFrame - Sends a LIN header and a LIN response, if necessary. The direction of the frame response (master response, slave response, slave-to-slave communication) is provided by the PduInfoPtr. |
| Std_ReturnType | **[Lin_GoToSleep](../Modules/group__LIN.md#function-lin_gotosleep)**(uint8 Channel)| Lin_GoToSleep - The service instructs the driver to transmit a go-to-sleep-command on the addressed LIN channel. |
| Std_ReturnType | **[Lin_GoToSleepInternal](../Modules/group__LIN.md#function-lin_gotosleepinternal)**(uint8 Channel)| Lin_GoToSleepInternal - Sets the channel state to LIN_CH_SLEEP, enables the wake-up detection and optionally sets the LIN hardware unit to reduced power operation mode. |
| Std_ReturnType | **[Lin_Wakeup](../Modules/group__LIN.md#function-lin_wakeup)**(uint8 Channel)| Lin_Wakeup - Generates a wake up pulse and sets the channel state to LIN_CH_OPERATIONAL. |
| Std_ReturnType | **[Lin_WakeupInternal](../Modules/group__LIN.md#function-lin_wakeupinternal)**(uint8 Channel)| Lin_WakeupInternal - Generates a wake up pulse and sets the channel state to LIN_CH_OPERATIONAL without generating a wake up pulse. |
| Lin_StatusType | **[Lin_GetStatus](../Modules/group__LIN.md#function-lin_getstatus)**(uint8 Channel, uint8 ** Lin_SduPtr)| Lin_GetStatus - Gets the status of the LIN driver. |
### function Lin_GetVersionInfo
```
void Lin_GetVersionInfo(
Std_VersionInfoType * versioninfo
)
```
**Brief**:
Service to get the version information of the module.
This service writes the version information of this module into the data structure referenced by the parameter. If this parameter references NULL_PTR, a development error is reported to Det. This service is only available if the pre-compile configuration parameter LIN_GET_VERSION_INFO_API is enabled.
**Parameters**:
* **versioninfo** structure that contains the version information parameters.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Lin_Init
```
void Lin_Init(
const Lin_ConfigType * Config
)
```
**Brief**:
Lin_Init - Initializes the LIN module.
**Parameters**:
* **Config** Pointer to LIN driver configuration set.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Lin_CheckWakeup
```
Std_ReturnType Lin_CheckWakeup(
uint8 Channel
)
```
**Brief**:
Lin_CheckWakeup - This function checks if a wakeup has occurred on the addressed LIN channel.
**Parameters**:
* **Channel** LIN channel to be addressed.
**Returns**:
* **E_OK** No error has occurred during execution of the API
* **E_NOT_OK** An error has occurred during execution of the API
**Return**: return_value
**Precondition**: None
**Postcondition**: None
### function Lin_SendFrame
```
Std_ReturnType Lin_SendFrame(
uint8 Channel,
const Lin_PduType * PduInfoPtr
)
```
**Brief**:
Lin_SendFrame - Sends a LIN header and a LIN response, if necessary. The direction of the frame response (master response, slave response, slave-to-slave communication) is provided by the PduInfoPtr.
**Parameters**:
* **Channel** LIN channel to be addressed.
* **PduInfoPtr** Pointer to PDU containing the PID, checksum model, response type, Dl and SDU data pointer
**Returns**:
* **E_OK** Send command has been accepted.
* **E_NOT_OK** Send command has not been accepted, development or production error occurred.
**Return**: return_value
**Precondition**: None
**Postcondition**: None
### function Lin_GoToSleep
```
Std_ReturnType Lin_GoToSleep(
uint8 Channel
)
```
**Brief**:
Lin_GoToSleep - The service instructs the driver to transmit a go-to-sleep-command on the addressed LIN channel.
**Parameters**:
* **Channel** LIN channel to be addressed.
**Returns**:
* **E_OK** Sleep command has been accepted.
* **E_NOT_OK** Sleep command has not been accepted, development or production error occurred.
**Return**: return_value
**Precondition**: None
**Postcondition**: None
### function Lin_GoToSleepInternal
```
Std_ReturnType Lin_GoToSleepInternal(
uint8 Channel
)
```
**Brief**:
Lin_GoToSleepInternal - Sets the channel state to LIN_CH_SLEEP, enables the wake-up detection and optionally sets the LIN hardware unit to reduced power operation mode.
**Parameters**:
* **Channel** LIN channel to be addressed.
**Returns**:
* **E_OK** Command has been accepted.
* **E_NOT_OK** Command has not been accepted, development or production error occurred.
**Return**: return_value
**Precondition**: None
**Postcondition**: None
### function Lin_Wakeup
```
Std_ReturnType Lin_Wakeup(
uint8 Channel
)
```
**Brief**:
Lin_Wakeup - Generates a wake up pulse and sets the channel state to LIN_CH_OPERATIONAL.
**Parameters**:
* **Channel** LIN channel to be addressed.
**Returns**:
* **E_OK** Wake-up request has been accepted
* **E_NOT_OK** Wake-up request has not been accepted, development or production error occurred.
**Return**: return_value
**Precondition**: None
**Postcondition**: None
### function Lin_WakeupInternal
```
Std_ReturnType Lin_WakeupInternal(
uint8 Channel
)
```
**Brief**:
Lin_WakeupInternal - Generates a wake up pulse and sets the channel state to LIN_CH_OPERATIONAL without generating a wake up pulse.
**Parameters**:
* **Channel** LIN channel to be addressed.
**Returns**:
* **E_OK** Wake-up request has been accepted
* **E_NOT_OK** Wake-up request has not been accepted, development or production error occurred.
**Return**: return_value
**Precondition**: None
**Postcondition**: None
### function Lin_GetStatus
```
Lin_StatusType Lin_GetStatus(
uint8 Channel,
uint8 ** Lin_SduPtr
)
```
**Brief**:
Lin_GetStatus - Gets the status of the LIN driver.
**Parameters**:
* **Channel** LIN channel to be addressed.
* **Lin_SduPtr** Pointer to pointer to a shadow buffer or memory mapped LIN Hardware receive buffer where the current SDU is stored.
**Returns**:
* **LIN_NOT_OK** Development or production error occurred
* **LIN_TX_OK** Successful transmission
* **LIN_TX_BUSY** Ongoing transmission (Header or Response)
* **LIN_TX_HEADER_ERROR** Erroneous header transmission such as:
* Mismatch between sent and read back data
* Identifier parity error or Physical bus error
* **LIN_TX_ERROR** Erroneous response transmission such as:
* Mismatch between sent and read back data
* Physical bus error
* **LIN_RX_OK** Reception of correct response
* **LIN_RX_BUSY** Ongoing reception: at least one response byte has been received, but the checksum byte has not been received
* **LIN_RX_ERROR** Erroneous response reception such as:
* Framing error
* Overrun error
* Checksum error or Short response
* **LIN_RX_NO_RESPONSE** No response byte has been received so far
* **LIN_OPERATIONAL** Normal operation; the related LIN channel is woken up from the LIN_CH_SLEEP and no data has been sent.
* **LIN_CH_SLEEP** Sleep state operation; in this state wake-up detection from slave nodes is enabled.
**Return**: return_value
**Precondition**: None
**Postcondition**: None
---
title: Mcu API GUIDE Header file
---
# MCU
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Mcu_PllStatusType](../Modules/group__MCU.md#enum-mcu_pllstatustype)** | This is a status value returned by the function Mcu_GetPllStatus of the MCU module. |
|enum| **[Mcu_ResetType](../Modules/group__MCU.md#enum-mcu_resettype)** | This is the type of the reset enumerator containing the subset of reset types. |
|enum| **[Mcu_RamStateType](../Modules/group__MCU.md#enum-mcu_ramstatetype)** | This is a status value returned by the function Mcu_GetRamState of the MCU module. |
|enum| **[Mcu_ClkSourceIdType](../Modules/group__MCU.md#enum-mcu_clksourceidtype)** | Type of the clock sources. |
|enum| **[Mcu_CpuTimerClkSrc](../Modules/group__MCU.md#enum-mcu_cputimerclksrc)** | The following are clock sources available for Cpu Timer module. |
|enum| **[Mcu_MCanClkSrc](../Modules/group__MCU.md#enum-mcu_mcanclksrc)** | The following are clock sources available for MCAN module. |
|enum| **[Mcu_MCANClkDivider](../Modules/group__MCU.md#enum-mcu_mcanclkdivider)** | The following are dividers available for MCAN module. |
|enum| **[Mcu_MCANInstance](../Modules/group__MCU.md#enum-mcu_mcaninstance)** | The following are instances available for MCAN module. |
|enum| **[Mcu_ExternalClockOutClkSrc](../Modules/group__MCU.md#enum-mcu_externalclockoutclksrc)** | The following are clock sources available for XCLKOUT module. |
|enum| **[Mcu_ExternalClockOutDiv](../Modules/group__MCU.md#enum-mcu_externalclockoutdiv)** | The following are dividers available for XCLKOUT. |
|enum| **[Mcu_EthercatClockDiv](../Modules/group__MCU.md#enum-mcu_ethercatclockdiv)** | The following are dividers available for Ethercat clock. |
|enum| **[Mcu_EthercatPhyClk](../Modules/group__MCU.md#enum-mcu_ethercatphyclk)** | The following are values available to set enable/disable for EthcatPhyClock. |
|enum| **[Mcu_HsmClockDiv](../Modules/group__MCU.md#enum-mcu_hsmclockdiv)** | The following are dividers available for HSM clock. |
|enum| **[Mcu_EPWMClkDivider](../Modules/group__MCU.md#enum-mcu_epwmclkdivider)** | The following are dividers available for EPWM clock. |
|enum| **[Mcu_EMIFClkDivider](../Modules/group__MCU.md#enum-mcu_emifclkdivider)** | The following are dividers available for EMIF clock. |
|enum| **[Mcu_LINClkDivider](../Modules/group__MCU.md#enum-mcu_linclkdivider)** | The following are dividers available for LIN clock. |
|enum| **[Mcu_LINInstance](../Modules/group__MCU.md#enum-mcu_lininstance)** | The following are instances available for LIN module. |
|enum| **[Mcu_LowPowerModeType](../Modules/group__MCU.md#enum-mcu_lowpowermodetype)** | List of low power modes. |
|typedef uint8 | **[Mcu_ClockType](../Modules/group__MCU.md#typedef-mcu_clocktype)** | This type specifies the identification (ID) for a ClockType status used by Mcu_InitClock. |
|typedef uint32 | **[Mcu_RawResetType](../Modules/group__MCU.md#typedef-mcu_rawresettype)** | This type specifies the identification (ID) for a RAW reset status returned by Mcu_GetResetRawValue. |
|typedef uint8 | **[Mcu_ModeType](../Modules/group__MCU.md#typedef-mcu_modetype)** | This type specifies the identification (ID) for a MCU low power mode used in Mcu_SetMode. |
|typedef uint8 | **[Mcu_RamSectionType](../Modules/group__MCU.md#typedef-mcu_ramsectiontype)** | This type specifies the identification (ID) for a RAM section used in Mcu_InitRamSection. |
|typedef const [Mcu_RamSectionConfigType](../Classes/structMcu__RamSectionConfigType.md) * | **[Mcu_RamConfigPtrType](../Modules/group__MCU.md#typedef-mcu_ramconfigptrtype)**
|typedef const [Mcu_PeripheralClkRegConfigType](../Classes/structMcu__PeripheralClkRegConfigType.md) * | **[Mcu_PeripheralClkRegConfigPtrType](../Modules/group__MCU.md#typedef-mcu_peripheralclkregconfigptrtype)**
|typedef const [Mcu_PeripheralResetRegConfigType](../Classes/structMcu__PeripheralResetRegConfigType.md) * | **[Mcu_PeripheralResetRegConfigPtrType](../Modules/group__MCU.md#typedef-mcu_peripheralresetregconfigptrtype)**
|typedef const [Mcu_MCanClkConfigType](../Classes/structMcu__MCanClkConfigType.md) * | **[Mcu_MCanClkConfigPtrType](../Modules/group__MCU.md#typedef-mcu_mcanclkconfigptrtype)**
|typedef const [Mcu_LinClkConfigType](../Classes/structMcu__LinClkConfigType.md) * | **[Mcu_LinClkConfigPtrType](../Modules/group__MCU.md#typedef-mcu_linclkconfigptrtype)**
|typedef const [Mcu_ClockConfigType](../Classes/structMcu__ClockConfigType.md) * | **[Mcu_ClockConfigPtrType](../Modules/group__MCU.md#typedef-mcu_clockconfigptrtype)**
|typedef const [Mcu_ModeConfigType](../Classes/structMcu__ModeConfigType.md) * | **[Mcu_ModeConfigPtrType](../Modules/group__MCU.md#typedef-mcu_modeconfigptrtype)**
### enum Mcu_PllStatusType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_PLL_LOCKED | 0U| PLL status Locked. |
| MCU_PLL_UNLOCKED | 1U| PLL status Unlocked. |
| MCU_PLL_STATUS_UNDEFINED | 2U| PLL status undefined. |
**Brief**:
This is a status value returned by the function Mcu_GetPllStatus of the MCU module.
### enum Mcu_ResetType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_POWER_ON_RESET | 0U| Power On reset. |
| MCU_EXTERNAL_RESET | 1U| External reset. |
| MCU_ESM_NMI_WATCHDOG_RESET | 2U| NMI Watchdog reset. |
| MCU_WATCHDOG_RESET | 3U| Watchdog reset |
| MCU_SW_RESET | 4U| Simulation of external reset |
| MCU_ESM_RESET | 5U| ESM reset |
| MCU_RESET_UNDEFINED | 6U| UNDEFINED reset |
**Brief**:
This is the type of the reset enumerator containing the subset of reset types.
### enum Mcu_RamStateType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_RAMSTATE_INVALID | 0U| Ram state status invalid |
| MCU_RAMSTATE_VALID | 1U| Ram state status valid |
**Brief**:
This is a status value returned by the function Mcu_GetRamState of the MCU module.
### enum Mcu_ClkSourceIdType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_CLKSRC_OSC2 | 0x00| Internal Oscillator 2 |
| MCU_CLKSRC_XTAL | 0x01| External XTAL |
| MCU_CLKSRC_XTAL_SE | 0x11| External XTAL Single-ended mode |
| MCU_CLKSRC_OSC1 | 0x02| Internal Oscillator 1 |
**Brief**:
Type of the clock sources.
### enum Mcu_CpuTimerClkSrc
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_CPUTIMERCLKSRC_SYSCLK | 0U| SYSCLK (default on reset) |
| MCU_CPUTIMERCLKSRC_INTOSC1 | 1U| Internal Oscillator 1 |
| MCU_CPUTIMERCLKSRC_INTOSC2 | 2U| Internal Oscillator 2 |
| MCU_CPUTIMERCLKSRC_XTAL | 3U| External Oscillator (XTAL) |
| MCU_CPUTIMERCLKSRC_MAX | | |
**Brief**:
The following are clock sources available for Cpu Timer module.
### enum Mcu_MCanClkSrc
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_MCANCLKSRC_PERxSYSCLK | 0U| SYSCLK (default on reset) |
| MCU_MCANCLKSRC_AUXCLKIN | 2U| SYSCLK (default on reset) |
| MCU_MCANCLKSRC_PLLRAWCLK | 3U| Raw PLL Clock |
| MCU_MCANCLKSRC_MAX | | |
**Brief**:
The following are clock sources available for MCAN module.
### enum Mcu_MCANClkDivider
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_MCANCLK_DIV_1 | 0x0| MCAN clock = MCAN clock source / 1. |
| MCU_MCANCLK_DIV_2 | 0x1| MCAN clock = MCAN clock source / 2. |
| MCU_MCANCLK_DIV_3 | 0x2| MCAN clock = MCAN clock source / 3. |
| MCU_MCANCLK_DIV_4 | 0x3| MCAN clock = MCAN clock source / 4. |
| MCU_MCANCLK_DIV_5 | 0x4| MCAN clock = MCAN clock source / 5. |
| MCU_MCANCLK_DIV_6 | 0x5| MCAN clock = MCAN clock source / 6. |
| MCU_MCANCLK_DIV_7 | 0x6| MCAN clock = MCAN clock source / 7. |
| MCU_MCANCLK_DIV_8 | 0x7| MCAN clock = MCAN clock source / 8. |
| MCU_MCANCLK_DIV_9 | 0x8| MCAN clock = MCAN clock source / 9. |
| MCU_MCANCLK_DIV_10 | 0x9| MCAN clock = MCAN clock source / 10. |
| MCU_MCANCLK_DIV_11 | 0xA| MCAN clock = MCAN clock source / 11. |
| MCU_MCANCLK_DIV_12 | 0xB| MCAN clock = MCAN clock source / 12. |
| MCU_MCANCLK_DIV_13 | 0xC| MCAN clock = MCAN clock source / 13. |
| MCU_MCANCLK_DIV_14 | 0xD| MCAN clock = MCAN clock source / 14. |
| MCU_MCANCLK_DIV_15 | 0xE| MCAN clock = MCAN clock source / 15. |
| MCU_MCANCLK_DIV_16 | 0xF| MCAN clock = MCAN clock source / 16. |
| MCU_MCANCLK_DIV_17 | 0x10| MCAN clock = MCAN clock source / 17. |
| MCU_MCANCLK_DIV_18 | 0x11| MCAN clock = MCAN clock source / 18. |
| MCU_MCANCLK_DIV_19 | 0x12| MCAN clock = MCAN clock source / 19. |
| MCU_MCANCLK_DIV_20 | 0x13| MCAN clock = MCAN clock source / 20. |
**Brief**:
The following are dividers available for MCAN module.
### enum Mcu_MCANInstance
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_MCAN_A | 0U| MCAN Instance A. |
| MCU_MCAN_B | 1U| MCAN Instance B. |
| MCU_MCAN_C | 2U| MCAN Instance C. |
| MCU_MCAN_D | 3U| MCAN Instance D. |
| MCU_MCAN_E | 4U| MCAN Instance E. |
| MCU_MCAN_F | 5U| MCAN Instance F. |
**Brief**:
The following are instances available for MCAN module.
### enum Mcu_ExternalClockOutClkSrc
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_XCLKOUTSRC_PLLSYS | 0U| PLL System Clock post SYSCLKDIV |
| MCU_XCLKOUTSRC_CPU1CLK | 1U| CPU1.CLOCK |
| MCU_XCLKOUTSRC_CPU2CLK | 2U| CPU2.CLOCK |
| MCU_XCLKOUTSRC_CPU3CLK | 3U| CPU3.CLOCK |
| MCU_XCLKOUTSRC_INTOSC1 | 5U| Internal Oscillator 1 |
| MCU_XCLKOUTSRC_INTOSC2 | 6U| Internal Oscillator 2 |
| MCU_XCLKOUTSRC_XTALOSC | 7U| External Oscillator |
**Brief**:
The following are clock sources available for XCLKOUT module.
### enum Mcu_ExternalClockOutDiv
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_XCLKOUT_DIV_1 | 0U| divided by 1 |
| MCU_XCLKOUT_DIV_2 | 1U| divided by 2 |
| MCU_XCLKOUT_DIV_4 | 2U| divided by 4 |
| MCU_XCLKOUT_DIV_8 | 3U| divided by 8 |
**Brief**:
The following are dividers available for XCLKOUT.
### enum Mcu_EthercatClockDiv
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_ECATCLKOUT_DIV_1 | 0U| divided by 1 |
| MCU_ECATCLKOUT_DIV_2 | 1U| divided by 2 |
| MCU_ECATCLKOUT_DIV_3 | 2U| divided by 3 |
| MCU_ECATCLKOUT_DIV_4 | 3U| divided by 4 |
| MCU_ECATCLKOUT_DIV_5 | 4U| divided by 5 |
| MCU_ECATCLKOUT_DIV_6 | 5U| divided by 6 |
| MCU_ECATCLKOUT_DIV_7 | 6U| divided by 7 |
| MCU_ECATCLKOUT_DIV_8 | 7U| divided by 8 |
**Brief**:
The following are dividers available for Ethercat clock.
### enum Mcu_EthercatPhyClk
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_ECAT_PHYCLK_ENABLE | 0x100U| Enable value 0x100. |
| MCU_ECAT_PHYCLK_DISABLE | 0U| Disable value 0. |
**Brief**:
The following are values available to set enable/disable for EthcatPhyClock.
### enum Mcu_HsmClockDiv
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_HSMCLK_DIV_1 | 0U| divided by 1 |
| MCU_HSMCLK_DIV_2 | 1U| divided by 2 |
| MCU_HSMCLK_DIV_4 | 2U| divided by 4 |
| MCU_HSMCLK_DIV_8 | 3U| divided by 8 |
| MCU_HSMCLK_DIV_16 | 4U| divided by 16 |
**Brief**:
The following are dividers available for HSM clock.
### enum Mcu_EPWMClkDivider
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_EPWMCLK_DIV_1 | 0U| EPWMCLK = PLLSYSCLK / 1. |
| MCU_EPWMCLK_DIV_2 | 1U| EPWMCLK = PLLSYSCLK / 2. |
**Brief**:
The following are dividers available for EPWM clock.
### enum Mcu_EMIFClkDivider
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_EMIFCLK_DIV_1 | 0U| EMIF1CLK = PLLSYSCLK / 1. |
| MCU_EMIFCLK_DIV_2 | 1U| EMIF1CLK = PLLSYSCLK / 2. |
| MCU_EMIFCLK_DIV_4 | 2U| EMIF1CLK = PLLSYSCLK / 4. |
**Brief**:
The following are dividers available for EMIF clock.
### enum Mcu_LINClkDivider
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_LINCLK_DIV_1 | 0U| LINCLK = PLLSYSCLK / 1. |
| MCU_LINCLK_DIV_2 | 1U| LINCLK = PLLSYSCLK / 2. |
| MCU_LINCLK_DIV_4 | 2U| LINCLK = PLLSYSCLK / 4. |
**Brief**:
The following are dividers available for LIN clock.
### enum Mcu_LINInstance
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_LIN_A | 0U| LIN Instance A. |
| MCU_LIN_B | 1U| LIN Instance B. |
**Brief**:
The following are instances available for LIN module.
### enum Mcu_LowPowerModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| MCU_IDLE_MODE | 0U| MCU Idle mode. |
| MCU_STANDBY_MODE | 1U| MCU Standby mode. |
| MCU_MODE_MAX | | |
**Brief**:
List of low power modes.
### typedef Mcu_ClockType
```
typedef uint8 Mcu_ClockType;
```
**Brief**:
This type specifies the identification (ID) for a ClockType status used by Mcu_InitClock.
### typedef Mcu_RawResetType
```
typedef uint32 Mcu_RawResetType;
```
**Brief**:
This type specifies the identification (ID) for a RAW reset status returned by Mcu_GetResetRawValue.
### typedef Mcu_ModeType
```
typedef uint8 Mcu_ModeType;
```
**Brief**:
This type specifies the identification (ID) for a MCU low power mode used in Mcu_SetMode.
### typedef Mcu_RamSectionType
```
typedef uint8 Mcu_RamSectionType;
```
**Brief**:
This type specifies the identification (ID) for a RAM section used in Mcu_InitRamSection.
### typedef Mcu_RamConfigPtrType
```
typedef const Mcu_RamSectionConfigType* Mcu_RamConfigPtrType;
```
### typedef Mcu_PeripheralClkRegConfigPtrType
```
typedef const Mcu_PeripheralClkRegConfigType* Mcu_PeripheralClkRegConfigPtrType;
```
### typedef Mcu_PeripheralResetRegConfigPtrType
```
typedef const Mcu_PeripheralResetRegConfigType* Mcu_PeripheralResetRegConfigPtrType;
```
### typedef Mcu_MCanClkConfigPtrType
```
typedef const Mcu_MCanClkConfigType* Mcu_MCanClkConfigPtrType;
```
### typedef Mcu_LinClkConfigPtrType
```
typedef const Mcu_LinClkConfigType* Mcu_LinClkConfigPtrType;
```
### typedef Mcu_ClockConfigPtrType
```
typedef const Mcu_ClockConfigType* Mcu_ClockConfigPtrType;
```
### typedef Mcu_ModeConfigPtrType
```
typedef const Mcu_ModeConfigType* Mcu_ModeConfigPtrType;
```
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Mcu_ConfigType](../Classes/structMcu__ConfigType.md)** | MCU CONFIG ROOT structure. |
| **[Mcu_RamSectionConfigType](../Classes/structMcu__RamSectionConfigType.md)** | Structure for data pre-setting to be initialized. |
| **[Mcu_LinClkConfigType](../Classes/structMcu__LinClkConfigType.md)** | Structure for LIN clock register setting. |
| **[Mcu_EthercatClkConfigType](../Classes/structMcu__EthercatClkConfigType.md)** | Structure for EtherCat clock setting. |
| **[Mcu_MCanClkConfigType](../Classes/structMcu__MCanClkConfigType.md)** | Structure for MCAN clock register setting. |
| **[Mcu_CpuTimerClkConfigType](../Classes/structMcu__CpuTimerClkConfigType.md)** | Structure for Cpu Timer clock register setting. |
| **[Mcu_ExternalClkOutConfigType](../Classes/structMcu__ExternalClkOutConfigType.md)** | Structure for External Clock Output setting. |
| **[Mcu_PeripheralClkRegConfigType](../Classes/structMcu__PeripheralClkRegConfigType.md)** | Structure for peripheral clock register setting. |
| **[Mcu_PeripheralResetRegConfigType](../Classes/structMcu__PeripheralResetRegConfigType.md)** | Structure for peripheral Reset register setting. |
| **[Mcu_ClockConfigType](../Classes/structMcu__ClockConfigType.md)** | Structure for device clock setting. |
| **[Mcu_ModeConfigType](../Classes/structMcu__ModeConfigType.md)** | Structure for Mcu low power mode configuration type. |
| **[Mcu_PeripheralRegEntryType](../Classes/structMcu__PeripheralRegEntryType.md)** | Single peripheral configuration register entry. |
| **[Mcu_PeripheralConfigType](../Classes/structMcu__PeripheralConfigType.md)** | Peripheral configuration type containing register entries. |
## Defines
| Name | Brief |
| -------------- | ---------- |
| MCU_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| MCU_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| MCU_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| MCU_AR_RELEASE_MAJOR_VERSION | AUTOSAR Major version specification implemented by MCU Driver. |
| MCU_AR_RELEASE_MINOR_VERSION | AUTOSAR Minor version specification implemented by MCU Driver. |
| MCU_AR_RELEASE_REVISION_VERSION | AUTOSAR Patch version specification implemented by MCU Driver. |
| MCU_VENDOR_ID | Texas Instruments Vendor ID. |
| MCU_MODULE_ID | MCU Driver Module ID. |
| MCU_INSTANCE_ID | MCU Instance ID. |
| MCU_SID_INIT | Service ID for Mcu_Init. |
| MCU_SID_INIT_RAMSECTION | Service ID for Mcu_InitRamSection. |
| MCU_SID_INIT_CLOCK | Service ID for Mcu_InitClock. |
| MCU_SID_DISTRIBUTE_PLL_CLOCK | Service ID for Mcu_DistributePllClock. |
| MCU_SID_GET_PLL_STATUS | Service ID for Mcu_GetPllStatus. |
| MCU_SID_GET_RESET_REASON | Service ID for Mcu_GetResetReason. |
| MCU_SID_GET_RESET_RAW_VALUE | Service ID for Mcu_GetResetRawValue. |
| MCU_SID_PERFORM_RESET | Service ID for Mcu_PerformReset. |
| MCU_SID_SET_MODE | Service ID for Mcu_SetMode. |
| MCU_SID_GET_VERSION_INFO | Service ID for Mcu_GetVersionInfo. |
| MCU_SID_GET_RAM_STATE | Service ID for Mcu_GetRamState. |
| MCU_SID_GET_SYS_CLOCK | Service ID for Mcu_GetSystemClock. |
| MCU_E_PARAM_CONFIG | Mcu_Init config param invalid. |
| MCU_E_PARAM_CLOCK | Mcu_InitClock clockid param invalid. |
| MCU_E_PARAM_MODE | Mcu_SetMode modeid param invalid. |
| MCU_E_PARAM_RAMSECTION | Mcu_InitRamSection ramSect param invalid. |
| MCU_E_PLL_NOT_LOCKED | PLL not locked. |
| MCU_E_UNINIT | API invoked without performing Mcu_Init. |
| MCU_E_PARAM_POINTER | NULL_PTR passed to MCU driver APIs. |
| MCU_E_INIT_FAILED | Mcu Initialization failed. |
| MCU_E_UNINIT_CLOCK | API invoked without performing Mcu_InitClock. |
| MCU_ERRORRST_MASK | Define indicating invalid raw reset value. |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Mcu_GetVersionInfo](../Modules/group__MCU.md#function-mcu_getversioninfo)**(Std_VersionInfoType * versioninfo)| This service provides the version information of MCU module. |
| void | **[Mcu_Init](../Modules/group__MCU.md#function-mcu_init)**(const [Mcu_ConfigType](../Classes/structMcu__ConfigType.md) * CfgPtr)| This service initializes the MCU driver. |
| Std_ReturnType | **[Mcu_InitRamSection](../Modules/group__MCU.md#function-mcu_initramsection)**([Mcu_RamSectionType](../Modules/group__MCU.md#typedef-mcu_ramsectiontype) RamSection)| This service initializes the RAM section wise with default values supplied in configuration set. |
| Std_ReturnType | **[Mcu_InitClock](../Modules/group__MCU.md#function-mcu_initclock)**([Mcu_ClockType](../Modules/group__MCU.md#typedef-mcu_clocktype) ClockSetting)| This service initializes the PLL and other MCU specific clock options. |
| [Mcu_PllStatusType](../Modules/group__MCU.md#enum-mcu_pllstatustype) | **[Mcu_GetPllStatus](../Modules/group__MCU.md#function-mcu_getpllstatus)**(void )| This service provides the lock status of the PLL. |
| uint32 | **[Mcu_GetSystemClock](../Modules/group__MCU.md#function-mcu_getsystemclock)**(void )| This service provides the system clock. |
| [Mcu_ResetType](../Modules/group__MCU.md#enum-mcu_resettype) | **[Mcu_GetResetReason](../Modules/group__MCU.md#function-mcu_getresetreason)**(void )| The service reads the reset reason from the hardware. |
| [Mcu_RawResetType](../Modules/group__MCU.md#typedef-mcu_rawresettype) | **[Mcu_GetResetRawValue](../Modules/group__MCU.md#function-mcu_getresetrawvalue)**(void )| The service reads the raw reset value from the hardware register. |
| void | **[Mcu_PerformReset](../Modules/group__MCU.md#function-mcu_performreset)**(void )| The service performs a microcontroller reset. |
| void | **[Mcu_SetMode](../Modules/group__MCU.md#function-mcu_setmode)**([Mcu_ModeType](../Modules/group__MCU.md#typedef-mcu_modetype) McuMode)| The service activates low power modes. |
| [Mcu_RamStateType](../Modules/group__MCU.md#enum-mcu_ramstatetype) | **[Mcu_GetRamState](../Modules/group__MCU.md#function-mcu_getramstate)**(void )| This service provides the actual status of the microcontroller Ram. |
### function Mcu_GetVersionInfo
```
void Mcu_GetVersionInfo(
Std_VersionInfoType * versioninfo
)
```
**Brief**:
This service provides the version information of MCU module.
**Parameters**:
* **versioninfo** - Pointer to MCU driver version information.
**Returns**:
* **None**
**Return**: None
**Precondition**: This API is available only if MCU_CFG_GET_VERSION_INFO_API is STD_ON
**Postcondition**: None
### function Mcu_Init
```
void Mcu_Init(
const Mcu_ConfigType * CfgPtr
)
```
**Brief**:
This service initializes the MCU driver.
This API is used to configure MCU settings for PLL and clock. This API is used to configure RAM section settings and Power mode settings.
**Parameters**:
* **CfgPtr** - Pointer to MCU driver configuration set.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Mcu_InitRamSection
```
Std_ReturnType Mcu_InitRamSection(
Mcu_RamSectionType RamSection
)
```
**Brief**:
This service initializes the RAM section wise with default values supplied in configuration set.
This service initializes the RAM section wise.
**Parameters**:
* **RamSection** Selects RAM memory section provided in configuration set
**Returns**:
* **E_OK** command has been accepted
* **E_NOT_OK** command has not been accepted
**Return**: Std_ReturnType
**Precondition**: None
**Postcondition**: None
### function Mcu_InitClock
```
Std_ReturnType Mcu_InitClock(
Mcu_ClockType ClockSetting
)
```
**Brief**:
This service initializes the PLL and other MCU specific clock options.
This API is used to initializate clock & PLL This API is used to Set CPU timer clock, XCLKOUT, Ethercat clock, Peripheral clocks, MCAN module clocks
**Parameters**:
* **ClockSetting** Selects clock section details provided in configuration set
**Returns**:
* **E_OK** command has been accepted.
* **E_NOT_OK** command has not been accepted
**Return**: Std_ReturnType
**Precondition**: This API is available only if MCU_CFG_INIT_CLOCK_API is STD_ON
**Postcondition**: None
### function Mcu_GetPllStatus
```
Mcu_PllStatusType Mcu_GetPllStatus(
void
)
```
**Brief**:
This service provides the lock status of the PLL.
**Returns**:
* **MCU_PLL_LOCKED** PLL is in locked state. MCU_PLL_UNLOCKED: PLL is in unlocked state. MCU_PLL_STATUS_UNDEFINED: Pre-compile McuNoPll is set to true.
**Return**: Mcu_PllStatusType - PLL Status
**Precondition**: None
**Postcondition**: None
### function Mcu_GetSystemClock
```
uint32 Mcu_GetSystemClock(
void
)
```
**Brief**:
This service provides the system clock.
**Returns**:
* **PllSysclk**
**Return**: Mcu_SysClk - System clock
**Precondition**: None
**Postcondition**: None
### function Mcu_GetResetReason
```
Mcu_ResetType Mcu_GetResetReason(
void
)
```
**Brief**:
The service reads the reset reason from the hardware.
This API reads the reset value from hardware and returns from the list of reset types defined in Mcu_ResetType.
**Returns**:
* **MCU_POWER_ON_RESET** Power On reset
* **MCU_EXTERNAL_RESET** External reset
* **MCU_ESM_NMI_WATCHDOG_RESET** NMI Watchdog reset
* **MCU_WATCHDOG_RESET** Watchdog reset
* **MCU_SW_RESET** Simulation of external reset
* **MCU_ESM_RESET** ESM reset
* **MCU_RESET_UNDEFINED** UNDEFINED reset
**Return**: Mcu_ResetType - Reset Type
**Precondition**: None
**Postcondition**: None
### function Mcu_GetResetRawValue
```
Mcu_RawResetType Mcu_GetResetRawValue(
void
)
```
**Brief**:
The service reads the raw reset value from the hardware register.
This API reads the reset value from hardware and returns it.
**Returns**:
* **Reset** raw value
**Return**: Mcu_RawResetType - Reset raw value
**Precondition**: None
**Postcondition**: None
### function Mcu_PerformReset
```
void Mcu_PerformReset(
void
)
```
**Brief**:
The service performs a microcontroller reset.
This API perform simulation of external reset only
**Returns**:
* **None**
**Return**: None
**Precondition**: This API is available only if MCU_CFG_PERFORM_RESET_API is STD_ON
**Postcondition**: None
### function Mcu_SetMode
```
void Mcu_SetMode(
Mcu_ModeType McuMode
)
```
**Brief**:
The service activates low power modes.
This API is used to activate the low power modes IDLE & STANDBY
**Parameters**:
* **McuMode** - ID to select one MCU mode setting from the list provided in configuration set
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Mcu_GetRamState
```
Mcu_RamStateType Mcu_GetRamState(
void
)
```
**Brief**:
This service provides the actual status of the microcontroller Ram.
This API is not checking actual RAM status. So no actions are performed and returns RAM VALID
**Returns**:
* **MCU_RAMSTATE_INVALID** Invalid Ram status
* **MCU_RAMSTATE_VALID** Valid Ram status
**Return**: Mcu_RamStateType - Ram State Type
**Precondition**: This API is available only if MCU_CFG_GET_RAM_STATE_API is STD_ON
**Postcondition**: None
---
title: Port API GUIDE Header file
---
# PORT
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Port_PinDirectionType](../Modules/group__PORT.md#enum-port_pindirectiontype)** | Enum of Port Direction. |
|enum| **[Port_PinLevelValueType](../Modules/group__PORT.md#enum-port_pinlevelvaluetype)** | Enum of Port Pin Level. |
|enum| **[Port_PinPadConfigType](../Modules/group__PORT.md#enum-port_pinpadconfigtype)** | Enum of Port Pin Pad, Up/Down Type selection. |
|enum| **[Port_PinQualificationMode](../Modules/group__PORT.md#enum-port_pinqualificationmode)** | Values that can be passed to set qualification parameter to initialize MCU module. |
|enum| **[Port_PinCoreSelect](../Modules/group__PORT.md#enum-port_pincoreselect)** | Values that can be passed to select master core for MCU module. |
|enum| **[Port_AnalogModeType](../Modules/group__PORT.md#enum-port_analogmodetype)** | Values that can be passed to set the mode in which Pin should operate. |
|typedef uint32 | **[Port_PinType](../Modules/group__PORT.md#typedef-port_pintype)** | Type for symbolic name of Port pins. |
|typedef uint32 | **[Port_PinModeType](../Modules/group__PORT.md#typedef-port_pinmodetype)** | Pin Mode type structure. |
|typedef uint8 | **[Port_PinConfigFlagType](../Modules/group__PORT.md#typedef-port_pinconfigflagtype)** | Type for Pin Config Flag. Pin config flags Bit 0 - Is Pin configurable? Bit 1 - Does Pin support Analog Mode? Bit 2 - Does Pin operate in AGPIO mode? Bit 3 - Does Pin operate in AIO mode? Bit 4 - Does Pin operate in GPIO mode? |
### enum Port_PinDirectionType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| PORT_PIN_IN | | Direction IN. |
| PORT_PIN_OUT | | Direction OUT. |
| PORT_PIN_NA | | NA Direction. |
**Brief**:
Enum of Port Direction.
### enum Port_PinLevelValueType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| PORT_PIN_LEVEL_HIGH | | Pin Level HIGH. |
| PORT_PIN_LEVEL_LOW | | Pin Level LOW. |
| PORT_PIN_LEVEL_NA | | Pin Level NA. |
**Brief**:
Enum of Port Pin Level.
### enum Port_PinPadConfigType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| PORT_PIN_TYPE_STD | 1U| Standard pad configuration with pull up disable. |
| PORT_PIN_TYPE_PULLUP | 2U| Enable pull up for the pin. |
| PORT_PIN_TYPE_STD_PULLUP | 3U| Standard pad configuration with pull up enable. |
| PORT_PIN_TYPE_OPEN_DRAIN | 4U| Open Drain pad configuration with pull up disable. |
| PORT_PIN_TYPE_OPEN_DRAIN_PULLUP | 6U| Open Drain pad configuration with pull up enable. |
| PORT_PIN_TYPE_NA | 255U| No pad configuration. |
**Brief**:
Enum of Port Pin Pad, Up/Down Type selection.
### enum Port_PinQualificationMode
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| PORT_QUAL_SYNC | | Synchronization to SYSCLKOUT. |
| PORT_QUAL_3SAMPLE | | Qualified with 3 samples. |
| PORT_QUAL_6SAMPLE | | Qualified with 6 samples. |
| PORT_QUAL_ASYNC | | No synchronization. |
| PORT_QUAL_NA | | Invalid synchronization. |
**Brief**:
Values that can be passed to set qualification parameter to initialize MCU module.
### enum Port_PinCoreSelect
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| PORT_CORE_CPU1 | | CPU1 selected as master core. |
| PORT_CORE_CPU2 | | CPU2 selected as master core. |
| PORT_CORE_CPU3 | | CPU3 selected as master core. |
**Brief**:
Values that can be passed to select master core for MCU module.
### enum Port_AnalogModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| PORT_ANALOG_DISABLED | | Pin is in digital mode. |
| PORT_ANALOG_ENABLED | | Pin is in analog mode. |
**Brief**:
Values that can be passed to set the mode in which Pin should operate.
### typedef Port_PinType
```
typedef uint32 Port_PinType;
```
**Brief**:
Type for symbolic name of Port pins.
### typedef Port_PinModeType
```
typedef uint32 Port_PinModeType;
```
**Brief**:
Pin Mode type structure.
### typedef Port_PinConfigFlagType
```
typedef uint8 Port_PinConfigFlagType;
```
**Brief**:
Type for Pin Config Flag. Pin config flags Bit 0 - Is Pin configurable? Bit 1 - Does Pin support Analog Mode? Bit 2 - Does Pin operate in AGPIO mode? Bit 3 - Does Pin operate in AIO mode? Bit 4 - Does Pin operate in GPIO mode?
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Port_PinModeConfigType](../Classes/structPort__PinModeConfigType.md)** | Pin Mux Mode Config type structure. |
| **[Port_PinConfigType](../Classes/structPort__PinConfigType.md)** | Pin Configuration structure. |
| **[Port_ConfigType](../Classes/structPort__ConfigType.md)** | PORT Module ROOT configuration. |
| **[Port_ControllerSpecificType](../Classes/structPort__ControllerSpecificType.md)** | Controller Specific structure. |
## Defines
| Name | Brief |
| -------------- | ---------- |
| PORT_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| PORT_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| PORT_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| PORT_AR_RELEASE_MAJOR_VERSION | AUTOSAR Major version specification implemented by PORT Driver. |
| PORT_AR_RELEASE_MINOR_VERSION | AUTOSAR Minor version specification implemented by PORT Driver. |
| PORT_AR_RELEASE_REVISION_VERSION | AUTOSAR Patch version specification implemented by PORT Driver. |
| PORT_VENDOR_ID | Texas Instruments Vendor ID. |
| PORT_MODULE_ID | PORT Driver Module ID. |
| PORT_INSTANCE_ID | PORT Driver Instance ID. |
| PORT_E_PARAM_PIN | Invalid Port Pin ID requested. |
| PORT_E_DIRECTION_UNCHANGEABLE | Port Pin not configured as changeable. |
| PORT_E_INIT_FAILED | API Port_Init service called with wrong parameter. |
| PORT_E_PARAM_INVALID_MODE | API Port_SetPinMode service called when mode is unchangeable. |
| PORT_E_MODE_UNCHANGEABLE | API Port_SetPinMode service called when mode is unchangeable. |
| PORT_E_UNINIT | API service called without module initialization. |
| PORT_E_PARAM_POINTER | APIs called with a Null pointer. |
| PORT_SID_INIT | Service ID - Port_Init(). |
| PORT_SID_SET_PIN_DIR | Service ID - Port_SetPinDirection(). |
| PORT_SID_REFRESH_PORT_DIR | Service ID - Port_RefreshPortDirection() |
| PORT_SID_GET_VERSION_INFO | Service ID - Port_GetVersionInfo(). |
| PORT_SID_SET_PIN_MODE | Service ID - Port_SetPinMode(). |
| PORT_SID_COMMIT_CONFIGURATION | Service ID - Port_CommitConfiguration(). |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Port_Init](../Modules/group__PORT.md#function-port_init)**(const [Port_ConfigType](../Classes/structPort__ConfigType.md) * CfgPtr)| Initializes the Port Driver module. |
| void | **[Port_SetPinDirection](../Modules/group__PORT.md#function-port_setpindirection)**([Port_PinType](../Modules/group__PORT.md#typedef-port_pintype) Pin, [Port_PinDirectionType](../Modules/group__PORT.md#enum-port_pindirectiontype) Direction)| Sets the port pin direction. |
| void | **[Port_RefreshPortDirection](../Modules/group__PORT.md#function-port_refreshportdirection)**(void )| Refreshes port direction. |
| void | **[Port_GetVersionInfo](../Modules/group__PORT.md#function-port_getversioninfo)**(Std_VersionInfoType * versioninfo)| Service to get the version information of the module. |
| void | **[Port_SetPinMode](../Modules/group__PORT.md#function-port_setpinmode)**([Port_PinType](../Modules/group__PORT.md#typedef-port_pintype) Pin, [Port_PinModeType](../Modules/group__PORT.md#typedef-port_pinmodetype) Mode)| Sets the port pin mode. |
| void | **[Port_CommitConfiguration](../Modules/group__PORT.md#function-port_commitconfiguration)**(void )| Commits the locked Critical Configuration registers for the current Configuration. |
### function Port_Init
```
void Port_Init(
const Port_ConfigType * CfgPtr
)
```
**Brief**:
Initializes the Port Driver module.
This function is called by user to initialize the Port pins of the microcontroller
**Parameters**:
* **CfgPtr** is the configuration pointer for Port module.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Port_SetPinDirection
```
void Port_SetPinDirection(
Port_PinType Pin,
Port_PinDirectionType Direction
)
```
**Brief**:
Sets the port pin direction.
This function is used to change the direction of the pin during runtime.
**Parameters**:
* **Pin** is the symbolic name of the pin.
* **Direction** is the direction to which pin is to be set.
**Returns**:
* **None**
**Return**: None
**Precondition**: Port_Init should be called before calling this function
**Postcondition**: None
### function Port_RefreshPortDirection
```
void Port_RefreshPortDirection(
void
)
```
**Brief**:
Refreshes port direction.
This function refreshes the Port pins to their initial direction. Pins whose direction can be changed during runtime are excluded from this action.
**Returns**:
* **None**
**Return**: None
**Precondition**: Port_Init should be called before calling this function
**Postcondition**: None
### function Port_GetVersionInfo
```
void Port_GetVersionInfo(
Std_VersionInfoType * versioninfo
)
```
**Brief**:
Service to get the version information of the module.
This service writes the version information of this module into the data structure referenced by the parameter. If this parameter references NULL_PTR, a development error is reported to Det. This service is only available if the pre-compile configuration parameter PORT_CFG_GET_VERSION_INFO_API is enabled.
**Parameters**:
* **versioninfo** structure that contains the version information parameters.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Port_SetPinMode
```
void Port_SetPinMode(
Port_PinType Pin,
Port_PinModeType Mode
)
```
**Brief**:
Sets the port pin mode.
This function is used to change the Mode of the pin during runtime.
**Parameters**:
* **Pin** is the symbolic name of the pin.
* **Mode** is desired functionality of the Pin e.g. PORT_PIN_MODE_ADC, PORT_PIN_MODE_DIO etc.
**Returns**:
* **None**
**Return**: None
**Precondition**: Port_Init should be called before calling this function
**Postcondition**: None
### function Port_CommitConfiguration
```
void Port_CommitConfiguration(
void
)
```
**Brief**:
Commits the locked Critical Configuration registers for the current Configuration.
This function Commits the locked Critical Configuration registers for the current Configuration
**Returns**:
* **None**
**Return**: None
**Precondition**: Port_Init should be called before calling this function
**Postcondition**: None
---
title: Spi API GUIDE Header file
---
# SPI
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Spi_HwInstance](../Modules/group__SPI.md#enum-spi_hwinstance)** | This type defines Channel Select Interface with in SPI(SPI instance) |
|enum| **[Spi_StatusType](../Modules/group__SPI.md#enum-spi_statustype)** | This type defines a range of specific Driver status for SPI Handler/Driver. |
|enum| **[Spi_JobResultType](../Modules/group__SPI.md#enum-spi_jobresulttype)** | This type defines a range of specific Jobs status for SPI Handler/Driver. |
|enum| **[Spi_SeqResultType](../Modules/group__SPI.md#enum-spi_seqresulttype)** | This type defines a range of specific Sequences status for SPI Handler/Driver. |
|enum| **[Spi_HwUnitResultType](../Modules/group__SPI.md#enum-spi_hwunitresulttype)** | This type defines a range of specific HW unit status for SPI Handler/Driver. |
|enum| **[Spi_AsyncModeType](../Modules/group__SPI.md#enum-spi_asyncmodetype)** | Specifies the asynchronous mechanism mode for SPI busses handled asynchronously in LEVEL 2. |
|enum| **[Spi_TransferType](../Modules/group__SPI.md#enum-spi_transfertype)** | Word transfer order - MSB first or LSB first. |
|enum| **[Spi_CsSelection](../Modules/group__SPI.md#enum-spi_csselection)** | Spi Cs Selection - Chip select handling. |
|enum| **[Spi_ClkMode](../Modules/group__SPI.md#enum-spi_clkmode)** | SPI Clock Mode - sets the clock polarity and phase. Note: These values are a direct register mapping. So don't change value. |
|enum| **[Spi_JobPriorityType](../Modules/group__SPI.md#enum-spi_jobprioritytype)** | SPI Job Priority. |
|typedef uint8 | **[Spi_DataBufferType](../Modules/group__SPI.md#typedef-spi_databuffertype)** | Type of application data buffer elements. |
|typedef uint32 | **[Spi_CsGpioType](../Modules/group__SPI.md#typedef-spi_csgpiotype)** | GPIO ID type. |
|typedef uint32 | **[Spi_RegisterPtrType](../Modules/group__SPI.md#typedef-spi_registerptrtype)** | type for the register pointer |
|typedef uint16 | **[Spi_NumberOfDataType](../Modules/group__SPI.md#typedef-spi_numberofdatatype)** | Type for defining the number of data elements of the type Spi_DataBufferType to send and / or receive by Channel. |
|typedef uint8 | **[Spi_ChannelType](../Modules/group__SPI.md#typedef-spi_channeltype)** | Specifies the identification (ID) for a Channel. |
|typedef uint16 | **[Spi_JobType](../Modules/group__SPI.md#typedef-spi_jobtype)** | Specifies the identification (ID) for a Job. |
|typedef void(*)(void) | **[Spi_JobEndNotifyType](../Modules/group__SPI.md#typedef-spi_jobendnotifytype)** | Typedef for job end notification function pointer. |
|typedef void(*)(void) | **[Spi_SeqEndNotifyType](../Modules/group__SPI.md#typedef-spi_seqendnotifytype)** | Typedef for sequence end notification function pointer. |
|typedef uint8 | **[Spi_SequenceType](../Modules/group__SPI.md#typedef-spi_sequencetype)** | Specifies the identification (ID) for a sequence of jobs. |
|typedef uint8 | **[Spi_HWUnitType](../Modules/group__SPI.md#typedef-spi_hwunittype)** | Specifies the identification (ID) for a SPI Hardware micro controller peripheral (unit) |
|typedef uint8 | **[Spi_DataDelayType](../Modules/group__SPI.md#typedef-spi_datadelaytype)** | Spi_DataDelayType defines the number of SPI serial clock cycles delay between each word in FIFO mode. |
### enum Spi_HwInstance
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| SPI_UNIT_SPIA | | SPIA instance. |
| SPI_UNIT_SPIB | | SPIB instance. |
| SPI_UNIT_SPIC | | SPIC instance. |
| SPI_UNIT_SPID | | SPID instance. |
| SPI_UNIT_SPIE | | SPIE instance. |
**Brief**:
This type defines Channel Select Interface with in SPI(SPI instance)
### enum Spi_StatusType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| SPI_UNINIT | 0U| The SPI Handler/Driver is not initialized or not usable. |
| SPI_IDLE | 1U| The SPI Handler/Driver is not currently transmitting any Job. |
| SPI_BUSY | 2U| The SPI Handler/Driver is performing a SPI Job (transmit) |
**Brief**:
This type defines a range of specific Driver status for SPI Handler/Driver.
### enum Spi_JobResultType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| SPI_JOB_OK | 0U| The last transmission of the Job has been finished successfully. |
| SPI_JOB_PENDING | 1U| The SPI Handler/Driver is performing a SPI Job. The meaning of this status is equal to SPI_BUSY. |
| SPI_JOB_FAILED | 2U| The last transmission of the Job has failed. |
| SPI_JOB_QUEUED | 3U| An asynchronous transmit Job has been accepted, while actual transmission for this Job has not started yet. |
**Brief**:
This type defines a range of specific Jobs status for SPI Handler/Driver.
### enum Spi_SeqResultType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| SPI_SEQ_OK | 0U| The last transmission of the Sequence has been finished successfully. |
| SPI_SEQ_PENDING | 1U| The SPI Handler/Driver is performing a SPI Sequence. The meaning of this status is equal to SPI_BUSY. |
| SPI_SEQ_FAILED | 2U| The last transmission of the Sequence has failed. |
| SPI_SEQ_CANCELLED | 3U| The last transmission of the Sequence has been canceled by user. |
**Brief**:
This type defines a range of specific Sequences status for SPI Handler/Driver.
### enum Spi_HwUnitResultType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| SPI_HW_UNIT_OK | 0U| HW unit result is ok. |
| SPI_HW_UNIT_PENDING | 1U| HW unit result is pending. |
| SPI_HW_UNIT_FAILED | 2U| HW unit result is failed. |
**Brief**:
This type defines a range of specific HW unit status for SPI Handler/Driver.
### enum Spi_AsyncModeType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| SPI_POLLING_MODE | 0U| The asynchronous mechanism is ensured by polling, so interrupts related to SPI busses handled asynchronously are disabled. |
| SPI_INTERRUPT_MODE | 1U| The asynchronous mechanism is ensured by interrupt, so interrupts related to SPI busses handled asynchronously are enabled. |
**Brief**:
Specifies the asynchronous mechanism mode for SPI busses handled asynchronously in LEVEL 2.
### enum Spi_TransferType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| SPI_MSB | 0U| MSB is transferred first. Only this is supported. |
| SPI_LSB | 1U| LSB is transferred first. This is not supported. |
**Brief**:
Word transfer order - MSB first or LSB first.
### enum Spi_CsSelection
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| CS_VIA_GPIO | | chip select is handled via general purpose IO by Spi driver |
| CS_VIA_PERIPHERAL_ENGINE | | chip select is handled automatically by Peripheral HW engine |
**Brief**:
Spi Cs Selection - Chip select handling.
### enum Spi_ClkMode
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| SPI_CLK_MODE_0 | 0x00U| SPI Clock Phase = 0 Polarity = 0. |
| SPI_CLK_MODE_1 | 0x01U| SPI Clock Phase = 1 Polarity = 0 |
| SPI_CLK_MODE_2 | 0x02U| SPI Clock Phase = 0 Polarity = 1 |
| SPI_CLK_MODE_3 | 0x03U| SPI Clock Phase = 1 Polarity = 1 |
**Brief**:
SPI Clock Mode - sets the clock polarity and phase. Note: These values are a direct register mapping. So don't change value.
### enum Spi_JobPriorityType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| SPI_JOB_PRIORITY_0 | | Job priority 0 - low. |
| SPI_JOB_PRIORITY_1 | | Job priority 1. |
| SPI_JOB_PRIORITY_2 | | Job priority 2. |
| SPI_JOB_PRIORITY_3 | | Job priority 3 - High. |
**Brief**:
SPI Job Priority.
### typedef Spi_DataBufferType
```
typedef uint8 Spi_DataBufferType;
```
**Brief**:
Type of application data buffer elements.
### typedef Spi_CsGpioType
```
typedef uint32 Spi_CsGpioType;
```
**Brief**:
GPIO ID type.
### typedef Spi_RegisterPtrType
```
typedef uint32 Spi_RegisterPtrType;
```
**Brief**:
type for the register pointer
### typedef Spi_NumberOfDataType
```
typedef uint16 Spi_NumberOfDataType;
```
**Brief**:
Type for defining the number of data elements of the type Spi_DataBufferType to send and / or receive by Channel.
### typedef Spi_ChannelType
```
typedef uint8 Spi_ChannelType;
```
**Brief**:
Specifies the identification (ID) for a Channel.
### typedef Spi_JobType
```
typedef uint16 Spi_JobType;
```
**Brief**:
Specifies the identification (ID) for a Job.
### typedef Spi_JobEndNotifyType
```
typedef void(* Spi_JobEndNotifyType) (void);
```
**Brief**:
Typedef for job end notification function pointer.
### typedef Spi_SeqEndNotifyType
```
typedef void(* Spi_SeqEndNotifyType) (void);
```
**Brief**:
Typedef for sequence end notification function pointer.
### typedef Spi_SequenceType
```
typedef uint8 Spi_SequenceType;
```
**Brief**:
Specifies the identification (ID) for a sequence of jobs.
### typedef Spi_HWUnitType
```
typedef uint8 Spi_HWUnitType;
```
**Brief**:
Specifies the identification (ID) for a SPI Hardware micro controller peripheral (unit)
### typedef Spi_DataDelayType
```
typedef uint8 Spi_DataDelayType;
```
**Brief**:
Spi_DataDelayType defines the number of SPI serial clock cycles delay between each word in FIFO mode.
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Spi_ChannelConfigType](../Classes/structSpi__ChannelConfigType.md)** | SPI Channel configuration structure. |
| **[Spi_ExternalDeviceConfigType](../Classes/structSpi__ExternalDeviceConfigType.md)** | SPI external device specific configuration structure . |
| **[Spi_JobConfigType](../Classes/structSpi__JobConfigType.md)** | SPI Job configuration structure. |
| **[Spi_SeqConfigType](../Classes/structSpi__SeqConfigType.md)** | SPI Sequence configuration structure. |
| **[Spi_HwUnitConfigType](../Classes/structSpi__HwUnitConfigType.md)** | SPI Hardware unit configuration structure. |
| **[Spi_ConfigType](../Classes/structSpi__ConfigType.md)** | SPI config structure. |
## Defines
| Name | Brief |
| -------------- | ---------- |
| SPI_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| SPI_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| SPI_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| SPI_AR_RELEASE_MAJOR_VERSION | AUTOSAR major version specification implemented by SPI Driver. |
| SPI_AR_RELEASE_MINOR_VERSION | AUTOSAR minor version specification implemented by SPI Driver. |
| SPI_AR_RELEASE_REVISION_VERSION | AUTOSAR patch version specification implemented by SPI Driver. |
| SPI_VENDOR_ID | Texas Instruments Vendor ID. |
| SPI_MODULE_ID | SPI Driver Module ID. |
| SPI_INSTANCE_ID | SPI Driver Instance ID. |
| SPI_IB | Buffer definitions IB - internal buffers. |
| SPI_EB | Buffer definitions EB - external buffers. Only this is supported. |
| SPI_IB_EB | Buffer definitions IB/EB - internal/external buffers. |
| SPI_E_PARAM_CHANNEL | SPI Error Codes. Error codes returned by SPI functions. |
| SPI_E_PARAM_JOB | API service called with wrong parameter. |
| SPI_E_PARAM_SEQ | API service called with wrong parameter. |
| SPI_E_PARAM_LENGTH | API service called with wrong parameter. |
| SPI_E_PARAM_UNIT | API service called with wrong parameter. |
| SPI_E_PARAM_POINTER | APIs called with a Null Pointer. |
| SPI_E_UNINIT | API service used without module initialization. |
| SPI_E_SEQ_PENDING | Services called in a wrong sequence. |
| SPI_E_SEQ_IN_PROCESS | Synchronous transmission service called at wrong time. |
| SPI_E_ALREADY_INITIALIZED | API Spi_Init service called while the SPI driver has already been initialized. |
| SPI_E_SEQ_TIMEOUT | sequence transmission failed with a timeout |
| SPI_SID_INIT | Spi_Init() API Service ID. |
| SPI_SID_DEINIT | Spi_DeInit() API Service ID. |
| SPI_SID_WRITE_IB | Spi_WriteIB() API Service ID. |
| SPI_SID_ASYNC_TRANSMIT | Spi_AsyncTransmit() API Service ID. |
| SPI_SID_READ_IB | Spi_ReadIB() API Service ID. |
| SPI_SID_SETUP_EB | Spi_SetupEB() API Service ID. |
| SPI_SID_GET_STATUS | Spi_GetStatus() API Service ID. |
| SPI_SID_GET_JOB_RESULT | Spi_GetJobResult() API Service ID. |
| SPI_SID_GET_SEQ_RESULT | Spi_GetSequenceResult() API Service ID. |
| SPI_SID_GET_VERSION_INFO | Spi_GetVersionInfo() API Service ID. |
| SPI_SID_SYNC_TRANSMIT | Spi_SyncTransmit() API Service ID. |
| SPI_SID_GET_HW_UNIT_STATUS | Spi_GetHWUnitStatus() API Service ID. |
| SPI_SID_CANCEL | Spi_Cancel() API Service ID. |
| SPI_SID_SET_ASYNC_MODE | Spi_SetAsyncMode() API Service ID. |
| SPI_SID_MAINFUNCTION_HANDLING | Spi_MainFunction_Handling() API Service ID. |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Spi_Init](../Modules/group__SPI.md#function-spi_init)**(const [Spi_ConfigType](../Classes/structSpi__ConfigType.md) * CfgPtr)| Service for SPI initialization. |
| Std_ReturnType | **[Spi_DeInit](../Modules/group__SPI.md#function-spi_deinit)**(void )| Service for SPI de-initialization. |
| [Spi_StatusType](../Modules/group__SPI.md#enum-spi_statustype) | **[Spi_GetStatus](../Modules/group__SPI.md#function-spi_getstatus)**(void )| Service returns the SPI Handler/Driver software module status. |
| [Spi_JobResultType](../Modules/group__SPI.md#enum-spi_jobresulttype) | **[Spi_GetJobResult](../Modules/group__SPI.md#function-spi_getjobresult)**([Spi_JobType](../Modules/group__SPI.md#typedef-spi_jobtype) Job)| Service returns the last transmission result of the specified Job. |
| [Spi_SeqResultType](../Modules/group__SPI.md#enum-spi_seqresulttype) | **[Spi_GetSequenceResult](../Modules/group__SPI.md#function-spi_getsequenceresult)**([Spi_SequenceType](../Modules/group__SPI.md#typedef-spi_sequencetype) Sequence)| Service returns the last transmission result of the specified Sequence. |
| void | **[Spi_GetVersionInfo](../Modules/group__SPI.md#function-spi_getversioninfo)**(Std_VersionInfoType * versioninfo)| Service to get the version information of the module. |
| [Spi_StatusType](../Modules/group__SPI.md#enum-spi_statustype) | **[Spi_GetHWUnitStatus](../Modules/group__SPI.md#function-spi_gethwunitstatus)**([Spi_HWUnitType](../Modules/group__SPI.md#typedef-spi_hwunittype) HWUnit)| Service to get the status of the SPI hardware unit. |
| Std_ReturnType | **[Spi_WriteIB](../Modules/group__SPI.md#function-spi_writeib)**([Spi_ChannelType](../Modules/group__SPI.md#typedef-spi_channeltype) Channel, const [Spi_DataBufferType](../Modules/group__SPI.md#typedef-spi_databuffertype) * DataBufferPtr)| Service for writing one or more data to an IB SPI Handler/Driver Channel specified by parameter. |
| Std_ReturnType | **[Spi_ReadIB](../Modules/group__SPI.md#function-spi_readib)**([Spi_ChannelType](../Modules/group__SPI.md#typedef-spi_channeltype) Channel, [Spi_DataBufferType](../Modules/group__SPI.md#typedef-spi_databuffertype) * DataBufferPointer)| Service for reading data from internal buffers. |
| Std_ReturnType | **[Spi_SetupEB](../Modules/group__SPI.md#function-spi_setupeb)**([Spi_ChannelType](../Modules/group__SPI.md#typedef-spi_channeltype) Channel, const [Spi_DataBufferType](../Modules/group__SPI.md#typedef-spi_databuffertype) * SrcDataBufferPtr, [Spi_DataBufferType](../Modules/group__SPI.md#typedef-spi_databuffertype) * DesDataBufferPtr, [Spi_NumberOfDataType](../Modules/group__SPI.md#typedef-spi_numberofdatatype) Length)| Service to setup external buffer channels. |
| Std_ReturnType | **[Spi_AsyncTransmit](../Modules/group__SPI.md#function-spi_asynctransmit)**([Spi_SequenceType](../Modules/group__SPI.md#typedef-spi_sequencetype) Sequence)| Service to transmit data on the SPI bus. |
| void | **[Spi_Cancel](../Modules/group__SPI.md#function-spi_cancel)**([Spi_SequenceType](../Modules/group__SPI.md#typedef-spi_sequencetype) Sequence)| Service to cancel on going sequence. |
| Std_ReturnType | **[Spi_SyncTransmit](../Modules/group__SPI.md#function-spi_synctransmit)**([Spi_SequenceType](../Modules/group__SPI.md#typedef-spi_sequencetype) Sequence)| Service to transmit data on the SPI bus. |
| Std_ReturnType | **[Spi_SetAsyncMode](../Modules/group__SPI.md#function-spi_setasyncmode)**([Spi_AsyncModeType](../Modules/group__SPI.md#enum-spi_asyncmodetype) Mode)| Service to set the asynchronous mechanism mode for SPI busses handled asynchronously. |
| void | **[Spi_MainFunction_Handling](../Modules/group__SPI.md#function-spi_mainfunction_handling)**(void )| Spi_MainFunction_Handling: This function shall polls the SPI interrupts linked to HW Units. |
### function Spi_Init
```
void Spi_Init(
const Spi_ConfigType * CfgPtr
)
```
**Brief**:
Service for SPI initialization.
This service initializes all the configured Spi channels, jobs, sequences and SPI instances This will set the state of SPI driver to Initialized.
**Parameters**:
* **CfgPtr** - Pointer to configuration set
**Returns**:
* **None**
**Return**: None
**Precondition**: CfgPtr shall be null in Pre-Compile variant, Link-Time variant and shall not be NULL in Post-Build variant
**Postcondition**: None
### function Spi_DeInit
```
Std_ReturnType Spi_DeInit(
void
)
```
**Brief**:
Service for SPI de-initialization.
This service de-initializes all the configured Spi channels, jobs, sequences and SPI instances This will set the state of SPI driver to Un-Initialized.
**Returns**:
* **E_OK** de-initialisation command has been accepted
* **E_NOT_OK** de-initialisation command has not been accepted
**Return**: returns whether the de-init command is accepted or not.
**Precondition**: None
**Postcondition**: None
### function Spi_GetStatus
```
Spi_StatusType Spi_GetStatus(
void
)
```
**Brief**:
Service returns the SPI Handler/Driver software module status.
Service returns the SPI Handler/Driver software module status.
**Returns**:
* **SPI_UNINIT** The SPI Handler/Driver is not initialized or not usable
* **SPI_IDLE** : The SPI Handler/Driver is not currently transmitting any Job
* **SPI_BUSY** : The SPI Handler/Driver is performing a SPI Job (transmit)
**Return**: returns SPI driver status
**Precondition**: None
**Postcondition**: None
### function Spi_GetJobResult
```
Spi_JobResultType Spi_GetJobResult(
Spi_JobType Job
)
```
**Brief**:
Service returns the last transmission result of the specified Job.
Service is to get the result of a specified job(queued, pending, failed, success)
**Parameters**:
* **Job** job Id
**Returns**:
* **SPI_JOB_OK** The last transmission of the Job has been finished successfully
* **SPI_JOB_PENDING** The SPI Handler/Driver is performing a SPI Job.
* **SPI_JOB_FAILED** The last transmission of the Job has failed
* **SPI_JOB_QUEUED** An asynchronous transmit Job has been accepted, while actual transmission for this Job has not started yet
**Return**: returns the status of a job
**Precondition**: None
**Postcondition**: None
### function Spi_GetSequenceResult
```
Spi_SeqResultType Spi_GetSequenceResult(
Spi_SequenceType Sequence
)
```
**Brief**:
Service returns the last transmission result of the specified Sequence.
Service is to return the status of a specified sequence(cancelled, pending, failed, success).
**Parameters**:
* **Sequence** sequence ID
**Returns**:
* **SPI_SEQ_OK** The last transmission of the Sequence has been finished successfully
* **SPI_SEQ_PENDING** The SPI Handler/Driver is performing a SPI Sequence. The meaning of this status is equal to SPI_BUSY
* **SPI_SEQ_FAILED** The last transmission of the Sequence has failed
* **SPI_SEQ_CANCELLED** The last transmission of the Sequence has been canceled by user
**Return**: returns the status of a sequence
**Precondition**: None
**Postcondition**: None
### function Spi_GetVersionInfo
```
void Spi_GetVersionInfo(
Std_VersionInfoType * versioninfo
)
```
**Brief**:
Service to get the version information of the module.
This service writes the version information of this module into the data structure referenced by the parameter. If this parameter references NULL_PTR, a development error is reported to Det. This service is only available if the pre-compile configuration parameter SPI_VERSION_INFO_API is enabled.
**Parameters**:
* **versioninfo** structure that contains the version information parameters.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Spi_GetHWUnitStatus
```
Spi_StatusType Spi_GetHWUnitStatus(
Spi_HWUnitType HWUnit
)
```
**Brief**:
Service to get the status of the SPI hardware unit.
This service returns the status of the specified SPI Hardware micro-controller peripheral.
**Parameters**:
* **HWUnit** SPI Hardware micro-controller peripheral (unit) ID.
**Returns**:
* **SPI_UNINIT** The SPI HW unit is not initialized or not usable
* **SPI_IDLE** : The SPI HW unit is not currently transmitting any Job
* **SPI_BUSY** : The SPI HW unit is performing a SPI Job (transmit)
**Return**: returns the status of the specified SPI HW unit
**Precondition**: None
**Postcondition**: None
### function Spi_WriteIB
```
Std_ReturnType Spi_WriteIB(
Spi_ChannelType Channel,
const Spi_DataBufferType * DataBufferPtr
)
```
**Brief**:
Service for writing one or more data to an IB SPI Handler/Driver Channel specified by parameter.
Service for writing one or more data to an IB SPI Handler/Driver Channel specified by parameter.
**Parameters**:
* **Channel** Channel ID.
* **DataBufferPtr** Pointer to source data buffer. If this pointer is null, it is assumed that the data to be transmitted is not relevant and the default transmit value of this channel will be used instead
**Returns**:
* **E_OK** write command has been accepted
* **E_NOT_OK** write command has not been accepted
**Return**: returns whether command has been accepted or rejected
**Precondition**: None
**Postcondition**: None
### function Spi_ReadIB
```
Std_ReturnType Spi_ReadIB(
Spi_ChannelType Channel,
Spi_DataBufferType * DataBufferPointer
)
```
**Brief**:
Service for reading data from internal buffers.
Service for reading synchronously one or more data from an IB SPI Handler/Driver Channel specified by parameter.
**Parameters**:
* **Channel** Channel ID
* **DataBufferPointer** Pointer to destination data buffer in RAM
**Returns**:
* **E_OK** read command has been accepted
* **E_NOT_OK** read command has not been accepted
**Return**: returns whether command has been accepted or rejected
**Precondition**: None
**Postcondition**: None
### function Spi_SetupEB
```
Std_ReturnType Spi_SetupEB(
Spi_ChannelType Channel,
const Spi_DataBufferType * SrcDataBufferPtr,
Spi_DataBufferType * DesDataBufferPtr,
Spi_NumberOfDataType Length
)
```
**Brief**:
Service to setup external buffer channels.
Service to setup the buffers and the length of data for the EB SPI Handler/Driver Channel specified.
**Parameters**:
* **Channel** Channel Id
* **SrcDataBufferPtr** Pointer to source data buffer
* **Length** Length (number of data elements) of the data to be transmitted from SrcDataBufferPtr and/or received from DesDataBufferPtr Min.: 1 Max.: Max of data specified at configuration for this channel
* **DesDataBufferPtr** Pointer to destination data buffer in RAM.
**Returns**:
* **E_OK** read command has been accepted
* **E_NOT_OK** read command has not been accepted
**Return**: returns whether command has been accepted or rejected
**Precondition**: None
**Postcondition**: None
### function Spi_AsyncTransmit
```
Std_ReturnType Spi_AsyncTransmit(
Spi_SequenceType Sequence
)
```
**Brief**:
Service to transmit data on the SPI bus.
Service is to transmit data on SPI bus if the sequence is valid and not pending
**Parameters**:
* **Sequence** Sequence ID
**Returns**:
* **E_OK** read command has been accepted
* **E_NOT_OK** read command has not been accepted
**Return**: returns whether command has been accepted or rejected
**Precondition**: None
**Postcondition**: None
### function Spi_Cancel
```
void Spi_Cancel(
Spi_SequenceType Sequence
)
```
**Brief**:
Service to cancel on going sequence.
Service cancels the specified on-going sequence transmission.
**Parameters**:
* **Sequence** Sequence ID
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Spi_SyncTransmit
```
Std_ReturnType Spi_SyncTransmit(
Spi_SequenceType Sequence
)
```
**Brief**:
Service to transmit data on the SPI bus.
Service is to transmit data on SPI bus synchronously
**Parameters**:
* **Sequence** Sequence ID
**Returns**:
* **E_OK** read command has been accepted
* **E_NOT_OK** read command has not been accepted
**Return**: returns whether command has been accepted or rejected
**Precondition**: None
**Postcondition**: None
### function Spi_SetAsyncMode
```
Std_ReturnType Spi_SetAsyncMode(
Spi_AsyncModeType Mode
)
```
**Brief**:
Service to set the asynchronous mechanism mode for SPI busses handled asynchronously.
Service to set the asynchronous mechanism mode for SPI busses handled asynchronously.
**Parameters**:
* **Mode** New mode required
**Returns**:
* **E_OK** read command has been accepted
* **E_NOT_OK** read command has not been accepted
**Return**: returns whether command has been accepted or rejected
**Precondition**: None
**Postcondition**: None
### function Spi_MainFunction_Handling
```
void Spi_MainFunction_Handling(
void
)
```
**Brief**:
Spi_MainFunction_Handling: This function shall polls the SPI interrupts linked to HW Units.
This function shall polls the SPI interrupts linked to HW Units allocated to the transmission of SPI sequences to enable the evolution of transmission state machine
**Returns**:
* **E_OK** read command has been accepted
* **E_NOT_OK** read command has not been accepted
**Return**: returns whether command has been accepted or rejected
**Precondition**: None
**Postcondition**: None
---
title: Wdg API GUIDE Header file
---
# WDG
## Types
| Base type | Type Name | Brief |
| -------------| -----------| ----- |
|enum| **[Wdg_StatusType](../Modules/group__WDG.md#enum-wdg_statustype)** | This is a Watchdog status type value. |
|enum| **[Wdg_Reaction](../Modules/group__WDG.md#enum-wdg_reaction)** | Watchdog module Reaction if watchdog counter reaches the maximum value. |
|enum| **[Wdg_PreDivider](../Modules/group__WDG.md#enum-wdg_predivider)** | Wdg_PreDivider determines the watchdog clock pre-divider, which is the first of the two dividers between INTOSC1 and the watchdog counter clock (WDCLK) |
|enum| **[Wdg_PreScaler](../Modules/group__WDG.md#enum-wdg_prescaler)** | Wdg_PreScaler determines the watchdog clock prescaler, which is the second of the two dividers between INTOSC1 and the watchdog counter clock (WDCLK). |
### enum Wdg_StatusType
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| WDG_UNINIT | 0U| Watchdog driver is uninitialized. State on power on before invoking Wdg_Init() |
| WDG_IDLE | 1U| Watchdog driver is in idle state. Default state when WDG timer regs are not being programmed. |
| WDG_BUSY | 2U| Watchdog driver is reprogramming the WD to trigger the watchdog. |
**Brief**:
This is a Watchdog status type value.
### enum Wdg_Reaction
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| WDG_GENERATE_RESET | 0U| Watchdog can generate a reset signal. |
| WDG_GENERATE_INTERRUPT | 1U| Watchdog can generate an interrupt signal; reset signal is disabled. |
**Brief**:
Watchdog module Reaction if watchdog counter reaches the maximum value.
### enum Wdg_PreDivider
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| WDG_PREDIV_2 | 0x800| PREDIVCLK = INTOSC1 / 2. |
| WDG_PREDIV_4 | 0x900| PREDIVCLK = INTOSC1 / 4. |
| WDG_PREDIV_8 | 0xA00| PREDIVCLK = INTOSC1 / 8. |
| WDG_PREDIV_16 | 0xB00| PREDIVCLK = INTOSC1 / 16. |
| WDG_PREDIV_32 | 0xC00| PREDIVCLK = INTOSC1 / 32. |
| WDG_PREDIV_64 | 0xD00| PREDIVCLK = INTOSC1 / 64. |
| WDG_PREDIV_128 | 0xE00| PREDIVCLK = INTOSC1 / 128. |
| WDG_PREDIV_256 | 0xF00| PREDIVCLK = INTOSC1 / 256. |
| WDG_PREDIV_512 | 0x000| PREDIVCLK = INTOSC1 / 512. |
| WDG_PREDIV_1024 | 0x100| PREDIVCLK = INTOSC1 / 1024. |
| WDG_PREDIV_2048 | 0x200| PREDIVCLK = INTOSC1 / 2048. |
| WDG_PREDIV_4096 | 0x300| PREDIVCLK = INTOSC1 / 4096. |
**Brief**:
Wdg_PreDivider determines the watchdog clock pre-divider, which is the first of the two dividers between INTOSC1 and the watchdog counter clock (WDCLK)
### enum Wdg_PreScaler
| Enumerator | Value | Description |
| ---------- | ----- | ----------- |
| WDG_PRESCALE_1 | 1U| WDCLK = PREDIVCLK / 1. |
| WDG_PRESCALE_2 | 2U| WDCLK = PREDIVCLK / 2. |
| WDG_PRESCALE_4 | 3U| WDCLK = PREDIVCLK / 4. |
| WDG_PRESCALE_8 | 4U| WDCLK = PREDIVCLK / 8. |
| WDG_PRESCALE_16 | 5U| WDCLK = PREDIVCLK / 16. |
| WDG_PRESCALE_32 | 6U| WDCLK = PREDIVCLK / 32. |
| WDG_PRESCALE_64 | 7U| WDCLK = PREDIVCLK / 64. |
**Brief**:
Wdg_PreScaler determines the watchdog clock prescaler, which is the second of the two dividers between INTOSC1 and the watchdog counter clock (WDCLK).
## Structures
| Name | Brief |
| -------------- | -------------- |
| **[Wdg_DriverObjType](../Classes/structWdg__DriverObjType.md)** | WDG driver object structure. |
| **[Wdg_ModeInfoType](../Classes/structWdg__ModeInfoType.md)** | Mode Information Type. |
| **[Wdg_ConfigType](../Classes/structWdg__ConfigType.md)** | WDG config root structure. |
## Defines
| Name | Brief |
| -------------- | ---------- |
| WDG_SW_MAJOR_VERSION | Driver Implementation Major Version. |
| WDG_SW_MINOR_VERSION | Driver Implementation Minor Version. |
| WDG_SW_PATCH_VERSION | Driver Implementation Patch Version. |
| WDG_AR_RELEASE_MAJOR_VERSION | AUTOSAR Major version specification implemented by WDG Driver. |
| WDG_AR_RELEASE_MINOR_VERSION | AUTOSAR Minor version specification implemented by WDG Driver. |
| WDG_AR_RELEASE_REVISION_VERSION | AUTOSAR Patch version specification implemented by WDG Driver. |
| WDG_VENDOR_ID | Texas Instruments Vendor ID. |
| WDG_MODULE_ID | WDG Driver Module ID. |
| WDG_INSTANCE_ID | WDG Instance ID. |
| WDG_SID_INIT | Service ID for Wdg_Init. |
| WDG_SID_SET_MODE | Service ID for Wdg_SetMode. |
| WDG_SID_SET_TRIGGER_CONDITION | Service ID for Wdg_SetTriggerCondition. |
| WDG_SID_GET_VERSION_INFO | Service ID for Wdg_GetVersionInfo. |
| WDG_E_DRIVER_STATE | Invalid driver state. |
| WDG_E_PARAM_MODE | Invalid mode param. |
| WDG_E_PARAM_CONFIG | Invalid config param. |
| WDG_E_PARAM_TIMEOUT | Invalid timeout value. |
| WDG_E_PARAM_POINTER | Invalid NULL ptr param. |
| WDG_E_INIT_FAILED | Invalid Configuration set selection. |
## Functions
| Return type | Function Name | Brief |
| -------------- | ----------------------- | ----------------- |
| void | **[Wdg_GetVersionInfo](../Modules/group__WDG.md#function-wdg_getversioninfo)**(Std_VersionInfoType * Versioninfo)| This service returns the version information of WDG module. |
| void | **[Wdg_Init](../Modules/group__WDG.md#function-wdg_init)**(const [Wdg_ConfigType](../Classes/structWdg__ConfigType.md) * CfgPtr)| This service initializes the WDG driver. |
| Std_ReturnType | **[Wdg_SetMode](../Modules/group__WDG.md#function-wdg_setmode)**(WdgIf_ModeType Mode)| Switches the watchdog into Mode type off mode, slow mode, fast mode. |
| void | **[Wdg_SetTriggerCondition](../Modules/group__WDG.md#function-wdg_settriggercondition)**(uint16 Timeout)| Sets the timeout value for the trigger counter. |
### function Wdg_GetVersionInfo
```
void Wdg_GetVersionInfo(
Std_VersionInfoType * Versioninfo
)
```
**Brief**:
This service returns the version information of WDG module.
**Parameters**:
* **Versioninfo** - Pointer to store the WDG driver version information.
**Returns**:
* **None**
**Return**: None
**Precondition**: This API is available only if WDG_GET_VERSION_INFO_API is STD_ON
**Postcondition**: None
### function Wdg_Init
```
void Wdg_Init(
const Wdg_ConfigType * CfgPtr
)
```
**Brief**:
This service initializes the WDG driver.
This API is used to configure WDG Mode settings Pre-divider and Pre-scalers etc.
**Parameters**:
* **CfgPtr** - Pointer to WDG driver configuration set.
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
### function Wdg_SetMode
```
Std_ReturnType Wdg_SetMode(
WdgIf_ModeType Mode
)
```
**Brief**:
Switches the watchdog into Mode type off mode, slow mode, fast mode.
**Parameters**:
* **Mode** One of the following statically configured modes OFF_MODE, SLOW_MODE, FAST_MODE
**Returns**:
* **E_OK** command has been accepted.
* **E_NOT_OK** command has not been accepted
**Return**: Std_ReturnType
**Precondition**: None
**Postcondition**: None
### function Wdg_SetTriggerCondition
```
void Wdg_SetTriggerCondition(
uint16 Timeout
)
```
**Brief**:
Sets the timeout value for the trigger counter.
**Parameters**:
* **Timeout** Timeout value (milliseconds) for setting the trigger counter
**Returns**:
* **None**
**Return**: None
**Precondition**: None
**Postcondition**: None
# Overview of MCAL
## Overview of AUTOSAR Stack
**AUTOSAR** (**AUT**omotive **O**pen **S**ystem **AR**chitecture) is an open and standardized automotive software architecture jointly developed by automobile manufacturers, suppliers, and tool developers. AUTOSAR focuses on main strategic targets such as modularity, configurability, and transferability of software modules, and the standardization of their interfaces to accomplish the project objectives.
AUTOSAR is based on the concept of separation between infrastructure and application. AUTOSAR software component implementation is independent of the infrastructure.
AUTOSAR infrastructure consists of the following layers in the architecture:
1. **Runtime Environment (RTE)**: Middleware layer which provides communication services for the application software and makes the components independent of a specific MCU.
2. **Basic Software (BSW) Layer**: Software layer with basic services and drivers to leverage features of the underlying hardware, and enables interface to application and RTE layer.
3. **Services Layer**: Offers basic services, Memory Services, Diagnostic Services, and state management for components in the basic layer.
4. **ECU Abstraction Layer**: Interfaces the drivers of MCAL and makes higher software layers independent of hardware layout and offers access to I/O signals.
5. **Microcontroller Abstraction Layer (MCAL)**: The lowest software layer designed to make higher-level software independent of a microcontroller.
6. **Complex Driver**: Collection of complex sensor and actuator control or non-standardized drivers that may need migration.
## What is MCAL
**Microcontroller Abstraction Layer (MCAL)** is a software module that enables direct access to on-chip MCU peripheral modules and makes the upper software layer independent of the MCU.
The Microcontroller Abstraction Layer (MCAL) is the lowest layer of the AUTOSAR Basic Software architecture. MCAL contains drivers with direct access to the microcontroller internal peripherals and memory-mapped microcontroller external devices. MCAL is a hardware-specific layer that ensures a standard interface to the Basic Software. It manages the microcontroller peripherals and provides the components of the Basic Software with microcontroller-independent values. MCAL also implements notification mechanisms to support the distribution of commands, responses, and information to processes.
```{figure} Assets/images/PortUserguide_MCAL_AUTOSAR.png
:alt: AUTOSAR MCAL Layer
:align: center
AUTOSAR MCAL Layer
```
MCAL software (which is part of the package that includes the hardware platform) needs to be configured for the specific automotive application.
For example, the CAN BUS (MCAL) driver needs to be configured for in-vehicle networking applications. Similarly, several drivers like LIN BUS, FlexRay, PWM, SPI, and Ethernet have to be configured based on the specific requirements of an automotive application.
Configuration of these drivers is carried out using specialized tools for code generation and configuration; for example, EB Tresos. The source files generated using the tool consist of structures with elements such as configuration values. These configuration files are generated based on the values specified in the Parameters Definition File. The configuration values need to be fed to the peripheral registers, address pointers, macro definitions, etc.
The MCAL drivers implement the software specification as mentioned in the AUTOSAR 4.3.1 release. Additionally, examples to demonstrate MCAL driver usage have also been included.
## What is CDD
CDD stands for Complex Device Drivers. A Complex Driver is a software entity which provides the possibility to integrate special-purpose functionality/drivers that are not defined in AUTOSAR. A CDD is a specific module located in the Complex Drivers Layer of the Basic Software which interacts with standard BSW modules or RTE.
* A CDD may need to interface with modules of the layered software architecture
* A module of the layered software architecture may need to interface with a CDD
* A CDD may need to interface with SW-Cs via RTE
```{figure} Assets/images/CDD_userguide.png
:alt: CDD in Layered Software Architecture
:align: center
CDD in Layered Software Architecture
```
The main goal of the CDD is to implement complex sensor evaluation and actuator control with direct access to the microcontroller using specific interrupts and/or complex microcontroller peripherals, external devices (communication transceivers, ASIC, etc.) to fulfill the special functional and timing requirements. In addition, it might be used to implement enhanced services/protocols or encapsulate legacy functionality of a non-AUTOSAR system.
CDD implementation might be application, microcontroller, and ECU dependent.
Finally, the CDD can serve as a mechanism of migration to introduce existing or new concepts into the AUTOSAR Software Architecture.
Refer to the [AUTOSAR_EXP_LayeredSoftwareArchitecture](https://www.autosar.org/fileadmin/standards/R4.3.1/CP/AUTOSAR_EXP_LayeredSoftwareArchitecture.pdf) document for more details on CDD-related configurations.
## MCAL Safety Strategy
### Safety Certified MCAL Modules
MCAL is a collective package of Safety Certified Driver Modules (ASIL D/B depending on device). It is developed with a process that is certified to be compliant with ISO 26262.
Drivers implement the HW safety mechanisms listed for the specific peripherals in the HW Safety Manual to manage random faults. Each of the MCAL releases will include a CSP. However, only the final safety release will be assessed for functional safety.
### CSP
**Safety Certification for MCAL and Compiler**
* The Safety certification process of TI MCAL is compiler options agnostic and is certified in a systematic approach, i.e. the Safety certification of MCAL will not be violated if the compiler options are changed to a different options other than the ones mentioned in the MCAL user guide.
* The safety qualification of TI ARM Compiler is done using compiler qualification kit with set of recommended options and flags. The safety qualification can be done again if compiler options are changed. Refer to this page on our approach of QKIT [How to apply the TI Compiler Qualification Kit for functional safety development](https://software-dl.ti.com/ccs/esd/documents/application_notes/appnote-codegen_qualificationkit.html)
Steps to follow if compiler options are changed:
* Review the content of the Compiler qualification kit.
* Revalidate the compiler based on the new options selected.
* Ensure that compiler qualification test reports are consistent with the reports provided by TI compiler.
* If any discrepancies are found, reported them to TI compiler team.
* Validate the use case at the system level with new compiler options and ensure that MCAL functionality is as expected.
## Software Offering
TI offers MCAL and CDD drivers (source code) for MCU devices along with the licensed Configurator Package. The rest of the AUTOSAR Basic Software is provided by the AUTOSAR Vendors (Vector, Elektrobit, ETAS, etc).
```{figure} Assets/images/Software_Offering_TI.png
:alt: Software Offering
:align: center
Software Offering
```
Customers get:
* MCALs and EB Configurator Tool from TI.
* AUTOSAR BSW/RTE from their preferred vendor with an OS port for the target TI device.
Customers integrate these deliverables based on integration guides provided by AUTOSAR vendors and TI.
This package consists of the Texas Instruments MCAL User Guide for **{{ device_name }}**.
+---------------------------------------------------------------+--------------------------------------------------------------------------------------------------+
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