Macros
Crypto Driver AES Register Level Data Structures

The section has a list of all the data structures used internally by the driver. More...

Macros

#define AES_CFG_DIR_ENCRYPT   (0x00000004U)
 
#define AES_CFG_KEY_SIZE_128BIT   (0x00000008U)
 
#define AES_CFG_MODE_ECB   (0x00000000U)
 
#define AES_CFG_MODE_CTR   (0x00000040U)
 
#define AES_CFG_MODE_ICM   (0x00000200U)
 
#define AES_CFG_MODE_CFB   (0x00000400U)
 
#define AES_CFG_MODE_XTS_TWEAKJL   (0x00000800U)
 
#define AES_CFG_MODE_F8   (0x00002000U)
 
#define AES_CFG_MODE_F9   (0x20004000U)
 
#define AES_CFG_MODE_CBCMAC   (0x20008004U)
 
#define AES_CFG_MODE_GCM_HLY0ZERO   (0x20010040U)
 
#define AES_CFG_MODE_CCM   (0x20040040U)
 
#define AES_CFG_MODE_INVALID   (0xFFFFFFFFU)
 
#define AES_CFG_CTR_WIDTH_32   (0x00000000U)
 
#define AES_CFG_MODE_CTR_32   (AES_CFG_MODE_CTR | AES_CFG_CTR_WIDTH_32)
 
#define AES_CFG_CCM_L_2   (0x00080000U)
 
#define AES_INT_CONTEXT_IN   (0x00000001U)
 
#define AES_INT_DMA_CONTEXT_IN   (0x00010000U)
 
#define AES_CTRL_CONTEXT_READY   (0x80000000U)
 

Detailed Description

The section has a list of all the data structures used internally by the driver.

Macro Definition Documentation

#define AES_CFG_CCM_L_2   (0x00080000U)

AES CCM L and M defines

#define AES_CFG_CTR_WIDTH_32   (0x00000000U)

AES Counter width Used in with CTR, CCM, or GCM modes.

#define AES_CFG_DIR_ENCRYPT   (0x00000004U)

AES operation direction

#define AES_CFG_KEY_SIZE_128BIT   (0x00000008U)

AES key size

#define AES_CFG_MODE_CBCMAC   (0x20008004U)

AES CBC-MAC mode

#define AES_CFG_MODE_CCM   (0x20040040U)

AES CCM mode

#define AES_CFG_MODE_CFB   (0x00000400U)

AES cipher feedback mode(CFB128)

#define AES_CFG_MODE_CTR   (0x00000040U)

AES counter mode

#define AES_CFG_MODE_CTR_32   (AES_CFG_MODE_CTR | AES_CFG_CTR_WIDTH_32)

AES counter mode with width specified

#define AES_CFG_MODE_ECB   (0x00000000U)

AES mode of operation

#define AES_CFG_MODE_F8   (0x00002000U)

AES F8 mode

#define AES_CFG_MODE_F9   (0x20004000U)

AES F9 mode

#define AES_CFG_MODE_GCM_HLY0ZERO   (0x20010040U)

AES GCM mode

#define AES_CFG_MODE_ICM   (0x00000200U)

AES Integer counter mode(ICM)

#define AES_CFG_MODE_INVALID   (0xFFFFFFFFU)

AES mode invalid

#define AES_CFG_MODE_XTS_TWEAKJL   (0x00000800U)

AES XTS mode

#define AES_CTRL_CONTEXT_READY   (0x80000000U)

AES Control flags

#define AES_INT_CONTEXT_IN   (0x00000001U)

Interrupt flags

#define AES_INT_DMA_CONTEXT_IN   (0x00010000U)

DMA flags


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