j721e Board Configuration Resource Assignment Type Descriptions¶
Introduction¶
This chapter provides information of Board Configuration resource assignment type IDs that are permitted in the j721e SoC. The resource type IDs represent j721e resources ranges assignable to SoC processing entities (or PEs).
| Device Name | Device ID (10-bits) | Subtype Name | Subtype ID (6-bits) | Unique Type ID (16-bits) |
|---|---|---|---|---|
| J721E_DEV_COMPUTE_CLUSTER0_CLEC | 0x006 | RESASG_SUBTYPE_COMPUTE_CLUSTER0_CLEC_SOC_EVENTS_IN_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 | 0x00 | 0x0180 |
| RESASG_SUBTYPE_COMPUTE_CLUSTER0_CLEC_SOC_EVENTS_IN_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 | 0x01 | 0x0181 | ||
| RESASG_SUBTYPE_COMPUTE_CLUSTER0_CLEC_SOC_EVENTS_IN_IRQ_GROUP1_FROM_NAVSS0_INTR_ROUTER_0 | 0x02 | 0x0182 | ||
| RESASG_SUBTYPE_COMPUTE_CLUSTER0_CLEC_SOC_EVENTS_IN_IRQ_GROUP0_FROM_CMPEVENT_INTRTR0 | 0x03 | 0x0183 | ||
| RESASG_SUBTYPE_COMPUTE_CLUSTER0_CLEC_SOC_EVENTS_IN_IRQ_GROUP2_FROM_NAVSS0_INTR_ROUTER_0 | 0x04 | 0x0184 | ||
| RESASG_SUBTYPE_COMPUTE_CLUSTER0_CLEC_SOC_EVENTS_IN_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0 | 0x05 | 0x0185 | ||
| J721E_DEV_COMPUTE_CLUSTER0_GIC500SS | 0x00E | RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 | 0x00 | 0x0380 |
| RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 | 0x01 | 0x0381 | ||
| RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP1_FROM_NAVSS0_INTR_ROUTER_0 | 0x02 | 0x0382 | ||
| RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP0_FROM_CMPEVENT_INTRTR0 | 0x03 | 0x0383 | ||
| RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP2_FROM_NAVSS0_INTR_ROUTER_0 | 0x04 | 0x0384 | ||
| RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0 | 0x05 | 0x0385 | ||
| J721E_DEV_MCU_CPSW0 | 0x012 | RESASG_SUBTYPE_MCU_CPSW0_CPTS_HW3_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x00 | 0x0480 |
| RESASG_SUBTYPE_MCU_CPSW0_CPTS_HW4_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x01 | 0x0481 | ||
| J721E_DEV_CPSW0 | 0x013 | RESASG_SUBTYPE_CPSW0_CPTS_HW1_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x00 | 0x04C0 |
| RESASG_SUBTYPE_CPSW0_CPTS_HW2_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x01 | 0x04C1 | ||
| RESASG_SUBTYPE_CPSW0_CPTS_HW3_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x02 | 0x04C2 | ||
| RESASG_SUBTYPE_CPSW0_CPTS_HW4_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x03 | 0x04C3 | ||
| RESASG_SUBTYPE_CPSW0_CPTS_HW5_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x04 | 0x04C4 | ||
| RESASG_SUBTYPE_CPSW0_CPTS_HW6_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x05 | 0x04C5 | ||
| RESASG_SUBTYPE_CPSW0_CPTS_HW7_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x06 | 0x04C6 | ||
| RESASG_SUBTYPE_CPSW0_CPTS_HW8_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x07 | 0x04C7 | ||
| J721E_DEV_ESM0 | 0x061 | RESASG_SUBTYPE_ESM0_ESM_PLS_EVENT0_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 | 0x00 | 0x1840 |
| RESASG_SUBTYPE_ESM0_ESM_PLS_EVENT1_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 | 0x01 | 0x1841 | ||
| RESASG_SUBTYPE_ESM0_ESM_PLS_EVENT2_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 | 0x02 | 0x1842 | ||
| J721E_DEV_WKUP_ESM0 | 0x063 | RESASG_SUBTYPE_WKUP_ESM0_ESM_PLS_EVENT0_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0 | 0x00 | 0x18C0 |
| RESASG_SUBTYPE_WKUP_ESM0_ESM_PLS_EVENT1_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0 | 0x01 | 0x18C1 | ||
| RESASG_SUBTYPE_WKUP_ESM0_ESM_PLS_EVENT2_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0 | 0x02 | 0x18C2 | ||
| J721E_DEV_PRU_ICSSG0 | 0x077 | RESASG_SUBTYPE_PRU_ICSSG0_PR1_EDC0_LATCH0_IN_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x00 | 0x1DC0 |
| RESASG_SUBTYPE_PRU_ICSSG0_PR1_EDC0_LATCH1_IN_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x01 | 0x1DC1 | ||
| RESASG_SUBTYPE_PRU_ICSSG0_PR1_EDC1_LATCH0_IN_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x02 | 0x1DC2 | ||
| RESASG_SUBTYPE_PRU_ICSSG0_PR1_EDC1_LATCH1_IN_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x03 | 0x1DC3 | ||
| RESASG_SUBTYPE_PRU_ICSSG0_PR1_IEP0_CAP_INTR_REQ_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 | 0x04 | 0x1DC4 | ||
| RESASG_SUBTYPE_PRU_ICSSG0_PR1_IEP1_CAP_INTR_REQ_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 | 0x05 | 0x1DC5 | ||
| RESASG_SUBTYPE_PRU_ICSSG0_PR1_SLV_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 | 0x06 | 0x1DC6 | ||
| J721E_DEV_PRU_ICSSG1 | 0x078 | RESASG_SUBTYPE_PRU_ICSSG1_PR1_EDC0_LATCH0_IN_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x00 | 0x1E00 |
| RESASG_SUBTYPE_PRU_ICSSG1_PR1_EDC0_LATCH1_IN_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x01 | 0x1E01 | ||
| RESASG_SUBTYPE_PRU_ICSSG1_PR1_EDC1_LATCH0_IN_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x02 | 0x1E02 | ||
| RESASG_SUBTYPE_PRU_ICSSG1_PR1_EDC1_LATCH1_IN_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x03 | 0x1E03 | ||
| RESASG_SUBTYPE_PRU_ICSSG1_PR1_IEP0_CAP_INTR_REQ_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 | 0x04 | 0x1E04 | ||
| RESASG_SUBTYPE_PRU_ICSSG1_PR1_IEP1_CAP_INTR_REQ_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 | 0x05 | 0x1E05 | ||
| RESASG_SUBTYPE_PRU_ICSSG1_PR1_SLV_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 | 0x06 | 0x1E06 | ||
| J721E_DEV_C66SS0_CORE0 | 0x08E | RESASG_SUBTYPE_C66SS0_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP0_FROM_C66SS0_INTROUTER0 | 0x00 | 0x2380 |
| RESASG_SUBTYPE_C66SS0_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP1_FROM_C66SS0_INTROUTER0 | 0x01 | 0x2381 | ||
| RESASG_SUBTYPE_C66SS0_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP2_FROM_C66SS0_INTROUTER0 | 0x02 | 0x2382 | ||
| RESASG_SUBTYPE_C66SS0_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP3_FROM_C66SS0_INTROUTER0 | 0x03 | 0x2383 | ||
| RESASG_SUBTYPE_C66SS0_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP4_FROM_C66SS0_INTROUTER0 | 0x04 | 0x2384 | ||
| J721E_DEV_C66SS1_CORE0 | 0x08F | RESASG_SUBTYPE_C66SS1_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP0_FROM_C66SS1_INTROUTER0 | 0x00 | 0x23C0 |
| RESASG_SUBTYPE_C66SS1_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP1_FROM_C66SS1_INTROUTER0 | 0x01 | 0x23C1 | ||
| RESASG_SUBTYPE_C66SS1_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP2_FROM_C66SS1_INTROUTER0 | 0x02 | 0x23C2 | ||
| RESASG_SUBTYPE_C66SS1_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP3_FROM_C66SS1_INTROUTER0 | 0x03 | 0x23C3 | ||
| RESASG_SUBTYPE_C66SS1_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP4_FROM_C66SS1_INTROUTER0 | 0x04 | 0x23C4 | ||
| J721E_DEV_NAVSS512L_MAIN_0 | 0x0C7 | RESASG_SUBTYPE_NAVSS512L_MAIN_0_CPTS0_HW1_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x00 | 0x31C0 |
| RESASG_SUBTYPE_NAVSS512L_MAIN_0_CPTS0_HW2_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x01 | 0x31C1 | ||
| RESASG_SUBTYPE_NAVSS512L_MAIN_0_CPTS0_HW3_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x02 | 0x31C2 | ||
| RESASG_SUBTYPE_NAVSS512L_MAIN_0_CPTS0_HW4_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x03 | 0x31C3 | ||
| RESASG_SUBTYPE_NAVSS512L_MAIN_0_CPTS0_HW5_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x04 | 0x31C4 | ||
| RESASG_SUBTYPE_NAVSS512L_MAIN_0_CPTS0_HW6_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x05 | 0x31C5 | ||
| RESASG_SUBTYPE_NAVSS512L_MAIN_0_CPTS0_HW7_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x06 | 0x31C6 | ||
| RESASG_SUBTYPE_NAVSS512L_MAIN_0_CPTS0_HW8_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x07 | 0x31C7 | ||
| J721E_DEV_NAVSS0_MODSS_INTAGGR_0 | 0x0CF | RESASG_SUBTYPE_IA_VINT | 0x0A | 0x33CA |
| RESASG_SUBTYPE_GLOBAL_EVENT_SEVT | 0x0D | 0x33CD | ||
| J721E_DEV_NAVSS0_MODSS_INTAGGR_1 | 0x0D0 | RESASG_SUBTYPE_IA_VINT | 0x0A | 0x340A |
| RESASG_SUBTYPE_GLOBAL_EVENT_SEVT | 0x0D | 0x340D | ||
| J721E_DEV_NAVSS0_UDMASS_INTAGGR_0 | 0x0D1 | RESASG_SUBTYPE_NAVSS0_UDMASS_INTAGGR_0_INTAGGR_LEVI_PEND_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x00 | 0x3440 |
| RESASG_SUBTYPE_NAVSS0_UDMASS_INTAGGR_0_INTAGGR_LEVI_PEND_IRQ_GROUP0_FROM_CMPEVENT_INTRTR0 | 0x01 | 0x3441 | ||
| RESASG_SUBTYPE_NAVSS0_UDMASS_INTAGGR_0_INTAGGR_LEVI_PEND_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 | 0x02 | 0x3442 | ||
| RESASG_SUBTYPE_IA_VINT | 0x0A | 0x344A | ||
| RESASG_SUBTYPE_GLOBAL_EVENT_GEVT | 0x0B | 0x344B | ||
| RESASG_SUBTYPE_GLOBAL_EVENT_MEVT | 0x0C | 0x344C | ||
| RESASG_SUBTYPE_GLOBAL_EVENT_SEVT | 0x0D | 0x344D | ||
| J721E_DEV_NAVSS0_RINGACC_0 | 0x0D3 | RESASG_SUBTYPE_RA_ERROR_OES | 0x00 | 0x34C0 |
| RESASG_SUBTYPE_RA_GP | 0x01 | 0x34C1 | ||
| RESASG_SUBTYPE_RA_UDMAP_RX | 0x02 | 0x34C2 | ||
| RESASG_SUBTYPE_RA_UDMAP_TX | 0x03 | 0x34C3 | ||
| RESASG_SUBTYPE_RA_UDMAP_TX_EXT | 0x04 | 0x34C4 | ||
| RESASG_SUBTYPE_RA_UDMAP_RX_H | 0x05 | 0x34C5 | ||
| RESASG_SUBTYPE_RA_UDMAP_RX_UH | 0x06 | 0x34C6 | ||
| RESASG_SUBTYPE_RA_UDMAP_TX_H | 0x07 | 0x34C7 | ||
| RESASG_SUBTYPE_RA_UDMAP_TX_UH | 0x08 | 0x34C8 | ||
| RESASG_SUBTYPE_RA_VIRTID | 0x0A | 0x34CA | ||
| J721E_DEV_NAVSS0_UDMAP_0 | 0x0D4 | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON | 0x00 | 0x3500 |
| RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES | 0x01 | 0x3501 | ||
| RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER | 0x02 | 0x3502 | ||
| RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG | 0x03 | 0x3503 | ||
| RESASG_SUBTYPE_UDMAP_RX_CHAN | 0x0A | 0x350A | ||
| RESASG_SUBTYPE_UDMAP_RX_HCHAN | 0x0B | 0x350B | ||
| RESASG_SUBTYPE_UDMAP_RX_UHCHAN | 0x0C | 0x350C | ||
| RESASG_SUBTYPE_UDMAP_TX_CHAN | 0x0D | 0x350D | ||
| RESASG_SUBTYPE_UDMAP_TX_ECHAN | 0x0E | 0x350E | ||
| RESASG_SUBTYPE_UDMAP_TX_HCHAN | 0x0F | 0x350F | ||
| RESASG_SUBTYPE_UDMAP_TX_UHCHAN | 0x10 | 0x3510 | ||
| J721E_DEV_MCU_NAVSS0_INTAGGR_0 | 0x0E9 | RESASG_SUBTYPE_MCU_NAVSS0_INTAGGR_0_INTAGGR_LEVI_PEND_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0 | 0x00 | 0x3A40 |
| RESASG_SUBTYPE_IA_VINT | 0x0A | 0x3A4A | ||
| RESASG_SUBTYPE_GLOBAL_EVENT_GEVT | 0x0B | 0x3A4B | ||
| RESASG_SUBTYPE_GLOBAL_EVENT_MEVT | 0x0C | 0x3A4C | ||
| RESASG_SUBTYPE_GLOBAL_EVENT_SEVT | 0x0D | 0x3A4D | ||
| J721E_DEV_MCU_NAVSS0_RINGACC_0 | 0x0EB | RESASG_SUBTYPE_RA_ERROR_OES | 0x00 | 0x3AC0 |
| RESASG_SUBTYPE_RA_GP | 0x01 | 0x3AC1 | ||
| RESASG_SUBTYPE_RA_UDMAP_RX | 0x02 | 0x3AC2 | ||
| RESASG_SUBTYPE_RA_UDMAP_TX | 0x03 | 0x3AC3 | ||
| RESASG_SUBTYPE_RA_UDMAP_RX_H | 0x05 | 0x3AC5 | ||
| RESASG_SUBTYPE_RA_UDMAP_TX_H | 0x07 | 0x3AC7 | ||
| RESASG_SUBTYPE_RA_VIRTID | 0x0A | 0x3ACA | ||
| J721E_DEV_MCU_NAVSS0_UDMAP_0 | 0x0EC | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON | 0x00 | 0x3B00 |
| RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES | 0x01 | 0x3B01 | ||
| RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER | 0x02 | 0x3B02 | ||
| RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG | 0x03 | 0x3B03 | ||
| RESASG_SUBTYPE_UDMAP_RX_CHAN | 0x0A | 0x3B0A | ||
| RESASG_SUBTYPE_UDMAP_RX_HCHAN | 0x0B | 0x3B0B | ||
| RESASG_SUBTYPE_UDMAP_TX_CHAN | 0x0D | 0x3B0D | ||
| RESASG_SUBTYPE_UDMAP_TX_HCHAN | 0x0F | 0x3B0F | ||
| J721E_DEV_PCIE0 | 0x0EF | RESASG_SUBTYPE_PCIE0_PCIE_CPTS_HW2_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x00 | 0x3BC0 |
| J721E_DEV_PCIE1 | 0x0F0 | RESASG_SUBTYPE_PCIE1_PCIE_CPTS_HW2_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x00 | 0x3C00 |
| J721E_DEV_PCIE2 | 0x0F1 | RESASG_SUBTYPE_PCIE2_PCIE_CPTS_HW2_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x00 | 0x3C40 |
| J721E_DEV_PCIE3 | 0x0F2 | RESASG_SUBTYPE_PCIE3_PCIE_CPTS_HW2_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 | 0x00 | 0x3C80 |
| J721E_DEV_R5FSS0_CORE0 | 0x0F5 | RESASG_SUBTYPE_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 | 0x00 | 0x3D40 |
| RESASG_SUBTYPE_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 | 0x01 | 0x3D41 | ||
| RESASG_SUBTYPE_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_R5FSS0_INTROUTER0 | 0x02 | 0x3D42 | ||
| J721E_DEV_R5FSS0_CORE1 | 0x0F6 | RESASG_SUBTYPE_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 | 0x00 | 0x3D80 |
| RESASG_SUBTYPE_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 | 0x01 | 0x3D81 | ||
| RESASG_SUBTYPE_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_R5FSS0_INTROUTER0 | 0x02 | 0x3D82 | ||
| J721E_DEV_R5FSS1_CORE0 | 0x0F7 | RESASG_SUBTYPE_R5FSS1_CORE0_INTR_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 | 0x00 | 0x3DC0 |
| RESASG_SUBTYPE_R5FSS1_CORE0_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 | 0x01 | 0x3DC1 | ||
| RESASG_SUBTYPE_R5FSS1_CORE0_INTR_IRQ_GROUP0_FROM_R5FSS1_INTROUTER0 | 0x02 | 0x3DC2 | ||
| J721E_DEV_R5FSS1_CORE1 | 0x0F8 | RESASG_SUBTYPE_R5FSS1_CORE1_INTR_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 | 0x00 | 0x3E00 |
| RESASG_SUBTYPE_R5FSS1_CORE1_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 | 0x01 | 0x3E01 | ||
| RESASG_SUBTYPE_R5FSS1_CORE1_INTR_IRQ_GROUP0_FROM_R5FSS1_INTROUTER0 | 0x02 | 0x3E02 | ||
| J721E_DEV_MCU_R5FSS0_CORE0 | 0x0FA | RESASG_SUBTYPE_MCU_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_MCU_NAVSS0_INTR_ROUTER_0 | 0x00 | 0x3E80 |
| RESASG_SUBTYPE_MCU_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0 | 0x01 | 0x3E81 | ||
| RESASG_SUBTYPE_MCU_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_MAIN2MCU_LVL_INTRTR0 | 0x02 | 0x3E82 | ||
| RESASG_SUBTYPE_MCU_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_MAIN2MCU_PLS_INTRTR0 | 0x03 | 0x3E83 | ||
| RESASG_SUBTYPE_MCU_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 | 0x04 | 0x3E84 | ||
| J721E_DEV_MCU_R5FSS0_CORE1 | 0x0FB | RESASG_SUBTYPE_MCU_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_MCU_NAVSS0_INTR_ROUTER_0 | 0x00 | 0x3EC0 |
| RESASG_SUBTYPE_MCU_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0 | 0x01 | 0x3EC1 | ||
| RESASG_SUBTYPE_MCU_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_MAIN2MCU_LVL_INTRTR0 | 0x02 | 0x3EC2 | ||
| RESASG_SUBTYPE_MCU_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_MAIN2MCU_PLS_INTRTR0 | 0x03 | 0x3EC3 | ||
| RESASG_SUBTYPE_MCU_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 | 0x04 | 0x3EC4 |