IAR Cortex-M3 Object Size Benchmarks

Target Platform: ti.platforms.simplelink:CC1350:1

Tool Chain Version: 8.20.2.58

BIOS Version: bios_6_55_00_05_eng

XDCTools Version: xdctools_3_50_05_12_core

Object Name Size
Hwi 216
Swi 224
Task 264
Semaphore 200
GateMutex 208
Clock 208
POSIX Pthread 352
POSIX Semaphore 28
POSIX Mutex 168
POSIX Timer 232

The M3 target also supports zero latency interrupts. See ti.sysbios.family.arm.m3.Hwi cdocs for details.

See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.