Instance: BROM
Component: BROM
Base address: 0x10000000
BOOT ROM
|
Register Name |
Type |
Register Width (Bits) |
Register Reset |
Address Offset |
Physical Address |
|
RO |
32 |
0xXXXX XXXX |
0x0000 0000 - 0x0000 0040 |
0x1000 0000 - 0x1000 0040 |
|
|
RO |
32 |
0xXXXX XXXX |
0x0000 0044 |
0x1000 0044 |
|
|
RO |
32 |
0xXXXX XXXX |
0x0000 0048 - 0x0000 00A0 |
0x1000 0048 - 0x1000 00A0 |
|
|
RO |
32 |
0xXXXX XXXX |
0x0000 0100 - 0x0000 017C |
0x1000 0100 - 0x1000 017C |
|
|
RO |
32 |
0xXXXX XXXX |
0x0000 0180 - 0x0000 0454 |
0x1000 0180 - 0x1000 0454 |
|
|
RO |
32 |
0xXXXX XXXX |
0x0000 0458 - 0x0000 4C80 |
0x1000 0458 - 0x1000 4C80 |
|
|
RO |
32 |
0xXXXX XXXX |
0x0000 4FFC |
0x1000 4FFC |
|
|
RO |
32 |
0xXXXX XXXX |
0x0000 5000 - 0x0000 D9EC |
0x1000 5000 - 0x1000 D9EC |
|
|
RO |
32 |
0x0000 0000 |
0x0000 DFFC |
0x1000 DFFC |
|
|
RO |
32 |
0xXXXX XXXX |
0x0000 E000 - 0x0001 3C70 |
0x1000 E000 - 0x1001 3C70 |
|
|
RO |
32 |
0x0000 0000 |
0x0001 4BFC |
0x1001 4BFC |
|
|
COMMON_DOORBELL_RFHAL_ECC_AES128__0-COMMON_DOORBELL_RFHAL_ECC_AES128__4187 |
RO |
32 |
0xXXXX XXXX |
0x0001 4C00 - 0x0001 8D6C |
0x1001 4C00 - 0x1001 8D6C |
|
RO |
32 |
0x0000 0000 |
0x0001 9FFC |
0x1001 9FFC |
|
|
RO |
32 |
0xXXXX XXXX |
0x0001 A000 - 0x0001 CA98 |
0x1001 A000 - 0x1001 CA98 |
|
|
RO |
32 |
0xXXXX XXXX |
0x0001 CA9E - 0x0001 CBFE |
0x1001 CA9E - 0x1001 CBFE |
| Address Offset | 0x0000 0000 - 0x0000 0040 | ||
| Physical Address | 0x1000 0000 - 0x1000 0040 | Instance | 0x1000 0000 - 0x1000 0040 |
| Description | Interrupts Vector Table | ||
| Type | RO | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:0 | WORD32 | 32bit word | RO | 0xXXXX XXXX | ||
| Address Offset | 0x0000 0044 | ||
| Physical Address | 0x1000 0044 | Instance | 0x1000 0044 |
| Description | FW Revision | ||
| Type | RO | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:0 | WORD32 | 32bit word | RO | 0xXXXX XXXX | ||
| Address Offset | 0x0000 0048 - 0x0000 00A0 | ||
| Physical Address | 0x1000 0048 - 0x1000 00A0 | Instance | 0x1000 0048 - 0x1000 00A0 |
| Description | HAPI Function Pointers. Specify each? | ||
| Type | RO | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:0 | WORD32 | 32bit word | RO | 0xXXXX XXXX | ||
| Address Offset | 0x0000 0100 - 0x0000 017C | ||
| Physical Address | 0x1000 0100 - 0x1000 017C | Instance | 0x1000 0100 - 0x1000 017C |
| Description | Minimum size is 128 bytes though we only need the first few entries for this exception table | ||
| Type | RO | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:0 | WORD32 | 32bit word | RO | 0xXXXX XXXX | ||
| Address Offset | 0x0000 0180 - 0x0000 0454 | ||
| Physical Address | 0x1000 0180 - 0x1000 0454 | Instance | 0x1000 0180 - 0x1000 0454 |
| Description | Driver Function Pointers. Split out more information? Where can it be found?? | ||
| Type | RO | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:0 | WORD32 | 32bit word | RO | 0xXXXX XXXX | ||
| Address Offset | 0x0000 0458 - 0x0000 4C80 | ||
| Physical Address | 0x1000 0458 - 0x1000 4C80 | Instance | 0x1000 0458 - 0x1000 4C80 |
| Description | Bootcode and constants | ||
| Type | RO | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:0 | WORD32 | 32bit word | RO | 0xXXXX XXXX | ||
| Address Offset | 0x0000 4FFC | ||
| Physical Address | 0x1000 4FFC | Instance | 0x1000 4FFC |
| Description | ROM CRC32 | ||
| Type | RO | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:0 | WORD32 | 32bit word | RO | 0xXXXX XXXX | ||
| Address Offset | 0x0000 5000 - 0x0000 D9EC | ||
| Physical Address | 0x1000 5000 - 0x1000 D9EC | Instance | 0x1000 5000 - 0x1000 D9EC |
| Description | BLE Controller | ||
| Type | RO | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:0 | WORD32 | 32bit word | RO | 0xXXXX XXXX | ||
| Address Offset | 0x0000 DFFC | ||
| Physical Address | 0x1000 DFFC | Instance | 0x1000 DFFC |
| Description | ROM SVN and CRC32 | ||
| Type | RO | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:16 | CRC_32 | CRC32 Code | RO | 0x0000 | ||
| 15:0 | SVN | SVN Revision | RO | 0x0000 | ||
| Address Offset | 0x0000 E000 - 0x0001 3C70 | ||
| Physical Address | 0x1000 E000 - 0x1001 3C70 | Instance | 0x1000 E000 - 0x1001 3C70 |
| Description | TIMAC Controller | ||
| Type | RO | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:0 | WORD32 | 32bit word | RO | 0xXXXX XXXX | ||
| Address Offset | 0x0001 4BFC | ||
| Physical Address | 0x1001 4BFC | Instance | 0x1001 4BFC |
| Description | ROM SVN and CRC32 | ||
| Type | RO | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:16 | CRC_32 | CRC32 Code | RO | 0x0000 | ||
| 15:0 | SVN | SVN Revision | RO | 0x0000 | ||
| Address Offset | 0x0001 4C00 - 0x0001 8D6C | ||
| Physical Address | 0x1001 4C00 - 0x1001 8D6C | Instance | 0x1001 4C00 - 0x1001 8D6C |
| Description | Doorbell, RF_HAL, ECC, AES128. Possible to split into more details?? | ||
| Type | RO | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:0 | WORD32 | 32bit word | RO | 0xXXXX XXXX | ||
| Address Offset | 0x0001 9FFC | ||
| Physical Address | 0x1001 9FFC | Instance | 0x1001 9FFC |
| Description | ROM SVN and CRC32 | ||
| Type | RO | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:16 | CRC_32 | CRC32 Code | RO | 0x0000 | ||
| 15:0 | SVN | SVN Revision | RO | 0x0000 | ||
| Address Offset | 0x0001 A000 - 0x0001 CA98 | ||
| Physical Address | 0x1001 A000 - 0x1001 CA98 | Instance | 0x1001 A000 - 0x1001 CA98 |
| Description | TI-RTOS | ||
| Type | RO | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:0 | WORD32 | 32bit word | RO | 0xXXXX XXXX | ||
| Address Offset | 0x0001 CA9E - 0x0001 CBFE | ||
| Physical Address | 0x1001 CA9E - 0x1001 CBFE | Instance | 0x1001 CA9E - 0x1001 CBFE |
| Description | TI-RTOS Fudge factor. | ||
| Type | RO | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:0 | WORD32 | 32bit word | RO | 0xXXXX XXXX | ||
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