AON_IOC

Instance: AON_IOC
Component: AON_IOC
Base address: 0x40094000

Always On (AON) IO Controller - controls IO operation when the MCU IO Controller (IOC) is powered off and resides in the AON domain. Note: This module only supports 32 bit Read/Write access from MCU.

TOP:AON_IOC Register Summary

Register Name	Type	Register Width (Bits)	Register Reset	Address Offset	Physical Address
IOSTRMIN	RW	32	0x0000 0003	0x0000 0000	0x4009 4000
IOSTRMED	RW	32	0x0000 0006	0x0000 0004	0x4009 4004
IOSTRMAX	RW	32	0x0000 0005	0x0000 0008	0x4009 4008
IOCLATCH	RW	32	0x0000 0001	0x0000 000C	0x4009 400C
CLK32KCTL	RW	32	0x0000 0001	0x0000 0010	0x4009 4010

TOP:AON_IOC Register Descriptions

TOP:AON_IOC:IOSTRMIN

Address Offset	0x0000 0000
Physical Address	0x4009 4000	Instance	0x4009 4000
Description	Internal. Only to be used through TI provided API.
Type	RW

Bits	Field Name	Description	Type	Reset
31:3	RESERVED3	Internal. Only to be used through TI provided API.	RO	0b0 0000 0000 0000 0000 0000 0000 0000
2:0	GRAY_CODE	Internal. Only to be used through TI provided API.	RW	0b011

TOP:AON_IOC:IOSTRMED

Address Offset	0x0000 0004
Physical Address	0x4009 4004	Instance	0x4009 4004
Description	Internal. Only to be used through TI provided API.
Type	RW

Bits	Field Name	Description	Type	Reset
31:3	RESERVED3	Internal. Only to be used through TI provided API.	RO	0b0 0000 0000 0000 0000 0000 0000 0000
2:0	GRAY_CODE	Internal. Only to be used through TI provided API.	RW	0b110

TOP:AON_IOC:IOSTRMAX

Address Offset	0x0000 0008
Physical Address	0x4009 4008	Instance	0x4009 4008
Description	Internal. Only to be used through TI provided API.
Type	RW

Bits	Field Name	Description	Type	Reset
31:3	RESERVED3	Internal. Only to be used through TI provided API.	RO	0b0 0000 0000 0000 0000 0000 0000 0000
2:0	GRAY_CODE	Internal. Only to be used through TI provided API.	RW	0b101

TOP:AON_IOC:IOCLATCH

Address Offset	0x0000 000C
Physical Address	0x4009 400C	Instance	0x4009 400C
Description	IO Latch Control Controls transparency of all latches holding I/O or configuration state from the MCU IOC
Type	RW

Bits

Field Name

Description

Type

Reset

31:1

RESERVED1

Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

0b000 0000 0000 0000 0000 0000 0000 0000

Controls latches between MCU IOC and AON_IOC.

The latches are transparent by default.

They must be closed prior to power off the domain(s) controlling the IOs in order to preserve IO values on external pins.

Value	ENUM Name	Description
0x0	STATIC	Latches are static, meaning the current value on the IO pin is frozen by latches and kept even if GPIO module or a peripheral module is turned off
0x1	TRANSP	Latches are transparent, meaning the value of the IO is directly controlled by the GPIO or peripheral value

TOP:AON_IOC:CLK32KCTL

Address Offset	0x0000 0010
Physical Address	0x4009 4010	Instance	0x4009 4010
Description	SCLK_LF External Output Control
Type	RW

Bits	Field Name	Description	Type	Reset
31:1	RESERVED1	Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.	RO	0b000 0000 0000 0000 0000 0000 0000 0000
0	OE_N	0: Output enable active. SCLK_LF output on IO pin that has PORT_ID (e.g. IOC:IOCFG0.PORT_ID) set to AON_CLK32K. 1: Output enable not active	RW	1