MSP430UltrasonicLibrary
02_20_00_15
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common
USSGenericRegDef.h
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#ifndef _USSINTERNALREG_H_
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#define _USSINTERNALREG_H_
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#include <msp430.h>
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#if defined(__MSP430_HAS_SAPH__)
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#define __MSP430_BASEADDRESS_GENERIC_SAPH__ __MSP430_BASEADDRESS_SAPH__
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#elif defined(__MSP430_BASEADDRESS_SAPH_A__)
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#define __MSP430_BASEADDRESS_GENERIC_SAPH__ __MSP430_BASEADDRESS_SAPH_A__
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#else
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#error "SAPH module not supported by USS SW Library"
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#endif
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/* SAPHMCNF Control Bits */
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#define LPBE (0x0800)
/* */
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#define LPBE_0 (0x0000)
/* For manual bias mode and regular ASQ bias mode. In this
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configuration the user controls by the ASQBSW has full control
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over the TxBias and RxBias switches. */
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#define LPBE_1 (0x0800)
/* Low power bias mode. In this mode the ASQ uses the CHxEBSW and
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PGABSW as auxiliary values to achieve faster channel setting
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on reactive input loads. The ASQ has full controls over the
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bias switch multiplexer. */
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#define CPEO (0x0100)
/* */
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#define CPEO_0 (0x0000)
/* Charge pump is turned on by SDHS and ASQ related requests
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only. */
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#define CPEO_1 (0x0100)
/* Charge pump is turned on regardless of SDHS and ASQ related
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charge pump requests. */
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//#define BIMP (0x0000) /* */
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#define BIMP_0 (0x0000)
/* 200 Ohms buffer impedance for RxBias and TxBias */
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#define BIMP_1 (0x0001)
/* 600 Ohms buffer impedance for RxBias and TxBias */
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#define BIMP_2 (0x0002)
/* 1200 Ohms buffer impedance for RxBias and TxBias (default) */
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#define BIMP_3 (0x0003)
/* 2800 Ohms buffer impedance for RxBias and TxBias */
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#define LBHDEL_0 (0x0000)
/* no additional delay */
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#define LBHDEL_1 (0x1000)
/* additional hold off delay of ~100us (512 REFCLKs) */
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#define LBHDEL_1_H (0x0010)
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#define LBHDEL_2 (0x2000)
/* additional hold off delay of ~200us (1024 REFCLKs) */
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#define LBHDEL_2_H (0x0020)
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#define LBHDEL_3 (0x3000)
/* additional hold off delay of ~300us (1536 REFCLKs) */
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#define LBHDEL_3_H (0x0030)
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#define USSSWRST (0x0080)
/* */
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#define USSSWRST_L (0x0080)
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#define USSSWRST_0 (0x0000)
/* Disabled. USS (and sub modules) reset released for operation */
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#define USSSWRST_1 (0x0080)
/* Enabled. USS (and sub modules) logic held in reset state */
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#define USSSWRST_1_L (0x0080)
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#define GENERIC_SAPH_IIDX (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0000))
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#define GENERIC_SAPH_MIS (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0002))
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#define GENERIC_SAPH_RIS (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0004))
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#define GENERIC_SAPH_IMSC (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0006))
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#define GENERIC_SAPH_ICR (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0008))
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#define GENERIC_SAPH_ISR (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x000A))
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#define GENERIC_SAPH_DESCLO (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x000C))
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#define GENERIC_SAPH_DESCHI (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x000E))
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#define GENERIC_SAPH_KEY (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0010))
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#define GENERIC_SAPH_OCTL0 (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0012))
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#define GENERIC_SAPH_OCTL1 (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0014))
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#define GENERIC_SAPH_OSEL (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0016))
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#define GENERIC_SAPH_CH0PUT (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0020))
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#define GENERIC_SAPH_CH0PDT (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0022))
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#define GENERIC_SAPH_CH0TT (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0024))
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#define GENERIC_SAPH_CH1PUT (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0026))
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#define GENERIC_SAPH_CH1PDT (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0028))
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#define GENERIC_SAPH_CH1TT (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x002A))
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#define GENERIC_SAPH_MCNF (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x002C))
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#define GENERIC_SAPH_TACTL (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x002E))
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#define GENERIC_SAPH_ICTL0 (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0030))
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#define GENERIC_SAPH_BCTL (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0034))
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#define GENERIC_SAPH_PGC (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0040))
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#define GENERIC_SAPH_LP_E_PULS (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0042))
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#define GENERIC_SAPH_HP_E_PULS (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0044))
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#define GENERIC_SAPH_PGCTL (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0046))
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#define GENERIC_SAPH_PPGTRIG (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0048))
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#ifdef __MSP430_BASEADDRESS_SAPH_A__
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#define GENERIC_SAPH_XPGCTL (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x004A))
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#define GENERIC_SAPH_LP_X_PULS (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x004C))
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#define GENERIC_SAPH_HP_X_PULS (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x004E))
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#endif
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#define GENERIC_SAPH_ASCTL0 (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0060))
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#define GENERIC_SAPH_ASCTL1 (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0062))
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#define GENERIC_SAPH_ASQTRIG (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0064))
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#define GENERIC_SAPH_APOL (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0066))
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#define GENERIC_SAPH_APLEV (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0068))
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#define GENERIC_SAPH_APHIZ (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x006A))
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#define GENERIC_SAPH_ATM_A (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x006E))
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#define GENERIC_SAPH_ATM_B (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0070))
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#define GENERIC_SAPH_ATM_C (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0072))
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#define GENERIC_SAPH_ATM_D (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0074))
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#define GENERIC_SAPH_ATM_E (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0076))
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#define GENERIC_SAPH_ATM_F (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x0078))
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#define GENERIC_SAPH_TBCTL (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x007A))
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#define GENERIC_SAPH_ATIMLO (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x007C))
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#define GENERIC_SAPH_ATIMHI (*(int *)(__MSP430_BASEADDRESS_GENERIC_SAPH__ + 0x007E))
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#endif
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, Texas Instruments Incorporated. All rights reserved.
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