Go to the documentation of this file.00001 #ifndef __MSP430WARE_ADC12_B_H__
00002 #define __MSP430WARE_ADC12_B_H__
00003
00004 #define __MSP430_HAS_ADC12_B__
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00011
00012 #define ADC12B_SAMPLEHOLDSOURCE_SC (ADC12SHS_0)
00013 #define ADC12B_SAMPLEHOLDSOURCE_1 (ADC12SHS_1)
00014 #define ADC12B_SAMPLEHOLDSOURCE_2 (ADC12SHS_2)
00015 #define ADC12B_SAMPLEHOLDSOURCE_3 (ADC12SHS_3)
00016 #define ADC12B_SAMPLEHOLDSOURCE_4 (ADC12SHS_4)
00017 #define ADC12B_SAMPLEHOLDSOURCE_5 (ADC12SHS_5)
00018 #define ADC12B_SAMPLEHOLDSOURCE_6 (ADC12SHS_6)
00019 #define ADC12B_SAMPLEHOLDSOURCE_7 (ADC12SHS_7)
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00021
00022
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00025
00026
00027 #define ADC12B_CLOCKSOURCE_ADC12OSC (ADC12SSEL_0)
00028 #define ADC12B_CLOCKSOURCE_ACLK (ADC12SSEL_1)
00029 #define ADC12B_CLOCKSOURCE_MCLK (ADC12SSEL_2)
00030 #define ADC12B_CLOCKSOURCE_SMCLK (ADC12SSEL_3)
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00032
00033
00034
00035
00036
00037
00038 #define ADC12B_CLOCKDIVIDER_1 (ADC12DIV_0)
00039 #define ADC12B_CLOCKDIVIDER_2 (ADC12DIV_1)
00040 #define ADC12B_CLOCKDIVIDER_3 (ADC12DIV_2)
00041 #define ADC12B_CLOCKDIVIDER_4 (ADC12DIV_3)
00042 #define ADC12B_CLOCKDIVIDER_5 (ADC12DIV_4)
00043 #define ADC12B_CLOCKDIVIDER_6 (ADC12DIV_5)
00044 #define ADC12B_CLOCKDIVIDER_7 (ADC12DIV_6)
00045 #define ADC12B_CLOCKDIVIDER_8 (ADC12DIV_7)
00046
00047
00048
00049
00050
00051
00052
00053 #define ADC12B_CLOCKPREDIVIDER__1 (ADC12PDIV__1)
00054 #define ADC12B_CLOCKPREDIVIDER__4 (ADC12PDIV__4)
00055 #define ADC12B_CLOCKPREDIVIDER__32 (ADC12PDIV__32)
00056 #define ADC12B_CLOCKPREDIVIDER__64 (ADC12PDIV__64)
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00058
00059
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00061
00062
00063
00064 #define ADC12B_RESOLUTION_8BIT (ADC12RES__8BIT)
00065 #define ADC12B_RESOLUTION_10BIT (ADC12RES__10BIT)
00066 #define ADC12B_RESOLUTION_12BIT (ADC12RES__12BIT)
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00072
00073
00074 #define ADC12B_CYCLEHOLD_4_CYCLES (ADC12SHT0_0)
00075 #define ADC12B_CYCLEHOLD_8_CYCLES (ADC12SHT0_1)
00076 #define ADC12B_CYCLEHOLD_16_CYCLES (ADC12SHT0_2)
00077 #define ADC12B_CYCLEHOLD_32_CYCLES (ADC12SHT0_3)
00078 #define ADC12B_CYCLEHOLD_64_CYCLES (ADC12SHT0_4)
00079 #define ADC12B_CYCLEHOLD_96_CYCLES (ADC12SHT0_5)
00080 #define ADC12B_CYCLEHOLD_128_CYCLES (ADC12SHT0_6)
00081 #define ADC12B_CYCLEHOLD_192_CYCLES (ADC12SHT0_7)
00082 #define ADC12B_CYCLEHOLD_256_CYCLES (ADC12SHT0_8)
00083 #define ADC12B_CYCLEHOLD_384_CYCLES (ADC12SHT0_9)
00084 #define ADC12B_CYCLEHOLD_512_CYCLES (ADC12SHT0_10)
00085 #define ADC12B_CYCLEHOLD_768_CYCLES (ADC12SHT0_11)
00086 #define ADC12B_CYCLEHOLD_1024_CYCLES (ADC12SHT0_12)
00087
00088
00089
00090
00091
00092
00093
00094 #define ADC12B_MULTIPLESAMPLESDISABLE ( !(ADC12MSC) )
00095 #define ADC12B_MULTIPLESAMPLESENABLE (ADC12MSC)
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00097
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00099
00100
00101
00102
00103
00104 #define ADC12B_MEMORY_0 (0x00)
00105 #define ADC12B_MEMORY_1 (0x02)
00106 #define ADC12B_MEMORY_2 (0x04)
00107 #define ADC12B_MEMORY_3 (0x06)
00108 #define ADC12B_MEMORY_4 (0x08)
00109 #define ADC12B_MEMORY_5 (0x0A)
00110 #define ADC12B_MEMORY_6 (0x0C)
00111 #define ADC12B_MEMORY_7 (0x0E)
00112 #define ADC12B_MEMORY_8 (0x10)
00113 #define ADC12B_MEMORY_9 (0x12)
00114 #define ADC12B_MEMORY_10 (0x14)
00115 #define ADC12B_MEMORY_11 (0x16)
00116 #define ADC12B_MEMORY_12 (0x18)
00117 #define ADC12B_MEMORY_13 (0x1A)
00118 #define ADC12B_MEMORY_14 (0x1C)
00119 #define ADC12B_MEMORY_15 (0x1E)
00120 #define ADC12B_MEMORY_16 (0x20)
00121 #define ADC12B_MEMORY_17 (0x22)
00122 #define ADC12B_MEMORY_18 (0x24)
00123 #define ADC12B_MEMORY_19 (0x26)
00124 #define ADC12B_MEMORY_20 (0x28)
00125 #define ADC12B_MEMORY_21 (0x2A)
00126 #define ADC12B_MEMORY_22 (0x2C)
00127 #define ADC12B_MEMORY_23 (0x2E)
00128 #define ADC12B_MEMORY_24 (0x30)
00129 #define ADC12B_MEMORY_25 (0x32)
00130 #define ADC12B_MEMORY_26 (0x34)
00131 #define ADC12B_MEMORY_27 (0x36)
00132 #define ADC12B_MEMORY_28 (0x38)
00133 #define ADC12B_MEMORY_29 (0x3A)
00134 #define ADC12B_MEMORY_30 (0x3C)
00135 #define ADC12B_MEMORY_31 (0x3E)
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00137
00138
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00141
00142
00143 #define ADC12B_MAPINTCH3 (ADC12ICH3MAP)
00144 #define ADC12B_MAPINTCH2 (ADC12ICH2MAP)
00145 #define ADC12B_MAPINTCH1 (ADC12ICH1MAP)
00146 #define ADC12B_MAPINTCH0 (ADC12ICH0MAP)
00147 #define ADC12B_TEMPSENSEMAP (ADC12TCMAP)
00148 #define ADC12B_BATTMAP (ADC12BATMAP)
00149
00150
00151
00152
00153
00154
00155
00156 #define START_AT_ADC12MEM0 (ADC12CSTARTADD_0)
00157 #define START_AT_ADC12MEM1 (ADC12CSTARTADD_1)
00158 #define START_AT_ADC12MEM2 (ADC12CSTARTADD_2)
00159 #define START_AT_ADC12MEM3 (ADC12CSTARTADD_3)
00160 #define START_AT_ADC12MEM4 (ADC12CSTARTADD_4)
00161 #define START_AT_ADC12MEM5 (ADC12CSTARTADD_5)
00162 #define START_AT_ADC12MEM6 (ADC12CSTARTADD_6)
00163 #define START_AT_ADC12MEM7 (ADC12CSTARTADD_7)
00164 #define START_AT_ADC12MEM8 (ADC12CSTARTADD_8)
00165 #define START_AT_ADC12MEM9 (ADC12CSTARTADD_9)
00166 #define START_AT_ADC12MEM10 (ADC12CSTARTADD_10)
00167 #define START_AT_ADC12MEM11 (ADC12CSTARTADD_11)
00168 #define START_AT_ADC12MEM12 (ADC12CSTARTADD_12)
00169 #define START_AT_ADC12MEM13 (ADC12CSTARTADD_13)
00170 #define START_AT_ADC12MEM14 (ADC12CSTARTADD_14)
00171 #define START_AT_ADC12MEM15 (ADC12CSTARTADD_15)
00172 #define START_AT_ADC12MEM16 (ADC12CSTARTADD_16)
00173 #define START_AT_ADC12MEM17 (ADC12CSTARTADD_17)
00174 #define START_AT_ADC12MEM18 (ADC12CSTARTADD_18)
00175 #define START_AT_ADC12MEM19 (ADC12CSTARTADD_19)
00176 #define START_AT_ADC12MEM20 (ADC12CSTARTADD_20)
00177 #define START_AT_ADC12MEM21 (ADC12CSTARTADD_21)
00178 #define START_AT_ADC12MEM22 (ADC12CSTARTADD_22)
00179 #define START_AT_ADC12MEM23 (ADC12CSTARTADD_23)
00180 #define START_AT_ADC12MEM24 (ADC12CSTARTADD_24)
00181 #define START_AT_ADC12MEM25 (ADC12CSTARTADD_25)
00182 #define START_AT_ADC12MEM26 (ADC12CSTARTADD_26)
00183 #define START_AT_ADC12MEM27 (ADC12CSTARTADD_27)
00184 #define START_AT_ADC12MEM28 (ADC12CSTARTADD_28)
00185 #define START_AT_ADC12MEM29 (ADC12CSTARTADD_29)
00186 #define START_AT_ADC12MEM30 (ADC12CSTARTADD_30)
00187 #define START_AT_ADC12MEM31 (ADC12CSTARTADD_31)
00188
00189
00190
00191
00192
00193
00194 #define ADC12B_INPUT_A0 (ADC12INCH_0)
00195 #define ADC12B_INPUT_A1 (ADC12INCH_1)
00196 #define ADC12B_INPUT_A2 (ADC12INCH_2)
00197 #define ADC12B_INPUT_A3 (ADC12INCH_3)
00198 #define ADC12B_INPUT_A4 (ADC12INCH_4)
00199 #define ADC12B_INPUT_A5 (ADC12INCH_5)
00200 #define ADC12B_INPUT_A6 (ADC12INCH_6)
00201 #define ADC12B_INPUT_A7 (ADC12INCH_7)
00202 #define ADC12B_INPUT_A8 (ADC12INCH_8)
00203 #define ADC12B_INPUT_A9 (ADC12INCH_9)
00204 #define ADC12B_INPUT_A10 (ADC12INCH_10)
00205 #define ADC12B_INPUT_A11 (ADC12INCH_11)
00206 #define ADC12B_INPUT_A12 (ADC12INCH_12)
00207 #define ADC12B_INPUT_A13 (ADC12INCH_13)
00208 #define ADC12B_INPUT_A14 (ADC12INCH_14)
00209 #define ADC12B_INPUT_A15 (ADC12INCH_15)
00210 #define ADC12B_INPUT_A16 (ADC12INCH_16)
00211 #define ADC12B_INPUT_A17 (ADC12INCH_17)
00212 #define ADC12B_INPUT_A18 (ADC12INCH_18)
00213 #define ADC12B_INPUT_A19 (ADC12INCH_19)
00214 #define ADC12B_INPUT_A20 (ADC12INCH_20)
00215 #define ADC12B_INPUT_A21 (ADC12INCH_21)
00216 #define ADC12B_INPUT_A22 (ADC12INCH_22)
00217 #define ADC12B_INPUT_A23 (ADC12INCH_23)
00218 #define ADC12B_INPUT_A24 (ADC12INCH_24)
00219 #define ADC12B_INPUT_A25 (ADC12INCH_25)
00220 #define ADC12B_INPUT_A26 (ADC12INCH_26)
00221 #define ADC12B_INPUT_A27 (ADC12INCH_27)
00222 #define ADC12B_INPUT_A28 (ADC12INCH_28)
00223 #define ADC12B_INPUT_A29 (ADC12INCH_29)
00224 #define ADC12B_INPUT_TCMAP (ADC12INCH_30)
00225 #define ADC12B_INPUT_BATMAP (ADC12INCH_31)
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00227
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00231
00232
00233 #define ADC12B_VREFPOS_AVCC_VREFNEG_VSS (ADC12VRSEL_0)
00234 #define ADC12B_VREFPOS_INTBUF_VREFNEG_VSS (ADC12VRSEL_1)
00235 #define ADC12B_VREFPOS_EXTNEG_VREFNEG_VSS (ADC12VRSEL_2)
00236 #define ADC12B_VREFPOS_EXTBUF_VREFNEG_VSS (ADC12VRSEL_3)
00237 #define ADC12B_VREFPOS_EXTPOS_VREFNEG_VSS (ADC12VRSEL_4)
00238 #define ADC12B_VREFPOS_AVCC_VREFNEG_EXTBUF (ADC12VRSEL_5)
00239 #define ADC12B_VREFPOS_AVCC_VREFNEG_EXTPOS (ADC12VRSEL_6)
00240 #define ADC12B_VREFPOS_INTBUF_VREFNEG_EXTPOS (ADC12VRSEL_7)
00241 #define ADC12B_VREFPOS_AVCC_VREFNEG_INTBUF (ADC12VRSEL_9)
00242 #define ADC12B_VREFPOS_EXTPOS_VREFNEG_INTBUF (ADC12VRSEL_11)
00243 #define ADC12B_VREFPOS_AVCC_VREFNEG_EXTNEG (ADC12VRSEL_12)
00244 #define ADC12B_VREFPOS_INTBUF_VREFNEG_EXTNEG (ADC12VRSEL_13)
00245 #define ADC12B_VREFPOS_EXTPOS_VREFNEG_EXTNEG (ADC12VRSEL_14)
00246 #define ADC12B_VREFPOS_EXTBUF_VREFNEG_EXTNEG (ADC12VRSEL_15)
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00248
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00252
00253
00254 #define ADC12B_NOTENDOFSEQUENCE ( !(ADC12EOS) )
00255 #define ADC12B_ENDOFSEQUENCE (ADC12EOS)
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00257
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00261
00262
00263 #define ADC12B_IE0 (ADC12IE0)
00264 #define ADC12B_IE1 (ADC12IE1)
00265 #define ADC12B_IE2 (ADC12IE2)
00266 #define ADC12B_IE3 (ADC12IE3)
00267 #define ADC12B_IE4 (ADC12IE4)
00268 #define ADC12B_IE5 (ADC12IE5)
00269 #define ADC12B_IE6 (ADC12IE6)
00270 #define ADC12B_IE7 (ADC12IE7)
00271 #define ADC12B_IE8 (ADC12IE8)
00272 #define ADC12B_IE9 (ADC12IE9)
00273 #define ADC12B_IE10 (ADC12IE10)
00274 #define ADC12B_IE11 (ADC12IE11)
00275 #define ADC12B_IE12 (ADC12IE12)
00276 #define ADC12B_IE13 (ADC12IE13)
00277 #define ADC12B_IE14 (ADC12IE14)
00278 #define ADC12B_IE15 (ADC12IE15)
00279
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00285
00286 #define ADC12B_IE16 (ADC12IE16)
00287 #define ADC12B_IE17 (ADC12IE17)
00288 #define ADC12B_IE18 (ADC12IE18)
00289 #define ADC12B_IE19 (ADC12IE19)
00290 #define ADC12B_IE20 (ADC12IE20)
00291 #define ADC12B_IE21 (ADC12IE21)
00292 #define ADC12B_IE22 (ADC12IE22)
00293 #define ADC12B_IE23 (ADC12IE23)
00294 #define ADC12B_IE24 (ADC12IE24)
00295 #define ADC12B_IE25 (ADC12IE25)
00296 #define ADC12B_IE26 (ADC12IE26)
00297 #define ADC12B_IE27 (ADC12IE27)
00298 #define ADC12B_IE28 (ADC12IE28)
00299 #define ADC12B_IE29 (ADC12IE29)
00300 #define ADC12B_IE30 (ADC12IE30)
00301 #define ADC12B_IE31 (ADC12IE31)
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00307
00308
00309 #define ADC12B_INIE (ADC12INIE)
00310 #define ADC12B_LOIE (ADC12LOIE)
00311 #define ADC12B_HIIE (ADC12HIIE)
00312 #define ADC12B_OVIE (ADC12OVIE)
00313 #define ADC12B_TOVIE (ADC12TOVIE)
00314 #define ADC12B_RDYIE (ADC12RDYIE)
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00320
00321
00322 #define ADC12B_IFG0 (ADC12IFG0)
00323 #define ADC12B_IFG1 (ADC12IFG1)
00324 #define ADC12B_IFG2 (ADC12IFG2)
00325 #define ADC12B_IFG3 (ADC12IFG3)
00326 #define ADC12B_IFG4 (ADC12IFG4)
00327 #define ADC12B_IFG5 (ADC12IFG5)
00328 #define ADC12B_IFG6 (ADC12IFG6)
00329 #define ADC12B_IFG7 (ADC12IFG7)
00330 #define ADC12B_IFG8 (ADC12IFG8)
00331 #define ADC12B_IFG9 (ADC12IFG9)
00332 #define ADC12B_IFG10 (ADC12IFG10)
00333 #define ADC12B_IFG11 (ADC12IFG11)
00334 #define ADC12B_IFG12 (ADC12IFG12)
00335 #define ADC12B_IFG13 (ADC12IFG13)
00336 #define ADC12B_IFG14 (ADC12IFG14)
00337 #define ADC12B_IFG15 (ADC12IFG15)
00338
00339
00340
00341
00342
00343
00344
00345 #define ADC12B_IFG16 (ADC12IFG16)
00346 #define ADC12B_IFG17 (ADC12IFG17)
00347 #define ADC12B_IFG18 (ADC12IFG18)
00348 #define ADC12B_IFG19 (ADC12IFG19)
00349 #define ADC12B_IFG20 (ADC12IFG20)
00350 #define ADC12B_IFG21 (ADC12IFG21)
00351 #define ADC12B_IFG22 (ADC12IFG22)
00352 #define ADC12B_IFG23 (ADC12IFG23)
00353 #define ADC12B_IFG24 (ADC12IFG24)
00354 #define ADC12B_IFG25 (ADC12IFG25)
00355 #define ADC12B_IFG26 (ADC12IFG26)
00356 #define ADC12B_IFG27 (ADC12IFG27)
00357 #define ADC12B_IFG28 (ADC12IFG28)
00358 #define ADC12B_IFG29 (ADC12IFG29)
00359 #define ADC12B_IFG30 (ADC12IFG30)
00360 #define ADC12B_IFG31 (ADC12IFG31)
00361
00362
00363
00364
00365
00366
00367
00368 #define ADC12B_INIFG (ADC12INIFG)
00369 #define ADC12B_LOIFG (ADC12LOIFG)
00370 #define ADC12B_HIIFG (ADC12HIIFG)
00371 #define ADC12B_OVIFG (ADC12OVIFG)
00372 #define ADC12B_TOVIFG (ADC12TOVIFG)
00373 #define ADC12B_RDYIFG (ADC12RDYIFG)
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00375
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00379
00380
00381 #define ADC12B_SINGLECHANNEL (ADC12CONSEQ_0)
00382 #define ADC12B_SEQOFCHANNELS (ADC12CONSEQ_1)
00383 #define ADC12B_REPEATED_SINGLECHANNEL (ADC12CONSEQ_2)
00384 #define ADC12B_REPEATED_SEQOFCHANNELS (ADC12CONSEQ_3)
00385
00386
00387
00388
00389
00390
00391
00392 #define ADC12B_COMPLETECONVERSION (0x0)
00393 #define ADC12B_PREEMPTCONVERSION (0x1)
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00397
00398
00399
00400
00401 #define ADC12B_NONINVERTEDSIGNAL ( !(ADC12ISSH) )
00402 #define ADC12B_INVERTEDSIGNAL (ADC12ISSH)
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00404
00405
00406
00407
00408
00409
00410 #define ADC12B_UNSIGNED_BINARY ( !(ADC12DF) )
00411 #define ADC12B_SIGNED_2SCOMPLEMENT (ADC12DF)
00412
00413
00414
00415
00416
00417
00418
00419 #define ADC12B_REGULARPOWERMODE ( !(ADC12PWRMD) )
00420 #define ADC12B_LOWPOWERMODE (ADC12PWRMD)
00421
00422
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00424
00425
00426
00427 #define ADC12B_NOTBUSY (0x0)
00428 #define ADC12B_BUSY (0x1)
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00430
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00434
00435
00436 extern unsigned short ADC12B_init (unsigned int baseAddress,
00437 unsigned int sampleHoldSignalSourceSelect,
00438 unsigned char clockSourceSelect,
00439 unsigned int clockSourceDivider,
00440 unsigned int clockSourcePredivider,
00441 unsigned int internalChannelMap);
00442
00443 void ADC12B_enable (unsigned int baseAddress);
00444
00445 void ADC12B_disable (unsigned int baseAddress);
00446
00447 extern void ADC12B_setupSamplingTimer (unsigned int baseAddress,
00448 unsigned int clockCycleHoldCountLowMem,
00449 unsigned int clockCycleHoldCountHighMem,
00450 unsigned short multipleSamplesEnabled);
00451
00452 extern void ADC12B_disableSamplingTimer (unsigned int baseAddress);
00453
00454 extern void ADC12B_memoryConfigure (unsigned int baseAddress,
00455 unsigned char memoryBufferControlIndex,
00456 unsigned char inputSourceSelect,
00457 unsigned int refVoltageSourceSelect,
00458 unsigned short endOfSequence);
00459
00460 extern void ADC12B_enableInterrupt (unsigned int baseAddress,
00461 unsigned int interruptMask0,
00462 unsigned int interruptMask1,
00463 unsigned int interruptMask2);
00464
00465 extern void ADC12B_disableInterrupt (unsigned int baseAddress,
00466 unsigned int interruptMask0,
00467 unsigned int interruptMask1,
00468 unsigned int interruptMask2);
00469
00470 extern void ADC12B_clearInterrupt (unsigned int baseAddress,
00471 unsigned char interruptRegisterChoice,
00472 unsigned int memoryInterruptFlagMask);
00473
00474 extern unsigned char ADC12B_getInterruptStatus (unsigned int baseAddress,
00475 unsigned char interruptRegisterChoice,
00476 unsigned int memoryInterruptFlagMask);
00477
00478 extern void ADC12B_startConversion (unsigned int baseAddress,
00479 unsigned int startingMemoryBufferIndex,
00480 unsigned char conversionSequenceModeSelect);
00481
00482 void ADC12B_disableConversions (unsigned int baseAddress,
00483 unsigned short preempt);
00484
00485 int ADC12B_getResults (unsigned int baseAddress,
00486 unsigned char memoryBufferIndex);
00487
00488 void ADC12B_setResolution (unsigned int baseAddress,
00489 unsigned char resolutionSelect);
00490
00491 extern void ADC12B_setSampleHoldSignalInversion (unsigned int baseAddress,
00492 unsigned int invertedSignal);
00493
00494 extern void ADC12B_setDataReadBackFormat (unsigned int baseAddress,
00495 unsigned short readBackFormat);
00496
00497 extern void ADC12B_enableReferenceBurst (unsigned int baseAddress);
00498
00499 extern void ADC12B_disableReferenceBurst (unsigned int baseAddress);
00500
00501 extern void ADC12B_setAdcPowerMode (unsigned int baseAddress,
00502 unsigned short powerMode);
00503
00504 extern unsigned long ADC12B_getMemoryAddressForDMA (unsigned int baseAddress,
00505 unsigned char memoryIndex);
00506
00507 extern unsigned short ADC12B_isBusy (unsigned int baseAddress);
00508
00509 #endif