I2CCC32XX.h

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/*
 * Copyright (c) 2015-2020, Texas Instruments Incorporated
 * All rights reserved.
 *
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 * modification, are permitted provided that the following conditions
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 *
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 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
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 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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/*!****************************************************************************
 *  @file       I2CCC32XX.h
 *
 *  @brief      I2C driver implementation for a CC32XX I2C controller.
 *
 *  The I2C header file should be included in an application as follows:
 *  @code
 *  #include <ti/drivers/I2C.h>
 *  #include <ti/drivers/i2c/I2CCC32XX.h>
 *  @endcode
 *
 *  Refer to @ref I2C.h for a complete description of APIs and usage.
 *
 *  ## Supported Bit Rates ##
 *    - #I2C_100kHz
 *    - #I2C_400kHz
 *
 ******************************************************************************
 */

#ifndef ti_drivers_i2c_I2CCC32XX__include
#define ti_drivers_i2c_I2CCC32XX__include

#include <stdint.h>
#include <stdbool.h>

#include <ti/drivers/I2C.h>
#include <ti/drivers/dpl/HwiP.h>
#include <ti/drivers/dpl/SemaphoreP.h>
#include <ti/drivers/Power.h>

#ifdef __cplusplus
extern "C" {
#endif

/*
 *  Macros defining possible I2C signal pin mux options
 *
 *  The bits in the pin mode macros are as follows:
 *  The lower 8 bits of the macro refer to the pin, offset by 1, to match
 *  driverlib pin defines.  For example, I2CCC32XX_PIN_01_I2C_SCL & 0xff = 0,
 *  which equals PIN_01 in driverlib pin.h.  By matching the PIN_xx defines in
 *  driverlib pin.h, we can pass the pin directly to the driverlib functions.
 *  The upper 8 bits of the macro correspond to the pin mux confg mode
 *  value for the pin to operate in the I2C mode.  For example, pin 1 is
 *  configured with mode 1 to operate as I2C_SCL.
 */
#define I2CCC32XX_PIN_01_I2C_SCL  0x100 
#define I2CCC32XX_PIN_02_I2C_SDA  0x101 
#define I2CCC32XX_PIN_03_I2C_SCL  0x502 
#define I2CCC32XX_PIN_04_I2C_SDA  0x503 
#define I2CCC32XX_PIN_05_I2C_SCL  0x504 
#define I2CCC32XX_PIN_06_I2C_SDA  0x505 
#define I2CCC32XX_PIN_16_I2C_SCL  0x90F 
#define I2CCC32XX_PIN_17_I2C_SDA  0x910 
/* Add I2CCC32XX_STATUS_* macros here */

/* Add I2CCC32XX_CMD_* macros here */

/* I2C function table pointer */
extern const I2C_FxnTable I2CCC32XX_fxnTable;

typedef struct {
    unsigned int baseAddr;
    unsigned int intNum;
    unsigned int intPriority;
    uint16_t clkPin;
    uint16_t dataPin;
} I2CCC32XX_HWAttrsV1;

typedef struct {
    /* Grants exclusive access to I2C */
    SemaphoreP_Handle mutex;

    /* Notify finished I2C transfer */
    SemaphoreP_Handle transferComplete;

    /* Hardware interrupt handle */
    HwiP_Handle hwiHandle;

    /* Blocking or Callback mode */
    I2C_TransferMode transferMode;

    /* Application callback function pointer */
    I2C_CallbackFxn transferCallbackFxn;

    /* Pointer to current I2C transaction */
    I2C_Transaction *currentTransaction;

    /* Head and tail pointers for queued transactions */
    I2C_Transaction * volatile headPtr;
    I2C_Transaction *tailPtr;

    /* Pointers to transaction buffers */
    const uint8_t * writeBuf;
    uint8_t *readBuf;

    /* Read, write, and burst counters */
    size_t writeCount;
    size_t readCount;
    uint16_t burstCount;
    bool burstStarted;

    /* Flag to indicate module is open */
    bool isOpen;

    /* Enumerated bit rate */
    I2C_BitRate bitRate;

    /* For notification of wake from LPDS */
    Power_NotifyObj notifyObj;
} I2CCC32XX_Object;
#ifdef __cplusplus
}
#endif

#endif /* ti_drivers_i2c_I2CCC32XX__include */