IAR Cortex-M4 Object Size Benchmarks
Target Platform: ti.platforms.simplelink:CC3200:1
Tool Chain Version: 8.32.2.178
BIOS Version: bios_6_80_00_08_eng
XDCTools Version: xdctools_3_60_00_24_core
Object Name | Size |
---|---|
Hwi | 216 |
Swi | 224 |
Task | 264 |
Semaphore | 200 |
GateMutex | 208 |
Clock | 208 |
POSIX Pthread | 352 |
POSIX Semaphore | 28 |
POSIX Mutex | 168 |
POSIX Timer | 232 |
The M4 target also supports zero latency interrupts. See ti.sysbios.family.arm.m3.Hwi CDOCs for details.
See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.