1    /*
     2     *  Copyright (c) 2015 by Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    
    13    /*
    14     *  ======== Platform.xdc ========
    15     *  Platform support for AM572X
    16     */
    17    
    18    /*!
    19     *  ======== Platform ========
    20     *  Platform support for AM572X
    21     *
    22     *  This module implements xdc.platform.IPlatform and defines configuration
    23     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    24     *
    25     *  The configuration parameters are initialized in this package's
    26     *  configuration script (package.cfg) and "bound" to the TCOM object
    27     *  model.  Once they are part of the model, these parameters are
    28     *  queried by a program's configuration script.
    29     *
    30     *  This particular platform has 1 Cortex-A15, 2 Benelli/IPU
    31     *  Sub-system (Dual M4's) and 2 C66x DSP's.
    32     */
    33    metaonly module Platform inherits xdc.platform.IPlatform
    34    {
    35        readonly config xdc.platform.IPlatform.Board BOARD = {
    36            id:             "0",
    37            boardName:      "evmAM572X",
    38            boardFamily:    "evmAM572X",
    39            boardRevision:  null,
    40        };
    41    
    42        readonly config xdc.platform.IExeContext.Cpu DSP = {
    43            id:             "0",
    44            clockRate:      700,
    45            catalogName:    "ti.catalog.c6000",
    46            deviceName:     "DRA7XX",
    47            revision:       "1.0",
    48        };
    49    
    50        /* Benelli M4 Subsystem */
    51        readonly config xdc.platform.IExeContext.Cpu M4 = {
    52            id:             "1",
    53            clockRate:      212.8,
    54            catalogName:    "ti.catalog.arm.cortexm4",
    55            deviceName:     "DRA7XX",
    56            revision:       "1.0",
    57        };
    58    
    59        /* GPP */
    60        readonly config xdc.platform.IExeContext.Cpu GPP = {
    61            id:             "3",
    62            clockRate:      1500.0,  /* Typically set by the HLOS */
    63            catalogName:    "ti.catalog.arm.cortexa15",
    64            deviceName:     "DRA7XX",
    65            revision:       "1.0"
    66        };
    67    
    68    /*  Memory Map for ti.platforms.evmAM572X
    69     *  
    70     *  Virtual     Physical        Size            Comment
    71     *  ------------------------------------------------------------------------
    72     *              8000_0000  1000_0000  ( 256 MB) External Memory
    73     *
    74     *  0000_0000 0 8000_0000        100  ( 256  B) --------
    75     *              8000_0100       FF00  ( ~64 KB) --------
    76     *  0000_0000   8001_0000        100  ( 256  B) --------
    77     *              8001_0100       FF00  ( ~64 KB) --------
    78     *  0000_0000   8002_0000        100  ( 256  B) --------
    79     *              8002_0100       FF00  ( ~64 KB) --------
    80     *  0000_0000   8003_0000        100  ( 256  B) --------
    81     *              8003_0100    FE_FF00  ( ~16 MB) --------
    82     *            1 8100_0000    40_0000  (   4 MB) --------
    83     *              8140_0000    C0_0000  (  12 MB) --------
    84     *            2 8200_0000    40_0000  (   4 MB) --------
    85     *              8240_0000    C0_0000  (  12 MB) --------
    86     *            3 8300_0000    40_0000  (   4 MB) --------
    87     *              8340_0000    C0_0000  (  12 MB) --------
    88     *            4 8400_0000    40_0000  (   4 MB) --------
    89     *              8440_0000    C0_0000  (  12 MB) --------
    90     *            5 8500_0000   100_0000  (  16 MB) --------
    91     *            6 8600_0000   100_0000  (  16 MB) --------
    92     *            7 8700_0000   100_0000  (  16 MB) --------
    93     *            8 8800_0000   100_0000  (  16 MB) --------
    94     *            9 8900_0000   100_0000  (  16 MB) --------
    95     *            A 8A00_0000    80_0000  (   8 MB) IPU1 (code, data), benelli
    96     *              8A80_0000    80_0000  (   8 MB) IPU2 (code, data), benelli
    97     *            B 8B00_0000   100_0000  (  16 MB) HOST (code, data)
    98     *            C 8C00_0000   100_0000  (  16 MB) DSP1 (code, data)
    99     *            D 8D00_0000   100_0000  (  16 MB) DSP2 (code, data)
   100     *            E 8E00_0000   100_0000  (  16 MB) SR_0 (ipc)
   101     *            F 8F00_0000   100_0000  (  16 MB) --------
   102     */
   103    
   104        readonly config Any SR_0 = {
   105            name: "SR_0", space: "data", access: "RWX",
   106            base: 0x8E000000, len: 0x1000000,
   107            comment: "SR#0 Memory (16 MB)"
   108        };
   109    
   110        readonly config Any DSP1 = {
   111            externalMemoryMap: [
   112                [ "DSP1_PROG", {
   113                    name: "DSP1_PROG", space: "code/data", access: "RWX",
   114                    base: 0x8C000000, len: 0x1000000,
   115                    comment: "DSP1 Program Memory (16 MB)"
   116                }],
   117                [ "SR_0", SR_0 ]
   118            ],
   119            codeMemory:  "DSP1_PROG",
   120            dataMemory:  "DSP1_PROG",
   121            stackMemory: "DSP1_PROG",
   122            l1DMode: "32k",
   123            l1PMode: "32k",
   124            l2Mode: "128k"
   125        };
   126    
   127        readonly config Any DSP2 = {
   128            externalMemoryMap: [
   129                [ "DSP2_PROG", {
   130                    name: "DSP2_PROG", space: "code/data", access: "RWX",
   131                    base: 0x8D000000, len: 0x1000000,
   132                    comment: "DSP2 Program Memory (16 MB)"
   133                }],
   134                [ "SR_0", SR_0 ]
   135            ],
   136            codeMemory:  "DSP2_PROG",
   137            dataMemory:  "DSP2_PROG",
   138            stackMemory: "DSP2_PROG",
   139            l1DMode: "32k",
   140            l1PMode: "32k",
   141            l2Mode: "128k"
   142        };
   143    
   144        readonly config Any IPU1 = {
   145            externalMemoryMap: [
   146                [ "IPU1_PROG", {
   147                    name: "IPU1_PROG", space: "code/data", access: "RWX",
   148                    base: 0x8A000000, len: 0x800000,
   149                    comment: "IPU1 Program Memory (8 MB)"
   150                }],
   151                [ "SR_0", SR_0 ]
   152            ],
   153            codeMemory:  "IPU1_PROG",
   154            dataMemory:  "IPU1_PROG",
   155            stackMemory: "IPU1_PROG"
   156        };
   157    
   158        readonly config Any IPU2 = {
   159            externalMemoryMap: [
   160                [ "IPU2_PROG", {
   161                    name: "IPU2_PROG", space: "code/data", access: "RWX",
   162                    base: 0x8A800000, len: 0x800000,
   163                    comment: "IPU2 Program Memory (8 MB)"
   164                }],
   165                [ "SR_0", SR_0 ]
   166            ],
   167            codeMemory:  "IPU2_PROG",
   168            dataMemory:  "IPU2_PROG",
   169            stackMemory: "IPU2_PROG"
   170        };
   171    
   172        readonly config Any HOST = {
   173            externalMemoryMap: [
   174                [ "HOST_PROG", {
   175                    name: "HOST_PROG", space: "code/data", access: "RWX",
   176                    base: 0x8B000000, len: 0x1000000,
   177                    comment: "HOST Program Memory (16 MB)"
   178                }],
   179                [ "SR_0", SR_0 ]
   180            ],
   181            codeMemory:  "HOST_PROG",
   182            dataMemory:  "HOST_PROG",
   183            stackMemory: "HOST_PROG"
   184        };
   185    
   186    instance:
   187    
   188        /*!
   189         *  ======== externalMemoryMap ========
   190         *  Memory regions as defined in the AM572X Specification
   191         */
   192        override readonly config xdc.platform.IPlatform.Memory
   193            externalMemoryMap[string] = [
   194                ["EXT_RAM", {
   195                    comment: "2 GB External RAM Memory",
   196                    name: "EXT_RAM",
   197                    base: 0x80000000,
   198                    len:  0x80000000
   199                }]
   200            ];
   201    
   202        /*
   203         *  ======== l1PMode ========
   204         *  Define the amount of L1P RAM used for L1 Program Cache.
   205         *
   206         *  Check the device documentation for valid values.
   207         */
   208        config String l1PMode = "32k";
   209    
   210        /*
   211         *  ======== l1DMode ========
   212         *  Define the amount of L1D RAM used for L1 Data Cache.
   213         *
   214         *  Check the device documentation for valid values.
   215         */
   216        config String l1DMode = "32k";
   217    
   218        /*
   219         *  ======== l2Mode ========
   220         *  Define the amount of L2 RAM used for L2 Cache.
   221         *
   222         *  Check the device documentation for valid values.
   223         */
   224        config String l2Mode = "0k";
   225    };
   226    /*
   227     *  @(#) ti.platforms.evmAM572X; 1, 0, 0, 0,; 8-14-2015 13:39:59; /db/ztree/library/trees/platform/platform-q07/src/
   228     */
   229