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17
18 package ti.catalog.c2800.init;
19
20 import xdc.rov.ViewInfo;
21
22 /*!
23 * ======== Boot ========
24 * 28x Boot Support.
25 *
26 * The Boot module supports boot initialization for the 28x devices.
27 * A special boot init function is created based on the configuration
28 * settings for this module. This function is hooked into the
29 * xdc.runtime.Reset.fxns[] array and called very early at boot time (prior
30 * to cinit processing).
31 *
32 * The code to support the boot module is placed in a separate section
33 * named `".text:.bootCodeSection"` to allow placement of this section in
34 * the linker .cmd file if necessary. This section is a subsection of the
35 * `".text"` section so this code will be placed into the .text section unless
36 * explicitly placed, either through
37 * `{@link xdc.cfg.Program#sectMap Program.sectMap}` or through a linker
38 * command file.
39 */
40 @Template("./Boot.xdt")
41
42 metaonly module Boot
43 {
44 metaonly struct ModuleView {
45 Bool disableWatchdog;
46 Bool configurePll;
47 UInt pllcrDIV;
48 UInt pllstsDIVSEL;
49 }
50
51 @Facet
52 metaonly config ViewInfo.Instance rovViewInfo =
53 ViewInfo.create({
54 viewMap: [
55 [
56 'Module',
57 {
58 type: ViewInfo.MODULE,
59 viewInitFxn: 'viewInitModule',
60 structName: 'ModuleView'
61 }
62 ],
63 ]
64 });
65
66 /*!
67 * Watchdog disable flag, default is false.
68 *
69 * Set to true to automatically disabled the watchdog timer.
70 */
71 config Bool disableWatchdog = false;
72
73 /*!
74 * PLL configuration flag, default is false.
75 *
76 * Set to true to automatically configure the PLL.
77 */
78 config Bool configurePll = false;
79
80 /*!
81 * PLLCR[DIV] value. Default is 10.
82 *
83 * This is the actual value written to the DIV bits in
84 * the PLL Control Register (PLLCR)
85 */
86 config UInt pllcrDIV = 10;
87
88 /*!
89 * PLLSTS[DIVSEL] value. Default is 2.
90 *
91 * This is the actual value written to the DIVSEL bits in
92 * the PLL Status Register (PLLSTS)
93 */
94 config UInt pllstsDIVSEL = 2;
95
96 /*!
97 * @_nodoc
98 * Configure the external memory interface (XINTF) for the eZdsp283xx
99 * devices.
100 *
101 * This will eventually be replaced by a more generic API for configuring
102 * the XINTF on any 28x device.
103 */
104 config Bool enableEzdspXintfConfig = false;
105 };
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109