1    /*
     2     * Copyright (c) 2014 Texas Instruments Incorporated - https://www.ti.com
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32    
    33    /*
    34     *  ======== InterruptArp32.xdc ========
    35     */
    36    package ti.sdo.ipc.family.tda3xx;
    37    
    38    import ti.sdo.utils.MultiProc;
    39    
    40    /*!
    41     *  ======== InterruptArp32 ========
    42     *  ARP32 based interrupt manager
    43     */
    44    module InterruptArp32 inherits ti.sdo.ipc.notifyDrivers.IInterrupt
    45    {
    46        /* Total number of cores on SoC */
    47        const UInt8 NUM_CORES = 5;
    48    
    49        /* Number of Cores in EVE Sub-system */
    50        const UInt8 NUM_EVES = 1;
    51    
    52        /* Number of Internal EVE mailboxes */
    53        const UInt8 NUM_EVE_MBX = 2;
    54    
    55        /* Number of System Mailboxes */
    56        const UInt8 NUM_SYS_MBX = 1;
    57    
    58        /* Base address for the Mailbox subsystem */
    59        config UInt32 mailboxBaseAddr[NUM_EVE_MBX + NUM_SYS_MBX];
    60    
    61    internal:
    62    
    63        /*
    64         * Mailbox table for storing encoded Base Address, mailbox user Id,
    65         * and sub-mailbox index.
    66         */
    67        config UInt32 mailboxTable[NUM_CORES * NUM_CORES];
    68    
    69        config UInt32 eveInterruptTable[NUM_CORES];
    70    
    71        config UInt32 procIdTable[NUM_CORES];
    72    
    73        /*! Statically retrieve procIds to avoid doing this at runtime */
    74        config UInt eve1ProcId     = MultiProc.INVALIDID;
    75        config UInt dsp1ProcId     = MultiProc.INVALIDID;
    76        config UInt dsp2ProcId     = MultiProc.INVALIDID;
    77        config UInt ipu1_0ProcId   = MultiProc.INVALIDID;
    78        config UInt ipu1_1ProcId   = MultiProc.INVALIDID;
    79    
    80        /*! Function table */
    81        struct FxnTable {
    82            Fxn    func;
    83            UArg   arg;
    84        }
    85    
    86        /*! Stub to be plugged for dsp-arp32 interrupts */
    87        Void intShmStub(UInt16 idx);
    88    
    89        struct Module_State {
    90    
    91            /*  Interrupt isr dispatch table. This table is indexed
    92             *  by virtual processor ID.
    93             */
    94            FxnTable fxnTable[NUM_CORES];
    95        };
    96    }