1    /*
     2     * Copyright (c) 2012-2013, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32    /*
    33     *  ======== InterruptArp32.xdc ========
    34     *
    35     */
    36    
    37    import ti.sdo.utils.MultiProc;
    38    
    39    /*!
    40     *  ======== InterruptArp32 ========
    41     *  ARP32 based interrupt manager
    42     */
    43    
    44    module InterruptArp32 inherits ti.sdo.ipc.notifyDrivers.IInterrupt
    45    {
    46        /* Total number of cores on Vayu SoC */
    47        const UInt8 NUM_CORES = 11;
    48    
    49        /* Number of Cores in EVE Sub-system */
    50        const UInt8 NUM_EVES = 4;
    51    
    52        /* Number of Internal EVE mailboxes */
    53        const UInt8 NUM_EVE_MBX = 12;
    54    
    55        /* Number of System Mailboxes */
    56        const UInt8 NUM_SYS_MBX = 4;
    57    
    58        /* Base address for the Mailbox subsystem */
    59        config UInt32 mailboxBaseAddr[NUM_EVE_MBX + NUM_SYS_MBX];
    60    
    61        /*
    62         * Mailbox table for storing encoded Base Address, mailbox user Id,
    63         * and sub-mailbox index.
    64         */
    65        config UInt32 mailboxTable[NUM_CORES * NUM_CORES];
    66    
    67        config UInt32 eveInterruptTable[NUM_CORES];
    68    
    69        config UInt32 procIdTable[NUM_CORES];
    70    
    71    internal:
    72    
    73        /*! Statically retrieve procIds to avoid doing this at runtime */
    74        config UInt eve1ProcId     = MultiProc.INVALIDID;
    75        config UInt eve2ProcId     = MultiProc.INVALIDID;
    76        config UInt eve3ProcId     = MultiProc.INVALIDID;
    77        config UInt eve4ProcId     = MultiProc.INVALIDID;
    78        config UInt dsp1ProcId     = MultiProc.INVALIDID;
    79        config UInt dsp2ProcId     = MultiProc.INVALIDID;
    80        config UInt ipu1_0ProcId   = MultiProc.INVALIDID;
    81        config UInt ipu2_0ProcId   = MultiProc.INVALIDID;
    82        config UInt hostProcId     = MultiProc.INVALIDID;
    83        config UInt ipu1_1ProcId   = MultiProc.INVALIDID;
    84        config UInt ipu2_1ProcId   = MultiProc.INVALIDID;
    85    
    86        /*! Function table */
    87        struct FxnTable {
    88            Fxn    func;
    89            UArg   arg;
    90        }
    91    
    92        /*! Stub to be plugged for dsp-arp32 interrupts */
    93        Void intShmStub(UArg arg);
    94    
    95        struct Module_State {
    96            /*
    97             * Create a function table of length 8 (Total number of cores in the
    98             * System) for each EVE core.
    99             */
   100            FxnTable   fxnTable[NUM_CORES];
   101    
   102            /*
   103             * numPlugged is used to track number of times the interrupt was
   104             * registered.
   105             *
   106             * numPlugged array length equals number of internal mailboxes per
   107             * EVE.
   108             */
   109            UInt16 numPlugged[NUM_EVE_MBX/NUM_EVES];
   110        };
   111    }