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33 /*!
34 * ======== DSKT2 ========
35 * XDAIS algorithm management library.
36 */
37 @Template("./DSKT2.xdt")
38
39 metaonly module DSKT2 {
40
41 /*!
42 * ======== DEFAULTSEG ========
43 * Default segment to allocate memory from.
44 */
45 const string DEFAULTSEG = "IRAM";
46
47 /*!
48 * ======== DARAM0 ========
49 * IALG memory space mapping of IALG_DARAM0. This must match a BIOS heap.
50 */
51 config string DARAM0 = DEFAULTSEG;
52
53 /*!
54 * ======== DARAM1 ========
55 * IALG memory space mapping of IALG_DARAM1. This must match a BIOS heap.
56 */
57 config string DARAM1 = DEFAULTSEG;
58
59 /*!
60 * ======== DARAM2 ========
61 * IALG memory space mapping of IALG_DARAM2. This must match a BIOS heap.
62 */
63 config string DARAM2 = DEFAULTSEG;
64
65 /*!
66 * ======== SARAM0 ========
67 * IALG memory space mapping of IALG_SARAM0. This must match a BIOS heap.
68 */
69 config string SARAM0 = DEFAULTSEG;
70
71 /*!
72 * ======== SARAM1 ========
73 * IALG memory space mapping of IALG_SARAM1. This must match a BIOS heap.
74 */
75 config string SARAM1 = DEFAULTSEG;
76
77 /*!
78 * ======== SARAM2 ========
79 * IALG memory space mapping of IALG_SARAM2. This must match a BIOS heap.
80 */
81 config string SARAM2 = DEFAULTSEG;
82
83 /*!
84 * ======== ESDATA ========
85 * IALG memory space mapping of IALG_ESDATA. This must match a BIOS heap.
86 */
87 config string ESDATA = DEFAULTSEG;
88
89 /*!
90 * ======== IPROG ========
91 * IALG memory space mapping of IALG_IPROG. This must match a BIOS heap.
92 */
93 config string IPROG = DEFAULTSEG;
94
95 /*!
96 * ======== EPROG ========
97 * IALG memory space mapping of IALG_EPROG. This must match a BIOS heap.
98 */
99 config string EPROG = DEFAULTSEG;
100
101
102 /*!
103 * ======== DSKT2_HEAP ========
104 * Memory segment for internal DSKT2 data structures.
105 *
106 * Objects internal to the DSKT2 module will be allocated from this heap.
107 */
108 config string DSKT2_HEAP = DEFAULTSEG;
109
110 /*!
111 * ======== ALLOW_EXTERNAL_SCRATCH ========
112 * Allow external memory to be used for algorithm scratch memory requests.
113 *
114 * If an algorithm requests scratch memory, and insufficient scratch
115 * memory is available, scratch buffers will be allocated in external
116 * memory if property is 'true'.
117 */
118 config bool ALLOW_EXTERNAL_SCRATCH = true;
119
120 /*!
121 * ======== DARAM_SCRATCH_SIZES ========
122 * Shared IALG_DARAM0 scratch group sizes.
123 */
124 config UInt DARAM_SCRATCH_SIZES[] =
125 [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0];
126
127 /*!
128 * ======== SARAM_SCRATCH_SIZES ========
129 * Shared IALG_SARAM0 scratch group sizes.
130 */
131 config UInt SARAM_SCRATCH_SIZES[] =
132 [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0];
133
134 /*!
135 * ======== debug ========
136 * Enable the debug profile of the DSKT2 module.
137 *
138 * This will result in a larger and slower library being linked in,
139 * but it will provide extra parameter checking to ensure callers are
140 * meeting the API requirements.
141 *
142 * If these API requirements are not met, `SYS_abort()` will be called.
143 * @_nodoc
144 */
145 config bool debug = false;
146
147 /*!
148 * ======== cacheWritebackInvalidateFxn ========
149 * Name of function implementing cache writeback invalidate.
150 *
151 * This function must have the following signature:
152 * @p(code)
153 * (*DSKT2_CacheWBInvFxn)(Ptr blockPtr, size_t byteCnt, bool wait)
154 * @p
155 *
156 * For C6000 platforms DSKT2 calls this function to ensure that the
157 * algorithm instance memory is not resident in cache when it is
158 * instantiated. This is necessary for compliance with XDAIS C6000 DMA
159 * Rules and Guidelines.
160 */
161 config String cacheWritebackInvalidateFxn = "BCACHE_wbInv";
162
163 /*!
164 * ======== trace ========
165 * Enable trace in the DSKT2 library.
166 *
167 * This will result in a larger and slower library being linked in,
168 * but it will provide trace statements for debugging purposes.
169 * @_nodoc
170 */
171 config bool trace = false;
172 }
173
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178